chip.c 29 KB

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  1. /*
  2. * linux/kernel/irq/chip.c
  3. *
  4. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  5. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  6. *
  7. * This file contains the core interrupt handling code, for irq-chip
  8. * based architectures.
  9. *
  10. * Detailed information is available in Documentation/DocBook/genericirq
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/msi.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include <linux/irqdomain.h>
  18. #include <trace/events/irq.h>
  19. #include "internals.h"
  20. static irqreturn_t bad_chained_irq(int irq, void *dev_id)
  21. {
  22. WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
  23. return IRQ_NONE;
  24. }
  25. /*
  26. * Chained handlers should never call action on their IRQ. This default
  27. * action will emit warning if such thing happens.
  28. */
  29. struct irqaction chained_action = {
  30. .handler = bad_chained_irq,
  31. };
  32. /**
  33. * irq_set_chip - set the irq chip for an irq
  34. * @irq: irq number
  35. * @chip: pointer to irq chip description structure
  36. */
  37. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  38. {
  39. unsigned long flags;
  40. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  41. if (!desc)
  42. return -EINVAL;
  43. if (!chip)
  44. chip = &no_irq_chip;
  45. desc->irq_data.chip = chip;
  46. irq_put_desc_unlock(desc, flags);
  47. /*
  48. * For !CONFIG_SPARSE_IRQ make the irq show up in
  49. * allocated_irqs.
  50. */
  51. irq_mark_irq(irq);
  52. return 0;
  53. }
  54. EXPORT_SYMBOL(irq_set_chip);
  55. /**
  56. * irq_set_type - set the irq trigger type for an irq
  57. * @irq: irq number
  58. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  59. */
  60. int irq_set_irq_type(unsigned int irq, unsigned int type)
  61. {
  62. unsigned long flags;
  63. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  64. int ret = 0;
  65. if (!desc)
  66. return -EINVAL;
  67. type &= IRQ_TYPE_SENSE_MASK;
  68. ret = __irq_set_trigger(desc, type);
  69. irq_put_desc_busunlock(desc, flags);
  70. return ret;
  71. }
  72. EXPORT_SYMBOL(irq_set_irq_type);
  73. /**
  74. * irq_set_handler_data - set irq handler data for an irq
  75. * @irq: Interrupt number
  76. * @data: Pointer to interrupt specific data
  77. *
  78. * Set the hardware irq controller data for an irq
  79. */
  80. int irq_set_handler_data(unsigned int irq, void *data)
  81. {
  82. unsigned long flags;
  83. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  84. if (!desc)
  85. return -EINVAL;
  86. desc->irq_common_data.handler_data = data;
  87. irq_put_desc_unlock(desc, flags);
  88. return 0;
  89. }
  90. EXPORT_SYMBOL(irq_set_handler_data);
  91. /**
  92. * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
  93. * @irq_base: Interrupt number base
  94. * @irq_offset: Interrupt number offset
  95. * @entry: Pointer to MSI descriptor data
  96. *
  97. * Set the MSI descriptor entry for an irq at offset
  98. */
  99. int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
  100. struct msi_desc *entry)
  101. {
  102. unsigned long flags;
  103. struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  104. if (!desc)
  105. return -EINVAL;
  106. desc->irq_common_data.msi_desc = entry;
  107. if (entry && !irq_offset)
  108. entry->irq = irq_base;
  109. irq_put_desc_unlock(desc, flags);
  110. return 0;
  111. }
  112. /**
  113. * irq_set_msi_desc - set MSI descriptor data for an irq
  114. * @irq: Interrupt number
  115. * @entry: Pointer to MSI descriptor data
  116. *
  117. * Set the MSI descriptor entry for an irq
  118. */
  119. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  120. {
  121. return irq_set_msi_desc_off(irq, 0, entry);
  122. }
  123. /**
  124. * irq_set_chip_data - set irq chip data for an irq
  125. * @irq: Interrupt number
  126. * @data: Pointer to chip specific data
  127. *
  128. * Set the hardware irq chip data for an irq
  129. */
  130. int irq_set_chip_data(unsigned int irq, void *data)
  131. {
  132. unsigned long flags;
  133. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  134. if (!desc)
  135. return -EINVAL;
  136. desc->irq_data.chip_data = data;
  137. irq_put_desc_unlock(desc, flags);
  138. return 0;
  139. }
  140. EXPORT_SYMBOL(irq_set_chip_data);
  141. struct irq_data *irq_get_irq_data(unsigned int irq)
  142. {
  143. struct irq_desc *desc = irq_to_desc(irq);
  144. return desc ? &desc->irq_data : NULL;
  145. }
  146. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  147. static void irq_state_clr_disabled(struct irq_desc *desc)
  148. {
  149. irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
  150. }
  151. static void irq_state_set_disabled(struct irq_desc *desc)
  152. {
  153. irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
  154. }
  155. static void irq_state_clr_masked(struct irq_desc *desc)
  156. {
  157. irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
  158. }
  159. static void irq_state_set_masked(struct irq_desc *desc)
  160. {
  161. irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
  162. }
  163. int irq_startup(struct irq_desc *desc, bool resend)
  164. {
  165. int ret = 0;
  166. irq_state_clr_disabled(desc);
  167. desc->depth = 0;
  168. irq_domain_activate_irq(&desc->irq_data);
  169. if (desc->irq_data.chip->irq_startup) {
  170. ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
  171. irq_state_clr_masked(desc);
  172. } else {
  173. irq_enable(desc);
  174. }
  175. if (resend)
  176. check_irq_resend(desc);
  177. return ret;
  178. }
  179. void irq_shutdown(struct irq_desc *desc)
  180. {
  181. irq_state_set_disabled(desc);
  182. desc->depth = 1;
  183. if (desc->irq_data.chip->irq_shutdown)
  184. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  185. else if (desc->irq_data.chip->irq_disable)
  186. desc->irq_data.chip->irq_disable(&desc->irq_data);
  187. else
  188. desc->irq_data.chip->irq_mask(&desc->irq_data);
  189. irq_domain_deactivate_irq(&desc->irq_data);
  190. irq_state_set_masked(desc);
  191. }
  192. void irq_enable(struct irq_desc *desc)
  193. {
  194. irq_state_clr_disabled(desc);
  195. if (desc->irq_data.chip->irq_enable)
  196. desc->irq_data.chip->irq_enable(&desc->irq_data);
  197. else
  198. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  199. irq_state_clr_masked(desc);
  200. }
  201. /**
  202. * irq_disable - Mark interrupt disabled
  203. * @desc: irq descriptor which should be disabled
  204. *
  205. * If the chip does not implement the irq_disable callback, we
  206. * use a lazy disable approach. That means we mark the interrupt
  207. * disabled, but leave the hardware unmasked. That's an
  208. * optimization because we avoid the hardware access for the
  209. * common case where no interrupt happens after we marked it
  210. * disabled. If an interrupt happens, then the interrupt flow
  211. * handler masks the line at the hardware level and marks it
  212. * pending.
  213. *
  214. * If the interrupt chip does not implement the irq_disable callback,
  215. * a driver can disable the lazy approach for a particular irq line by
  216. * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
  217. * be used for devices which cannot disable the interrupt at the
  218. * device level under certain circumstances and have to use
  219. * disable_irq[_nosync] instead.
  220. */
  221. void irq_disable(struct irq_desc *desc)
  222. {
  223. irq_state_set_disabled(desc);
  224. if (desc->irq_data.chip->irq_disable) {
  225. desc->irq_data.chip->irq_disable(&desc->irq_data);
  226. irq_state_set_masked(desc);
  227. } else if (irq_settings_disable_unlazy(desc)) {
  228. mask_irq(desc);
  229. }
  230. }
  231. void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
  232. {
  233. if (desc->irq_data.chip->irq_enable)
  234. desc->irq_data.chip->irq_enable(&desc->irq_data);
  235. else
  236. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  237. cpumask_set_cpu(cpu, desc->percpu_enabled);
  238. }
  239. void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
  240. {
  241. if (desc->irq_data.chip->irq_disable)
  242. desc->irq_data.chip->irq_disable(&desc->irq_data);
  243. else
  244. desc->irq_data.chip->irq_mask(&desc->irq_data);
  245. cpumask_clear_cpu(cpu, desc->percpu_enabled);
  246. }
  247. static inline void mask_ack_irq(struct irq_desc *desc)
  248. {
  249. if (desc->irq_data.chip->irq_mask_ack)
  250. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  251. else {
  252. desc->irq_data.chip->irq_mask(&desc->irq_data);
  253. if (desc->irq_data.chip->irq_ack)
  254. desc->irq_data.chip->irq_ack(&desc->irq_data);
  255. }
  256. irq_state_set_masked(desc);
  257. }
  258. void mask_irq(struct irq_desc *desc)
  259. {
  260. if (desc->irq_data.chip->irq_mask) {
  261. desc->irq_data.chip->irq_mask(&desc->irq_data);
  262. irq_state_set_masked(desc);
  263. }
  264. }
  265. void unmask_irq(struct irq_desc *desc)
  266. {
  267. if (desc->irq_data.chip->irq_unmask) {
  268. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  269. irq_state_clr_masked(desc);
  270. }
  271. }
  272. void unmask_threaded_irq(struct irq_desc *desc)
  273. {
  274. struct irq_chip *chip = desc->irq_data.chip;
  275. if (chip->flags & IRQCHIP_EOI_THREADED)
  276. chip->irq_eoi(&desc->irq_data);
  277. if (chip->irq_unmask) {
  278. chip->irq_unmask(&desc->irq_data);
  279. irq_state_clr_masked(desc);
  280. }
  281. }
  282. /*
  283. * handle_nested_irq - Handle a nested irq from a irq thread
  284. * @irq: the interrupt number
  285. *
  286. * Handle interrupts which are nested into a threaded interrupt
  287. * handler. The handler function is called inside the calling
  288. * threads context.
  289. */
  290. void handle_nested_irq(unsigned int irq)
  291. {
  292. struct irq_desc *desc = irq_to_desc(irq);
  293. struct irqaction *action;
  294. irqreturn_t action_ret;
  295. might_sleep();
  296. raw_spin_lock_irq(&desc->lock);
  297. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  298. action = desc->action;
  299. if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
  300. desc->istate |= IRQS_PENDING;
  301. goto out_unlock;
  302. }
  303. kstat_incr_irqs_this_cpu(desc);
  304. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  305. raw_spin_unlock_irq(&desc->lock);
  306. action_ret = action->thread_fn(action->irq, action->dev_id);
  307. if (!noirqdebug)
  308. note_interrupt(desc, action_ret);
  309. raw_spin_lock_irq(&desc->lock);
  310. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  311. out_unlock:
  312. raw_spin_unlock_irq(&desc->lock);
  313. }
  314. EXPORT_SYMBOL_GPL(handle_nested_irq);
  315. static bool irq_check_poll(struct irq_desc *desc)
  316. {
  317. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  318. return false;
  319. return irq_wait_for_poll(desc);
  320. }
  321. static bool irq_may_run(struct irq_desc *desc)
  322. {
  323. unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
  324. /*
  325. * If the interrupt is not in progress and is not an armed
  326. * wakeup interrupt, proceed.
  327. */
  328. if (!irqd_has_set(&desc->irq_data, mask))
  329. return true;
  330. /*
  331. * If the interrupt is an armed wakeup source, mark it pending
  332. * and suspended, disable it and notify the pm core about the
  333. * event.
  334. */
  335. if (irq_pm_check_wakeup(desc))
  336. return false;
  337. /*
  338. * Handle a potential concurrent poll on a different core.
  339. */
  340. return irq_check_poll(desc);
  341. }
  342. /**
  343. * handle_simple_irq - Simple and software-decoded IRQs.
  344. * @desc: the interrupt description structure for this irq
  345. *
  346. * Simple interrupts are either sent from a demultiplexing interrupt
  347. * handler or come from hardware, where no interrupt hardware control
  348. * is necessary.
  349. *
  350. * Note: The caller is expected to handle the ack, clear, mask and
  351. * unmask issues if necessary.
  352. */
  353. void handle_simple_irq(struct irq_desc *desc)
  354. {
  355. raw_spin_lock(&desc->lock);
  356. if (!irq_may_run(desc))
  357. goto out_unlock;
  358. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  359. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  360. desc->istate |= IRQS_PENDING;
  361. goto out_unlock;
  362. }
  363. kstat_incr_irqs_this_cpu(desc);
  364. handle_irq_event(desc);
  365. out_unlock:
  366. raw_spin_unlock(&desc->lock);
  367. }
  368. EXPORT_SYMBOL_GPL(handle_simple_irq);
  369. /**
  370. * handle_untracked_irq - Simple and software-decoded IRQs.
  371. * @desc: the interrupt description structure for this irq
  372. *
  373. * Untracked interrupts are sent from a demultiplexing interrupt
  374. * handler when the demultiplexer does not know which device it its
  375. * multiplexed irq domain generated the interrupt. IRQ's handled
  376. * through here are not subjected to stats tracking, randomness, or
  377. * spurious interrupt detection.
  378. *
  379. * Note: Like handle_simple_irq, the caller is expected to handle
  380. * the ack, clear, mask and unmask issues if necessary.
  381. */
  382. void handle_untracked_irq(struct irq_desc *desc)
  383. {
  384. unsigned int flags = 0;
  385. raw_spin_lock(&desc->lock);
  386. if (!irq_may_run(desc))
  387. goto out_unlock;
  388. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  389. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  390. desc->istate |= IRQS_PENDING;
  391. goto out_unlock;
  392. }
  393. desc->istate &= ~IRQS_PENDING;
  394. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  395. raw_spin_unlock(&desc->lock);
  396. __handle_irq_event_percpu(desc, &flags);
  397. raw_spin_lock(&desc->lock);
  398. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  399. out_unlock:
  400. raw_spin_unlock(&desc->lock);
  401. }
  402. EXPORT_SYMBOL_GPL(handle_untracked_irq);
  403. /*
  404. * Called unconditionally from handle_level_irq() and only for oneshot
  405. * interrupts from handle_fasteoi_irq()
  406. */
  407. static void cond_unmask_irq(struct irq_desc *desc)
  408. {
  409. /*
  410. * We need to unmask in the following cases:
  411. * - Standard level irq (IRQF_ONESHOT is not set)
  412. * - Oneshot irq which did not wake the thread (caused by a
  413. * spurious interrupt or a primary handler handling it
  414. * completely).
  415. */
  416. if (!irqd_irq_disabled(&desc->irq_data) &&
  417. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
  418. unmask_irq(desc);
  419. }
  420. /**
  421. * handle_level_irq - Level type irq handler
  422. * @desc: the interrupt description structure for this irq
  423. *
  424. * Level type interrupts are active as long as the hardware line has
  425. * the active level. This may require to mask the interrupt and unmask
  426. * it after the associated handler has acknowledged the device, so the
  427. * interrupt line is back to inactive.
  428. */
  429. void handle_level_irq(struct irq_desc *desc)
  430. {
  431. raw_spin_lock(&desc->lock);
  432. mask_ack_irq(desc);
  433. if (!irq_may_run(desc))
  434. goto out_unlock;
  435. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  436. /*
  437. * If its disabled or no action available
  438. * keep it masked and get out of here
  439. */
  440. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  441. desc->istate |= IRQS_PENDING;
  442. goto out_unlock;
  443. }
  444. kstat_incr_irqs_this_cpu(desc);
  445. handle_irq_event(desc);
  446. cond_unmask_irq(desc);
  447. out_unlock:
  448. raw_spin_unlock(&desc->lock);
  449. }
  450. EXPORT_SYMBOL_GPL(handle_level_irq);
  451. #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
  452. static inline void preflow_handler(struct irq_desc *desc)
  453. {
  454. if (desc->preflow_handler)
  455. desc->preflow_handler(&desc->irq_data);
  456. }
  457. #else
  458. static inline void preflow_handler(struct irq_desc *desc) { }
  459. #endif
  460. static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
  461. {
  462. if (!(desc->istate & IRQS_ONESHOT)) {
  463. chip->irq_eoi(&desc->irq_data);
  464. return;
  465. }
  466. /*
  467. * We need to unmask in the following cases:
  468. * - Oneshot irq which did not wake the thread (caused by a
  469. * spurious interrupt or a primary handler handling it
  470. * completely).
  471. */
  472. if (!irqd_irq_disabled(&desc->irq_data) &&
  473. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
  474. chip->irq_eoi(&desc->irq_data);
  475. unmask_irq(desc);
  476. } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
  477. chip->irq_eoi(&desc->irq_data);
  478. }
  479. }
  480. /**
  481. * handle_fasteoi_irq - irq handler for transparent controllers
  482. * @desc: the interrupt description structure for this irq
  483. *
  484. * Only a single callback will be issued to the chip: an ->eoi()
  485. * call when the interrupt has been serviced. This enables support
  486. * for modern forms of interrupt handlers, which handle the flow
  487. * details in hardware, transparently.
  488. */
  489. void handle_fasteoi_irq(struct irq_desc *desc)
  490. {
  491. struct irq_chip *chip = desc->irq_data.chip;
  492. raw_spin_lock(&desc->lock);
  493. if (!irq_may_run(desc))
  494. goto out;
  495. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  496. /*
  497. * If its disabled or no action available
  498. * then mask it and get out of here:
  499. */
  500. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  501. desc->istate |= IRQS_PENDING;
  502. mask_irq(desc);
  503. goto out;
  504. }
  505. kstat_incr_irqs_this_cpu(desc);
  506. if (desc->istate & IRQS_ONESHOT)
  507. mask_irq(desc);
  508. preflow_handler(desc);
  509. handle_irq_event(desc);
  510. cond_unmask_eoi_irq(desc, chip);
  511. raw_spin_unlock(&desc->lock);
  512. return;
  513. out:
  514. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  515. chip->irq_eoi(&desc->irq_data);
  516. raw_spin_unlock(&desc->lock);
  517. }
  518. EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
  519. /**
  520. * handle_edge_irq - edge type IRQ handler
  521. * @desc: the interrupt description structure for this irq
  522. *
  523. * Interrupt occures on the falling and/or rising edge of a hardware
  524. * signal. The occurrence is latched into the irq controller hardware
  525. * and must be acked in order to be reenabled. After the ack another
  526. * interrupt can happen on the same source even before the first one
  527. * is handled by the associated event handler. If this happens it
  528. * might be necessary to disable (mask) the interrupt depending on the
  529. * controller hardware. This requires to reenable the interrupt inside
  530. * of the loop which handles the interrupts which have arrived while
  531. * the handler was running. If all pending interrupts are handled, the
  532. * loop is left.
  533. */
  534. void handle_edge_irq(struct irq_desc *desc)
  535. {
  536. raw_spin_lock(&desc->lock);
  537. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  538. if (!irq_may_run(desc)) {
  539. desc->istate |= IRQS_PENDING;
  540. mask_ack_irq(desc);
  541. goto out_unlock;
  542. }
  543. /*
  544. * If its disabled or no action available then mask it and get
  545. * out of here.
  546. */
  547. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  548. desc->istate |= IRQS_PENDING;
  549. mask_ack_irq(desc);
  550. goto out_unlock;
  551. }
  552. kstat_incr_irqs_this_cpu(desc);
  553. /* Start handling the irq */
  554. desc->irq_data.chip->irq_ack(&desc->irq_data);
  555. do {
  556. if (unlikely(!desc->action)) {
  557. mask_irq(desc);
  558. goto out_unlock;
  559. }
  560. /*
  561. * When another irq arrived while we were handling
  562. * one, we could have masked the irq.
  563. * Renable it, if it was not disabled in meantime.
  564. */
  565. if (unlikely(desc->istate & IRQS_PENDING)) {
  566. if (!irqd_irq_disabled(&desc->irq_data) &&
  567. irqd_irq_masked(&desc->irq_data))
  568. unmask_irq(desc);
  569. }
  570. handle_irq_event(desc);
  571. } while ((desc->istate & IRQS_PENDING) &&
  572. !irqd_irq_disabled(&desc->irq_data));
  573. out_unlock:
  574. raw_spin_unlock(&desc->lock);
  575. }
  576. EXPORT_SYMBOL(handle_edge_irq);
  577. #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
  578. /**
  579. * handle_edge_eoi_irq - edge eoi type IRQ handler
  580. * @desc: the interrupt description structure for this irq
  581. *
  582. * Similar as the above handle_edge_irq, but using eoi and w/o the
  583. * mask/unmask logic.
  584. */
  585. void handle_edge_eoi_irq(struct irq_desc *desc)
  586. {
  587. struct irq_chip *chip = irq_desc_get_chip(desc);
  588. raw_spin_lock(&desc->lock);
  589. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  590. if (!irq_may_run(desc)) {
  591. desc->istate |= IRQS_PENDING;
  592. goto out_eoi;
  593. }
  594. /*
  595. * If its disabled or no action available then mask it and get
  596. * out of here.
  597. */
  598. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  599. desc->istate |= IRQS_PENDING;
  600. goto out_eoi;
  601. }
  602. kstat_incr_irqs_this_cpu(desc);
  603. do {
  604. if (unlikely(!desc->action))
  605. goto out_eoi;
  606. handle_irq_event(desc);
  607. } while ((desc->istate & IRQS_PENDING) &&
  608. !irqd_irq_disabled(&desc->irq_data));
  609. out_eoi:
  610. chip->irq_eoi(&desc->irq_data);
  611. raw_spin_unlock(&desc->lock);
  612. }
  613. #endif
  614. /**
  615. * handle_percpu_irq - Per CPU local irq handler
  616. * @desc: the interrupt description structure for this irq
  617. *
  618. * Per CPU interrupts on SMP machines without locking requirements
  619. */
  620. void handle_percpu_irq(struct irq_desc *desc)
  621. {
  622. struct irq_chip *chip = irq_desc_get_chip(desc);
  623. kstat_incr_irqs_this_cpu(desc);
  624. if (chip->irq_ack)
  625. chip->irq_ack(&desc->irq_data);
  626. handle_irq_event_percpu(desc);
  627. if (chip->irq_eoi)
  628. chip->irq_eoi(&desc->irq_data);
  629. }
  630. /**
  631. * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
  632. * @desc: the interrupt description structure for this irq
  633. *
  634. * Per CPU interrupts on SMP machines without locking requirements. Same as
  635. * handle_percpu_irq() above but with the following extras:
  636. *
  637. * action->percpu_dev_id is a pointer to percpu variables which
  638. * contain the real device id for the cpu on which this handler is
  639. * called
  640. */
  641. void handle_percpu_devid_irq(struct irq_desc *desc)
  642. {
  643. struct irq_chip *chip = irq_desc_get_chip(desc);
  644. struct irqaction *action = desc->action;
  645. void *dev_id = raw_cpu_ptr(action->percpu_dev_id);
  646. unsigned int irq = irq_desc_get_irq(desc);
  647. irqreturn_t res;
  648. kstat_incr_irqs_this_cpu(desc);
  649. if (chip->irq_ack)
  650. chip->irq_ack(&desc->irq_data);
  651. trace_irq_handler_entry(irq, action);
  652. res = action->handler(irq, dev_id);
  653. trace_irq_handler_exit(irq, action, res);
  654. if (chip->irq_eoi)
  655. chip->irq_eoi(&desc->irq_data);
  656. }
  657. void
  658. __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
  659. int is_chained, const char *name)
  660. {
  661. if (!handle) {
  662. handle = handle_bad_irq;
  663. } else {
  664. struct irq_data *irq_data = &desc->irq_data;
  665. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  666. /*
  667. * With hierarchical domains we might run into a
  668. * situation where the outermost chip is not yet set
  669. * up, but the inner chips are there. Instead of
  670. * bailing we install the handler, but obviously we
  671. * cannot enable/startup the interrupt at this point.
  672. */
  673. while (irq_data) {
  674. if (irq_data->chip != &no_irq_chip)
  675. break;
  676. /*
  677. * Bail out if the outer chip is not set up
  678. * and the interrrupt supposed to be started
  679. * right away.
  680. */
  681. if (WARN_ON(is_chained))
  682. return;
  683. /* Try the parent */
  684. irq_data = irq_data->parent_data;
  685. }
  686. #endif
  687. if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
  688. return;
  689. }
  690. /* Uninstall? */
  691. if (handle == handle_bad_irq) {
  692. if (desc->irq_data.chip != &no_irq_chip)
  693. mask_ack_irq(desc);
  694. irq_state_set_disabled(desc);
  695. if (is_chained)
  696. desc->action = NULL;
  697. desc->depth = 1;
  698. }
  699. desc->handle_irq = handle;
  700. desc->name = name;
  701. if (handle != handle_bad_irq && is_chained) {
  702. irq_settings_set_noprobe(desc);
  703. irq_settings_set_norequest(desc);
  704. irq_settings_set_nothread(desc);
  705. desc->action = &chained_action;
  706. irq_startup(desc, true);
  707. }
  708. }
  709. void
  710. __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  711. const char *name)
  712. {
  713. unsigned long flags;
  714. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  715. if (!desc)
  716. return;
  717. __irq_do_set_handler(desc, handle, is_chained, name);
  718. irq_put_desc_busunlock(desc, flags);
  719. }
  720. EXPORT_SYMBOL_GPL(__irq_set_handler);
  721. void
  722. irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
  723. void *data)
  724. {
  725. unsigned long flags;
  726. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  727. if (!desc)
  728. return;
  729. __irq_do_set_handler(desc, handle, 1, NULL);
  730. desc->irq_common_data.handler_data = data;
  731. irq_put_desc_busunlock(desc, flags);
  732. }
  733. EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
  734. void
  735. irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  736. irq_flow_handler_t handle, const char *name)
  737. {
  738. irq_set_chip(irq, chip);
  739. __irq_set_handler(irq, handle, 0, name);
  740. }
  741. EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
  742. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  743. {
  744. unsigned long flags;
  745. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  746. if (!desc)
  747. return;
  748. irq_settings_clr_and_set(desc, clr, set);
  749. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  750. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  751. if (irq_settings_has_no_balance_set(desc))
  752. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  753. if (irq_settings_is_per_cpu(desc))
  754. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  755. if (irq_settings_can_move_pcntxt(desc))
  756. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  757. if (irq_settings_is_level(desc))
  758. irqd_set(&desc->irq_data, IRQD_LEVEL);
  759. irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
  760. irq_put_desc_unlock(desc, flags);
  761. }
  762. EXPORT_SYMBOL_GPL(irq_modify_status);
  763. /**
  764. * irq_cpu_online - Invoke all irq_cpu_online functions.
  765. *
  766. * Iterate through all irqs and invoke the chip.irq_cpu_online()
  767. * for each.
  768. */
  769. void irq_cpu_online(void)
  770. {
  771. struct irq_desc *desc;
  772. struct irq_chip *chip;
  773. unsigned long flags;
  774. unsigned int irq;
  775. for_each_active_irq(irq) {
  776. desc = irq_to_desc(irq);
  777. if (!desc)
  778. continue;
  779. raw_spin_lock_irqsave(&desc->lock, flags);
  780. chip = irq_data_get_irq_chip(&desc->irq_data);
  781. if (chip && chip->irq_cpu_online &&
  782. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  783. !irqd_irq_disabled(&desc->irq_data)))
  784. chip->irq_cpu_online(&desc->irq_data);
  785. raw_spin_unlock_irqrestore(&desc->lock, flags);
  786. }
  787. }
  788. /**
  789. * irq_cpu_offline - Invoke all irq_cpu_offline functions.
  790. *
  791. * Iterate through all irqs and invoke the chip.irq_cpu_offline()
  792. * for each.
  793. */
  794. void irq_cpu_offline(void)
  795. {
  796. struct irq_desc *desc;
  797. struct irq_chip *chip;
  798. unsigned long flags;
  799. unsigned int irq;
  800. for_each_active_irq(irq) {
  801. desc = irq_to_desc(irq);
  802. if (!desc)
  803. continue;
  804. raw_spin_lock_irqsave(&desc->lock, flags);
  805. chip = irq_data_get_irq_chip(&desc->irq_data);
  806. if (chip && chip->irq_cpu_offline &&
  807. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  808. !irqd_irq_disabled(&desc->irq_data)))
  809. chip->irq_cpu_offline(&desc->irq_data);
  810. raw_spin_unlock_irqrestore(&desc->lock, flags);
  811. }
  812. }
  813. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  814. /**
  815. * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
  816. * NULL)
  817. * @data: Pointer to interrupt specific data
  818. */
  819. void irq_chip_enable_parent(struct irq_data *data)
  820. {
  821. data = data->parent_data;
  822. if (data->chip->irq_enable)
  823. data->chip->irq_enable(data);
  824. else
  825. data->chip->irq_unmask(data);
  826. }
  827. /**
  828. * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
  829. * NULL)
  830. * @data: Pointer to interrupt specific data
  831. */
  832. void irq_chip_disable_parent(struct irq_data *data)
  833. {
  834. data = data->parent_data;
  835. if (data->chip->irq_disable)
  836. data->chip->irq_disable(data);
  837. else
  838. data->chip->irq_mask(data);
  839. }
  840. /**
  841. * irq_chip_ack_parent - Acknowledge the parent interrupt
  842. * @data: Pointer to interrupt specific data
  843. */
  844. void irq_chip_ack_parent(struct irq_data *data)
  845. {
  846. data = data->parent_data;
  847. data->chip->irq_ack(data);
  848. }
  849. EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
  850. /**
  851. * irq_chip_mask_parent - Mask the parent interrupt
  852. * @data: Pointer to interrupt specific data
  853. */
  854. void irq_chip_mask_parent(struct irq_data *data)
  855. {
  856. data = data->parent_data;
  857. data->chip->irq_mask(data);
  858. }
  859. EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
  860. /**
  861. * irq_chip_unmask_parent - Unmask the parent interrupt
  862. * @data: Pointer to interrupt specific data
  863. */
  864. void irq_chip_unmask_parent(struct irq_data *data)
  865. {
  866. data = data->parent_data;
  867. data->chip->irq_unmask(data);
  868. }
  869. EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
  870. /**
  871. * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
  872. * @data: Pointer to interrupt specific data
  873. */
  874. void irq_chip_eoi_parent(struct irq_data *data)
  875. {
  876. data = data->parent_data;
  877. data->chip->irq_eoi(data);
  878. }
  879. EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
  880. /**
  881. * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
  882. * @data: Pointer to interrupt specific data
  883. * @dest: The affinity mask to set
  884. * @force: Flag to enforce setting (disable online checks)
  885. *
  886. * Conditinal, as the underlying parent chip might not implement it.
  887. */
  888. int irq_chip_set_affinity_parent(struct irq_data *data,
  889. const struct cpumask *dest, bool force)
  890. {
  891. data = data->parent_data;
  892. if (data->chip->irq_set_affinity)
  893. return data->chip->irq_set_affinity(data, dest, force);
  894. return -ENOSYS;
  895. }
  896. /**
  897. * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
  898. * @data: Pointer to interrupt specific data
  899. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  900. *
  901. * Conditional, as the underlying parent chip might not implement it.
  902. */
  903. int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
  904. {
  905. data = data->parent_data;
  906. if (data->chip->irq_set_type)
  907. return data->chip->irq_set_type(data, type);
  908. return -ENOSYS;
  909. }
  910. EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
  911. /**
  912. * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
  913. * @data: Pointer to interrupt specific data
  914. *
  915. * Iterate through the domain hierarchy of the interrupt and check
  916. * whether a hw retrigger function exists. If yes, invoke it.
  917. */
  918. int irq_chip_retrigger_hierarchy(struct irq_data *data)
  919. {
  920. for (data = data->parent_data; data; data = data->parent_data)
  921. if (data->chip && data->chip->irq_retrigger)
  922. return data->chip->irq_retrigger(data);
  923. return 0;
  924. }
  925. /**
  926. * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
  927. * @data: Pointer to interrupt specific data
  928. * @vcpu_info: The vcpu affinity information
  929. */
  930. int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
  931. {
  932. data = data->parent_data;
  933. if (data->chip->irq_set_vcpu_affinity)
  934. return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
  935. return -ENOSYS;
  936. }
  937. /**
  938. * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
  939. * @data: Pointer to interrupt specific data
  940. * @on: Whether to set or reset the wake-up capability of this irq
  941. *
  942. * Conditional, as the underlying parent chip might not implement it.
  943. */
  944. int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
  945. {
  946. data = data->parent_data;
  947. if (data->chip->irq_set_wake)
  948. return data->chip->irq_set_wake(data, on);
  949. return -ENOSYS;
  950. }
  951. #endif
  952. /**
  953. * irq_chip_compose_msi_msg - Componse msi message for a irq chip
  954. * @data: Pointer to interrupt specific data
  955. * @msg: Pointer to the MSI message
  956. *
  957. * For hierarchical domains we find the first chip in the hierarchy
  958. * which implements the irq_compose_msi_msg callback. For non
  959. * hierarchical we use the top level chip.
  960. */
  961. int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
  962. {
  963. struct irq_data *pos = NULL;
  964. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  965. for (; data; data = data->parent_data)
  966. #endif
  967. if (data->chip && data->chip->irq_compose_msi_msg)
  968. pos = data;
  969. if (!pos)
  970. return -ENOSYS;
  971. pos->chip->irq_compose_msi_msg(pos, msg);
  972. return 0;
  973. }
  974. /**
  975. * irq_chip_pm_get - Enable power for an IRQ chip
  976. * @data: Pointer to interrupt specific data
  977. *
  978. * Enable the power to the IRQ chip referenced by the interrupt data
  979. * structure.
  980. */
  981. int irq_chip_pm_get(struct irq_data *data)
  982. {
  983. int retval;
  984. if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device) {
  985. retval = pm_runtime_get_sync(data->chip->parent_device);
  986. if (retval < 0) {
  987. pm_runtime_put_noidle(data->chip->parent_device);
  988. return retval;
  989. }
  990. }
  991. return 0;
  992. }
  993. /**
  994. * irq_chip_pm_put - Disable power for an IRQ chip
  995. * @data: Pointer to interrupt specific data
  996. *
  997. * Disable the power to the IRQ chip referenced by the interrupt data
  998. * structure, belongs. Note that power will only be disabled, once this
  999. * function has been called for all IRQs that have called irq_chip_pm_get().
  1000. */
  1001. int irq_chip_pm_put(struct irq_data *data)
  1002. {
  1003. int retval = 0;
  1004. if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device)
  1005. retval = pm_runtime_put(data->chip->parent_device);
  1006. return (retval < 0) ? retval : 0;
  1007. }