irq_comm.c 10 KB

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  1. /*
  2. * irq_comm.c: Common API for in kernel interrupt controller
  3. * Copyright (c) 2007, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
  16. * Place - Suite 330, Boston, MA 02111-1307 USA.
  17. * Authors:
  18. * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
  19. *
  20. * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  21. */
  22. #include <linux/kvm_host.h>
  23. #include <linux/slab.h>
  24. #include <linux/export.h>
  25. #include <trace/events/kvm.h>
  26. #include <asm/msidef.h>
  27. #ifdef CONFIG_IA64
  28. #include <asm/iosapic.h>
  29. #endif
  30. #include "irq.h"
  31. #include "ioapic.h"
  32. static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
  33. struct kvm *kvm, int irq_source_id, int level,
  34. bool line_status)
  35. {
  36. #ifdef CONFIG_X86
  37. struct kvm_pic *pic = pic_irqchip(kvm);
  38. return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
  39. #else
  40. return -1;
  41. #endif
  42. }
  43. static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
  44. struct kvm *kvm, int irq_source_id, int level,
  45. bool line_status)
  46. {
  47. struct kvm_ioapic *ioapic = kvm->arch.vioapic;
  48. return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
  49. line_status);
  50. }
  51. inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
  52. {
  53. #ifdef CONFIG_IA64
  54. return irq->delivery_mode ==
  55. (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
  56. #else
  57. return irq->delivery_mode == APIC_DM_LOWEST;
  58. #endif
  59. }
  60. int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
  61. struct kvm_lapic_irq *irq, unsigned long *dest_map)
  62. {
  63. int i, r = -1;
  64. struct kvm_vcpu *vcpu, *lowest = NULL;
  65. if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
  66. kvm_is_dm_lowest_prio(irq)) {
  67. printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
  68. irq->delivery_mode = APIC_DM_FIXED;
  69. }
  70. if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
  71. return r;
  72. kvm_for_each_vcpu(i, vcpu, kvm) {
  73. if (!kvm_apic_present(vcpu))
  74. continue;
  75. if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
  76. irq->dest_id, irq->dest_mode))
  77. continue;
  78. if (!kvm_is_dm_lowest_prio(irq)) {
  79. if (r < 0)
  80. r = 0;
  81. r += kvm_apic_set_irq(vcpu, irq, dest_map);
  82. } else if (kvm_lapic_enabled(vcpu)) {
  83. if (!lowest)
  84. lowest = vcpu;
  85. else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
  86. lowest = vcpu;
  87. }
  88. }
  89. if (lowest)
  90. r = kvm_apic_set_irq(lowest, irq, dest_map);
  91. return r;
  92. }
  93. static inline void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e,
  94. struct kvm_lapic_irq *irq)
  95. {
  96. trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
  97. irq->dest_id = (e->msi.address_lo &
  98. MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
  99. irq->vector = (e->msi.data &
  100. MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
  101. irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
  102. irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
  103. irq->delivery_mode = e->msi.data & 0x700;
  104. irq->level = 1;
  105. irq->shorthand = 0;
  106. /* TODO Deal with RH bit of MSI message address */
  107. }
  108. int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
  109. struct kvm *kvm, int irq_source_id, int level, bool line_status)
  110. {
  111. struct kvm_lapic_irq irq;
  112. if (!level)
  113. return -1;
  114. kvm_set_msi_irq(e, &irq);
  115. return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
  116. }
  117. static int kvm_set_msi_inatomic(struct kvm_kernel_irq_routing_entry *e,
  118. struct kvm *kvm)
  119. {
  120. struct kvm_lapic_irq irq;
  121. int r;
  122. kvm_set_msi_irq(e, &irq);
  123. if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
  124. return r;
  125. else
  126. return -EWOULDBLOCK;
  127. }
  128. /*
  129. * Deliver an IRQ in an atomic context if we can, or return a failure,
  130. * user can retry in a process context.
  131. * Return value:
  132. * -EWOULDBLOCK - Can't deliver in atomic context: retry in a process context.
  133. * Other values - No need to retry.
  134. */
  135. int kvm_set_irq_inatomic(struct kvm *kvm, int irq_source_id, u32 irq, int level)
  136. {
  137. struct kvm_kernel_irq_routing_entry *e;
  138. int ret = -EINVAL;
  139. struct kvm_irq_routing_table *irq_rt;
  140. int idx;
  141. trace_kvm_set_irq(irq, level, irq_source_id);
  142. /*
  143. * Injection into either PIC or IOAPIC might need to scan all CPUs,
  144. * which would need to be retried from thread context; when same GSI
  145. * is connected to both PIC and IOAPIC, we'd have to report a
  146. * partial failure here.
  147. * Since there's no easy way to do this, we only support injecting MSI
  148. * which is limited to 1:1 GSI mapping.
  149. */
  150. idx = srcu_read_lock(&kvm->irq_srcu);
  151. irq_rt = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
  152. if (irq < irq_rt->nr_rt_entries)
  153. hlist_for_each_entry(e, &irq_rt->map[irq], link) {
  154. if (likely(e->type == KVM_IRQ_ROUTING_MSI))
  155. ret = kvm_set_msi_inatomic(e, kvm);
  156. else
  157. ret = -EWOULDBLOCK;
  158. break;
  159. }
  160. srcu_read_unlock(&kvm->irq_srcu, idx);
  161. return ret;
  162. }
  163. int kvm_request_irq_source_id(struct kvm *kvm)
  164. {
  165. unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
  166. int irq_source_id;
  167. mutex_lock(&kvm->irq_lock);
  168. irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
  169. if (irq_source_id >= BITS_PER_LONG) {
  170. printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
  171. irq_source_id = -EFAULT;
  172. goto unlock;
  173. }
  174. ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
  175. #ifdef CONFIG_X86
  176. ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
  177. #endif
  178. set_bit(irq_source_id, bitmap);
  179. unlock:
  180. mutex_unlock(&kvm->irq_lock);
  181. return irq_source_id;
  182. }
  183. void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
  184. {
  185. ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
  186. #ifdef CONFIG_X86
  187. ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
  188. #endif
  189. mutex_lock(&kvm->irq_lock);
  190. if (irq_source_id < 0 ||
  191. irq_source_id >= BITS_PER_LONG) {
  192. printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
  193. goto unlock;
  194. }
  195. clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
  196. if (!irqchip_in_kernel(kvm))
  197. goto unlock;
  198. kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
  199. #ifdef CONFIG_X86
  200. kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id);
  201. #endif
  202. unlock:
  203. mutex_unlock(&kvm->irq_lock);
  204. }
  205. void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
  206. struct kvm_irq_mask_notifier *kimn)
  207. {
  208. mutex_lock(&kvm->irq_lock);
  209. kimn->irq = irq;
  210. hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list);
  211. mutex_unlock(&kvm->irq_lock);
  212. }
  213. void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
  214. struct kvm_irq_mask_notifier *kimn)
  215. {
  216. mutex_lock(&kvm->irq_lock);
  217. hlist_del_rcu(&kimn->link);
  218. mutex_unlock(&kvm->irq_lock);
  219. synchronize_srcu(&kvm->irq_srcu);
  220. }
  221. void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
  222. bool mask)
  223. {
  224. struct kvm_irq_mask_notifier *kimn;
  225. int idx, gsi;
  226. idx = srcu_read_lock(&kvm->irq_srcu);
  227. gsi = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu)->chip[irqchip][pin];
  228. if (gsi != -1)
  229. hlist_for_each_entry_rcu(kimn, &kvm->mask_notifier_list, link)
  230. if (kimn->irq == gsi)
  231. kimn->func(kimn, mask);
  232. srcu_read_unlock(&kvm->irq_srcu, idx);
  233. }
  234. int kvm_set_routing_entry(struct kvm_irq_routing_table *rt,
  235. struct kvm_kernel_irq_routing_entry *e,
  236. const struct kvm_irq_routing_entry *ue)
  237. {
  238. int r = -EINVAL;
  239. int delta;
  240. unsigned max_pin;
  241. switch (ue->type) {
  242. case KVM_IRQ_ROUTING_IRQCHIP:
  243. delta = 0;
  244. switch (ue->u.irqchip.irqchip) {
  245. case KVM_IRQCHIP_PIC_MASTER:
  246. e->set = kvm_set_pic_irq;
  247. max_pin = PIC_NUM_PINS;
  248. break;
  249. case KVM_IRQCHIP_PIC_SLAVE:
  250. e->set = kvm_set_pic_irq;
  251. max_pin = PIC_NUM_PINS;
  252. delta = 8;
  253. break;
  254. case KVM_IRQCHIP_IOAPIC:
  255. max_pin = KVM_IOAPIC_NUM_PINS;
  256. e->set = kvm_set_ioapic_irq;
  257. break;
  258. default:
  259. goto out;
  260. }
  261. e->irqchip.irqchip = ue->u.irqchip.irqchip;
  262. e->irqchip.pin = ue->u.irqchip.pin + delta;
  263. if (e->irqchip.pin >= max_pin)
  264. goto out;
  265. rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi;
  266. break;
  267. case KVM_IRQ_ROUTING_MSI:
  268. e->set = kvm_set_msi;
  269. e->msi.address_lo = ue->u.msi.address_lo;
  270. e->msi.address_hi = ue->u.msi.address_hi;
  271. e->msi.data = ue->u.msi.data;
  272. break;
  273. default:
  274. goto out;
  275. }
  276. r = 0;
  277. out:
  278. return r;
  279. }
  280. #define IOAPIC_ROUTING_ENTRY(irq) \
  281. { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
  282. .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
  283. #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
  284. #ifdef CONFIG_X86
  285. # define PIC_ROUTING_ENTRY(irq) \
  286. { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
  287. .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
  288. # define ROUTING_ENTRY2(irq) \
  289. IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
  290. #else
  291. # define ROUTING_ENTRY2(irq) \
  292. IOAPIC_ROUTING_ENTRY(irq)
  293. #endif
  294. static const struct kvm_irq_routing_entry default_routing[] = {
  295. ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
  296. ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
  297. ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
  298. ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
  299. ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
  300. ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
  301. ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
  302. ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
  303. ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
  304. ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
  305. ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
  306. ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
  307. #ifdef CONFIG_IA64
  308. ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
  309. ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
  310. ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
  311. ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
  312. ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
  313. ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
  314. ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
  315. ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
  316. ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
  317. ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
  318. ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
  319. ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
  320. #endif
  321. };
  322. int kvm_setup_default_irq_routing(struct kvm *kvm)
  323. {
  324. return kvm_set_irq_routing(kvm, default_routing,
  325. ARRAY_SIZE(default_routing), 0);
  326. }