mixart_core.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617
  1. /*
  2. * Driver for Digigram miXart soundcards
  3. *
  4. * low level interface with interrupt handling and mail box implementation
  5. *
  6. * Copyright (c) 2003 by Digigram <alsa@digigram.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/interrupt.h>
  23. #include <linux/mutex.h>
  24. #include <linux/pci.h>
  25. #include <asm/io.h>
  26. #include <sound/core.h>
  27. #include "mixart.h"
  28. #include "mixart_hwdep.h"
  29. #include "mixart_core.h"
  30. #define MSG_TIMEOUT_JIFFIES (400 * HZ) / 1000 /* 400 ms */
  31. #define MSG_DESCRIPTOR_SIZE 0x24
  32. #define MSG_HEADER_SIZE (MSG_DESCRIPTOR_SIZE + 4)
  33. #define MSG_DEFAULT_SIZE 512
  34. #define MSG_TYPE_MASK 0x00000003 /* mask for following types */
  35. #define MSG_TYPE_NOTIFY 0 /* embedded -> driver (only notification, do not get_msg() !) */
  36. #define MSG_TYPE_COMMAND 1 /* driver <-> embedded (a command has no answer) */
  37. #define MSG_TYPE_REQUEST 2 /* driver -> embedded (request will get an answer back) */
  38. #define MSG_TYPE_ANSWER 3 /* embedded -> driver */
  39. #define MSG_CANCEL_NOTIFY_MASK 0x80000000 /* this bit is set for a notification that has been canceled */
  40. static int retrieve_msg_frame(struct mixart_mgr *mgr, u32 *msg_frame)
  41. {
  42. /* read the message frame fifo */
  43. u32 headptr, tailptr;
  44. tailptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_POST_TAIL));
  45. headptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_POST_HEAD));
  46. if (tailptr == headptr)
  47. return 0; /* no message posted */
  48. if (tailptr < MSG_OUTBOUND_POST_STACK)
  49. return 0; /* error */
  50. if (tailptr >= MSG_OUTBOUND_POST_STACK + MSG_BOUND_STACK_SIZE)
  51. return 0; /* error */
  52. *msg_frame = readl_be(MIXART_MEM(mgr, tailptr));
  53. /* increment the tail index */
  54. tailptr += 4;
  55. if( tailptr >= (MSG_OUTBOUND_POST_STACK+MSG_BOUND_STACK_SIZE) )
  56. tailptr = MSG_OUTBOUND_POST_STACK;
  57. writel_be(tailptr, MIXART_MEM(mgr, MSG_OUTBOUND_POST_TAIL));
  58. return 1;
  59. }
  60. static int get_msg(struct mixart_mgr *mgr, struct mixart_msg *resp,
  61. u32 msg_frame_address )
  62. {
  63. unsigned long flags;
  64. u32 headptr;
  65. u32 size;
  66. int err;
  67. #ifndef __BIG_ENDIAN
  68. unsigned int i;
  69. #endif
  70. spin_lock_irqsave(&mgr->msg_lock, flags);
  71. err = 0;
  72. /* copy message descriptor from miXart to driver */
  73. size = readl_be(MIXART_MEM(mgr, msg_frame_address)); /* size of descriptor + response */
  74. resp->message_id = readl_be(MIXART_MEM(mgr, msg_frame_address + 4)); /* dwMessageID */
  75. resp->uid.object_id = readl_be(MIXART_MEM(mgr, msg_frame_address + 8)); /* uidDest */
  76. resp->uid.desc = readl_be(MIXART_MEM(mgr, msg_frame_address + 12)); /* */
  77. if( (size < MSG_DESCRIPTOR_SIZE) || (resp->size < (size - MSG_DESCRIPTOR_SIZE))) {
  78. err = -EINVAL;
  79. dev_err(&mgr->pci->dev,
  80. "problem with response size = %d\n", size);
  81. goto _clean_exit;
  82. }
  83. size -= MSG_DESCRIPTOR_SIZE;
  84. memcpy_fromio(resp->data, MIXART_MEM(mgr, msg_frame_address + MSG_HEADER_SIZE ), size);
  85. resp->size = size;
  86. /* swap if necessary */
  87. #ifndef __BIG_ENDIAN
  88. size /= 4; /* u32 size */
  89. for(i=0; i < size; i++) {
  90. ((u32*)resp->data)[i] = be32_to_cpu(((u32*)resp->data)[i]);
  91. }
  92. #endif
  93. /*
  94. * free message frame address
  95. */
  96. headptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD));
  97. if( (headptr < MSG_OUTBOUND_FREE_STACK) || ( headptr >= (MSG_OUTBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE))) {
  98. err = -EINVAL;
  99. goto _clean_exit;
  100. }
  101. /* give address back to outbound fifo */
  102. writel_be(msg_frame_address, MIXART_MEM(mgr, headptr));
  103. /* increment the outbound free head */
  104. headptr += 4;
  105. if( headptr >= (MSG_OUTBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE) )
  106. headptr = MSG_OUTBOUND_FREE_STACK;
  107. writel_be(headptr, MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD));
  108. _clean_exit:
  109. spin_unlock_irqrestore(&mgr->msg_lock, flags);
  110. return err;
  111. }
  112. /*
  113. * send a message to miXart. return: the msg_frame used for this message
  114. */
  115. /* call with mgr->msg_lock held! */
  116. static int send_msg( struct mixart_mgr *mgr,
  117. struct mixart_msg *msg,
  118. int max_answersize,
  119. int mark_pending,
  120. u32 *msg_event)
  121. {
  122. u32 headptr, tailptr;
  123. u32 msg_frame_address;
  124. int err, i;
  125. if (snd_BUG_ON(msg->size % 4))
  126. return -EINVAL;
  127. err = 0;
  128. /* get message frame address */
  129. tailptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_FREE_TAIL));
  130. headptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_FREE_HEAD));
  131. if (tailptr == headptr) {
  132. dev_err(&mgr->pci->dev, "error: no message frame available\n");
  133. return -EBUSY;
  134. }
  135. if( (tailptr < MSG_INBOUND_FREE_STACK) || (tailptr >= (MSG_INBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE))) {
  136. return -EINVAL;
  137. }
  138. msg_frame_address = readl_be(MIXART_MEM(mgr, tailptr));
  139. writel(0, MIXART_MEM(mgr, tailptr)); /* set address to zero on this fifo position */
  140. /* increment the inbound free tail */
  141. tailptr += 4;
  142. if( tailptr >= (MSG_INBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE) )
  143. tailptr = MSG_INBOUND_FREE_STACK;
  144. writel_be(tailptr, MIXART_MEM(mgr, MSG_INBOUND_FREE_TAIL));
  145. /* TODO : use memcpy_toio() with intermediate buffer to copy the message */
  146. /* copy message descriptor to card memory */
  147. writel_be( msg->size + MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address) ); /* size of descriptor + request */
  148. writel_be( msg->message_id , MIXART_MEM(mgr, msg_frame_address + 4) ); /* dwMessageID */
  149. writel_be( msg->uid.object_id, MIXART_MEM(mgr, msg_frame_address + 8) ); /* uidDest */
  150. writel_be( msg->uid.desc, MIXART_MEM(mgr, msg_frame_address + 12) ); /* */
  151. writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 16) ); /* SizeHeader */
  152. writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 20) ); /* OffsetDLL_T16 */
  153. writel_be( msg->size, MIXART_MEM(mgr, msg_frame_address + 24) ); /* SizeDLL_T16 */
  154. writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 28) ); /* OffsetDLL_DRV */
  155. writel_be( 0, MIXART_MEM(mgr, msg_frame_address + 32) ); /* SizeDLL_DRV */
  156. writel_be( MSG_DESCRIPTOR_SIZE + max_answersize, MIXART_MEM(mgr, msg_frame_address + 36) ); /* dwExpectedAnswerSize */
  157. /* copy message data to card memory */
  158. for( i=0; i < msg->size; i+=4 ) {
  159. writel_be( *(u32*)(msg->data + i), MIXART_MEM(mgr, MSG_HEADER_SIZE + msg_frame_address + i) );
  160. }
  161. if( mark_pending ) {
  162. if( *msg_event ) {
  163. /* the pending event is the notification we wait for ! */
  164. mgr->pending_event = *msg_event;
  165. }
  166. else {
  167. /* the pending event is the answer we wait for (same address than the request)! */
  168. mgr->pending_event = msg_frame_address;
  169. /* copy address back to caller */
  170. *msg_event = msg_frame_address;
  171. }
  172. }
  173. /* mark the frame as a request (will have an answer) */
  174. msg_frame_address |= MSG_TYPE_REQUEST;
  175. /* post the frame */
  176. headptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_POST_HEAD));
  177. if( (headptr < MSG_INBOUND_POST_STACK) || (headptr >= (MSG_INBOUND_POST_STACK+MSG_BOUND_STACK_SIZE))) {
  178. return -EINVAL;
  179. }
  180. writel_be(msg_frame_address, MIXART_MEM(mgr, headptr));
  181. /* increment the inbound post head */
  182. headptr += 4;
  183. if( headptr >= (MSG_INBOUND_POST_STACK+MSG_BOUND_STACK_SIZE) )
  184. headptr = MSG_INBOUND_POST_STACK;
  185. writel_be(headptr, MIXART_MEM(mgr, MSG_INBOUND_POST_HEAD));
  186. return 0;
  187. }
  188. int snd_mixart_send_msg(struct mixart_mgr *mgr, struct mixart_msg *request, int max_resp_size, void *resp_data)
  189. {
  190. struct mixart_msg resp;
  191. u32 msg_frame = 0; /* set to 0, so it's no notification to wait for, but the answer */
  192. int err;
  193. wait_queue_t wait;
  194. long timeout;
  195. mutex_lock(&mgr->msg_mutex);
  196. init_waitqueue_entry(&wait, current);
  197. spin_lock_irq(&mgr->msg_lock);
  198. /* send the message */
  199. err = send_msg(mgr, request, max_resp_size, 1, &msg_frame); /* send and mark the answer pending */
  200. if (err) {
  201. spin_unlock_irq(&mgr->msg_lock);
  202. mutex_unlock(&mgr->msg_mutex);
  203. return err;
  204. }
  205. set_current_state(TASK_UNINTERRUPTIBLE);
  206. add_wait_queue(&mgr->msg_sleep, &wait);
  207. spin_unlock_irq(&mgr->msg_lock);
  208. timeout = schedule_timeout(MSG_TIMEOUT_JIFFIES);
  209. remove_wait_queue(&mgr->msg_sleep, &wait);
  210. if (! timeout) {
  211. /* error - no ack */
  212. mutex_unlock(&mgr->msg_mutex);
  213. dev_err(&mgr->pci->dev,
  214. "error: no response on msg %x\n", msg_frame);
  215. return -EIO;
  216. }
  217. /* retrieve the answer into the same struct mixart_msg */
  218. resp.message_id = 0;
  219. resp.uid = (struct mixart_uid){0,0};
  220. resp.data = resp_data;
  221. resp.size = max_resp_size;
  222. err = get_msg(mgr, &resp, msg_frame);
  223. if( request->message_id != resp.message_id )
  224. dev_err(&mgr->pci->dev, "RESPONSE ERROR!\n");
  225. mutex_unlock(&mgr->msg_mutex);
  226. return err;
  227. }
  228. int snd_mixart_send_msg_wait_notif(struct mixart_mgr *mgr,
  229. struct mixart_msg *request, u32 notif_event)
  230. {
  231. int err;
  232. wait_queue_t wait;
  233. long timeout;
  234. if (snd_BUG_ON(!notif_event))
  235. return -EINVAL;
  236. if (snd_BUG_ON((notif_event & MSG_TYPE_MASK) != MSG_TYPE_NOTIFY))
  237. return -EINVAL;
  238. if (snd_BUG_ON(notif_event & MSG_CANCEL_NOTIFY_MASK))
  239. return -EINVAL;
  240. mutex_lock(&mgr->msg_mutex);
  241. init_waitqueue_entry(&wait, current);
  242. spin_lock_irq(&mgr->msg_lock);
  243. /* send the message */
  244. err = send_msg(mgr, request, MSG_DEFAULT_SIZE, 1, &notif_event); /* send and mark the notification event pending */
  245. if(err) {
  246. spin_unlock_irq(&mgr->msg_lock);
  247. mutex_unlock(&mgr->msg_mutex);
  248. return err;
  249. }
  250. set_current_state(TASK_UNINTERRUPTIBLE);
  251. add_wait_queue(&mgr->msg_sleep, &wait);
  252. spin_unlock_irq(&mgr->msg_lock);
  253. timeout = schedule_timeout(MSG_TIMEOUT_JIFFIES);
  254. remove_wait_queue(&mgr->msg_sleep, &wait);
  255. if (! timeout) {
  256. /* error - no ack */
  257. mutex_unlock(&mgr->msg_mutex);
  258. dev_err(&mgr->pci->dev,
  259. "error: notification %x not received\n", notif_event);
  260. return -EIO;
  261. }
  262. mutex_unlock(&mgr->msg_mutex);
  263. return 0;
  264. }
  265. int snd_mixart_send_msg_nonblock(struct mixart_mgr *mgr, struct mixart_msg *request)
  266. {
  267. u32 message_frame;
  268. unsigned long flags;
  269. int err;
  270. /* just send the message (do not mark it as a pending one) */
  271. spin_lock_irqsave(&mgr->msg_lock, flags);
  272. err = send_msg(mgr, request, MSG_DEFAULT_SIZE, 0, &message_frame);
  273. spin_unlock_irqrestore(&mgr->msg_lock, flags);
  274. /* the answer will be handled by snd_struct mixart_msgasklet() */
  275. atomic_inc(&mgr->msg_processed);
  276. return err;
  277. }
  278. /* common buffer of tasklet and interrupt to send/receive messages */
  279. static u32 mixart_msg_data[MSG_DEFAULT_SIZE / 4];
  280. void snd_mixart_msg_tasklet(unsigned long arg)
  281. {
  282. struct mixart_mgr *mgr = ( struct mixart_mgr*)(arg);
  283. struct mixart_msg resp;
  284. u32 msg, addr, type;
  285. int err;
  286. spin_lock(&mgr->lock);
  287. while (mgr->msg_fifo_readptr != mgr->msg_fifo_writeptr) {
  288. msg = mgr->msg_fifo[mgr->msg_fifo_readptr];
  289. mgr->msg_fifo_readptr++;
  290. mgr->msg_fifo_readptr %= MSG_FIFO_SIZE;
  291. /* process the message ... */
  292. addr = msg & ~MSG_TYPE_MASK;
  293. type = msg & MSG_TYPE_MASK;
  294. switch (type) {
  295. case MSG_TYPE_ANSWER:
  296. /* answer to a message on that we did not wait for (send_msg_nonblock) */
  297. resp.message_id = 0;
  298. resp.data = mixart_msg_data;
  299. resp.size = sizeof(mixart_msg_data);
  300. err = get_msg(mgr, &resp, addr);
  301. if( err < 0 ) {
  302. dev_err(&mgr->pci->dev,
  303. "tasklet: error(%d) reading mf %x\n",
  304. err, msg);
  305. break;
  306. }
  307. switch(resp.message_id) {
  308. case MSG_STREAM_START_INPUT_STAGE_PACKET:
  309. case MSG_STREAM_START_OUTPUT_STAGE_PACKET:
  310. case MSG_STREAM_STOP_INPUT_STAGE_PACKET:
  311. case MSG_STREAM_STOP_OUTPUT_STAGE_PACKET:
  312. if(mixart_msg_data[0])
  313. dev_err(&mgr->pci->dev,
  314. "tasklet : error MSG_STREAM_ST***_***PUT_STAGE_PACKET status=%x\n",
  315. mixart_msg_data[0]);
  316. break;
  317. default:
  318. dev_dbg(&mgr->pci->dev,
  319. "tasklet received mf(%x) : msg_id(%x) uid(%x, %x) size(%zd)\n",
  320. msg, resp.message_id, resp.uid.object_id, resp.uid.desc, resp.size);
  321. break;
  322. }
  323. break;
  324. case MSG_TYPE_NOTIFY:
  325. /* msg contains no address ! do not get_msg() ! */
  326. case MSG_TYPE_COMMAND:
  327. /* get_msg() necessary */
  328. default:
  329. dev_err(&mgr->pci->dev,
  330. "tasklet doesn't know what to do with message %x\n",
  331. msg);
  332. } /* switch type */
  333. /* decrement counter */
  334. atomic_dec(&mgr->msg_processed);
  335. } /* while there is a msg in fifo */
  336. spin_unlock(&mgr->lock);
  337. }
  338. irqreturn_t snd_mixart_interrupt(int irq, void *dev_id)
  339. {
  340. struct mixart_mgr *mgr = dev_id;
  341. int err;
  342. struct mixart_msg resp;
  343. u32 msg;
  344. u32 it_reg;
  345. spin_lock(&mgr->lock);
  346. it_reg = readl_le(MIXART_REG(mgr, MIXART_PCI_OMISR_OFFSET));
  347. if( !(it_reg & MIXART_OIDI) ) {
  348. /* this device did not cause the interrupt */
  349. spin_unlock(&mgr->lock);
  350. return IRQ_NONE;
  351. }
  352. /* mask all interrupts */
  353. writel_le(MIXART_HOST_ALL_INTERRUPT_MASKED, MIXART_REG(mgr, MIXART_PCI_OMIMR_OFFSET));
  354. /* outdoorbell register clear */
  355. it_reg = readl(MIXART_REG(mgr, MIXART_PCI_ODBR_OFFSET));
  356. writel(it_reg, MIXART_REG(mgr, MIXART_PCI_ODBR_OFFSET));
  357. /* clear interrupt */
  358. writel_le( MIXART_OIDI, MIXART_REG(mgr, MIXART_PCI_OMISR_OFFSET) );
  359. /* process interrupt */
  360. while (retrieve_msg_frame(mgr, &msg)) {
  361. switch (msg & MSG_TYPE_MASK) {
  362. case MSG_TYPE_COMMAND:
  363. resp.message_id = 0;
  364. resp.data = mixart_msg_data;
  365. resp.size = sizeof(mixart_msg_data);
  366. err = get_msg(mgr, &resp, msg & ~MSG_TYPE_MASK);
  367. if( err < 0 ) {
  368. dev_err(&mgr->pci->dev,
  369. "interrupt: error(%d) reading mf %x\n",
  370. err, msg);
  371. break;
  372. }
  373. if(resp.message_id == MSG_SERVICES_TIMER_NOTIFY) {
  374. int i;
  375. struct mixart_timer_notify *notify;
  376. notify = (struct mixart_timer_notify *)mixart_msg_data;
  377. for(i=0; i<notify->stream_count; i++) {
  378. u32 buffer_id = notify->streams[i].buffer_id;
  379. unsigned int chip_number = (buffer_id & MIXART_NOTIFY_CARD_MASK) >> MIXART_NOTIFY_CARD_OFFSET; /* card0 to 3 */
  380. unsigned int pcm_number = (buffer_id & MIXART_NOTIFY_PCM_MASK ) >> MIXART_NOTIFY_PCM_OFFSET; /* pcm0 to 3 */
  381. unsigned int sub_number = buffer_id & MIXART_NOTIFY_SUBS_MASK; /* 0 to MIXART_PLAYBACK_STREAMS */
  382. unsigned int is_capture = ((buffer_id & MIXART_NOTIFY_CAPT_MASK) != 0); /* playback == 0 / capture == 1 */
  383. struct snd_mixart *chip = mgr->chip[chip_number];
  384. struct mixart_stream *stream;
  385. if ((chip_number >= mgr->num_cards) || (pcm_number >= MIXART_PCM_TOTAL) || (sub_number >= MIXART_PLAYBACK_STREAMS)) {
  386. dev_err(&mgr->pci->dev,
  387. "error MSG_SERVICES_TIMER_NOTIFY buffer_id (%x) pos(%d)\n",
  388. buffer_id, notify->streams[i].sample_pos_low_part);
  389. break;
  390. }
  391. if (is_capture)
  392. stream = &chip->capture_stream[pcm_number];
  393. else
  394. stream = &chip->playback_stream[pcm_number][sub_number];
  395. if (stream->substream && (stream->status == MIXART_STREAM_STATUS_RUNNING)) {
  396. struct snd_pcm_runtime *runtime = stream->substream->runtime;
  397. int elapsed = 0;
  398. u64 sample_count = ((u64)notify->streams[i].sample_pos_high_part) << 32;
  399. sample_count |= notify->streams[i].sample_pos_low_part;
  400. while (1) {
  401. u64 new_elapse_pos = stream->abs_period_elapsed + runtime->period_size;
  402. if (new_elapse_pos > sample_count) {
  403. break; /* while */
  404. }
  405. else {
  406. elapsed = 1;
  407. stream->buf_periods++;
  408. if (stream->buf_periods >= runtime->periods)
  409. stream->buf_periods = 0;
  410. stream->abs_period_elapsed = new_elapse_pos;
  411. }
  412. }
  413. stream->buf_period_frag = (u32)( sample_count - stream->abs_period_elapsed );
  414. if(elapsed) {
  415. spin_unlock(&mgr->lock);
  416. snd_pcm_period_elapsed(stream->substream);
  417. spin_lock(&mgr->lock);
  418. }
  419. }
  420. }
  421. break;
  422. }
  423. if(resp.message_id == MSG_SERVICES_REPORT_TRACES) {
  424. if(resp.size > 1) {
  425. #ifndef __BIG_ENDIAN
  426. /* Traces are text: the swapped msg_data has to be swapped back ! */
  427. int i;
  428. for(i=0; i<(resp.size/4); i++) {
  429. (mixart_msg_data)[i] = cpu_to_be32((mixart_msg_data)[i]);
  430. }
  431. #endif
  432. ((char*)mixart_msg_data)[resp.size - 1] = 0;
  433. dev_dbg(&mgr->pci->dev,
  434. "MIXART TRACE : %s\n",
  435. (char *)mixart_msg_data);
  436. }
  437. break;
  438. }
  439. dev_dbg(&mgr->pci->dev, "command %x not handled\n",
  440. resp.message_id);
  441. break;
  442. case MSG_TYPE_NOTIFY:
  443. if(msg & MSG_CANCEL_NOTIFY_MASK) {
  444. msg &= ~MSG_CANCEL_NOTIFY_MASK;
  445. dev_err(&mgr->pci->dev,
  446. "canceled notification %x !\n", msg);
  447. }
  448. /* no break, continue ! */
  449. case MSG_TYPE_ANSWER:
  450. /* answer or notification to a message we are waiting for*/
  451. spin_lock(&mgr->msg_lock);
  452. if( (msg & ~MSG_TYPE_MASK) == mgr->pending_event ) {
  453. wake_up(&mgr->msg_sleep);
  454. mgr->pending_event = 0;
  455. }
  456. /* answer to a message we did't want to wait for */
  457. else {
  458. mgr->msg_fifo[mgr->msg_fifo_writeptr] = msg;
  459. mgr->msg_fifo_writeptr++;
  460. mgr->msg_fifo_writeptr %= MSG_FIFO_SIZE;
  461. tasklet_schedule(&mgr->msg_taskq);
  462. }
  463. spin_unlock(&mgr->msg_lock);
  464. break;
  465. case MSG_TYPE_REQUEST:
  466. default:
  467. dev_dbg(&mgr->pci->dev,
  468. "interrupt received request %x\n", msg);
  469. /* TODO : are there things to do here ? */
  470. break;
  471. } /* switch on msg type */
  472. } /* while there are msgs */
  473. /* allow interrupt again */
  474. writel_le( MIXART_ALLOW_OUTBOUND_DOORBELL, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET));
  475. spin_unlock(&mgr->lock);
  476. return IRQ_HANDLED;
  477. }
  478. void snd_mixart_init_mailbox(struct mixart_mgr *mgr)
  479. {
  480. writel( 0, MIXART_MEM( mgr, MSG_HOST_RSC_PROTECTION ) );
  481. writel( 0, MIXART_MEM( mgr, MSG_AGENT_RSC_PROTECTION ) );
  482. /* allow outbound messagebox to generate interrupts */
  483. if(mgr->irq >= 0) {
  484. writel_le( MIXART_ALLOW_OUTBOUND_DOORBELL, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET));
  485. }
  486. return;
  487. }
  488. void snd_mixart_exit_mailbox(struct mixart_mgr *mgr)
  489. {
  490. /* no more interrupts on outbound messagebox */
  491. writel_le( MIXART_HOST_ALL_INTERRUPT_MASKED, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET));
  492. return;
  493. }
  494. void snd_mixart_reset_board(struct mixart_mgr *mgr)
  495. {
  496. /* reset miXart */
  497. writel_be( 1, MIXART_REG(mgr, MIXART_BA1_BRUTAL_RESET_OFFSET) );
  498. return;
  499. }