ad1889.c 26 KB

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  1. /* Analog Devices 1889 audio driver
  2. *
  3. * This is a driver for the AD1889 PCI audio chipset found
  4. * on the HP PA-RISC [BCJ]-xxx0 workstations.
  5. *
  6. * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
  7. * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
  8. * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License, version 2, as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. *
  23. * TODO:
  24. * Do we need to take care of CCS register?
  25. * Maybe we could use finer grained locking (separate locks for pb/cap)?
  26. * Wishlist:
  27. * Control Interface (mixer) support
  28. * Better AC97 support (VSR...)?
  29. * PM support
  30. * MIDI support
  31. * Game Port support
  32. * SG DMA support (this will need *a lot* of work)
  33. */
  34. #include <linux/init.h>
  35. #include <linux/pci.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/slab.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/compiler.h>
  40. #include <linux/delay.h>
  41. #include <linux/module.h>
  42. #include <sound/core.h>
  43. #include <sound/pcm.h>
  44. #include <sound/initval.h>
  45. #include <sound/ac97_codec.h>
  46. #include <asm/io.h>
  47. #include "ad1889.h"
  48. #include "ac97/ac97_id.h"
  49. #define AD1889_DRVVER "Version: 1.7"
  50. MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
  51. MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
  52. MODULE_LICENSE("GPL");
  53. MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
  54. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  55. module_param_array(index, int, NULL, 0444);
  56. MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
  57. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  58. module_param_array(id, charp, NULL, 0444);
  59. MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
  60. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  61. module_param_array(enable, bool, NULL, 0444);
  62. MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
  63. static char *ac97_quirk[SNDRV_CARDS];
  64. module_param_array(ac97_quirk, charp, NULL, 0444);
  65. MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
  66. #define DEVNAME "ad1889"
  67. #define PFX DEVNAME ": "
  68. /* keep track of some hw registers */
  69. struct ad1889_register_state {
  70. u16 reg; /* reg setup */
  71. u32 addr; /* dma base address */
  72. unsigned long size; /* DMA buffer size */
  73. };
  74. struct snd_ad1889 {
  75. struct snd_card *card;
  76. struct pci_dev *pci;
  77. int irq;
  78. unsigned long bar;
  79. void __iomem *iobase;
  80. struct snd_ac97 *ac97;
  81. struct snd_ac97_bus *ac97_bus;
  82. struct snd_pcm *pcm;
  83. struct snd_info_entry *proc;
  84. struct snd_pcm_substream *psubs;
  85. struct snd_pcm_substream *csubs;
  86. /* playback register state */
  87. struct ad1889_register_state wave;
  88. struct ad1889_register_state ramc;
  89. spinlock_t lock;
  90. };
  91. static inline u16
  92. ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
  93. {
  94. return readw(chip->iobase + reg);
  95. }
  96. static inline void
  97. ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
  98. {
  99. writew(val, chip->iobase + reg);
  100. }
  101. static inline u32
  102. ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
  103. {
  104. return readl(chip->iobase + reg);
  105. }
  106. static inline void
  107. ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
  108. {
  109. writel(val, chip->iobase + reg);
  110. }
  111. static inline void
  112. ad1889_unmute(struct snd_ad1889 *chip)
  113. {
  114. u16 st;
  115. st = ad1889_readw(chip, AD_DS_WADA) &
  116. ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
  117. ad1889_writew(chip, AD_DS_WADA, st);
  118. ad1889_readw(chip, AD_DS_WADA);
  119. }
  120. static inline void
  121. ad1889_mute(struct snd_ad1889 *chip)
  122. {
  123. u16 st;
  124. st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
  125. ad1889_writew(chip, AD_DS_WADA, st);
  126. ad1889_readw(chip, AD_DS_WADA);
  127. }
  128. static inline void
  129. ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
  130. {
  131. ad1889_writel(chip, AD_DMA_ADCBA, address);
  132. ad1889_writel(chip, AD_DMA_ADCCA, address);
  133. }
  134. static inline void
  135. ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
  136. {
  137. ad1889_writel(chip, AD_DMA_ADCBC, count);
  138. ad1889_writel(chip, AD_DMA_ADCCC, count);
  139. }
  140. static inline void
  141. ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
  142. {
  143. ad1889_writel(chip, AD_DMA_ADCIB, count);
  144. ad1889_writel(chip, AD_DMA_ADCIC, count);
  145. }
  146. static inline void
  147. ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
  148. {
  149. ad1889_writel(chip, AD_DMA_WAVBA, address);
  150. ad1889_writel(chip, AD_DMA_WAVCA, address);
  151. }
  152. static inline void
  153. ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
  154. {
  155. ad1889_writel(chip, AD_DMA_WAVBC, count);
  156. ad1889_writel(chip, AD_DMA_WAVCC, count);
  157. }
  158. static inline void
  159. ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
  160. {
  161. ad1889_writel(chip, AD_DMA_WAVIB, count);
  162. ad1889_writel(chip, AD_DMA_WAVIC, count);
  163. }
  164. static void
  165. ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
  166. {
  167. u16 reg;
  168. if (channel & AD_CHAN_WAV) {
  169. /* Disable wave channel */
  170. reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
  171. ad1889_writew(chip, AD_DS_WSMC, reg);
  172. chip->wave.reg = reg;
  173. /* disable IRQs */
  174. reg = ad1889_readw(chip, AD_DMA_WAV);
  175. reg &= AD_DMA_IM_DIS;
  176. reg &= ~AD_DMA_LOOP;
  177. ad1889_writew(chip, AD_DMA_WAV, reg);
  178. /* clear IRQ and address counters and pointers */
  179. ad1889_load_wave_buffer_address(chip, 0x0);
  180. ad1889_load_wave_buffer_count(chip, 0x0);
  181. ad1889_load_wave_interrupt_count(chip, 0x0);
  182. /* flush */
  183. ad1889_readw(chip, AD_DMA_WAV);
  184. }
  185. if (channel & AD_CHAN_ADC) {
  186. /* Disable ADC channel */
  187. reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
  188. ad1889_writew(chip, AD_DS_RAMC, reg);
  189. chip->ramc.reg = reg;
  190. reg = ad1889_readw(chip, AD_DMA_ADC);
  191. reg &= AD_DMA_IM_DIS;
  192. reg &= ~AD_DMA_LOOP;
  193. ad1889_writew(chip, AD_DMA_ADC, reg);
  194. ad1889_load_adc_buffer_address(chip, 0x0);
  195. ad1889_load_adc_buffer_count(chip, 0x0);
  196. ad1889_load_adc_interrupt_count(chip, 0x0);
  197. /* flush */
  198. ad1889_readw(chip, AD_DMA_ADC);
  199. }
  200. }
  201. static u16
  202. snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  203. {
  204. struct snd_ad1889 *chip = ac97->private_data;
  205. return ad1889_readw(chip, AD_AC97_BASE + reg);
  206. }
  207. static void
  208. snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
  209. {
  210. struct snd_ad1889 *chip = ac97->private_data;
  211. ad1889_writew(chip, AD_AC97_BASE + reg, val);
  212. }
  213. static int
  214. snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
  215. {
  216. int retry = 400; /* average needs 352 msec */
  217. while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
  218. && --retry)
  219. mdelay(1);
  220. if (!retry) {
  221. dev_err(chip->card->dev, "[%s] Link is not ready.\n",
  222. __func__);
  223. return -EIO;
  224. }
  225. dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry);
  226. return 0;
  227. }
  228. static int
  229. snd_ad1889_hw_params(struct snd_pcm_substream *substream,
  230. struct snd_pcm_hw_params *hw_params)
  231. {
  232. return snd_pcm_lib_malloc_pages(substream,
  233. params_buffer_bytes(hw_params));
  234. }
  235. static int
  236. snd_ad1889_hw_free(struct snd_pcm_substream *substream)
  237. {
  238. return snd_pcm_lib_free_pages(substream);
  239. }
  240. static struct snd_pcm_hardware snd_ad1889_playback_hw = {
  241. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  242. SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
  243. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  244. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  245. .rate_min = 8000, /* docs say 7000, but we're lazy */
  246. .rate_max = 48000,
  247. .channels_min = 1,
  248. .channels_max = 2,
  249. .buffer_bytes_max = BUFFER_BYTES_MAX,
  250. .period_bytes_min = PERIOD_BYTES_MIN,
  251. .period_bytes_max = PERIOD_BYTES_MAX,
  252. .periods_min = PERIODS_MIN,
  253. .periods_max = PERIODS_MAX,
  254. /*.fifo_size = 0,*/
  255. };
  256. static struct snd_pcm_hardware snd_ad1889_capture_hw = {
  257. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  258. SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
  259. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  260. .rates = SNDRV_PCM_RATE_48000,
  261. .rate_min = 48000, /* docs say we could to VSR, but we're lazy */
  262. .rate_max = 48000,
  263. .channels_min = 1,
  264. .channels_max = 2,
  265. .buffer_bytes_max = BUFFER_BYTES_MAX,
  266. .period_bytes_min = PERIOD_BYTES_MIN,
  267. .period_bytes_max = PERIOD_BYTES_MAX,
  268. .periods_min = PERIODS_MIN,
  269. .periods_max = PERIODS_MAX,
  270. /*.fifo_size = 0,*/
  271. };
  272. static int
  273. snd_ad1889_playback_open(struct snd_pcm_substream *ss)
  274. {
  275. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  276. struct snd_pcm_runtime *rt = ss->runtime;
  277. chip->psubs = ss;
  278. rt->hw = snd_ad1889_playback_hw;
  279. return 0;
  280. }
  281. static int
  282. snd_ad1889_capture_open(struct snd_pcm_substream *ss)
  283. {
  284. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  285. struct snd_pcm_runtime *rt = ss->runtime;
  286. chip->csubs = ss;
  287. rt->hw = snd_ad1889_capture_hw;
  288. return 0;
  289. }
  290. static int
  291. snd_ad1889_playback_close(struct snd_pcm_substream *ss)
  292. {
  293. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  294. chip->psubs = NULL;
  295. return 0;
  296. }
  297. static int
  298. snd_ad1889_capture_close(struct snd_pcm_substream *ss)
  299. {
  300. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  301. chip->csubs = NULL;
  302. return 0;
  303. }
  304. static int
  305. snd_ad1889_playback_prepare(struct snd_pcm_substream *ss)
  306. {
  307. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  308. struct snd_pcm_runtime *rt = ss->runtime;
  309. unsigned int size = snd_pcm_lib_buffer_bytes(ss);
  310. unsigned int count = snd_pcm_lib_period_bytes(ss);
  311. u16 reg;
  312. ad1889_channel_reset(chip, AD_CHAN_WAV);
  313. reg = ad1889_readw(chip, AD_DS_WSMC);
  314. /* Mask out 16-bit / Stereo */
  315. reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
  316. if (snd_pcm_format_width(rt->format) == 16)
  317. reg |= AD_DS_WSMC_WA16;
  318. if (rt->channels > 1)
  319. reg |= AD_DS_WSMC_WAST;
  320. /* let's make sure we don't clobber ourselves */
  321. spin_lock_irq(&chip->lock);
  322. chip->wave.size = size;
  323. chip->wave.reg = reg;
  324. chip->wave.addr = rt->dma_addr;
  325. ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
  326. /* Set sample rates on the codec */
  327. ad1889_writew(chip, AD_DS_WAS, rt->rate);
  328. /* Set up DMA */
  329. ad1889_load_wave_buffer_address(chip, chip->wave.addr);
  330. ad1889_load_wave_buffer_count(chip, size);
  331. ad1889_load_wave_interrupt_count(chip, count);
  332. /* writes flush */
  333. ad1889_readw(chip, AD_DS_WSMC);
  334. spin_unlock_irq(&chip->lock);
  335. dev_dbg(chip->card->dev,
  336. "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
  337. chip->wave.addr, count, size, reg, rt->rate);
  338. return 0;
  339. }
  340. static int
  341. snd_ad1889_capture_prepare(struct snd_pcm_substream *ss)
  342. {
  343. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  344. struct snd_pcm_runtime *rt = ss->runtime;
  345. unsigned int size = snd_pcm_lib_buffer_bytes(ss);
  346. unsigned int count = snd_pcm_lib_period_bytes(ss);
  347. u16 reg;
  348. ad1889_channel_reset(chip, AD_CHAN_ADC);
  349. reg = ad1889_readw(chip, AD_DS_RAMC);
  350. /* Mask out 16-bit / Stereo */
  351. reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
  352. if (snd_pcm_format_width(rt->format) == 16)
  353. reg |= AD_DS_RAMC_AD16;
  354. if (rt->channels > 1)
  355. reg |= AD_DS_RAMC_ADST;
  356. /* let's make sure we don't clobber ourselves */
  357. spin_lock_irq(&chip->lock);
  358. chip->ramc.size = size;
  359. chip->ramc.reg = reg;
  360. chip->ramc.addr = rt->dma_addr;
  361. ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
  362. /* Set up DMA */
  363. ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
  364. ad1889_load_adc_buffer_count(chip, size);
  365. ad1889_load_adc_interrupt_count(chip, count);
  366. /* writes flush */
  367. ad1889_readw(chip, AD_DS_RAMC);
  368. spin_unlock_irq(&chip->lock);
  369. dev_dbg(chip->card->dev,
  370. "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
  371. chip->ramc.addr, count, size, reg, rt->rate);
  372. return 0;
  373. }
  374. /* this is called in atomic context with IRQ disabled.
  375. Must be as fast as possible and not sleep.
  376. DMA should be *triggered* by this call.
  377. The WSMC "WAEN" bit triggers DMA Wave On/Off */
  378. static int
  379. snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd)
  380. {
  381. u16 wsmc;
  382. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  383. wsmc = ad1889_readw(chip, AD_DS_WSMC);
  384. switch (cmd) {
  385. case SNDRV_PCM_TRIGGER_START:
  386. /* enable DMA loop & interrupts */
  387. ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
  388. wsmc |= AD_DS_WSMC_WAEN;
  389. /* 1 to clear CHSS bit */
  390. ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
  391. ad1889_unmute(chip);
  392. break;
  393. case SNDRV_PCM_TRIGGER_STOP:
  394. ad1889_mute(chip);
  395. wsmc &= ~AD_DS_WSMC_WAEN;
  396. break;
  397. default:
  398. snd_BUG();
  399. return -EINVAL;
  400. }
  401. chip->wave.reg = wsmc;
  402. ad1889_writew(chip, AD_DS_WSMC, wsmc);
  403. ad1889_readw(chip, AD_DS_WSMC); /* flush */
  404. /* reset the chip when STOP - will disable IRQs */
  405. if (cmd == SNDRV_PCM_TRIGGER_STOP)
  406. ad1889_channel_reset(chip, AD_CHAN_WAV);
  407. return 0;
  408. }
  409. /* this is called in atomic context with IRQ disabled.
  410. Must be as fast as possible and not sleep.
  411. DMA should be *triggered* by this call.
  412. The RAMC "ADEN" bit triggers DMA ADC On/Off */
  413. static int
  414. snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd)
  415. {
  416. u16 ramc;
  417. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  418. ramc = ad1889_readw(chip, AD_DS_RAMC);
  419. switch (cmd) {
  420. case SNDRV_PCM_TRIGGER_START:
  421. /* enable DMA loop & interrupts */
  422. ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
  423. ramc |= AD_DS_RAMC_ADEN;
  424. /* 1 to clear CHSS bit */
  425. ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
  426. break;
  427. case SNDRV_PCM_TRIGGER_STOP:
  428. ramc &= ~AD_DS_RAMC_ADEN;
  429. break;
  430. default:
  431. return -EINVAL;
  432. }
  433. chip->ramc.reg = ramc;
  434. ad1889_writew(chip, AD_DS_RAMC, ramc);
  435. ad1889_readw(chip, AD_DS_RAMC); /* flush */
  436. /* reset the chip when STOP - will disable IRQs */
  437. if (cmd == SNDRV_PCM_TRIGGER_STOP)
  438. ad1889_channel_reset(chip, AD_CHAN_ADC);
  439. return 0;
  440. }
  441. /* Called in atomic context with IRQ disabled */
  442. static snd_pcm_uframes_t
  443. snd_ad1889_playback_pointer(struct snd_pcm_substream *ss)
  444. {
  445. size_t ptr = 0;
  446. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  447. if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
  448. return 0;
  449. ptr = ad1889_readl(chip, AD_DMA_WAVCA);
  450. ptr -= chip->wave.addr;
  451. if (snd_BUG_ON(ptr >= chip->wave.size))
  452. return 0;
  453. return bytes_to_frames(ss->runtime, ptr);
  454. }
  455. /* Called in atomic context with IRQ disabled */
  456. static snd_pcm_uframes_t
  457. snd_ad1889_capture_pointer(struct snd_pcm_substream *ss)
  458. {
  459. size_t ptr = 0;
  460. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  461. if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
  462. return 0;
  463. ptr = ad1889_readl(chip, AD_DMA_ADCCA);
  464. ptr -= chip->ramc.addr;
  465. if (snd_BUG_ON(ptr >= chip->ramc.size))
  466. return 0;
  467. return bytes_to_frames(ss->runtime, ptr);
  468. }
  469. static struct snd_pcm_ops snd_ad1889_playback_ops = {
  470. .open = snd_ad1889_playback_open,
  471. .close = snd_ad1889_playback_close,
  472. .ioctl = snd_pcm_lib_ioctl,
  473. .hw_params = snd_ad1889_hw_params,
  474. .hw_free = snd_ad1889_hw_free,
  475. .prepare = snd_ad1889_playback_prepare,
  476. .trigger = snd_ad1889_playback_trigger,
  477. .pointer = snd_ad1889_playback_pointer,
  478. };
  479. static struct snd_pcm_ops snd_ad1889_capture_ops = {
  480. .open = snd_ad1889_capture_open,
  481. .close = snd_ad1889_capture_close,
  482. .ioctl = snd_pcm_lib_ioctl,
  483. .hw_params = snd_ad1889_hw_params,
  484. .hw_free = snd_ad1889_hw_free,
  485. .prepare = snd_ad1889_capture_prepare,
  486. .trigger = snd_ad1889_capture_trigger,
  487. .pointer = snd_ad1889_capture_pointer,
  488. };
  489. static irqreturn_t
  490. snd_ad1889_interrupt(int irq, void *dev_id)
  491. {
  492. unsigned long st;
  493. struct snd_ad1889 *chip = dev_id;
  494. st = ad1889_readl(chip, AD_DMA_DISR);
  495. /* clear ISR */
  496. ad1889_writel(chip, AD_DMA_DISR, st);
  497. st &= AD_INTR_MASK;
  498. if (unlikely(!st))
  499. return IRQ_NONE;
  500. if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI))
  501. dev_dbg(chip->card->dev,
  502. "Unexpected master or target abort interrupt!\n");
  503. if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
  504. snd_pcm_period_elapsed(chip->psubs);
  505. if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
  506. snd_pcm_period_elapsed(chip->csubs);
  507. return IRQ_HANDLED;
  508. }
  509. static int
  510. snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device, struct snd_pcm **rpcm)
  511. {
  512. int err;
  513. struct snd_pcm *pcm;
  514. if (rpcm)
  515. *rpcm = NULL;
  516. err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
  517. if (err < 0)
  518. return err;
  519. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  520. &snd_ad1889_playback_ops);
  521. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  522. &snd_ad1889_capture_ops);
  523. pcm->private_data = chip;
  524. pcm->info_flags = 0;
  525. strcpy(pcm->name, chip->card->shortname);
  526. chip->pcm = pcm;
  527. chip->psubs = NULL;
  528. chip->csubs = NULL;
  529. err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  530. snd_dma_pci_data(chip->pci),
  531. BUFFER_BYTES_MAX / 2,
  532. BUFFER_BYTES_MAX);
  533. if (err < 0) {
  534. dev_err(chip->card->dev, "buffer allocation error: %d\n", err);
  535. return err;
  536. }
  537. if (rpcm)
  538. *rpcm = pcm;
  539. return 0;
  540. }
  541. static void
  542. snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  543. {
  544. struct snd_ad1889 *chip = entry->private_data;
  545. u16 reg;
  546. int tmp;
  547. reg = ad1889_readw(chip, AD_DS_WSMC);
  548. snd_iprintf(buffer, "Wave output: %s\n",
  549. (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
  550. snd_iprintf(buffer, "Wave Channels: %s\n",
  551. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  552. snd_iprintf(buffer, "Wave Quality: %d-bit linear\n",
  553. (reg & AD_DS_WSMC_WA16) ? 16 : 8);
  554. /* WARQ is at offset 12 */
  555. tmp = (reg & AD_DS_WSMC_WARQ) ?
  556. (((reg & AD_DS_WSMC_WARQ >> 12) & 0x01) ? 12 : 18) : 4;
  557. tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
  558. snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp,
  559. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  560. snd_iprintf(buffer, "Synthesis output: %s\n",
  561. reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
  562. /* SYRQ is at offset 4 */
  563. tmp = (reg & AD_DS_WSMC_SYRQ) ?
  564. (((reg & AD_DS_WSMC_SYRQ >> 4) & 0x01) ? 12 : 18) : 4;
  565. tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
  566. snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp,
  567. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  568. reg = ad1889_readw(chip, AD_DS_RAMC);
  569. snd_iprintf(buffer, "ADC input: %s\n",
  570. (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
  571. snd_iprintf(buffer, "ADC Channels: %s\n",
  572. (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
  573. snd_iprintf(buffer, "ADC Quality: %d-bit linear\n",
  574. (reg & AD_DS_RAMC_AD16) ? 16 : 8);
  575. /* ACRQ is at offset 4 */
  576. tmp = (reg & AD_DS_RAMC_ACRQ) ?
  577. (((reg & AD_DS_RAMC_ACRQ >> 4) & 0x01) ? 12 : 18) : 4;
  578. tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
  579. snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp,
  580. (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
  581. snd_iprintf(buffer, "Resampler input: %s\n",
  582. reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
  583. /* RERQ is at offset 12 */
  584. tmp = (reg & AD_DS_RAMC_RERQ) ?
  585. (((reg & AD_DS_RAMC_RERQ >> 12) & 0x01) ? 12 : 18) : 4;
  586. tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
  587. snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp,
  588. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  589. /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
  590. suggests that LSB is -3dB, which is more coherent with the logarithmic
  591. nature of the dB scale */
  592. reg = ad1889_readw(chip, AD_DS_WADA);
  593. snd_iprintf(buffer, "Left: %s, -%d dB\n",
  594. (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
  595. ((reg & AD_DS_WADA_LWAA) >> 8) * 3);
  596. reg = ad1889_readw(chip, AD_DS_WADA);
  597. snd_iprintf(buffer, "Right: %s, -%d dB\n",
  598. (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
  599. (reg & AD_DS_WADA_RWAA) * 3);
  600. reg = ad1889_readw(chip, AD_DS_WAS);
  601. snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
  602. reg = ad1889_readw(chip, AD_DS_RES);
  603. snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
  604. }
  605. static void
  606. snd_ad1889_proc_init(struct snd_ad1889 *chip)
  607. {
  608. struct snd_info_entry *entry;
  609. if (!snd_card_proc_new(chip->card, chip->card->driver, &entry))
  610. snd_info_set_text_ops(entry, chip, snd_ad1889_proc_read);
  611. }
  612. static struct ac97_quirk ac97_quirks[] = {
  613. {
  614. .subvendor = 0x11d4, /* AD */
  615. .subdevice = 0x1889, /* AD1889 */
  616. .codec_id = AC97_ID_AD1819,
  617. .name = "AD1889",
  618. .type = AC97_TUNE_HP_ONLY
  619. },
  620. { } /* terminator */
  621. };
  622. static void
  623. snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
  624. {
  625. u16 reg;
  626. reg = ad1889_readw(chip, AD_AC97_ACIC);
  627. reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */
  628. ad1889_writew(chip, AD_AC97_ACIC, reg);
  629. ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
  630. udelay(10);
  631. /* Interface Enable */
  632. reg |= AD_AC97_ACIC_ACIE;
  633. ad1889_writew(chip, AD_AC97_ACIC, reg);
  634. snd_ad1889_ac97_ready(chip);
  635. /* Audio Stream Output | Variable Sample Rate Mode */
  636. reg = ad1889_readw(chip, AD_AC97_ACIC);
  637. reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
  638. ad1889_writew(chip, AD_AC97_ACIC, reg);
  639. ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
  640. }
  641. static void
  642. snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus)
  643. {
  644. struct snd_ad1889 *chip = bus->private_data;
  645. chip->ac97_bus = NULL;
  646. }
  647. static void
  648. snd_ad1889_ac97_free(struct snd_ac97 *ac97)
  649. {
  650. struct snd_ad1889 *chip = ac97->private_data;
  651. chip->ac97 = NULL;
  652. }
  653. static int
  654. snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
  655. {
  656. int err;
  657. struct snd_ac97_template ac97;
  658. static struct snd_ac97_bus_ops ops = {
  659. .write = snd_ad1889_ac97_write,
  660. .read = snd_ad1889_ac97_read,
  661. };
  662. /* doing that here, it works. */
  663. snd_ad1889_ac97_xinit(chip);
  664. err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
  665. if (err < 0)
  666. return err;
  667. chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free;
  668. memset(&ac97, 0, sizeof(ac97));
  669. ac97.private_data = chip;
  670. ac97.private_free = snd_ad1889_ac97_free;
  671. ac97.pci = chip->pci;
  672. err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
  673. if (err < 0)
  674. return err;
  675. snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
  676. return 0;
  677. }
  678. static int
  679. snd_ad1889_free(struct snd_ad1889 *chip)
  680. {
  681. if (chip->irq < 0)
  682. goto skip_hw;
  683. spin_lock_irq(&chip->lock);
  684. ad1889_mute(chip);
  685. /* Turn off interrupt on count and zero DMA registers */
  686. ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
  687. /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
  688. ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
  689. ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */
  690. spin_unlock_irq(&chip->lock);
  691. if (chip->irq >= 0)
  692. free_irq(chip->irq, chip);
  693. skip_hw:
  694. if (chip->iobase)
  695. iounmap(chip->iobase);
  696. pci_release_regions(chip->pci);
  697. pci_disable_device(chip->pci);
  698. kfree(chip);
  699. return 0;
  700. }
  701. static int
  702. snd_ad1889_dev_free(struct snd_device *device)
  703. {
  704. struct snd_ad1889 *chip = device->device_data;
  705. return snd_ad1889_free(chip);
  706. }
  707. static int
  708. snd_ad1889_init(struct snd_ad1889 *chip)
  709. {
  710. ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
  711. ad1889_readw(chip, AD_DS_CCS); /* flush posted write */
  712. mdelay(10);
  713. /* enable Master and Target abort interrupts */
  714. ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
  715. return 0;
  716. }
  717. static int
  718. snd_ad1889_create(struct snd_card *card,
  719. struct pci_dev *pci,
  720. struct snd_ad1889 **rchip)
  721. {
  722. int err;
  723. struct snd_ad1889 *chip;
  724. static struct snd_device_ops ops = {
  725. .dev_free = snd_ad1889_dev_free,
  726. };
  727. *rchip = NULL;
  728. if ((err = pci_enable_device(pci)) < 0)
  729. return err;
  730. /* check PCI availability (32bit DMA) */
  731. if (pci_set_dma_mask(pci, DMA_BIT_MASK(32)) < 0 ||
  732. pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32)) < 0) {
  733. dev_err(card->dev, "error setting 32-bit DMA mask.\n");
  734. pci_disable_device(pci);
  735. return -ENXIO;
  736. }
  737. /* allocate chip specific data with zero-filled memory */
  738. if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
  739. pci_disable_device(pci);
  740. return -ENOMEM;
  741. }
  742. chip->card = card;
  743. card->private_data = chip;
  744. chip->pci = pci;
  745. chip->irq = -1;
  746. /* (1) PCI resource allocation */
  747. if ((err = pci_request_regions(pci, card->driver)) < 0)
  748. goto free_and_ret;
  749. chip->bar = pci_resource_start(pci, 0);
  750. chip->iobase = pci_ioremap_bar(pci, 0);
  751. if (chip->iobase == NULL) {
  752. dev_err(card->dev, "unable to reserve region.\n");
  753. err = -EBUSY;
  754. goto free_and_ret;
  755. }
  756. pci_set_master(pci);
  757. spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
  758. if (request_irq(pci->irq, snd_ad1889_interrupt,
  759. IRQF_SHARED, KBUILD_MODNAME, chip)) {
  760. dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq);
  761. snd_ad1889_free(chip);
  762. return -EBUSY;
  763. }
  764. chip->irq = pci->irq;
  765. synchronize_irq(chip->irq);
  766. /* (2) initialization of the chip hardware */
  767. if ((err = snd_ad1889_init(chip)) < 0) {
  768. snd_ad1889_free(chip);
  769. return err;
  770. }
  771. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  772. snd_ad1889_free(chip);
  773. return err;
  774. }
  775. *rchip = chip;
  776. return 0;
  777. free_and_ret:
  778. kfree(chip);
  779. pci_disable_device(pci);
  780. return err;
  781. }
  782. static int
  783. snd_ad1889_probe(struct pci_dev *pci,
  784. const struct pci_device_id *pci_id)
  785. {
  786. int err;
  787. static int devno;
  788. struct snd_card *card;
  789. struct snd_ad1889 *chip;
  790. /* (1) */
  791. if (devno >= SNDRV_CARDS)
  792. return -ENODEV;
  793. if (!enable[devno]) {
  794. devno++;
  795. return -ENOENT;
  796. }
  797. /* (2) */
  798. err = snd_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE,
  799. 0, &card);
  800. /* XXX REVISIT: we can probably allocate chip in this call */
  801. if (err < 0)
  802. return err;
  803. strcpy(card->driver, "AD1889");
  804. strcpy(card->shortname, "Analog Devices AD1889");
  805. /* (3) */
  806. err = snd_ad1889_create(card, pci, &chip);
  807. if (err < 0)
  808. goto free_and_ret;
  809. /* (4) */
  810. sprintf(card->longname, "%s at 0x%lx irq %i",
  811. card->shortname, chip->bar, chip->irq);
  812. /* (5) */
  813. /* register AC97 mixer */
  814. err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
  815. if (err < 0)
  816. goto free_and_ret;
  817. err = snd_ad1889_pcm_init(chip, 0, NULL);
  818. if (err < 0)
  819. goto free_and_ret;
  820. /* register proc interface */
  821. snd_ad1889_proc_init(chip);
  822. /* (6) */
  823. err = snd_card_register(card);
  824. if (err < 0)
  825. goto free_and_ret;
  826. /* (7) */
  827. pci_set_drvdata(pci, card);
  828. devno++;
  829. return 0;
  830. free_and_ret:
  831. snd_card_free(card);
  832. return err;
  833. }
  834. static void
  835. snd_ad1889_remove(struct pci_dev *pci)
  836. {
  837. snd_card_free(pci_get_drvdata(pci));
  838. }
  839. static DEFINE_PCI_DEVICE_TABLE(snd_ad1889_ids) = {
  840. { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) },
  841. { 0, },
  842. };
  843. MODULE_DEVICE_TABLE(pci, snd_ad1889_ids);
  844. static struct pci_driver ad1889_pci_driver = {
  845. .name = KBUILD_MODNAME,
  846. .id_table = snd_ad1889_ids,
  847. .probe = snd_ad1889_probe,
  848. .remove = snd_ad1889_remove,
  849. };
  850. module_pci_driver(ad1889_pci_driver);