phy-mv-usb.c 21 KB

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  1. /*
  2. * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
  3. * Author: Chao Xie <chao.xie@marvell.com>
  4. * Neil Zhang <zhangwm@marvell.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/io.h>
  14. #include <linux/uaccess.h>
  15. #include <linux/device.h>
  16. #include <linux/proc_fs.h>
  17. #include <linux/clk.h>
  18. #include <linux/workqueue.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/usb.h>
  21. #include <linux/usb/ch9.h>
  22. #include <linux/usb/otg.h>
  23. #include <linux/usb/gadget.h>
  24. #include <linux/usb/hcd.h>
  25. #include <linux/platform_data/mv_usb.h>
  26. #include "phy-mv-usb.h"
  27. #define DRIVER_DESC "Marvell USB OTG transceiver driver"
  28. #define DRIVER_VERSION "Jan 20, 2010"
  29. MODULE_DESCRIPTION(DRIVER_DESC);
  30. MODULE_VERSION(DRIVER_VERSION);
  31. MODULE_LICENSE("GPL");
  32. static const char driver_name[] = "mv-otg";
  33. static char *state_string[] = {
  34. "undefined",
  35. "b_idle",
  36. "b_srp_init",
  37. "b_peripheral",
  38. "b_wait_acon",
  39. "b_host",
  40. "a_idle",
  41. "a_wait_vrise",
  42. "a_wait_bcon",
  43. "a_host",
  44. "a_suspend",
  45. "a_peripheral",
  46. "a_wait_vfall",
  47. "a_vbus_err"
  48. };
  49. static int mv_otg_set_vbus(struct usb_otg *otg, bool on)
  50. {
  51. struct mv_otg *mvotg = container_of(otg->phy, struct mv_otg, phy);
  52. if (mvotg->pdata->set_vbus == NULL)
  53. return -ENODEV;
  54. return mvotg->pdata->set_vbus(on);
  55. }
  56. static int mv_otg_set_host(struct usb_otg *otg,
  57. struct usb_bus *host)
  58. {
  59. otg->host = host;
  60. return 0;
  61. }
  62. static int mv_otg_set_peripheral(struct usb_otg *otg,
  63. struct usb_gadget *gadget)
  64. {
  65. otg->gadget = gadget;
  66. return 0;
  67. }
  68. static void mv_otg_run_state_machine(struct mv_otg *mvotg,
  69. unsigned long delay)
  70. {
  71. dev_dbg(&mvotg->pdev->dev, "transceiver is updated\n");
  72. if (!mvotg->qwork)
  73. return;
  74. queue_delayed_work(mvotg->qwork, &mvotg->work, delay);
  75. }
  76. static void mv_otg_timer_await_bcon(unsigned long data)
  77. {
  78. struct mv_otg *mvotg = (struct mv_otg *) data;
  79. mvotg->otg_ctrl.a_wait_bcon_timeout = 1;
  80. dev_info(&mvotg->pdev->dev, "B Device No Response!\n");
  81. if (spin_trylock(&mvotg->wq_lock)) {
  82. mv_otg_run_state_machine(mvotg, 0);
  83. spin_unlock(&mvotg->wq_lock);
  84. }
  85. }
  86. static int mv_otg_cancel_timer(struct mv_otg *mvotg, unsigned int id)
  87. {
  88. struct timer_list *timer;
  89. if (id >= OTG_TIMER_NUM)
  90. return -EINVAL;
  91. timer = &mvotg->otg_ctrl.timer[id];
  92. if (timer_pending(timer))
  93. del_timer(timer);
  94. return 0;
  95. }
  96. static int mv_otg_set_timer(struct mv_otg *mvotg, unsigned int id,
  97. unsigned long interval,
  98. void (*callback) (unsigned long))
  99. {
  100. struct timer_list *timer;
  101. if (id >= OTG_TIMER_NUM)
  102. return -EINVAL;
  103. timer = &mvotg->otg_ctrl.timer[id];
  104. if (timer_pending(timer)) {
  105. dev_err(&mvotg->pdev->dev, "Timer%d is already running\n", id);
  106. return -EBUSY;
  107. }
  108. init_timer(timer);
  109. timer->data = (unsigned long) mvotg;
  110. timer->function = callback;
  111. timer->expires = jiffies + interval;
  112. add_timer(timer);
  113. return 0;
  114. }
  115. static int mv_otg_reset(struct mv_otg *mvotg)
  116. {
  117. unsigned int loops;
  118. u32 tmp;
  119. /* Stop the controller */
  120. tmp = readl(&mvotg->op_regs->usbcmd);
  121. tmp &= ~USBCMD_RUN_STOP;
  122. writel(tmp, &mvotg->op_regs->usbcmd);
  123. /* Reset the controller to get default values */
  124. writel(USBCMD_CTRL_RESET, &mvotg->op_regs->usbcmd);
  125. loops = 500;
  126. while (readl(&mvotg->op_regs->usbcmd) & USBCMD_CTRL_RESET) {
  127. if (loops == 0) {
  128. dev_err(&mvotg->pdev->dev,
  129. "Wait for RESET completed TIMEOUT\n");
  130. return -ETIMEDOUT;
  131. }
  132. loops--;
  133. udelay(20);
  134. }
  135. writel(0x0, &mvotg->op_regs->usbintr);
  136. tmp = readl(&mvotg->op_regs->usbsts);
  137. writel(tmp, &mvotg->op_regs->usbsts);
  138. return 0;
  139. }
  140. static void mv_otg_init_irq(struct mv_otg *mvotg)
  141. {
  142. u32 otgsc;
  143. mvotg->irq_en = OTGSC_INTR_A_SESSION_VALID
  144. | OTGSC_INTR_A_VBUS_VALID;
  145. mvotg->irq_status = OTGSC_INTSTS_A_SESSION_VALID
  146. | OTGSC_INTSTS_A_VBUS_VALID;
  147. if (mvotg->pdata->vbus == NULL) {
  148. mvotg->irq_en |= OTGSC_INTR_B_SESSION_VALID
  149. | OTGSC_INTR_B_SESSION_END;
  150. mvotg->irq_status |= OTGSC_INTSTS_B_SESSION_VALID
  151. | OTGSC_INTSTS_B_SESSION_END;
  152. }
  153. if (mvotg->pdata->id == NULL) {
  154. mvotg->irq_en |= OTGSC_INTR_USB_ID;
  155. mvotg->irq_status |= OTGSC_INTSTS_USB_ID;
  156. }
  157. otgsc = readl(&mvotg->op_regs->otgsc);
  158. otgsc |= mvotg->irq_en;
  159. writel(otgsc, &mvotg->op_regs->otgsc);
  160. }
  161. static void mv_otg_start_host(struct mv_otg *mvotg, int on)
  162. {
  163. #ifdef CONFIG_USB
  164. struct usb_otg *otg = mvotg->phy.otg;
  165. struct usb_hcd *hcd;
  166. if (!otg->host)
  167. return;
  168. dev_info(&mvotg->pdev->dev, "%s host\n", on ? "start" : "stop");
  169. hcd = bus_to_hcd(otg->host);
  170. if (on) {
  171. usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
  172. device_wakeup_enable(hcd->self.controller);
  173. } else {
  174. usb_remove_hcd(hcd);
  175. }
  176. #endif /* CONFIG_USB */
  177. }
  178. static void mv_otg_start_periphrals(struct mv_otg *mvotg, int on)
  179. {
  180. struct usb_otg *otg = mvotg->phy.otg;
  181. if (!otg->gadget)
  182. return;
  183. dev_info(mvotg->phy.dev, "gadget %s\n", on ? "on" : "off");
  184. if (on)
  185. usb_gadget_vbus_connect(otg->gadget);
  186. else
  187. usb_gadget_vbus_disconnect(otg->gadget);
  188. }
  189. static void otg_clock_enable(struct mv_otg *mvotg)
  190. {
  191. clk_prepare_enable(mvotg->clk);
  192. }
  193. static void otg_clock_disable(struct mv_otg *mvotg)
  194. {
  195. clk_disable_unprepare(mvotg->clk);
  196. }
  197. static int mv_otg_enable_internal(struct mv_otg *mvotg)
  198. {
  199. int retval = 0;
  200. if (mvotg->active)
  201. return 0;
  202. dev_dbg(&mvotg->pdev->dev, "otg enabled\n");
  203. otg_clock_enable(mvotg);
  204. if (mvotg->pdata->phy_init) {
  205. retval = mvotg->pdata->phy_init(mvotg->phy_regs);
  206. if (retval) {
  207. dev_err(&mvotg->pdev->dev,
  208. "init phy error %d\n", retval);
  209. otg_clock_disable(mvotg);
  210. return retval;
  211. }
  212. }
  213. mvotg->active = 1;
  214. return 0;
  215. }
  216. static int mv_otg_enable(struct mv_otg *mvotg)
  217. {
  218. if (mvotg->clock_gating)
  219. return mv_otg_enable_internal(mvotg);
  220. return 0;
  221. }
  222. static void mv_otg_disable_internal(struct mv_otg *mvotg)
  223. {
  224. if (mvotg->active) {
  225. dev_dbg(&mvotg->pdev->dev, "otg disabled\n");
  226. if (mvotg->pdata->phy_deinit)
  227. mvotg->pdata->phy_deinit(mvotg->phy_regs);
  228. otg_clock_disable(mvotg);
  229. mvotg->active = 0;
  230. }
  231. }
  232. static void mv_otg_disable(struct mv_otg *mvotg)
  233. {
  234. if (mvotg->clock_gating)
  235. mv_otg_disable_internal(mvotg);
  236. }
  237. static void mv_otg_update_inputs(struct mv_otg *mvotg)
  238. {
  239. struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
  240. u32 otgsc;
  241. otgsc = readl(&mvotg->op_regs->otgsc);
  242. if (mvotg->pdata->vbus) {
  243. if (mvotg->pdata->vbus->poll() == VBUS_HIGH) {
  244. otg_ctrl->b_sess_vld = 1;
  245. otg_ctrl->b_sess_end = 0;
  246. } else {
  247. otg_ctrl->b_sess_vld = 0;
  248. otg_ctrl->b_sess_end = 1;
  249. }
  250. } else {
  251. otg_ctrl->b_sess_vld = !!(otgsc & OTGSC_STS_B_SESSION_VALID);
  252. otg_ctrl->b_sess_end = !!(otgsc & OTGSC_STS_B_SESSION_END);
  253. }
  254. if (mvotg->pdata->id)
  255. otg_ctrl->id = !!mvotg->pdata->id->poll();
  256. else
  257. otg_ctrl->id = !!(otgsc & OTGSC_STS_USB_ID);
  258. if (mvotg->pdata->otg_force_a_bus_req && !otg_ctrl->id)
  259. otg_ctrl->a_bus_req = 1;
  260. otg_ctrl->a_sess_vld = !!(otgsc & OTGSC_STS_A_SESSION_VALID);
  261. otg_ctrl->a_vbus_vld = !!(otgsc & OTGSC_STS_A_VBUS_VALID);
  262. dev_dbg(&mvotg->pdev->dev, "%s: ", __func__);
  263. dev_dbg(&mvotg->pdev->dev, "id %d\n", otg_ctrl->id);
  264. dev_dbg(&mvotg->pdev->dev, "b_sess_vld %d\n", otg_ctrl->b_sess_vld);
  265. dev_dbg(&mvotg->pdev->dev, "b_sess_end %d\n", otg_ctrl->b_sess_end);
  266. dev_dbg(&mvotg->pdev->dev, "a_vbus_vld %d\n", otg_ctrl->a_vbus_vld);
  267. dev_dbg(&mvotg->pdev->dev, "a_sess_vld %d\n", otg_ctrl->a_sess_vld);
  268. }
  269. static void mv_otg_update_state(struct mv_otg *mvotg)
  270. {
  271. struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
  272. struct usb_phy *phy = &mvotg->phy;
  273. int old_state = phy->state;
  274. switch (old_state) {
  275. case OTG_STATE_UNDEFINED:
  276. phy->state = OTG_STATE_B_IDLE;
  277. /* FALL THROUGH */
  278. case OTG_STATE_B_IDLE:
  279. if (otg_ctrl->id == 0)
  280. phy->state = OTG_STATE_A_IDLE;
  281. else if (otg_ctrl->b_sess_vld)
  282. phy->state = OTG_STATE_B_PERIPHERAL;
  283. break;
  284. case OTG_STATE_B_PERIPHERAL:
  285. if (!otg_ctrl->b_sess_vld || otg_ctrl->id == 0)
  286. phy->state = OTG_STATE_B_IDLE;
  287. break;
  288. case OTG_STATE_A_IDLE:
  289. if (otg_ctrl->id)
  290. phy->state = OTG_STATE_B_IDLE;
  291. else if (!(otg_ctrl->a_bus_drop) &&
  292. (otg_ctrl->a_bus_req || otg_ctrl->a_srp_det))
  293. phy->state = OTG_STATE_A_WAIT_VRISE;
  294. break;
  295. case OTG_STATE_A_WAIT_VRISE:
  296. if (otg_ctrl->a_vbus_vld)
  297. phy->state = OTG_STATE_A_WAIT_BCON;
  298. break;
  299. case OTG_STATE_A_WAIT_BCON:
  300. if (otg_ctrl->id || otg_ctrl->a_bus_drop
  301. || otg_ctrl->a_wait_bcon_timeout) {
  302. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  303. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  304. phy->state = OTG_STATE_A_WAIT_VFALL;
  305. otg_ctrl->a_bus_req = 0;
  306. } else if (!otg_ctrl->a_vbus_vld) {
  307. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  308. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  309. phy->state = OTG_STATE_A_VBUS_ERR;
  310. } else if (otg_ctrl->b_conn) {
  311. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  312. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  313. phy->state = OTG_STATE_A_HOST;
  314. }
  315. break;
  316. case OTG_STATE_A_HOST:
  317. if (otg_ctrl->id || !otg_ctrl->b_conn
  318. || otg_ctrl->a_bus_drop)
  319. phy->state = OTG_STATE_A_WAIT_BCON;
  320. else if (!otg_ctrl->a_vbus_vld)
  321. phy->state = OTG_STATE_A_VBUS_ERR;
  322. break;
  323. case OTG_STATE_A_WAIT_VFALL:
  324. if (otg_ctrl->id
  325. || (!otg_ctrl->b_conn && otg_ctrl->a_sess_vld)
  326. || otg_ctrl->a_bus_req)
  327. phy->state = OTG_STATE_A_IDLE;
  328. break;
  329. case OTG_STATE_A_VBUS_ERR:
  330. if (otg_ctrl->id || otg_ctrl->a_clr_err
  331. || otg_ctrl->a_bus_drop) {
  332. otg_ctrl->a_clr_err = 0;
  333. phy->state = OTG_STATE_A_WAIT_VFALL;
  334. }
  335. break;
  336. default:
  337. break;
  338. }
  339. }
  340. static void mv_otg_work(struct work_struct *work)
  341. {
  342. struct mv_otg *mvotg;
  343. struct usb_phy *phy;
  344. struct usb_otg *otg;
  345. int old_state;
  346. mvotg = container_of(to_delayed_work(work), struct mv_otg, work);
  347. run:
  348. /* work queue is single thread, or we need spin_lock to protect */
  349. phy = &mvotg->phy;
  350. otg = phy->otg;
  351. old_state = phy->state;
  352. if (!mvotg->active)
  353. return;
  354. mv_otg_update_inputs(mvotg);
  355. mv_otg_update_state(mvotg);
  356. if (old_state != phy->state) {
  357. dev_info(&mvotg->pdev->dev, "change from state %s to %s\n",
  358. state_string[old_state],
  359. state_string[phy->state]);
  360. switch (phy->state) {
  361. case OTG_STATE_B_IDLE:
  362. otg->default_a = 0;
  363. if (old_state == OTG_STATE_B_PERIPHERAL)
  364. mv_otg_start_periphrals(mvotg, 0);
  365. mv_otg_reset(mvotg);
  366. mv_otg_disable(mvotg);
  367. break;
  368. case OTG_STATE_B_PERIPHERAL:
  369. mv_otg_enable(mvotg);
  370. mv_otg_start_periphrals(mvotg, 1);
  371. break;
  372. case OTG_STATE_A_IDLE:
  373. otg->default_a = 1;
  374. mv_otg_enable(mvotg);
  375. if (old_state == OTG_STATE_A_WAIT_VFALL)
  376. mv_otg_start_host(mvotg, 0);
  377. mv_otg_reset(mvotg);
  378. break;
  379. case OTG_STATE_A_WAIT_VRISE:
  380. mv_otg_set_vbus(otg, 1);
  381. break;
  382. case OTG_STATE_A_WAIT_BCON:
  383. if (old_state != OTG_STATE_A_HOST)
  384. mv_otg_start_host(mvotg, 1);
  385. mv_otg_set_timer(mvotg, A_WAIT_BCON_TIMER,
  386. T_A_WAIT_BCON,
  387. mv_otg_timer_await_bcon);
  388. /*
  389. * Now, we directly enter A_HOST. So set b_conn = 1
  390. * here. In fact, it need host driver to notify us.
  391. */
  392. mvotg->otg_ctrl.b_conn = 1;
  393. break;
  394. case OTG_STATE_A_HOST:
  395. break;
  396. case OTG_STATE_A_WAIT_VFALL:
  397. /*
  398. * Now, we has exited A_HOST. So set b_conn = 0
  399. * here. In fact, it need host driver to notify us.
  400. */
  401. mvotg->otg_ctrl.b_conn = 0;
  402. mv_otg_set_vbus(otg, 0);
  403. break;
  404. case OTG_STATE_A_VBUS_ERR:
  405. break;
  406. default:
  407. break;
  408. }
  409. goto run;
  410. }
  411. }
  412. static irqreturn_t mv_otg_irq(int irq, void *dev)
  413. {
  414. struct mv_otg *mvotg = dev;
  415. u32 otgsc;
  416. otgsc = readl(&mvotg->op_regs->otgsc);
  417. writel(otgsc, &mvotg->op_regs->otgsc);
  418. /*
  419. * if we have vbus, then the vbus detection for B-device
  420. * will be done by mv_otg_inputs_irq().
  421. */
  422. if (mvotg->pdata->vbus)
  423. if ((otgsc & OTGSC_STS_USB_ID) &&
  424. !(otgsc & OTGSC_INTSTS_USB_ID))
  425. return IRQ_NONE;
  426. if ((otgsc & mvotg->irq_status) == 0)
  427. return IRQ_NONE;
  428. mv_otg_run_state_machine(mvotg, 0);
  429. return IRQ_HANDLED;
  430. }
  431. static irqreturn_t mv_otg_inputs_irq(int irq, void *dev)
  432. {
  433. struct mv_otg *mvotg = dev;
  434. /* The clock may disabled at this time */
  435. if (!mvotg->active) {
  436. mv_otg_enable(mvotg);
  437. mv_otg_init_irq(mvotg);
  438. }
  439. mv_otg_run_state_machine(mvotg, 0);
  440. return IRQ_HANDLED;
  441. }
  442. static ssize_t
  443. get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
  444. {
  445. struct mv_otg *mvotg = dev_get_drvdata(dev);
  446. return scnprintf(buf, PAGE_SIZE, "%d\n",
  447. mvotg->otg_ctrl.a_bus_req);
  448. }
  449. static ssize_t
  450. set_a_bus_req(struct device *dev, struct device_attribute *attr,
  451. const char *buf, size_t count)
  452. {
  453. struct mv_otg *mvotg = dev_get_drvdata(dev);
  454. if (count > 2)
  455. return -1;
  456. /* We will use this interface to change to A device */
  457. if (mvotg->phy.state != OTG_STATE_B_IDLE
  458. && mvotg->phy.state != OTG_STATE_A_IDLE)
  459. return -1;
  460. /* The clock may disabled and we need to set irq for ID detected */
  461. mv_otg_enable(mvotg);
  462. mv_otg_init_irq(mvotg);
  463. if (buf[0] == '1') {
  464. mvotg->otg_ctrl.a_bus_req = 1;
  465. mvotg->otg_ctrl.a_bus_drop = 0;
  466. dev_dbg(&mvotg->pdev->dev,
  467. "User request: a_bus_req = 1\n");
  468. if (spin_trylock(&mvotg->wq_lock)) {
  469. mv_otg_run_state_machine(mvotg, 0);
  470. spin_unlock(&mvotg->wq_lock);
  471. }
  472. }
  473. return count;
  474. }
  475. static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req,
  476. set_a_bus_req);
  477. static ssize_t
  478. set_a_clr_err(struct device *dev, struct device_attribute *attr,
  479. const char *buf, size_t count)
  480. {
  481. struct mv_otg *mvotg = dev_get_drvdata(dev);
  482. if (!mvotg->phy.otg->default_a)
  483. return -1;
  484. if (count > 2)
  485. return -1;
  486. if (buf[0] == '1') {
  487. mvotg->otg_ctrl.a_clr_err = 1;
  488. dev_dbg(&mvotg->pdev->dev,
  489. "User request: a_clr_err = 1\n");
  490. }
  491. if (spin_trylock(&mvotg->wq_lock)) {
  492. mv_otg_run_state_machine(mvotg, 0);
  493. spin_unlock(&mvotg->wq_lock);
  494. }
  495. return count;
  496. }
  497. static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err);
  498. static ssize_t
  499. get_a_bus_drop(struct device *dev, struct device_attribute *attr,
  500. char *buf)
  501. {
  502. struct mv_otg *mvotg = dev_get_drvdata(dev);
  503. return scnprintf(buf, PAGE_SIZE, "%d\n",
  504. mvotg->otg_ctrl.a_bus_drop);
  505. }
  506. static ssize_t
  507. set_a_bus_drop(struct device *dev, struct device_attribute *attr,
  508. const char *buf, size_t count)
  509. {
  510. struct mv_otg *mvotg = dev_get_drvdata(dev);
  511. if (!mvotg->phy.otg->default_a)
  512. return -1;
  513. if (count > 2)
  514. return -1;
  515. if (buf[0] == '0') {
  516. mvotg->otg_ctrl.a_bus_drop = 0;
  517. dev_dbg(&mvotg->pdev->dev,
  518. "User request: a_bus_drop = 0\n");
  519. } else if (buf[0] == '1') {
  520. mvotg->otg_ctrl.a_bus_drop = 1;
  521. mvotg->otg_ctrl.a_bus_req = 0;
  522. dev_dbg(&mvotg->pdev->dev,
  523. "User request: a_bus_drop = 1\n");
  524. dev_dbg(&mvotg->pdev->dev,
  525. "User request: and a_bus_req = 0\n");
  526. }
  527. if (spin_trylock(&mvotg->wq_lock)) {
  528. mv_otg_run_state_machine(mvotg, 0);
  529. spin_unlock(&mvotg->wq_lock);
  530. }
  531. return count;
  532. }
  533. static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR,
  534. get_a_bus_drop, set_a_bus_drop);
  535. static struct attribute *inputs_attrs[] = {
  536. &dev_attr_a_bus_req.attr,
  537. &dev_attr_a_clr_err.attr,
  538. &dev_attr_a_bus_drop.attr,
  539. NULL,
  540. };
  541. static struct attribute_group inputs_attr_group = {
  542. .name = "inputs",
  543. .attrs = inputs_attrs,
  544. };
  545. static int mv_otg_remove(struct platform_device *pdev)
  546. {
  547. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  548. sysfs_remove_group(&mvotg->pdev->dev.kobj, &inputs_attr_group);
  549. if (mvotg->qwork) {
  550. flush_workqueue(mvotg->qwork);
  551. destroy_workqueue(mvotg->qwork);
  552. }
  553. mv_otg_disable(mvotg);
  554. usb_remove_phy(&mvotg->phy);
  555. return 0;
  556. }
  557. static int mv_otg_probe(struct platform_device *pdev)
  558. {
  559. struct mv_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
  560. struct mv_otg *mvotg;
  561. struct usb_otg *otg;
  562. struct resource *r;
  563. int retval = 0, i;
  564. if (pdata == NULL) {
  565. dev_err(&pdev->dev, "failed to get platform data\n");
  566. return -ENODEV;
  567. }
  568. mvotg = devm_kzalloc(&pdev->dev, sizeof(*mvotg), GFP_KERNEL);
  569. if (!mvotg) {
  570. dev_err(&pdev->dev, "failed to allocate memory!\n");
  571. return -ENOMEM;
  572. }
  573. otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL);
  574. if (!otg)
  575. return -ENOMEM;
  576. platform_set_drvdata(pdev, mvotg);
  577. mvotg->pdev = pdev;
  578. mvotg->pdata = pdata;
  579. mvotg->clk = devm_clk_get(&pdev->dev, NULL);
  580. if (IS_ERR(mvotg->clk))
  581. return PTR_ERR(mvotg->clk);
  582. mvotg->qwork = create_singlethread_workqueue("mv_otg_queue");
  583. if (!mvotg->qwork) {
  584. dev_dbg(&pdev->dev, "cannot create workqueue for OTG\n");
  585. return -ENOMEM;
  586. }
  587. INIT_DELAYED_WORK(&mvotg->work, mv_otg_work);
  588. /* OTG common part */
  589. mvotg->pdev = pdev;
  590. mvotg->phy.dev = &pdev->dev;
  591. mvotg->phy.otg = otg;
  592. mvotg->phy.label = driver_name;
  593. mvotg->phy.state = OTG_STATE_UNDEFINED;
  594. otg->phy = &mvotg->phy;
  595. otg->set_host = mv_otg_set_host;
  596. otg->set_peripheral = mv_otg_set_peripheral;
  597. otg->set_vbus = mv_otg_set_vbus;
  598. for (i = 0; i < OTG_TIMER_NUM; i++)
  599. init_timer(&mvotg->otg_ctrl.timer[i]);
  600. r = platform_get_resource_byname(mvotg->pdev,
  601. IORESOURCE_MEM, "phyregs");
  602. if (r == NULL) {
  603. dev_err(&pdev->dev, "no phy I/O memory resource defined\n");
  604. retval = -ENODEV;
  605. goto err_destroy_workqueue;
  606. }
  607. mvotg->phy_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  608. if (mvotg->phy_regs == NULL) {
  609. dev_err(&pdev->dev, "failed to map phy I/O memory\n");
  610. retval = -EFAULT;
  611. goto err_destroy_workqueue;
  612. }
  613. r = platform_get_resource_byname(mvotg->pdev,
  614. IORESOURCE_MEM, "capregs");
  615. if (r == NULL) {
  616. dev_err(&pdev->dev, "no I/O memory resource defined\n");
  617. retval = -ENODEV;
  618. goto err_destroy_workqueue;
  619. }
  620. mvotg->cap_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  621. if (mvotg->cap_regs == NULL) {
  622. dev_err(&pdev->dev, "failed to map I/O memory\n");
  623. retval = -EFAULT;
  624. goto err_destroy_workqueue;
  625. }
  626. /* we will acces controller register, so enable the udc controller */
  627. retval = mv_otg_enable_internal(mvotg);
  628. if (retval) {
  629. dev_err(&pdev->dev, "mv otg enable error %d\n", retval);
  630. goto err_destroy_workqueue;
  631. }
  632. mvotg->op_regs =
  633. (struct mv_otg_regs __iomem *) ((unsigned long) mvotg->cap_regs
  634. + (readl(mvotg->cap_regs) & CAPLENGTH_MASK));
  635. if (pdata->id) {
  636. retval = devm_request_threaded_irq(&pdev->dev, pdata->id->irq,
  637. NULL, mv_otg_inputs_irq,
  638. IRQF_ONESHOT, "id", mvotg);
  639. if (retval) {
  640. dev_info(&pdev->dev,
  641. "Failed to request irq for ID\n");
  642. pdata->id = NULL;
  643. }
  644. }
  645. if (pdata->vbus) {
  646. mvotg->clock_gating = 1;
  647. retval = devm_request_threaded_irq(&pdev->dev, pdata->vbus->irq,
  648. NULL, mv_otg_inputs_irq,
  649. IRQF_ONESHOT, "vbus", mvotg);
  650. if (retval) {
  651. dev_info(&pdev->dev,
  652. "Failed to request irq for VBUS, "
  653. "disable clock gating\n");
  654. mvotg->clock_gating = 0;
  655. pdata->vbus = NULL;
  656. }
  657. }
  658. if (pdata->disable_otg_clock_gating)
  659. mvotg->clock_gating = 0;
  660. mv_otg_reset(mvotg);
  661. mv_otg_init_irq(mvotg);
  662. r = platform_get_resource(mvotg->pdev, IORESOURCE_IRQ, 0);
  663. if (r == NULL) {
  664. dev_err(&pdev->dev, "no IRQ resource defined\n");
  665. retval = -ENODEV;
  666. goto err_disable_clk;
  667. }
  668. mvotg->irq = r->start;
  669. if (devm_request_irq(&pdev->dev, mvotg->irq, mv_otg_irq, IRQF_SHARED,
  670. driver_name, mvotg)) {
  671. dev_err(&pdev->dev, "Request irq %d for OTG failed\n",
  672. mvotg->irq);
  673. mvotg->irq = 0;
  674. retval = -ENODEV;
  675. goto err_disable_clk;
  676. }
  677. retval = usb_add_phy(&mvotg->phy, USB_PHY_TYPE_USB2);
  678. if (retval < 0) {
  679. dev_err(&pdev->dev, "can't register transceiver, %d\n",
  680. retval);
  681. goto err_disable_clk;
  682. }
  683. retval = sysfs_create_group(&pdev->dev.kobj, &inputs_attr_group);
  684. if (retval < 0) {
  685. dev_dbg(&pdev->dev,
  686. "Can't register sysfs attr group: %d\n", retval);
  687. goto err_remove_phy;
  688. }
  689. spin_lock_init(&mvotg->wq_lock);
  690. if (spin_trylock(&mvotg->wq_lock)) {
  691. mv_otg_run_state_machine(mvotg, 2 * HZ);
  692. spin_unlock(&mvotg->wq_lock);
  693. }
  694. dev_info(&pdev->dev,
  695. "successful probe OTG device %s clock gating.\n",
  696. mvotg->clock_gating ? "with" : "without");
  697. return 0;
  698. err_remove_phy:
  699. usb_remove_phy(&mvotg->phy);
  700. err_disable_clk:
  701. mv_otg_disable_internal(mvotg);
  702. err_destroy_workqueue:
  703. flush_workqueue(mvotg->qwork);
  704. destroy_workqueue(mvotg->qwork);
  705. return retval;
  706. }
  707. #ifdef CONFIG_PM
  708. static int mv_otg_suspend(struct platform_device *pdev, pm_message_t state)
  709. {
  710. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  711. if (mvotg->phy.state != OTG_STATE_B_IDLE) {
  712. dev_info(&pdev->dev,
  713. "OTG state is not B_IDLE, it is %d!\n",
  714. mvotg->phy.state);
  715. return -EAGAIN;
  716. }
  717. if (!mvotg->clock_gating)
  718. mv_otg_disable_internal(mvotg);
  719. return 0;
  720. }
  721. static int mv_otg_resume(struct platform_device *pdev)
  722. {
  723. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  724. u32 otgsc;
  725. if (!mvotg->clock_gating) {
  726. mv_otg_enable_internal(mvotg);
  727. otgsc = readl(&mvotg->op_regs->otgsc);
  728. otgsc |= mvotg->irq_en;
  729. writel(otgsc, &mvotg->op_regs->otgsc);
  730. if (spin_trylock(&mvotg->wq_lock)) {
  731. mv_otg_run_state_machine(mvotg, 0);
  732. spin_unlock(&mvotg->wq_lock);
  733. }
  734. }
  735. return 0;
  736. }
  737. #endif
  738. static struct platform_driver mv_otg_driver = {
  739. .probe = mv_otg_probe,
  740. .remove = mv_otg_remove,
  741. .driver = {
  742. .owner = THIS_MODULE,
  743. .name = driver_name,
  744. },
  745. #ifdef CONFIG_PM
  746. .suspend = mv_otg_suspend,
  747. .resume = mv_otg_resume,
  748. #endif
  749. };
  750. module_platform_driver(mv_otg_driver);