jz4740.c 4.9 KB

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  1. /*
  2. * Ingenic JZ4740 "glue layer"
  3. *
  4. * Copyright (C) 2013, Apelete Seketeli <apelete@seketeli.net>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * You should have received a copy of the GNU General Public License along
  12. * with this program; if not, write to the Free Software Foundation, Inc.,
  13. * 675 Mass Ave, Cambridge, MA 02139, USA.
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/errno.h>
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/platform_device.h>
  21. #include "musb_core.h"
  22. struct jz4740_glue {
  23. struct device *dev;
  24. struct platform_device *musb;
  25. struct clk *clk;
  26. };
  27. static irqreturn_t jz4740_musb_interrupt(int irq, void *__hci)
  28. {
  29. unsigned long flags;
  30. irqreturn_t retval = IRQ_NONE;
  31. struct musb *musb = __hci;
  32. spin_lock_irqsave(&musb->lock, flags);
  33. musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
  34. musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
  35. musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
  36. /*
  37. * The controller is gadget only, the state of the host mode IRQ bits is
  38. * undefined. Mask them to make sure that the musb driver core will
  39. * never see them set
  40. */
  41. musb->int_usb &= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME |
  42. MUSB_INTR_RESET | MUSB_INTR_SOF;
  43. if (musb->int_usb || musb->int_tx || musb->int_rx)
  44. retval = musb_interrupt(musb);
  45. spin_unlock_irqrestore(&musb->lock, flags);
  46. return retval;
  47. }
  48. static struct musb_fifo_cfg jz4740_musb_fifo_cfg[] = {
  49. { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
  50. { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
  51. { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 64, },
  52. };
  53. static struct musb_hdrc_config jz4740_musb_config = {
  54. /* Silicon does not implement USB OTG. */
  55. .multipoint = 0,
  56. /* Max EPs scanned, driver will decide which EP can be used. */
  57. .num_eps = 4,
  58. /* RAMbits needed to configure EPs from table */
  59. .ram_bits = 9,
  60. .fifo_cfg = jz4740_musb_fifo_cfg,
  61. .fifo_cfg_size = ARRAY_SIZE(jz4740_musb_fifo_cfg),
  62. };
  63. static struct musb_hdrc_platform_data jz4740_musb_platform_data = {
  64. .mode = MUSB_PERIPHERAL,
  65. .config = &jz4740_musb_config,
  66. };
  67. static int jz4740_musb_init(struct musb *musb)
  68. {
  69. musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
  70. if (!musb->xceiv) {
  71. pr_err("HS UDC: no transceiver configured\n");
  72. return -ENODEV;
  73. }
  74. /* Silicon does not implement ConfigData register.
  75. * Set dyn_fifo to avoid reading EP config from hardware.
  76. */
  77. musb->dyn_fifo = true;
  78. musb->isr = jz4740_musb_interrupt;
  79. return 0;
  80. }
  81. static int jz4740_musb_exit(struct musb *musb)
  82. {
  83. usb_put_phy(musb->xceiv);
  84. return 0;
  85. }
  86. static const struct musb_platform_ops jz4740_musb_ops = {
  87. .init = jz4740_musb_init,
  88. .exit = jz4740_musb_exit,
  89. };
  90. static int jz4740_probe(struct platform_device *pdev)
  91. {
  92. struct musb_hdrc_platform_data *pdata = &jz4740_musb_platform_data;
  93. struct platform_device *musb;
  94. struct jz4740_glue *glue;
  95. struct clk *clk;
  96. int ret;
  97. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  98. if (!glue)
  99. return -ENOMEM;
  100. musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
  101. if (!musb) {
  102. dev_err(&pdev->dev, "failed to allocate musb device\n");
  103. return -ENOMEM;
  104. }
  105. clk = devm_clk_get(&pdev->dev, "udc");
  106. if (IS_ERR(clk)) {
  107. dev_err(&pdev->dev, "failed to get clock\n");
  108. ret = PTR_ERR(clk);
  109. goto err_platform_device_put;
  110. }
  111. ret = clk_prepare_enable(clk);
  112. if (ret) {
  113. dev_err(&pdev->dev, "failed to enable clock\n");
  114. goto err_platform_device_put;
  115. }
  116. musb->dev.parent = &pdev->dev;
  117. glue->dev = &pdev->dev;
  118. glue->musb = musb;
  119. glue->clk = clk;
  120. pdata->platform_ops = &jz4740_musb_ops;
  121. platform_set_drvdata(pdev, glue);
  122. ret = platform_device_add_resources(musb, pdev->resource,
  123. pdev->num_resources);
  124. if (ret) {
  125. dev_err(&pdev->dev, "failed to add resources\n");
  126. goto err_clk_disable;
  127. }
  128. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  129. if (ret) {
  130. dev_err(&pdev->dev, "failed to add platform_data\n");
  131. goto err_clk_disable;
  132. }
  133. ret = platform_device_add(musb);
  134. if (ret) {
  135. dev_err(&pdev->dev, "failed to register musb device\n");
  136. goto err_clk_disable;
  137. }
  138. return 0;
  139. err_clk_disable:
  140. clk_disable_unprepare(clk);
  141. err_platform_device_put:
  142. platform_device_put(musb);
  143. return ret;
  144. }
  145. static int jz4740_remove(struct platform_device *pdev)
  146. {
  147. struct jz4740_glue *glue = platform_get_drvdata(pdev);
  148. platform_device_unregister(glue->musb);
  149. clk_disable_unprepare(glue->clk);
  150. return 0;
  151. }
  152. static struct platform_driver jz4740_driver = {
  153. .probe = jz4740_probe,
  154. .remove = jz4740_remove,
  155. .driver = {
  156. .name = "musb-jz4740",
  157. },
  158. };
  159. MODULE_DESCRIPTION("JZ4740 MUSB Glue Layer");
  160. MODULE_AUTHOR("Apelete Seketeli <apelete@seketeli.net>");
  161. MODULE_LICENSE("GPL v2");
  162. module_platform_driver(jz4740_driver);