max3421-hcd.c 50 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957
  1. /*
  2. * MAX3421 Host Controller driver for USB.
  3. *
  4. * Author: David Mosberger-Tang <davidm@egauge.net>
  5. *
  6. * (C) Copyright 2014 David Mosberger-Tang <davidm@egauge.net>
  7. *
  8. * MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host
  9. * controller on a SPI bus.
  10. *
  11. * Based on:
  12. * o MAX3421E datasheet
  13. * http://datasheets.maximintegrated.com/en/ds/MAX3421E.pdf
  14. * o MAX3421E Programming Guide
  15. * http://www.hdl.co.jp/ftpdata/utl-001/AN3785.pdf
  16. * o gadget/dummy_hcd.c
  17. * For USB HCD implementation.
  18. * o Arduino MAX3421 driver
  19. * https://github.com/felis/USB_Host_Shield_2.0/blob/master/Usb.cpp
  20. *
  21. * This file is licenced under the GPL v2.
  22. *
  23. * Important note on worst-case (full-speed) packet size constraints
  24. * (See USB 2.0 Section 5.6.3 and following):
  25. *
  26. * - control: 64 bytes
  27. * - isochronous: 1023 bytes
  28. * - interrupt: 64 bytes
  29. * - bulk: 64 bytes
  30. *
  31. * Since the MAX3421 FIFO size is 64 bytes, we do not have to work about
  32. * multi-FIFO writes/reads for a single USB packet *except* for isochronous
  33. * transfers. We don't support isochronous transfers at this time, so we
  34. * just assume that a USB packet always fits into a single FIFO buffer.
  35. *
  36. * NOTE: The June 2006 version of "MAX3421E Programming Guide"
  37. * (AN3785) has conflicting info for the RCVDAVIRQ bit:
  38. *
  39. * The description of RCVDAVIRQ says "The CPU *must* clear
  40. * this IRQ bit (by writing a 1 to it) before reading the
  41. * RCVFIFO data.
  42. *
  43. * However, the earlier section on "Programming BULK-IN
  44. * Transfers" says * that:
  45. *
  46. * After the CPU retrieves the data, it clears the
  47. * RCVDAVIRQ bit.
  48. *
  49. * The December 2006 version has been corrected and it consistently
  50. * states the second behavior is the correct one.
  51. *
  52. * Synchronous SPI transactions sleep so we can't perform any such
  53. * transactions while holding a spin-lock (and/or while interrupts are
  54. * masked). To achieve this, all SPI transactions are issued from a
  55. * single thread (max3421_spi_thread).
  56. */
  57. #include <linux/module.h>
  58. #include <linux/spi/spi.h>
  59. #include <linux/usb.h>
  60. #include <linux/usb/hcd.h>
  61. #include <linux/platform_data/max3421-hcd.h>
  62. #define DRIVER_DESC "MAX3421 USB Host-Controller Driver"
  63. #define DRIVER_VERSION "1.0"
  64. /* 11-bit counter that wraps around (USB 2.0 Section 8.3.3): */
  65. #define USB_MAX_FRAME_NUMBER 0x7ff
  66. #define USB_MAX_RETRIES 3 /* # of retries before error is reported */
  67. /*
  68. * Max. # of times we're willing to retransmit a request immediately in
  69. * resposne to a NAK. Afterwards, we fall back on trying once a frame.
  70. */
  71. #define NAK_MAX_FAST_RETRANSMITS 2
  72. #define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */
  73. /* Port-change mask: */
  74. #define PORT_C_MASK ((USB_PORT_STAT_C_CONNECTION | \
  75. USB_PORT_STAT_C_ENABLE | \
  76. USB_PORT_STAT_C_SUSPEND | \
  77. USB_PORT_STAT_C_OVERCURRENT | \
  78. USB_PORT_STAT_C_RESET) << 16)
  79. enum max3421_rh_state {
  80. MAX3421_RH_RESET,
  81. MAX3421_RH_SUSPENDED,
  82. MAX3421_RH_RUNNING
  83. };
  84. enum pkt_state {
  85. PKT_STATE_SETUP, /* waiting to send setup packet to ctrl pipe */
  86. PKT_STATE_TRANSFER, /* waiting to xfer transfer_buffer */
  87. PKT_STATE_TERMINATE /* waiting to terminate control transfer */
  88. };
  89. enum scheduling_pass {
  90. SCHED_PASS_PERIODIC,
  91. SCHED_PASS_NON_PERIODIC,
  92. SCHED_PASS_DONE
  93. };
  94. struct max3421_dma_buf {
  95. u8 data[2];
  96. };
  97. struct max3421_hcd {
  98. spinlock_t lock;
  99. struct task_struct *spi_thread;
  100. struct max3421_hcd *next;
  101. enum max3421_rh_state rh_state;
  102. /* lower 16 bits contain port status, upper 16 bits the change mask: */
  103. u32 port_status;
  104. unsigned active:1;
  105. struct list_head ep_list; /* list of EP's with work */
  106. /*
  107. * The following are owned by spi_thread (may be accessed by
  108. * SPI-thread without acquiring the HCD lock:
  109. */
  110. u8 rev; /* chip revision */
  111. u16 frame_number;
  112. /*
  113. * kmalloc'd buffers guaranteed to be in separate (DMA)
  114. * cache-lines:
  115. */
  116. struct max3421_dma_buf *tx;
  117. struct max3421_dma_buf *rx;
  118. /*
  119. * URB we're currently processing. Must not be reset to NULL
  120. * unless MAX3421E chip is idle:
  121. */
  122. struct urb *curr_urb;
  123. enum scheduling_pass sched_pass;
  124. struct usb_device *loaded_dev; /* dev that's loaded into the chip */
  125. int loaded_epnum; /* epnum whose toggles are loaded */
  126. int urb_done; /* > 0 -> no errors, < 0: errno */
  127. size_t curr_len;
  128. u8 hien;
  129. u8 mode;
  130. u8 iopins[2];
  131. unsigned int do_enable_irq:1;
  132. unsigned int do_reset_hcd:1;
  133. unsigned int do_reset_port:1;
  134. unsigned int do_check_unlink:1;
  135. unsigned int do_iopin_update:1;
  136. #ifdef DEBUG
  137. unsigned long err_stat[16];
  138. #endif
  139. };
  140. struct max3421_ep {
  141. struct usb_host_endpoint *ep;
  142. struct list_head ep_list;
  143. u32 naks;
  144. u16 last_active; /* frame # this ep was last active */
  145. enum pkt_state pkt_state;
  146. u8 retries;
  147. u8 retransmit; /* packet needs retransmission */
  148. };
  149. static struct max3421_hcd *max3421_hcd_list;
  150. #define MAX3421_FIFO_SIZE 64
  151. #define MAX3421_SPI_DIR_RD 0 /* read register from MAX3421 */
  152. #define MAX3421_SPI_DIR_WR 1 /* write register to MAX3421 */
  153. /* SPI commands: */
  154. #define MAX3421_SPI_DIR_SHIFT 1
  155. #define MAX3421_SPI_REG_SHIFT 3
  156. #define MAX3421_REG_RCVFIFO 1
  157. #define MAX3421_REG_SNDFIFO 2
  158. #define MAX3421_REG_SUDFIFO 4
  159. #define MAX3421_REG_RCVBC 6
  160. #define MAX3421_REG_SNDBC 7
  161. #define MAX3421_REG_USBIRQ 13
  162. #define MAX3421_REG_USBIEN 14
  163. #define MAX3421_REG_USBCTL 15
  164. #define MAX3421_REG_CPUCTL 16
  165. #define MAX3421_REG_PINCTL 17
  166. #define MAX3421_REG_REVISION 18
  167. #define MAX3421_REG_IOPINS1 20
  168. #define MAX3421_REG_IOPINS2 21
  169. #define MAX3421_REG_GPINIRQ 22
  170. #define MAX3421_REG_GPINIEN 23
  171. #define MAX3421_REG_GPINPOL 24
  172. #define MAX3421_REG_HIRQ 25
  173. #define MAX3421_REG_HIEN 26
  174. #define MAX3421_REG_MODE 27
  175. #define MAX3421_REG_PERADDR 28
  176. #define MAX3421_REG_HCTL 29
  177. #define MAX3421_REG_HXFR 30
  178. #define MAX3421_REG_HRSL 31
  179. enum {
  180. MAX3421_USBIRQ_OSCOKIRQ_BIT = 0,
  181. MAX3421_USBIRQ_NOVBUSIRQ_BIT = 5,
  182. MAX3421_USBIRQ_VBUSIRQ_BIT
  183. };
  184. enum {
  185. MAX3421_CPUCTL_IE_BIT = 0,
  186. MAX3421_CPUCTL_PULSEWID0_BIT = 6,
  187. MAX3421_CPUCTL_PULSEWID1_BIT
  188. };
  189. enum {
  190. MAX3421_USBCTL_PWRDOWN_BIT = 4,
  191. MAX3421_USBCTL_CHIPRES_BIT
  192. };
  193. enum {
  194. MAX3421_PINCTL_GPXA_BIT = 0,
  195. MAX3421_PINCTL_GPXB_BIT,
  196. MAX3421_PINCTL_POSINT_BIT,
  197. MAX3421_PINCTL_INTLEVEL_BIT,
  198. MAX3421_PINCTL_FDUPSPI_BIT,
  199. MAX3421_PINCTL_EP0INAK_BIT,
  200. MAX3421_PINCTL_EP2INAK_BIT,
  201. MAX3421_PINCTL_EP3INAK_BIT,
  202. };
  203. enum {
  204. MAX3421_HI_BUSEVENT_BIT = 0, /* bus-reset/-resume */
  205. MAX3421_HI_RWU_BIT, /* remote wakeup */
  206. MAX3421_HI_RCVDAV_BIT, /* receive FIFO data available */
  207. MAX3421_HI_SNDBAV_BIT, /* send buffer available */
  208. MAX3421_HI_SUSDN_BIT, /* suspend operation done */
  209. MAX3421_HI_CONDET_BIT, /* peripheral connect/disconnect */
  210. MAX3421_HI_FRAME_BIT, /* frame generator */
  211. MAX3421_HI_HXFRDN_BIT, /* host transfer done */
  212. };
  213. enum {
  214. MAX3421_HCTL_BUSRST_BIT = 0,
  215. MAX3421_HCTL_FRMRST_BIT,
  216. MAX3421_HCTL_SAMPLEBUS_BIT,
  217. MAX3421_HCTL_SIGRSM_BIT,
  218. MAX3421_HCTL_RCVTOG0_BIT,
  219. MAX3421_HCTL_RCVTOG1_BIT,
  220. MAX3421_HCTL_SNDTOG0_BIT,
  221. MAX3421_HCTL_SNDTOG1_BIT
  222. };
  223. enum {
  224. MAX3421_MODE_HOST_BIT = 0,
  225. MAX3421_MODE_LOWSPEED_BIT,
  226. MAX3421_MODE_HUBPRE_BIT,
  227. MAX3421_MODE_SOFKAENAB_BIT,
  228. MAX3421_MODE_SEPIRQ_BIT,
  229. MAX3421_MODE_DELAYISO_BIT,
  230. MAX3421_MODE_DMPULLDN_BIT,
  231. MAX3421_MODE_DPPULLDN_BIT
  232. };
  233. enum {
  234. MAX3421_HRSL_OK = 0,
  235. MAX3421_HRSL_BUSY,
  236. MAX3421_HRSL_BADREQ,
  237. MAX3421_HRSL_UNDEF,
  238. MAX3421_HRSL_NAK,
  239. MAX3421_HRSL_STALL,
  240. MAX3421_HRSL_TOGERR,
  241. MAX3421_HRSL_WRONGPID,
  242. MAX3421_HRSL_BADBC,
  243. MAX3421_HRSL_PIDERR,
  244. MAX3421_HRSL_PKTERR,
  245. MAX3421_HRSL_CRCERR,
  246. MAX3421_HRSL_KERR,
  247. MAX3421_HRSL_JERR,
  248. MAX3421_HRSL_TIMEOUT,
  249. MAX3421_HRSL_BABBLE,
  250. MAX3421_HRSL_RESULT_MASK = 0xf,
  251. MAX3421_HRSL_RCVTOGRD_BIT = 4,
  252. MAX3421_HRSL_SNDTOGRD_BIT,
  253. MAX3421_HRSL_KSTATUS_BIT,
  254. MAX3421_HRSL_JSTATUS_BIT
  255. };
  256. /* Return same error-codes as ohci.h:cc_to_error: */
  257. static const int hrsl_to_error[] = {
  258. [MAX3421_HRSL_OK] = 0,
  259. [MAX3421_HRSL_BUSY] = -EINVAL,
  260. [MAX3421_HRSL_BADREQ] = -EINVAL,
  261. [MAX3421_HRSL_UNDEF] = -EINVAL,
  262. [MAX3421_HRSL_NAK] = -EAGAIN,
  263. [MAX3421_HRSL_STALL] = -EPIPE,
  264. [MAX3421_HRSL_TOGERR] = -EILSEQ,
  265. [MAX3421_HRSL_WRONGPID] = -EPROTO,
  266. [MAX3421_HRSL_BADBC] = -EREMOTEIO,
  267. [MAX3421_HRSL_PIDERR] = -EPROTO,
  268. [MAX3421_HRSL_PKTERR] = -EPROTO,
  269. [MAX3421_HRSL_CRCERR] = -EILSEQ,
  270. [MAX3421_HRSL_KERR] = -EIO,
  271. [MAX3421_HRSL_JERR] = -EIO,
  272. [MAX3421_HRSL_TIMEOUT] = -ETIME,
  273. [MAX3421_HRSL_BABBLE] = -EOVERFLOW
  274. };
  275. /*
  276. * See http://www.beyondlogic.org/usbnutshell/usb4.shtml#Control for a
  277. * reasonable overview of how control transfers use the the IN/OUT
  278. * tokens.
  279. */
  280. #define MAX3421_HXFR_BULK_IN(ep) (0x00 | (ep)) /* bulk or interrupt */
  281. #define MAX3421_HXFR_SETUP 0x10
  282. #define MAX3421_HXFR_BULK_OUT(ep) (0x20 | (ep)) /* bulk or interrupt */
  283. #define MAX3421_HXFR_ISO_IN(ep) (0x40 | (ep))
  284. #define MAX3421_HXFR_ISO_OUT(ep) (0x60 | (ep))
  285. #define MAX3421_HXFR_HS_IN 0x80 /* handshake in */
  286. #define MAX3421_HXFR_HS_OUT 0xa0 /* handshake out */
  287. #define field(val, bit) ((val) << (bit))
  288. static inline s16
  289. frame_diff(u16 left, u16 right)
  290. {
  291. return ((unsigned) (left - right)) % (USB_MAX_FRAME_NUMBER + 1);
  292. }
  293. static inline struct max3421_hcd *
  294. hcd_to_max3421(struct usb_hcd *hcd)
  295. {
  296. return (struct max3421_hcd *) hcd->hcd_priv;
  297. }
  298. static inline struct usb_hcd *
  299. max3421_to_hcd(struct max3421_hcd *max3421_hcd)
  300. {
  301. return container_of((void *) max3421_hcd, struct usb_hcd, hcd_priv);
  302. }
  303. static u8
  304. spi_rd8(struct usb_hcd *hcd, unsigned int reg)
  305. {
  306. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  307. struct spi_device *spi = to_spi_device(hcd->self.controller);
  308. struct spi_transfer transfer;
  309. struct spi_message msg;
  310. memset(&transfer, 0, sizeof(transfer));
  311. spi_message_init(&msg);
  312. max3421_hcd->tx->data[0] =
  313. (field(reg, MAX3421_SPI_REG_SHIFT) |
  314. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  315. transfer.tx_buf = max3421_hcd->tx->data;
  316. transfer.rx_buf = max3421_hcd->rx->data;
  317. transfer.len = 2;
  318. spi_message_add_tail(&transfer, &msg);
  319. spi_sync(spi, &msg);
  320. return max3421_hcd->rx->data[1];
  321. }
  322. static void
  323. spi_wr8(struct usb_hcd *hcd, unsigned int reg, u8 val)
  324. {
  325. struct spi_device *spi = to_spi_device(hcd->self.controller);
  326. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  327. struct spi_transfer transfer;
  328. struct spi_message msg;
  329. memset(&transfer, 0, sizeof(transfer));
  330. spi_message_init(&msg);
  331. max3421_hcd->tx->data[0] =
  332. (field(reg, MAX3421_SPI_REG_SHIFT) |
  333. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  334. max3421_hcd->tx->data[1] = val;
  335. transfer.tx_buf = max3421_hcd->tx->data;
  336. transfer.len = 2;
  337. spi_message_add_tail(&transfer, &msg);
  338. spi_sync(spi, &msg);
  339. }
  340. static void
  341. spi_rd_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  342. {
  343. struct spi_device *spi = to_spi_device(hcd->self.controller);
  344. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  345. struct spi_transfer transfer[2];
  346. struct spi_message msg;
  347. memset(transfer, 0, sizeof(transfer));
  348. spi_message_init(&msg);
  349. max3421_hcd->tx->data[0] =
  350. (field(reg, MAX3421_SPI_REG_SHIFT) |
  351. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  352. transfer[0].tx_buf = max3421_hcd->tx->data;
  353. transfer[0].len = 1;
  354. transfer[1].rx_buf = buf;
  355. transfer[1].len = len;
  356. spi_message_add_tail(&transfer[0], &msg);
  357. spi_message_add_tail(&transfer[1], &msg);
  358. spi_sync(spi, &msg);
  359. }
  360. static void
  361. spi_wr_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  362. {
  363. struct spi_device *spi = to_spi_device(hcd->self.controller);
  364. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  365. struct spi_transfer transfer[2];
  366. struct spi_message msg;
  367. memset(transfer, 0, sizeof(transfer));
  368. spi_message_init(&msg);
  369. max3421_hcd->tx->data[0] =
  370. (field(reg, MAX3421_SPI_REG_SHIFT) |
  371. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  372. transfer[0].tx_buf = max3421_hcd->tx->data;
  373. transfer[0].len = 1;
  374. transfer[1].tx_buf = buf;
  375. transfer[1].len = len;
  376. spi_message_add_tail(&transfer[0], &msg);
  377. spi_message_add_tail(&transfer[1], &msg);
  378. spi_sync(spi, &msg);
  379. }
  380. /*
  381. * Figure out the correct setting for the LOWSPEED and HUBPRE mode
  382. * bits. The HUBPRE bit needs to be set when MAX3421E operates at
  383. * full speed, but it's talking to a low-speed device (i.e., through a
  384. * hub). Setting that bit ensures that every low-speed packet is
  385. * preceded by a full-speed PRE PID. Possible configurations:
  386. *
  387. * Hub speed: Device speed: => LOWSPEED bit: HUBPRE bit:
  388. * FULL FULL => 0 0
  389. * FULL LOW => 1 1
  390. * LOW LOW => 1 0
  391. * LOW FULL => 1 0
  392. */
  393. static void
  394. max3421_set_speed(struct usb_hcd *hcd, struct usb_device *dev)
  395. {
  396. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  397. u8 mode_lowspeed, mode_hubpre, mode = max3421_hcd->mode;
  398. mode_lowspeed = BIT(MAX3421_MODE_LOWSPEED_BIT);
  399. mode_hubpre = BIT(MAX3421_MODE_HUBPRE_BIT);
  400. if (max3421_hcd->port_status & USB_PORT_STAT_LOW_SPEED) {
  401. mode |= mode_lowspeed;
  402. mode &= ~mode_hubpre;
  403. } else if (dev->speed == USB_SPEED_LOW) {
  404. mode |= mode_lowspeed | mode_hubpre;
  405. } else {
  406. mode &= ~(mode_lowspeed | mode_hubpre);
  407. }
  408. if (mode != max3421_hcd->mode) {
  409. max3421_hcd->mode = mode;
  410. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  411. }
  412. }
  413. /*
  414. * Caller must NOT hold HCD spinlock.
  415. */
  416. static void
  417. max3421_set_address(struct usb_hcd *hcd, struct usb_device *dev, int epnum,
  418. int force_toggles)
  419. {
  420. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  421. int old_epnum, same_ep, rcvtog, sndtog;
  422. struct usb_device *old_dev;
  423. u8 hctl;
  424. old_dev = max3421_hcd->loaded_dev;
  425. old_epnum = max3421_hcd->loaded_epnum;
  426. same_ep = (dev == old_dev && epnum == old_epnum);
  427. if (same_ep && !force_toggles)
  428. return;
  429. if (old_dev && !same_ep) {
  430. /* save the old end-points toggles: */
  431. u8 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  432. rcvtog = (hrsl >> MAX3421_HRSL_RCVTOGRD_BIT) & 1;
  433. sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  434. /* no locking: HCD (i.e., we) own toggles, don't we? */
  435. usb_settoggle(old_dev, old_epnum, 0, rcvtog);
  436. usb_settoggle(old_dev, old_epnum, 1, sndtog);
  437. }
  438. /* setup new endpoint's toggle bits: */
  439. rcvtog = usb_gettoggle(dev, epnum, 0);
  440. sndtog = usb_gettoggle(dev, epnum, 1);
  441. hctl = (BIT(rcvtog + MAX3421_HCTL_RCVTOG0_BIT) |
  442. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  443. max3421_hcd->loaded_epnum = epnum;
  444. spi_wr8(hcd, MAX3421_REG_HCTL, hctl);
  445. /*
  446. * Note: devnum for one and the same device can change during
  447. * address-assignment so it's best to just always load the
  448. * address whenever the end-point changed/was forced.
  449. */
  450. max3421_hcd->loaded_dev = dev;
  451. spi_wr8(hcd, MAX3421_REG_PERADDR, dev->devnum);
  452. }
  453. static int
  454. max3421_ctrl_setup(struct usb_hcd *hcd, struct urb *urb)
  455. {
  456. spi_wr_buf(hcd, MAX3421_REG_SUDFIFO, urb->setup_packet, 8);
  457. return MAX3421_HXFR_SETUP;
  458. }
  459. static int
  460. max3421_transfer_in(struct usb_hcd *hcd, struct urb *urb)
  461. {
  462. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  463. int epnum = usb_pipeendpoint(urb->pipe);
  464. max3421_hcd->curr_len = 0;
  465. max3421_hcd->hien |= BIT(MAX3421_HI_RCVDAV_BIT);
  466. return MAX3421_HXFR_BULK_IN(epnum);
  467. }
  468. static int
  469. max3421_transfer_out(struct usb_hcd *hcd, struct urb *urb, int fast_retransmit)
  470. {
  471. struct spi_device *spi = to_spi_device(hcd->self.controller);
  472. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  473. int epnum = usb_pipeendpoint(urb->pipe);
  474. u32 max_packet;
  475. void *src;
  476. src = urb->transfer_buffer + urb->actual_length;
  477. if (fast_retransmit) {
  478. if (max3421_hcd->rev == 0x12) {
  479. /* work around rev 0x12 bug: */
  480. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  481. spi_wr8(hcd, MAX3421_REG_SNDFIFO, ((u8 *) src)[0]);
  482. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  483. }
  484. return MAX3421_HXFR_BULK_OUT(epnum);
  485. }
  486. max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
  487. if (max_packet > MAX3421_FIFO_SIZE) {
  488. /*
  489. * We do not support isochronous transfers at this
  490. * time.
  491. */
  492. dev_err(&spi->dev,
  493. "%s: packet-size of %u too big (limit is %u bytes)",
  494. __func__, max_packet, MAX3421_FIFO_SIZE);
  495. max3421_hcd->urb_done = -EMSGSIZE;
  496. return -EMSGSIZE;
  497. }
  498. max3421_hcd->curr_len = min((urb->transfer_buffer_length -
  499. urb->actual_length), max_packet);
  500. spi_wr_buf(hcd, MAX3421_REG_SNDFIFO, src, max3421_hcd->curr_len);
  501. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  502. return MAX3421_HXFR_BULK_OUT(epnum);
  503. }
  504. /*
  505. * Issue the next host-transfer command.
  506. * Caller must NOT hold HCD spinlock.
  507. */
  508. static void
  509. max3421_next_transfer(struct usb_hcd *hcd, int fast_retransmit)
  510. {
  511. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  512. struct urb *urb = max3421_hcd->curr_urb;
  513. struct max3421_ep *max3421_ep;
  514. int cmd = -EINVAL;
  515. if (!urb)
  516. return; /* nothing to do */
  517. max3421_ep = urb->ep->hcpriv;
  518. switch (max3421_ep->pkt_state) {
  519. case PKT_STATE_SETUP:
  520. cmd = max3421_ctrl_setup(hcd, urb);
  521. break;
  522. case PKT_STATE_TRANSFER:
  523. if (usb_urb_dir_in(urb))
  524. cmd = max3421_transfer_in(hcd, urb);
  525. else
  526. cmd = max3421_transfer_out(hcd, urb, fast_retransmit);
  527. break;
  528. case PKT_STATE_TERMINATE:
  529. /*
  530. * IN transfers are terminated with HS_OUT token,
  531. * OUT transfers with HS_IN:
  532. */
  533. if (usb_urb_dir_in(urb))
  534. cmd = MAX3421_HXFR_HS_OUT;
  535. else
  536. cmd = MAX3421_HXFR_HS_IN;
  537. break;
  538. }
  539. if (cmd < 0)
  540. return;
  541. /* issue the command and wait for host-xfer-done interrupt: */
  542. spi_wr8(hcd, MAX3421_REG_HXFR, cmd);
  543. max3421_hcd->hien |= BIT(MAX3421_HI_HXFRDN_BIT);
  544. }
  545. /*
  546. * Find the next URB to process and start its execution.
  547. *
  548. * At this time, we do not anticipate ever connecting a USB hub to the
  549. * MAX3421 chip, so at most USB device can be connected and we can use
  550. * a simplistic scheduler: at the start of a frame, schedule all
  551. * periodic transfers. Once that is done, use the remainder of the
  552. * frame to process non-periodic (bulk & control) transfers.
  553. *
  554. * Preconditions:
  555. * o Caller must NOT hold HCD spinlock.
  556. * o max3421_hcd->curr_urb MUST BE NULL.
  557. * o MAX3421E chip must be idle.
  558. */
  559. static int
  560. max3421_select_and_start_urb(struct usb_hcd *hcd)
  561. {
  562. struct spi_device *spi = to_spi_device(hcd->self.controller);
  563. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  564. struct urb *urb, *curr_urb = NULL;
  565. struct max3421_ep *max3421_ep;
  566. int epnum, force_toggles = 0;
  567. struct usb_host_endpoint *ep;
  568. struct list_head *pos;
  569. unsigned long flags;
  570. spin_lock_irqsave(&max3421_hcd->lock, flags);
  571. for (;
  572. max3421_hcd->sched_pass < SCHED_PASS_DONE;
  573. ++max3421_hcd->sched_pass)
  574. list_for_each(pos, &max3421_hcd->ep_list) {
  575. urb = NULL;
  576. max3421_ep = container_of(pos, struct max3421_ep,
  577. ep_list);
  578. ep = max3421_ep->ep;
  579. switch (usb_endpoint_type(&ep->desc)) {
  580. case USB_ENDPOINT_XFER_ISOC:
  581. case USB_ENDPOINT_XFER_INT:
  582. if (max3421_hcd->sched_pass !=
  583. SCHED_PASS_PERIODIC)
  584. continue;
  585. break;
  586. case USB_ENDPOINT_XFER_CONTROL:
  587. case USB_ENDPOINT_XFER_BULK:
  588. if (max3421_hcd->sched_pass !=
  589. SCHED_PASS_NON_PERIODIC)
  590. continue;
  591. break;
  592. }
  593. if (list_empty(&ep->urb_list))
  594. continue; /* nothing to do */
  595. urb = list_first_entry(&ep->urb_list, struct urb,
  596. urb_list);
  597. if (urb->unlinked) {
  598. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  599. __func__, urb, urb->unlinked);
  600. max3421_hcd->curr_urb = urb;
  601. max3421_hcd->urb_done = 1;
  602. spin_unlock_irqrestore(&max3421_hcd->lock,
  603. flags);
  604. return 1;
  605. }
  606. switch (usb_endpoint_type(&ep->desc)) {
  607. case USB_ENDPOINT_XFER_CONTROL:
  608. /*
  609. * Allow one control transaction per
  610. * frame per endpoint:
  611. */
  612. if (frame_diff(max3421_ep->last_active,
  613. max3421_hcd->frame_number) == 0)
  614. continue;
  615. break;
  616. case USB_ENDPOINT_XFER_BULK:
  617. if (max3421_ep->retransmit
  618. && (frame_diff(max3421_ep->last_active,
  619. max3421_hcd->frame_number)
  620. == 0))
  621. /*
  622. * We already tried this EP
  623. * during this frame and got a
  624. * NAK or error; wait for next frame
  625. */
  626. continue;
  627. break;
  628. case USB_ENDPOINT_XFER_ISOC:
  629. case USB_ENDPOINT_XFER_INT:
  630. if (frame_diff(max3421_hcd->frame_number,
  631. max3421_ep->last_active)
  632. < urb->interval)
  633. /*
  634. * We already processed this
  635. * end-point in the current
  636. * frame
  637. */
  638. continue;
  639. break;
  640. }
  641. /* move current ep to tail: */
  642. list_move_tail(pos, &max3421_hcd->ep_list);
  643. curr_urb = urb;
  644. goto done;
  645. }
  646. done:
  647. if (!curr_urb) {
  648. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  649. return 0;
  650. }
  651. urb = max3421_hcd->curr_urb = curr_urb;
  652. epnum = usb_endpoint_num(&urb->ep->desc);
  653. if (max3421_ep->retransmit)
  654. /* restart (part of) a USB transaction: */
  655. max3421_ep->retransmit = 0;
  656. else {
  657. /* start USB transaction: */
  658. if (usb_endpoint_xfer_control(&ep->desc)) {
  659. /*
  660. * See USB 2.0 spec section 8.6.1
  661. * Initialization via SETUP Token:
  662. */
  663. usb_settoggle(urb->dev, epnum, 0, 1);
  664. usb_settoggle(urb->dev, epnum, 1, 1);
  665. max3421_ep->pkt_state = PKT_STATE_SETUP;
  666. force_toggles = 1;
  667. } else
  668. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  669. }
  670. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  671. max3421_ep->last_active = max3421_hcd->frame_number;
  672. max3421_set_address(hcd, urb->dev, epnum, force_toggles);
  673. max3421_set_speed(hcd, urb->dev);
  674. max3421_next_transfer(hcd, 0);
  675. return 1;
  676. }
  677. /*
  678. * Check all endpoints for URBs that got unlinked.
  679. *
  680. * Caller must NOT hold HCD spinlock.
  681. */
  682. static int
  683. max3421_check_unlink(struct usb_hcd *hcd)
  684. {
  685. struct spi_device *spi = to_spi_device(hcd->self.controller);
  686. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  687. struct list_head *pos, *upos, *next_upos;
  688. struct max3421_ep *max3421_ep;
  689. struct usb_host_endpoint *ep;
  690. struct urb *urb;
  691. unsigned long flags;
  692. int retval = 0;
  693. spin_lock_irqsave(&max3421_hcd->lock, flags);
  694. list_for_each(pos, &max3421_hcd->ep_list) {
  695. max3421_ep = container_of(pos, struct max3421_ep, ep_list);
  696. ep = max3421_ep->ep;
  697. list_for_each_safe(upos, next_upos, &ep->urb_list) {
  698. urb = container_of(upos, struct urb, urb_list);
  699. if (urb->unlinked) {
  700. retval = 1;
  701. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  702. __func__, urb, urb->unlinked);
  703. usb_hcd_unlink_urb_from_ep(hcd, urb);
  704. spin_unlock_irqrestore(&max3421_hcd->lock,
  705. flags);
  706. usb_hcd_giveback_urb(hcd, urb, 0);
  707. spin_lock_irqsave(&max3421_hcd->lock, flags);
  708. }
  709. }
  710. }
  711. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  712. return retval;
  713. }
  714. /*
  715. * Caller must NOT hold HCD spinlock.
  716. */
  717. static void
  718. max3421_slow_retransmit(struct usb_hcd *hcd)
  719. {
  720. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  721. struct urb *urb = max3421_hcd->curr_urb;
  722. struct max3421_ep *max3421_ep;
  723. max3421_ep = urb->ep->hcpriv;
  724. max3421_ep->retransmit = 1;
  725. max3421_hcd->curr_urb = NULL;
  726. }
  727. /*
  728. * Caller must NOT hold HCD spinlock.
  729. */
  730. static void
  731. max3421_recv_data_available(struct usb_hcd *hcd)
  732. {
  733. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  734. struct urb *urb = max3421_hcd->curr_urb;
  735. size_t remaining, transfer_size;
  736. u8 rcvbc;
  737. rcvbc = spi_rd8(hcd, MAX3421_REG_RCVBC);
  738. if (rcvbc > MAX3421_FIFO_SIZE)
  739. rcvbc = MAX3421_FIFO_SIZE;
  740. if (urb->actual_length >= urb->transfer_buffer_length)
  741. remaining = 0;
  742. else
  743. remaining = urb->transfer_buffer_length - urb->actual_length;
  744. transfer_size = rcvbc;
  745. if (transfer_size > remaining)
  746. transfer_size = remaining;
  747. if (transfer_size > 0) {
  748. void *dst = urb->transfer_buffer + urb->actual_length;
  749. spi_rd_buf(hcd, MAX3421_REG_RCVFIFO, dst, transfer_size);
  750. urb->actual_length += transfer_size;
  751. max3421_hcd->curr_len = transfer_size;
  752. }
  753. /* ack the RCVDAV irq now that the FIFO has been read: */
  754. spi_wr8(hcd, MAX3421_REG_HIRQ, BIT(MAX3421_HI_RCVDAV_BIT));
  755. }
  756. static void
  757. max3421_handle_error(struct usb_hcd *hcd, u8 hrsl)
  758. {
  759. struct spi_device *spi = to_spi_device(hcd->self.controller);
  760. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  761. u8 result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  762. struct urb *urb = max3421_hcd->curr_urb;
  763. struct max3421_ep *max3421_ep = urb->ep->hcpriv;
  764. int switch_sndfifo;
  765. /*
  766. * If an OUT command results in any response other than OK
  767. * (i.e., error or NAK), we have to perform a dummy-write to
  768. * SNDBC so the FIFO gets switched back to us. Otherwise, we
  769. * get out of sync with the SNDFIFO double buffer.
  770. */
  771. switch_sndfifo = (max3421_ep->pkt_state == PKT_STATE_TRANSFER &&
  772. usb_urb_dir_out(urb));
  773. switch (result_code) {
  774. case MAX3421_HRSL_OK:
  775. return; /* this shouldn't happen */
  776. case MAX3421_HRSL_WRONGPID: /* received wrong PID */
  777. case MAX3421_HRSL_BUSY: /* SIE busy */
  778. case MAX3421_HRSL_BADREQ: /* bad val in HXFR */
  779. case MAX3421_HRSL_UNDEF: /* reserved */
  780. case MAX3421_HRSL_KERR: /* K-state instead of response */
  781. case MAX3421_HRSL_JERR: /* J-state instead of response */
  782. /*
  783. * packet experienced an error that we cannot recover
  784. * from; report error
  785. */
  786. max3421_hcd->urb_done = hrsl_to_error[result_code];
  787. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  788. __func__, hrsl);
  789. break;
  790. case MAX3421_HRSL_TOGERR:
  791. if (usb_urb_dir_in(urb))
  792. ; /* don't do anything (device will switch toggle) */
  793. else {
  794. /* flip the send toggle bit: */
  795. int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  796. sndtog ^= 1;
  797. spi_wr8(hcd, MAX3421_REG_HCTL,
  798. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  799. }
  800. /* FALL THROUGH */
  801. case MAX3421_HRSL_BADBC: /* bad byte count */
  802. case MAX3421_HRSL_PIDERR: /* received PID is corrupted */
  803. case MAX3421_HRSL_PKTERR: /* packet error (stuff, EOP) */
  804. case MAX3421_HRSL_CRCERR: /* CRC error */
  805. case MAX3421_HRSL_BABBLE: /* device talked too long */
  806. case MAX3421_HRSL_TIMEOUT:
  807. if (max3421_ep->retries++ < USB_MAX_RETRIES)
  808. /* retry the packet again in the next frame */
  809. max3421_slow_retransmit(hcd);
  810. else {
  811. /* Based on ohci.h cc_to_err[]: */
  812. max3421_hcd->urb_done = hrsl_to_error[result_code];
  813. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  814. __func__, hrsl);
  815. }
  816. break;
  817. case MAX3421_HRSL_STALL:
  818. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  819. __func__, hrsl);
  820. max3421_hcd->urb_done = hrsl_to_error[result_code];
  821. break;
  822. case MAX3421_HRSL_NAK:
  823. /*
  824. * Device wasn't ready for data or has no data
  825. * available: retry the packet again.
  826. */
  827. if (max3421_ep->naks++ < NAK_MAX_FAST_RETRANSMITS) {
  828. max3421_next_transfer(hcd, 1);
  829. switch_sndfifo = 0;
  830. } else
  831. max3421_slow_retransmit(hcd);
  832. break;
  833. }
  834. if (switch_sndfifo)
  835. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  836. }
  837. /*
  838. * Caller must NOT hold HCD spinlock.
  839. */
  840. static int
  841. max3421_transfer_in_done(struct usb_hcd *hcd, struct urb *urb)
  842. {
  843. struct spi_device *spi = to_spi_device(hcd->self.controller);
  844. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  845. u32 max_packet;
  846. if (urb->actual_length >= urb->transfer_buffer_length)
  847. return 1; /* read is complete, so we're done */
  848. /*
  849. * USB 2.0 Section 5.3.2 Pipes: packets must be full size
  850. * except for last one.
  851. */
  852. max_packet = usb_maxpacket(urb->dev, urb->pipe, 0);
  853. if (max_packet > MAX3421_FIFO_SIZE) {
  854. /*
  855. * We do not support isochronous transfers at this
  856. * time...
  857. */
  858. dev_err(&spi->dev,
  859. "%s: packet-size of %u too big (limit is %u bytes)",
  860. __func__, max_packet, MAX3421_FIFO_SIZE);
  861. return -EINVAL;
  862. }
  863. if (max3421_hcd->curr_len < max_packet) {
  864. if (urb->transfer_flags & URB_SHORT_NOT_OK) {
  865. /*
  866. * remaining > 0 and received an
  867. * unexpected partial packet ->
  868. * error
  869. */
  870. return -EREMOTEIO;
  871. } else
  872. /* short read, but it's OK */
  873. return 1;
  874. }
  875. return 0; /* not done */
  876. }
  877. /*
  878. * Caller must NOT hold HCD spinlock.
  879. */
  880. static int
  881. max3421_transfer_out_done(struct usb_hcd *hcd, struct urb *urb)
  882. {
  883. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  884. urb->actual_length += max3421_hcd->curr_len;
  885. if (urb->actual_length < urb->transfer_buffer_length)
  886. return 0;
  887. if (urb->transfer_flags & URB_ZERO_PACKET) {
  888. /*
  889. * Some hardware needs a zero-size packet at the end
  890. * of a bulk-out transfer if the last transfer was a
  891. * full-sized packet (i.e., such hardware use <
  892. * max_packet as an indicator that the end of the
  893. * packet has been reached).
  894. */
  895. u32 max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
  896. if (max3421_hcd->curr_len == max_packet)
  897. return 0;
  898. }
  899. return 1;
  900. }
  901. /*
  902. * Caller must NOT hold HCD spinlock.
  903. */
  904. static void
  905. max3421_host_transfer_done(struct usb_hcd *hcd)
  906. {
  907. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  908. struct urb *urb = max3421_hcd->curr_urb;
  909. struct max3421_ep *max3421_ep;
  910. u8 result_code, hrsl;
  911. int urb_done = 0;
  912. max3421_hcd->hien &= ~(BIT(MAX3421_HI_HXFRDN_BIT) |
  913. BIT(MAX3421_HI_RCVDAV_BIT));
  914. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  915. result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  916. #ifdef DEBUG
  917. ++max3421_hcd->err_stat[result_code];
  918. #endif
  919. max3421_ep = urb->ep->hcpriv;
  920. if (unlikely(result_code != MAX3421_HRSL_OK)) {
  921. max3421_handle_error(hcd, hrsl);
  922. return;
  923. }
  924. max3421_ep->naks = 0;
  925. max3421_ep->retries = 0;
  926. switch (max3421_ep->pkt_state) {
  927. case PKT_STATE_SETUP:
  928. if (urb->transfer_buffer_length > 0)
  929. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  930. else
  931. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  932. break;
  933. case PKT_STATE_TRANSFER:
  934. if (usb_urb_dir_in(urb))
  935. urb_done = max3421_transfer_in_done(hcd, urb);
  936. else
  937. urb_done = max3421_transfer_out_done(hcd, urb);
  938. if (urb_done > 0 && usb_pipetype(urb->pipe) == PIPE_CONTROL) {
  939. /*
  940. * We aren't really done - we still need to
  941. * terminate the control transfer:
  942. */
  943. max3421_hcd->urb_done = urb_done = 0;
  944. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  945. }
  946. break;
  947. case PKT_STATE_TERMINATE:
  948. urb_done = 1;
  949. break;
  950. }
  951. if (urb_done)
  952. max3421_hcd->urb_done = urb_done;
  953. else
  954. max3421_next_transfer(hcd, 0);
  955. }
  956. /*
  957. * Caller must NOT hold HCD spinlock.
  958. */
  959. static void
  960. max3421_detect_conn(struct usb_hcd *hcd)
  961. {
  962. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  963. unsigned int jk, have_conn = 0;
  964. u32 old_port_status, chg;
  965. unsigned long flags;
  966. u8 hrsl, mode;
  967. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  968. jk = ((((hrsl >> MAX3421_HRSL_JSTATUS_BIT) & 1) << 0) |
  969. (((hrsl >> MAX3421_HRSL_KSTATUS_BIT) & 1) << 1));
  970. mode = max3421_hcd->mode;
  971. switch (jk) {
  972. case 0x0: /* SE0: disconnect */
  973. /*
  974. * Turn off SOFKAENAB bit to avoid getting interrupt
  975. * every milli-second:
  976. */
  977. mode &= ~BIT(MAX3421_MODE_SOFKAENAB_BIT);
  978. break;
  979. case 0x1: /* J=0,K=1: low-speed (in full-speed or vice versa) */
  980. case 0x2: /* J=1,K=0: full-speed (in full-speed or vice versa) */
  981. if (jk == 0x2)
  982. /* need to switch to the other speed: */
  983. mode ^= BIT(MAX3421_MODE_LOWSPEED_BIT);
  984. /* turn on SOFKAENAB bit: */
  985. mode |= BIT(MAX3421_MODE_SOFKAENAB_BIT);
  986. have_conn = 1;
  987. break;
  988. case 0x3: /* illegal */
  989. break;
  990. }
  991. max3421_hcd->mode = mode;
  992. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  993. spin_lock_irqsave(&max3421_hcd->lock, flags);
  994. old_port_status = max3421_hcd->port_status;
  995. if (have_conn)
  996. max3421_hcd->port_status |= USB_PORT_STAT_CONNECTION;
  997. else
  998. max3421_hcd->port_status &= ~USB_PORT_STAT_CONNECTION;
  999. if (mode & BIT(MAX3421_MODE_LOWSPEED_BIT))
  1000. max3421_hcd->port_status |= USB_PORT_STAT_LOW_SPEED;
  1001. else
  1002. max3421_hcd->port_status &= ~USB_PORT_STAT_LOW_SPEED;
  1003. chg = (old_port_status ^ max3421_hcd->port_status);
  1004. max3421_hcd->port_status |= chg << 16;
  1005. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1006. }
  1007. static irqreturn_t
  1008. max3421_irq_handler(int irq, void *dev_id)
  1009. {
  1010. struct usb_hcd *hcd = dev_id;
  1011. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1012. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1013. if (max3421_hcd->spi_thread &&
  1014. max3421_hcd->spi_thread->state != TASK_RUNNING)
  1015. wake_up_process(max3421_hcd->spi_thread);
  1016. if (!max3421_hcd->do_enable_irq) {
  1017. max3421_hcd->do_enable_irq = 1;
  1018. disable_irq_nosync(spi->irq);
  1019. }
  1020. return IRQ_HANDLED;
  1021. }
  1022. #ifdef DEBUG
  1023. static void
  1024. dump_eps(struct usb_hcd *hcd)
  1025. {
  1026. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1027. struct max3421_ep *max3421_ep;
  1028. struct usb_host_endpoint *ep;
  1029. struct list_head *pos, *upos;
  1030. char ubuf[512], *dp, *end;
  1031. unsigned long flags;
  1032. struct urb *urb;
  1033. int epnum, ret;
  1034. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1035. list_for_each(pos, &max3421_hcd->ep_list) {
  1036. max3421_ep = container_of(pos, struct max3421_ep, ep_list);
  1037. ep = max3421_ep->ep;
  1038. dp = ubuf;
  1039. end = dp + sizeof(ubuf);
  1040. *dp = '\0';
  1041. list_for_each(upos, &ep->urb_list) {
  1042. urb = container_of(upos, struct urb, urb_list);
  1043. ret = snprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb,
  1044. usb_pipetype(urb->pipe),
  1045. usb_urb_dir_in(urb) ? "IN" : "OUT",
  1046. urb->actual_length,
  1047. urb->transfer_buffer_length);
  1048. if (ret < 0 || ret >= end - dp)
  1049. break; /* error or buffer full */
  1050. dp += ret;
  1051. }
  1052. epnum = usb_endpoint_num(&ep->desc);
  1053. pr_info("EP%0u %u lst %04u rtr %u nak %6u rxmt %u: %s\n",
  1054. epnum, max3421_ep->pkt_state, max3421_ep->last_active,
  1055. max3421_ep->retries, max3421_ep->naks,
  1056. max3421_ep->retransmit, ubuf);
  1057. }
  1058. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1059. }
  1060. #endif /* DEBUG */
  1061. /* Return zero if no work was performed, 1 otherwise. */
  1062. static int
  1063. max3421_handle_irqs(struct usb_hcd *hcd)
  1064. {
  1065. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1066. u32 chg, old_port_status;
  1067. unsigned long flags;
  1068. u8 hirq;
  1069. /*
  1070. * Read and ack pending interrupts (CPU must never
  1071. * clear SNDBAV directly and RCVDAV must be cleared by
  1072. * max3421_recv_data_available()!):
  1073. */
  1074. hirq = spi_rd8(hcd, MAX3421_REG_HIRQ);
  1075. hirq &= max3421_hcd->hien;
  1076. if (!hirq)
  1077. return 0;
  1078. spi_wr8(hcd, MAX3421_REG_HIRQ,
  1079. hirq & ~(BIT(MAX3421_HI_SNDBAV_BIT) |
  1080. BIT(MAX3421_HI_RCVDAV_BIT)));
  1081. if (hirq & BIT(MAX3421_HI_FRAME_BIT)) {
  1082. max3421_hcd->frame_number = ((max3421_hcd->frame_number + 1)
  1083. & USB_MAX_FRAME_NUMBER);
  1084. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1085. }
  1086. if (hirq & BIT(MAX3421_HI_RCVDAV_BIT))
  1087. max3421_recv_data_available(hcd);
  1088. if (hirq & BIT(MAX3421_HI_HXFRDN_BIT))
  1089. max3421_host_transfer_done(hcd);
  1090. if (hirq & BIT(MAX3421_HI_CONDET_BIT))
  1091. max3421_detect_conn(hcd);
  1092. /*
  1093. * Now process interrupts that may affect HCD state
  1094. * other than the end-points:
  1095. */
  1096. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1097. old_port_status = max3421_hcd->port_status;
  1098. if (hirq & BIT(MAX3421_HI_BUSEVENT_BIT)) {
  1099. if (max3421_hcd->port_status & USB_PORT_STAT_RESET) {
  1100. /* BUSEVENT due to completion of Bus Reset */
  1101. max3421_hcd->port_status &= ~USB_PORT_STAT_RESET;
  1102. max3421_hcd->port_status |= USB_PORT_STAT_ENABLE;
  1103. } else {
  1104. /* BUSEVENT due to completion of Bus Resume */
  1105. pr_info("%s: BUSEVENT Bus Resume Done\n", __func__);
  1106. }
  1107. }
  1108. if (hirq & BIT(MAX3421_HI_RWU_BIT))
  1109. pr_info("%s: RWU\n", __func__);
  1110. if (hirq & BIT(MAX3421_HI_SUSDN_BIT))
  1111. pr_info("%s: SUSDN\n", __func__);
  1112. chg = (old_port_status ^ max3421_hcd->port_status);
  1113. max3421_hcd->port_status |= chg << 16;
  1114. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1115. #ifdef DEBUG
  1116. {
  1117. static unsigned long last_time;
  1118. char sbuf[16 * 16], *dp, *end;
  1119. int i;
  1120. if (jiffies - last_time > 5*HZ) {
  1121. dp = sbuf;
  1122. end = sbuf + sizeof(sbuf);
  1123. *dp = '\0';
  1124. for (i = 0; i < 16; ++i) {
  1125. int ret = snprintf(dp, end - dp, " %lu",
  1126. max3421_hcd->err_stat[i]);
  1127. if (ret < 0 || ret >= end - dp)
  1128. break; /* error or buffer full */
  1129. dp += ret;
  1130. }
  1131. pr_info("%s: hrsl_stats %s\n", __func__, sbuf);
  1132. memset(max3421_hcd->err_stat, 0,
  1133. sizeof(max3421_hcd->err_stat));
  1134. last_time = jiffies;
  1135. dump_eps(hcd);
  1136. }
  1137. }
  1138. #endif
  1139. return 1;
  1140. }
  1141. static int
  1142. max3421_reset_hcd(struct usb_hcd *hcd)
  1143. {
  1144. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1145. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1146. int timeout;
  1147. /* perform a chip reset and wait for OSCIRQ signal to appear: */
  1148. spi_wr8(hcd, MAX3421_REG_USBCTL, BIT(MAX3421_USBCTL_CHIPRES_BIT));
  1149. /* clear reset: */
  1150. spi_wr8(hcd, MAX3421_REG_USBCTL, 0);
  1151. timeout = 1000;
  1152. while (1) {
  1153. if (spi_rd8(hcd, MAX3421_REG_USBIRQ)
  1154. & BIT(MAX3421_USBIRQ_OSCOKIRQ_BIT))
  1155. break;
  1156. if (--timeout < 0) {
  1157. dev_err(&spi->dev,
  1158. "timed out waiting for oscillator OK signal");
  1159. return 1;
  1160. }
  1161. cond_resched();
  1162. }
  1163. /*
  1164. * Turn on host mode, automatic generation of SOF packets, and
  1165. * enable pull-down registers on DM/DP:
  1166. */
  1167. max3421_hcd->mode = (BIT(MAX3421_MODE_HOST_BIT) |
  1168. BIT(MAX3421_MODE_SOFKAENAB_BIT) |
  1169. BIT(MAX3421_MODE_DMPULLDN_BIT) |
  1170. BIT(MAX3421_MODE_DPPULLDN_BIT));
  1171. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  1172. /* reset frame-number: */
  1173. max3421_hcd->frame_number = USB_MAX_FRAME_NUMBER;
  1174. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_FRMRST_BIT));
  1175. /* sample the state of the D+ and D- lines */
  1176. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_SAMPLEBUS_BIT));
  1177. max3421_detect_conn(hcd);
  1178. /* enable frame, connection-detected, and bus-event interrupts: */
  1179. max3421_hcd->hien = (BIT(MAX3421_HI_FRAME_BIT) |
  1180. BIT(MAX3421_HI_CONDET_BIT) |
  1181. BIT(MAX3421_HI_BUSEVENT_BIT));
  1182. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1183. /* enable interrupts: */
  1184. spi_wr8(hcd, MAX3421_REG_CPUCTL, BIT(MAX3421_CPUCTL_IE_BIT));
  1185. return 1;
  1186. }
  1187. static int
  1188. max3421_urb_done(struct usb_hcd *hcd)
  1189. {
  1190. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1191. unsigned long flags;
  1192. struct urb *urb;
  1193. int status;
  1194. status = max3421_hcd->urb_done;
  1195. max3421_hcd->urb_done = 0;
  1196. if (status > 0)
  1197. status = 0;
  1198. urb = max3421_hcd->curr_urb;
  1199. if (urb) {
  1200. max3421_hcd->curr_urb = NULL;
  1201. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1202. usb_hcd_unlink_urb_from_ep(hcd, urb);
  1203. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1204. /* must be called without the HCD spinlock: */
  1205. usb_hcd_giveback_urb(hcd, urb, status);
  1206. }
  1207. return 1;
  1208. }
  1209. static int
  1210. max3421_spi_thread(void *dev_id)
  1211. {
  1212. struct usb_hcd *hcd = dev_id;
  1213. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1214. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1215. int i, i_worked = 1;
  1216. /* set full-duplex SPI mode, low-active interrupt pin: */
  1217. spi_wr8(hcd, MAX3421_REG_PINCTL,
  1218. (BIT(MAX3421_PINCTL_FDUPSPI_BIT) | /* full-duplex */
  1219. BIT(MAX3421_PINCTL_INTLEVEL_BIT))); /* low-active irq */
  1220. while (!kthread_should_stop()) {
  1221. max3421_hcd->rev = spi_rd8(hcd, MAX3421_REG_REVISION);
  1222. if (max3421_hcd->rev == 0x12 || max3421_hcd->rev == 0x13)
  1223. break;
  1224. dev_err(&spi->dev, "bad rev 0x%02x", max3421_hcd->rev);
  1225. msleep(10000);
  1226. }
  1227. dev_info(&spi->dev, "rev 0x%x, SPI clk %dHz, bpw %u, irq %d\n",
  1228. max3421_hcd->rev, spi->max_speed_hz, spi->bits_per_word,
  1229. spi->irq);
  1230. while (!kthread_should_stop()) {
  1231. if (!i_worked) {
  1232. /*
  1233. * We'll be waiting for wakeups from the hard
  1234. * interrupt handler, so now is a good time to
  1235. * sync our hien with the chip:
  1236. */
  1237. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1238. set_current_state(TASK_INTERRUPTIBLE);
  1239. if (max3421_hcd->do_enable_irq) {
  1240. max3421_hcd->do_enable_irq = 0;
  1241. enable_irq(spi->irq);
  1242. }
  1243. schedule();
  1244. __set_current_state(TASK_RUNNING);
  1245. }
  1246. i_worked = 0;
  1247. if (max3421_hcd->urb_done)
  1248. i_worked |= max3421_urb_done(hcd);
  1249. else if (max3421_handle_irqs(hcd))
  1250. i_worked = 1;
  1251. else if (!max3421_hcd->curr_urb)
  1252. i_worked |= max3421_select_and_start_urb(hcd);
  1253. if (max3421_hcd->do_reset_hcd) {
  1254. /* reset the HCD: */
  1255. max3421_hcd->do_reset_hcd = 0;
  1256. i_worked |= max3421_reset_hcd(hcd);
  1257. }
  1258. if (max3421_hcd->do_reset_port) {
  1259. /* perform a USB bus reset: */
  1260. max3421_hcd->do_reset_port = 0;
  1261. spi_wr8(hcd, MAX3421_REG_HCTL,
  1262. BIT(MAX3421_HCTL_BUSRST_BIT));
  1263. i_worked = 1;
  1264. }
  1265. if (max3421_hcd->do_check_unlink) {
  1266. max3421_hcd->do_check_unlink = 0;
  1267. i_worked |= max3421_check_unlink(hcd);
  1268. }
  1269. if (max3421_hcd->do_iopin_update) {
  1270. /*
  1271. * IOPINS1/IOPINS2 do not auto-increment, so we can't
  1272. * use spi_wr_buf().
  1273. */
  1274. for (i = 0; i < ARRAY_SIZE(max3421_hcd->iopins); ++i) {
  1275. u8 val = spi_rd8(hcd, MAX3421_REG_IOPINS1);
  1276. val = ((val & 0xf0) |
  1277. (max3421_hcd->iopins[i] & 0x0f));
  1278. spi_wr8(hcd, MAX3421_REG_IOPINS1 + i, val);
  1279. max3421_hcd->iopins[i] = val;
  1280. }
  1281. max3421_hcd->do_iopin_update = 0;
  1282. i_worked = 1;
  1283. }
  1284. }
  1285. set_current_state(TASK_RUNNING);
  1286. dev_info(&spi->dev, "SPI thread exiting");
  1287. return 0;
  1288. }
  1289. static int
  1290. max3421_reset_port(struct usb_hcd *hcd)
  1291. {
  1292. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1293. max3421_hcd->port_status &= ~(USB_PORT_STAT_ENABLE |
  1294. USB_PORT_STAT_LOW_SPEED);
  1295. max3421_hcd->do_reset_port = 1;
  1296. wake_up_process(max3421_hcd->spi_thread);
  1297. return 0;
  1298. }
  1299. static int
  1300. max3421_reset(struct usb_hcd *hcd)
  1301. {
  1302. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1303. hcd->self.sg_tablesize = 0;
  1304. hcd->speed = HCD_USB2;
  1305. hcd->self.root_hub->speed = USB_SPEED_FULL;
  1306. max3421_hcd->do_reset_hcd = 1;
  1307. wake_up_process(max3421_hcd->spi_thread);
  1308. return 0;
  1309. }
  1310. static int
  1311. max3421_start(struct usb_hcd *hcd)
  1312. {
  1313. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1314. spin_lock_init(&max3421_hcd->lock);
  1315. max3421_hcd->rh_state = MAX3421_RH_RUNNING;
  1316. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1317. hcd->power_budget = POWER_BUDGET;
  1318. hcd->state = HC_STATE_RUNNING;
  1319. hcd->uses_new_polling = 1;
  1320. return 0;
  1321. }
  1322. static void
  1323. max3421_stop(struct usb_hcd *hcd)
  1324. {
  1325. }
  1326. static int
  1327. max3421_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1328. {
  1329. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1330. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1331. struct max3421_ep *max3421_ep;
  1332. unsigned long flags;
  1333. int retval;
  1334. switch (usb_pipetype(urb->pipe)) {
  1335. case PIPE_INTERRUPT:
  1336. case PIPE_ISOCHRONOUS:
  1337. if (urb->interval < 0) {
  1338. dev_err(&spi->dev,
  1339. "%s: interval=%d for intr-/iso-pipe; expected > 0\n",
  1340. __func__, urb->interval);
  1341. return -EINVAL;
  1342. }
  1343. default:
  1344. break;
  1345. }
  1346. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1347. max3421_ep = urb->ep->hcpriv;
  1348. if (!max3421_ep) {
  1349. /* gets freed in max3421_endpoint_disable: */
  1350. max3421_ep = kzalloc(sizeof(struct max3421_ep), mem_flags);
  1351. if (!max3421_ep) {
  1352. retval = -ENOMEM;
  1353. goto out;
  1354. }
  1355. max3421_ep->ep = urb->ep;
  1356. max3421_ep->last_active = max3421_hcd->frame_number;
  1357. urb->ep->hcpriv = max3421_ep;
  1358. list_add_tail(&max3421_ep->ep_list, &max3421_hcd->ep_list);
  1359. }
  1360. retval = usb_hcd_link_urb_to_ep(hcd, urb);
  1361. if (retval == 0) {
  1362. /* Since we added to the queue, restart scheduling: */
  1363. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1364. wake_up_process(max3421_hcd->spi_thread);
  1365. }
  1366. out:
  1367. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1368. return retval;
  1369. }
  1370. static int
  1371. max3421_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  1372. {
  1373. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1374. unsigned long flags;
  1375. int retval;
  1376. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1377. /*
  1378. * This will set urb->unlinked which in turn causes the entry
  1379. * to be dropped at the next opportunity.
  1380. */
  1381. retval = usb_hcd_check_unlink_urb(hcd, urb, status);
  1382. if (retval == 0) {
  1383. max3421_hcd->do_check_unlink = 1;
  1384. wake_up_process(max3421_hcd->spi_thread);
  1385. }
  1386. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1387. return retval;
  1388. }
  1389. static void
  1390. max3421_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  1391. {
  1392. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1393. unsigned long flags;
  1394. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1395. if (ep->hcpriv) {
  1396. struct max3421_ep *max3421_ep = ep->hcpriv;
  1397. /* remove myself from the ep_list: */
  1398. if (!list_empty(&max3421_ep->ep_list))
  1399. list_del(&max3421_ep->ep_list);
  1400. kfree(max3421_ep);
  1401. ep->hcpriv = NULL;
  1402. }
  1403. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1404. }
  1405. static int
  1406. max3421_get_frame_number(struct usb_hcd *hcd)
  1407. {
  1408. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1409. return max3421_hcd->frame_number;
  1410. }
  1411. /*
  1412. * Should return a non-zero value when any port is undergoing a resume
  1413. * transition while the root hub is suspended.
  1414. */
  1415. static int
  1416. max3421_hub_status_data(struct usb_hcd *hcd, char *buf)
  1417. {
  1418. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1419. unsigned long flags;
  1420. int retval = 0;
  1421. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1422. if (!HCD_HW_ACCESSIBLE(hcd))
  1423. goto done;
  1424. *buf = 0;
  1425. if ((max3421_hcd->port_status & PORT_C_MASK) != 0) {
  1426. *buf = (1 << 1); /* a hub over-current condition exists */
  1427. dev_dbg(hcd->self.controller,
  1428. "port status 0x%08x has changes\n",
  1429. max3421_hcd->port_status);
  1430. retval = 1;
  1431. if (max3421_hcd->rh_state == MAX3421_RH_SUSPENDED)
  1432. usb_hcd_resume_root_hub(hcd);
  1433. }
  1434. done:
  1435. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1436. return retval;
  1437. }
  1438. static inline void
  1439. hub_descriptor(struct usb_hub_descriptor *desc)
  1440. {
  1441. memset(desc, 0, sizeof(*desc));
  1442. /*
  1443. * See Table 11-13: Hub Descriptor in USB 2.0 spec.
  1444. */
  1445. desc->bDescriptorType = 0x29; /* hub descriptor */
  1446. desc->bDescLength = 9;
  1447. desc->wHubCharacteristics = cpu_to_le16(0x0001);
  1448. desc->bNbrPorts = 1;
  1449. }
  1450. /*
  1451. * Set the MAX3421E general-purpose output with number PIN_NUMBER to
  1452. * VALUE (0 or 1). PIN_NUMBER may be in the range from 1-8. For
  1453. * any other value, this function acts as a no-op.
  1454. */
  1455. static void
  1456. max3421_gpout_set_value(struct usb_hcd *hcd, u8 pin_number, u8 value)
  1457. {
  1458. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1459. u8 mask, idx;
  1460. --pin_number;
  1461. if (pin_number > 7)
  1462. return;
  1463. mask = 1u << pin_number;
  1464. idx = pin_number / 4;
  1465. if (value)
  1466. max3421_hcd->iopins[idx] |= mask;
  1467. else
  1468. max3421_hcd->iopins[idx] &= ~mask;
  1469. max3421_hcd->do_iopin_update = 1;
  1470. wake_up_process(max3421_hcd->spi_thread);
  1471. }
  1472. static int
  1473. max3421_hub_control(struct usb_hcd *hcd, u16 type_req, u16 value, u16 index,
  1474. char *buf, u16 length)
  1475. {
  1476. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1477. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1478. struct max3421_hcd_platform_data *pdata;
  1479. unsigned long flags;
  1480. int retval = 0;
  1481. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1482. pdata = spi->dev.platform_data;
  1483. switch (type_req) {
  1484. case ClearHubFeature:
  1485. break;
  1486. case ClearPortFeature:
  1487. switch (value) {
  1488. case USB_PORT_FEAT_SUSPEND:
  1489. break;
  1490. case USB_PORT_FEAT_POWER:
  1491. dev_dbg(hcd->self.controller, "power-off\n");
  1492. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1493. !pdata->vbus_active_level);
  1494. /* FALLS THROUGH */
  1495. default:
  1496. max3421_hcd->port_status &= ~(1 << value);
  1497. }
  1498. break;
  1499. case GetHubDescriptor:
  1500. hub_descriptor((struct usb_hub_descriptor *) buf);
  1501. break;
  1502. case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
  1503. case GetPortErrorCount:
  1504. case SetHubDepth:
  1505. /* USB3 only */
  1506. goto error;
  1507. case GetHubStatus:
  1508. *(__le32 *) buf = cpu_to_le32(0);
  1509. break;
  1510. case GetPortStatus:
  1511. if (index != 1) {
  1512. retval = -EPIPE;
  1513. goto error;
  1514. }
  1515. ((__le16 *) buf)[0] = cpu_to_le16(max3421_hcd->port_status);
  1516. ((__le16 *) buf)[1] =
  1517. cpu_to_le16(max3421_hcd->port_status >> 16);
  1518. break;
  1519. case SetHubFeature:
  1520. retval = -EPIPE;
  1521. break;
  1522. case SetPortFeature:
  1523. switch (value) {
  1524. case USB_PORT_FEAT_LINK_STATE:
  1525. case USB_PORT_FEAT_U1_TIMEOUT:
  1526. case USB_PORT_FEAT_U2_TIMEOUT:
  1527. case USB_PORT_FEAT_BH_PORT_RESET:
  1528. goto error;
  1529. case USB_PORT_FEAT_SUSPEND:
  1530. if (max3421_hcd->active)
  1531. max3421_hcd->port_status |=
  1532. USB_PORT_STAT_SUSPEND;
  1533. break;
  1534. case USB_PORT_FEAT_POWER:
  1535. dev_dbg(hcd->self.controller, "power-on\n");
  1536. max3421_hcd->port_status |= USB_PORT_STAT_POWER;
  1537. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1538. pdata->vbus_active_level);
  1539. break;
  1540. case USB_PORT_FEAT_RESET:
  1541. max3421_reset_port(hcd);
  1542. /* FALLS THROUGH */
  1543. default:
  1544. if ((max3421_hcd->port_status & USB_PORT_STAT_POWER)
  1545. != 0)
  1546. max3421_hcd->port_status |= (1 << value);
  1547. }
  1548. break;
  1549. default:
  1550. dev_dbg(hcd->self.controller,
  1551. "hub control req%04x v%04x i%04x l%d\n",
  1552. type_req, value, index, length);
  1553. error: /* "protocol stall" on error */
  1554. retval = -EPIPE;
  1555. }
  1556. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1557. return retval;
  1558. }
  1559. static int
  1560. max3421_bus_suspend(struct usb_hcd *hcd)
  1561. {
  1562. return -1;
  1563. }
  1564. static int
  1565. max3421_bus_resume(struct usb_hcd *hcd)
  1566. {
  1567. return -1;
  1568. }
  1569. /*
  1570. * The SPI driver already takes care of DMA-mapping/unmapping, so no
  1571. * reason to do it twice.
  1572. */
  1573. static int
  1574. max3421_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1575. {
  1576. return 0;
  1577. }
  1578. static void
  1579. max3421_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
  1580. {
  1581. }
  1582. static struct hc_driver max3421_hcd_desc = {
  1583. .description = "max3421",
  1584. .product_desc = DRIVER_DESC,
  1585. .hcd_priv_size = sizeof(struct max3421_hcd),
  1586. .flags = HCD_USB11,
  1587. .reset = max3421_reset,
  1588. .start = max3421_start,
  1589. .stop = max3421_stop,
  1590. .get_frame_number = max3421_get_frame_number,
  1591. .urb_enqueue = max3421_urb_enqueue,
  1592. .urb_dequeue = max3421_urb_dequeue,
  1593. .map_urb_for_dma = max3421_map_urb_for_dma,
  1594. .unmap_urb_for_dma = max3421_unmap_urb_for_dma,
  1595. .endpoint_disable = max3421_endpoint_disable,
  1596. .hub_status_data = max3421_hub_status_data,
  1597. .hub_control = max3421_hub_control,
  1598. .bus_suspend = max3421_bus_suspend,
  1599. .bus_resume = max3421_bus_resume,
  1600. };
  1601. static int
  1602. max3421_probe(struct spi_device *spi)
  1603. {
  1604. struct max3421_hcd *max3421_hcd;
  1605. struct usb_hcd *hcd = NULL;
  1606. int retval = -ENOMEM;
  1607. if (spi_setup(spi) < 0) {
  1608. dev_err(&spi->dev, "Unable to setup SPI bus");
  1609. return -EFAULT;
  1610. }
  1611. hcd = usb_create_hcd(&max3421_hcd_desc, &spi->dev,
  1612. dev_name(&spi->dev));
  1613. if (!hcd) {
  1614. dev_err(&spi->dev, "failed to create HCD structure\n");
  1615. goto error;
  1616. }
  1617. set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
  1618. max3421_hcd = hcd_to_max3421(hcd);
  1619. max3421_hcd->next = max3421_hcd_list;
  1620. max3421_hcd_list = max3421_hcd;
  1621. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1622. max3421_hcd->tx = kmalloc(sizeof(*max3421_hcd->tx), GFP_KERNEL);
  1623. if (!max3421_hcd->tx) {
  1624. dev_err(&spi->dev, "failed to kmalloc tx buffer\n");
  1625. goto error;
  1626. }
  1627. max3421_hcd->rx = kmalloc(sizeof(*max3421_hcd->rx), GFP_KERNEL);
  1628. if (!max3421_hcd->rx) {
  1629. dev_err(&spi->dev, "failed to kmalloc rx buffer\n");
  1630. goto error;
  1631. }
  1632. max3421_hcd->spi_thread = kthread_run(max3421_spi_thread, hcd,
  1633. "max3421_spi_thread");
  1634. if (max3421_hcd->spi_thread == ERR_PTR(-ENOMEM)) {
  1635. dev_err(&spi->dev,
  1636. "failed to create SPI thread (out of memory)\n");
  1637. goto error;
  1638. }
  1639. retval = usb_add_hcd(hcd, 0, 0);
  1640. if (retval) {
  1641. dev_err(&spi->dev, "failed to add HCD\n");
  1642. goto error;
  1643. }
  1644. retval = request_irq(spi->irq, max3421_irq_handler,
  1645. IRQF_TRIGGER_LOW, "max3421", hcd);
  1646. if (retval < 0) {
  1647. dev_err(&spi->dev, "failed to request irq %d\n", spi->irq);
  1648. goto error;
  1649. }
  1650. return 0;
  1651. error:
  1652. if (hcd) {
  1653. kfree(max3421_hcd->tx);
  1654. kfree(max3421_hcd->rx);
  1655. if (max3421_hcd->spi_thread)
  1656. kthread_stop(max3421_hcd->spi_thread);
  1657. usb_put_hcd(hcd);
  1658. }
  1659. return retval;
  1660. }
  1661. static int
  1662. max3421_remove(struct spi_device *spi)
  1663. {
  1664. struct max3421_hcd *max3421_hcd = NULL, **prev;
  1665. struct usb_hcd *hcd = NULL;
  1666. unsigned long flags;
  1667. for (prev = &max3421_hcd_list; *prev; prev = &(*prev)->next) {
  1668. max3421_hcd = *prev;
  1669. hcd = max3421_to_hcd(max3421_hcd);
  1670. if (hcd->self.controller == &spi->dev)
  1671. break;
  1672. }
  1673. if (!max3421_hcd) {
  1674. dev_err(&spi->dev, "no MAX3421 HCD found for SPI device %p\n",
  1675. spi);
  1676. return -ENODEV;
  1677. }
  1678. usb_remove_hcd(hcd);
  1679. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1680. kthread_stop(max3421_hcd->spi_thread);
  1681. *prev = max3421_hcd->next;
  1682. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1683. free_irq(spi->irq, hcd);
  1684. usb_put_hcd(hcd);
  1685. return 0;
  1686. }
  1687. static struct spi_driver max3421_driver = {
  1688. .probe = max3421_probe,
  1689. .remove = max3421_remove,
  1690. .driver = {
  1691. .name = "max3421-hcd",
  1692. .owner = THIS_MODULE,
  1693. },
  1694. };
  1695. module_spi_driver(max3421_driver);
  1696. MODULE_DESCRIPTION(DRIVER_DESC);
  1697. MODULE_AUTHOR("David Mosberger <davidm@egauge.net>");
  1698. MODULE_LICENSE("GPL");