8250_dma.c 6.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244
  1. /*
  2. * 8250_dma.c - DMA Engine API support for 8250.c
  3. *
  4. * Copyright (C) 2013 Intel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/tty.h>
  12. #include <linux/tty_flip.h>
  13. #include <linux/serial_reg.h>
  14. #include <linux/dma-mapping.h>
  15. #include "8250.h"
  16. static void __dma_tx_complete(void *param)
  17. {
  18. struct uart_8250_port *p = param;
  19. struct uart_8250_dma *dma = p->dma;
  20. struct circ_buf *xmit = &p->port.state->xmit;
  21. unsigned long flags;
  22. dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
  23. UART_XMIT_SIZE, DMA_TO_DEVICE);
  24. spin_lock_irqsave(&p->port.lock, flags);
  25. dma->tx_running = 0;
  26. xmit->tail += dma->tx_size;
  27. xmit->tail &= UART_XMIT_SIZE - 1;
  28. p->port.icount.tx += dma->tx_size;
  29. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  30. uart_write_wakeup(&p->port);
  31. if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port))
  32. serial8250_tx_dma(p);
  33. spin_unlock_irqrestore(&p->port.lock, flags);
  34. }
  35. static void __dma_rx_complete(void *param)
  36. {
  37. struct uart_8250_port *p = param;
  38. struct uart_8250_dma *dma = p->dma;
  39. struct tty_port *tty_port = &p->port.state->port;
  40. struct dma_tx_state state;
  41. int count;
  42. dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr,
  43. dma->rx_size, DMA_FROM_DEVICE);
  44. dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
  45. dmaengine_terminate_all(dma->rxchan);
  46. count = dma->rx_size - state.residue;
  47. tty_insert_flip_string(tty_port, dma->rx_buf, count);
  48. p->port.icount.rx += count;
  49. tty_flip_buffer_push(tty_port);
  50. }
  51. int serial8250_tx_dma(struct uart_8250_port *p)
  52. {
  53. struct uart_8250_dma *dma = p->dma;
  54. struct circ_buf *xmit = &p->port.state->xmit;
  55. struct dma_async_tx_descriptor *desc;
  56. if (uart_tx_stopped(&p->port) || dma->tx_running ||
  57. uart_circ_empty(xmit))
  58. return 0;
  59. dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  60. desc = dmaengine_prep_slave_single(dma->txchan,
  61. dma->tx_addr + xmit->tail,
  62. dma->tx_size, DMA_MEM_TO_DEV,
  63. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  64. if (!desc)
  65. return -EBUSY;
  66. dma->tx_running = 1;
  67. desc->callback = __dma_tx_complete;
  68. desc->callback_param = p;
  69. dma->tx_cookie = dmaengine_submit(desc);
  70. dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
  71. UART_XMIT_SIZE, DMA_TO_DEVICE);
  72. dma_async_issue_pending(dma->txchan);
  73. return 0;
  74. }
  75. EXPORT_SYMBOL_GPL(serial8250_tx_dma);
  76. int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
  77. {
  78. struct uart_8250_dma *dma = p->dma;
  79. struct dma_async_tx_descriptor *desc;
  80. struct dma_tx_state state;
  81. int dma_status;
  82. dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
  83. switch (iir & 0x3f) {
  84. case UART_IIR_RLSI:
  85. /* 8250_core handles errors and break interrupts */
  86. return -EIO;
  87. case UART_IIR_RX_TIMEOUT:
  88. /*
  89. * If RCVR FIFO trigger level was not reached, complete the
  90. * transfer and let 8250_core copy the remaining data.
  91. */
  92. if (dma_status == DMA_IN_PROGRESS) {
  93. dmaengine_pause(dma->rxchan);
  94. __dma_rx_complete(p);
  95. }
  96. return -ETIMEDOUT;
  97. default:
  98. break;
  99. }
  100. if (dma_status)
  101. return 0;
  102. desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
  103. dma->rx_size, DMA_DEV_TO_MEM,
  104. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  105. if (!desc)
  106. return -EBUSY;
  107. desc->callback = __dma_rx_complete;
  108. desc->callback_param = p;
  109. dma->rx_cookie = dmaengine_submit(desc);
  110. dma_sync_single_for_device(dma->rxchan->device->dev, dma->rx_addr,
  111. dma->rx_size, DMA_FROM_DEVICE);
  112. dma_async_issue_pending(dma->rxchan);
  113. return 0;
  114. }
  115. EXPORT_SYMBOL_GPL(serial8250_rx_dma);
  116. int serial8250_request_dma(struct uart_8250_port *p)
  117. {
  118. struct uart_8250_dma *dma = p->dma;
  119. dma_cap_mask_t mask;
  120. /* Default slave configuration parameters */
  121. dma->rxconf.direction = DMA_DEV_TO_MEM;
  122. dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
  123. dma->rxconf.src_addr = p->port.mapbase + UART_RX;
  124. dma->txconf.direction = DMA_MEM_TO_DEV;
  125. dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
  126. dma->txconf.dst_addr = p->port.mapbase + UART_TX;
  127. dma_cap_zero(mask);
  128. dma_cap_set(DMA_SLAVE, mask);
  129. /* Get a channel for RX */
  130. dma->rxchan = dma_request_slave_channel_compat(mask,
  131. dma->fn, dma->rx_param,
  132. p->port.dev, "rx");
  133. if (!dma->rxchan)
  134. return -ENODEV;
  135. dmaengine_slave_config(dma->rxchan, &dma->rxconf);
  136. /* Get a channel for TX */
  137. dma->txchan = dma_request_slave_channel_compat(mask,
  138. dma->fn, dma->tx_param,
  139. p->port.dev, "tx");
  140. if (!dma->txchan) {
  141. dma_release_channel(dma->rxchan);
  142. return -ENODEV;
  143. }
  144. dmaengine_slave_config(dma->txchan, &dma->txconf);
  145. /* RX buffer */
  146. if (!dma->rx_size)
  147. dma->rx_size = PAGE_SIZE;
  148. dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
  149. &dma->rx_addr, GFP_KERNEL);
  150. if (!dma->rx_buf)
  151. goto err;
  152. /* TX buffer */
  153. dma->tx_addr = dma_map_single(dma->txchan->device->dev,
  154. p->port.state->xmit.buf,
  155. UART_XMIT_SIZE,
  156. DMA_TO_DEVICE);
  157. if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) {
  158. dma_free_coherent(dma->rxchan->device->dev, dma->rx_size,
  159. dma->rx_buf, dma->rx_addr);
  160. goto err;
  161. }
  162. dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
  163. return 0;
  164. err:
  165. dma_release_channel(dma->rxchan);
  166. dma_release_channel(dma->txchan);
  167. return -ENOMEM;
  168. }
  169. EXPORT_SYMBOL_GPL(serial8250_request_dma);
  170. void serial8250_release_dma(struct uart_8250_port *p)
  171. {
  172. struct uart_8250_dma *dma = p->dma;
  173. if (!dma)
  174. return;
  175. /* Release RX resources */
  176. dmaengine_terminate_all(dma->rxchan);
  177. dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
  178. dma->rx_addr);
  179. dma_release_channel(dma->rxchan);
  180. dma->rxchan = NULL;
  181. /* Release TX resources */
  182. dmaengine_terminate_all(dma->txchan);
  183. dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
  184. UART_XMIT_SIZE, DMA_TO_DEVICE);
  185. dma_release_channel(dma->txchan);
  186. dma->txchan = NULL;
  187. dma->tx_running = 0;
  188. dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
  189. }
  190. EXPORT_SYMBOL_GPL(serial8250_release_dma);