spi-clps711x.c 6.3 KB

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  1. /*
  2. * CLPS711X SPI bus driver
  3. *
  4. * Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/io.h>
  12. #include <linux/clk.h>
  13. #include <linux/gpio.h>
  14. #include <linux/delay.h>
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/regmap.h>
  19. #include <linux/mfd/syscon.h>
  20. #include <linux/mfd/syscon/clps711x.h>
  21. #include <linux/spi/spi.h>
  22. #include <linux/platform_data/spi-clps711x.h>
  23. #define DRIVER_NAME "spi-clps711x"
  24. #define SYNCIO_FRMLEN(x) ((x) << 8)
  25. #define SYNCIO_TXFRMEN (1 << 14)
  26. struct spi_clps711x_data {
  27. void __iomem *syncio;
  28. struct regmap *syscon;
  29. struct regmap *syscon1;
  30. struct clk *spi_clk;
  31. u8 *tx_buf;
  32. u8 *rx_buf;
  33. unsigned int bpw;
  34. int len;
  35. };
  36. static int spi_clps711x_setup(struct spi_device *spi)
  37. {
  38. /* We are expect that SPI-device is not selected */
  39. gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH));
  40. return 0;
  41. }
  42. static void spi_clps711x_setup_xfer(struct spi_device *spi,
  43. struct spi_transfer *xfer)
  44. {
  45. struct spi_master *master = spi->master;
  46. struct spi_clps711x_data *hw = spi_master_get_devdata(master);
  47. /* Setup SPI frequency divider */
  48. if (xfer->speed_hz >= master->max_speed_hz)
  49. regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
  50. SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(3));
  51. else if (xfer->speed_hz >= (master->max_speed_hz / 2))
  52. regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
  53. SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(2));
  54. else if (xfer->speed_hz >= (master->max_speed_hz / 8))
  55. regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
  56. SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(1));
  57. else
  58. regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
  59. SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(0));
  60. }
  61. static int spi_clps711x_prepare_message(struct spi_master *master,
  62. struct spi_message *msg)
  63. {
  64. struct spi_clps711x_data *hw = spi_master_get_devdata(master);
  65. struct spi_device *spi = msg->spi;
  66. /* Setup mode for transfer */
  67. return regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCKNSEN,
  68. (spi->mode & SPI_CPHA) ?
  69. SYSCON3_ADCCKNSEN : 0);
  70. }
  71. static int spi_clps711x_transfer_one(struct spi_master *master,
  72. struct spi_device *spi,
  73. struct spi_transfer *xfer)
  74. {
  75. struct spi_clps711x_data *hw = spi_master_get_devdata(master);
  76. u8 data;
  77. spi_clps711x_setup_xfer(spi, xfer);
  78. hw->len = xfer->len;
  79. hw->bpw = xfer->bits_per_word;
  80. hw->tx_buf = (u8 *)xfer->tx_buf;
  81. hw->rx_buf = (u8 *)xfer->rx_buf;
  82. /* Initiate transfer */
  83. data = hw->tx_buf ? *hw->tx_buf++ : 0;
  84. writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, hw->syncio);
  85. return 1;
  86. }
  87. static irqreturn_t spi_clps711x_isr(int irq, void *dev_id)
  88. {
  89. struct spi_master *master = dev_id;
  90. struct spi_clps711x_data *hw = spi_master_get_devdata(master);
  91. u8 data;
  92. /* Handle RX */
  93. data = readb(hw->syncio);
  94. if (hw->rx_buf)
  95. *hw->rx_buf++ = data;
  96. /* Handle TX */
  97. if (--hw->len > 0) {
  98. data = hw->tx_buf ? *hw->tx_buf++ : 0;
  99. writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN,
  100. hw->syncio);
  101. } else
  102. spi_finalize_current_transfer(master);
  103. return IRQ_HANDLED;
  104. }
  105. static int spi_clps711x_probe(struct platform_device *pdev)
  106. {
  107. struct spi_clps711x_data *hw;
  108. struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev);
  109. struct spi_master *master;
  110. struct resource *res;
  111. int i, irq, ret;
  112. if (!pdata) {
  113. dev_err(&pdev->dev, "No platform data supplied\n");
  114. return -EINVAL;
  115. }
  116. if (pdata->num_chipselect < 1) {
  117. dev_err(&pdev->dev, "At least one CS must be defined\n");
  118. return -EINVAL;
  119. }
  120. irq = platform_get_irq(pdev, 0);
  121. if (irq < 0)
  122. return irq;
  123. master = spi_alloc_master(&pdev->dev, sizeof(*hw));
  124. if (!master)
  125. return -ENOMEM;
  126. master->cs_gpios = devm_kzalloc(&pdev->dev, sizeof(int) *
  127. pdata->num_chipselect, GFP_KERNEL);
  128. if (!master->cs_gpios) {
  129. ret = -ENOMEM;
  130. goto err_out;
  131. }
  132. master->bus_num = pdev->id;
  133. master->mode_bits = SPI_CPHA | SPI_CS_HIGH;
  134. master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8);
  135. master->num_chipselect = pdata->num_chipselect;
  136. master->setup = spi_clps711x_setup;
  137. master->prepare_message = spi_clps711x_prepare_message;
  138. master->transfer_one = spi_clps711x_transfer_one;
  139. hw = spi_master_get_devdata(master);
  140. for (i = 0; i < master->num_chipselect; i++) {
  141. master->cs_gpios[i] = pdata->chipselect[i];
  142. ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i],
  143. DRIVER_NAME);
  144. if (ret) {
  145. dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i);
  146. goto err_out;
  147. }
  148. }
  149. hw->spi_clk = devm_clk_get(&pdev->dev, "spi");
  150. if (IS_ERR(hw->spi_clk)) {
  151. dev_err(&pdev->dev, "Can't get clocks\n");
  152. ret = PTR_ERR(hw->spi_clk);
  153. goto err_out;
  154. }
  155. master->max_speed_hz = clk_get_rate(hw->spi_clk);
  156. platform_set_drvdata(pdev, master);
  157. hw->syscon = syscon_regmap_lookup_by_pdevname("syscon.3");
  158. if (IS_ERR(hw->syscon)) {
  159. ret = PTR_ERR(hw->syscon);
  160. goto err_out;
  161. }
  162. hw->syscon1 = syscon_regmap_lookup_by_pdevname("syscon.1");
  163. if (IS_ERR(hw->syscon1)) {
  164. ret = PTR_ERR(hw->syscon1);
  165. goto err_out;
  166. }
  167. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  168. hw->syncio = devm_ioremap_resource(&pdev->dev, res);
  169. if (IS_ERR(hw->syncio)) {
  170. ret = PTR_ERR(hw->syncio);
  171. goto err_out;
  172. }
  173. /* Disable extended mode due hardware problems */
  174. regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCON, 0);
  175. /* Clear possible pending interrupt */
  176. readl(hw->syncio);
  177. ret = devm_request_irq(&pdev->dev, irq, spi_clps711x_isr, 0,
  178. dev_name(&pdev->dev), master);
  179. if (ret)
  180. goto err_out;
  181. ret = devm_spi_register_master(&pdev->dev, master);
  182. if (!ret) {
  183. dev_info(&pdev->dev,
  184. "SPI bus driver initialized. Master clock %u Hz\n",
  185. master->max_speed_hz);
  186. return 0;
  187. }
  188. dev_err(&pdev->dev, "Failed to register master\n");
  189. err_out:
  190. spi_master_put(master);
  191. return ret;
  192. }
  193. static struct platform_driver clps711x_spi_driver = {
  194. .driver = {
  195. .name = DRIVER_NAME,
  196. .owner = THIS_MODULE,
  197. },
  198. .probe = spi_clps711x_probe,
  199. };
  200. module_platform_driver(clps711x_spi_driver);
  201. MODULE_LICENSE("GPL");
  202. MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>");
  203. MODULE_DESCRIPTION("CLPS711X SPI bus driver");
  204. MODULE_ALIAS("platform:" DRIVER_NAME);