rtc-s5m.c 20 KB

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  1. /*
  2. * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
  3. * http://www.samsung.com
  4. *
  5. * Copyright (C) 2013 Google, Inc
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/i2c.h>
  19. #include <linux/bcd.h>
  20. #include <linux/regmap.h>
  21. #include <linux/rtc.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/mfd/samsung/core.h>
  24. #include <linux/mfd/samsung/irq.h>
  25. #include <linux/mfd/samsung/rtc.h>
  26. #include <linux/mfd/samsung/s2mps14.h>
  27. /*
  28. * Maximum number of retries for checking changes in UDR field
  29. * of S5M_RTC_UDR_CON register (to limit possible endless loop).
  30. *
  31. * After writing to RTC registers (setting time or alarm) read the UDR field
  32. * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
  33. * been transferred.
  34. */
  35. #define UDR_READ_RETRY_CNT 5
  36. /* Registers used by the driver which are different between chipsets. */
  37. struct s5m_rtc_reg_config {
  38. /* Number of registers used for setting time/alarm0/alarm1 */
  39. unsigned int regs_count;
  40. /* First register for time, seconds */
  41. unsigned int time;
  42. /* RTC control register */
  43. unsigned int ctrl;
  44. /* First register for alarm 0, seconds */
  45. unsigned int alarm0;
  46. /* First register for alarm 1, seconds */
  47. unsigned int alarm1;
  48. /* SMPL/WTSR register */
  49. unsigned int smpl_wtsr;
  50. /*
  51. * Register for update flag (UDR). Typically setting UDR field to 1
  52. * will enable update of time or alarm register. Then it will be
  53. * auto-cleared after successful update.
  54. */
  55. unsigned int rtc_udr_update;
  56. /* Mask for UDR field in 'rtc_udr_update' register */
  57. unsigned int rtc_udr_mask;
  58. };
  59. /* Register map for S5M8763 and S5M8767 */
  60. static const struct s5m_rtc_reg_config s5m_rtc_regs = {
  61. .regs_count = 8,
  62. .time = S5M_RTC_SEC,
  63. .ctrl = S5M_ALARM1_CONF,
  64. .alarm0 = S5M_ALARM0_SEC,
  65. .alarm1 = S5M_ALARM1_SEC,
  66. .smpl_wtsr = S5M_WTSR_SMPL_CNTL,
  67. .rtc_udr_update = S5M_RTC_UDR_CON,
  68. .rtc_udr_mask = S5M_RTC_UDR_MASK,
  69. };
  70. /*
  71. * Register map for S2MPS14.
  72. * It may be also suitable for S2MPS11 but this was not tested.
  73. */
  74. static const struct s5m_rtc_reg_config s2mps_rtc_regs = {
  75. .regs_count = 7,
  76. .time = S2MPS_RTC_SEC,
  77. .ctrl = S2MPS_RTC_CTRL,
  78. .alarm0 = S2MPS_ALARM0_SEC,
  79. .alarm1 = S2MPS_ALARM1_SEC,
  80. .smpl_wtsr = S2MPS_WTSR_SMPL_CNTL,
  81. .rtc_udr_update = S2MPS_RTC_UDR_CON,
  82. .rtc_udr_mask = S2MPS_RTC_WUDR_MASK,
  83. };
  84. struct s5m_rtc_info {
  85. struct device *dev;
  86. struct i2c_client *i2c;
  87. struct sec_pmic_dev *s5m87xx;
  88. struct regmap *regmap;
  89. struct rtc_device *rtc_dev;
  90. int irq;
  91. int device_type;
  92. int rtc_24hr_mode;
  93. bool wtsr_smpl;
  94. const struct s5m_rtc_reg_config *regs;
  95. };
  96. static const struct regmap_config s5m_rtc_regmap_config = {
  97. .reg_bits = 8,
  98. .val_bits = 8,
  99. .max_register = S5M_RTC_REG_MAX,
  100. };
  101. static const struct regmap_config s2mps14_rtc_regmap_config = {
  102. .reg_bits = 8,
  103. .val_bits = 8,
  104. .max_register = S2MPS_RTC_REG_MAX,
  105. };
  106. static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm,
  107. int rtc_24hr_mode)
  108. {
  109. tm->tm_sec = data[RTC_SEC] & 0x7f;
  110. tm->tm_min = data[RTC_MIN] & 0x7f;
  111. if (rtc_24hr_mode) {
  112. tm->tm_hour = data[RTC_HOUR] & 0x1f;
  113. } else {
  114. tm->tm_hour = data[RTC_HOUR] & 0x0f;
  115. if (data[RTC_HOUR] & HOUR_PM_MASK)
  116. tm->tm_hour += 12;
  117. }
  118. tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f);
  119. tm->tm_mday = data[RTC_DATE] & 0x1f;
  120. tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
  121. tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100;
  122. tm->tm_yday = 0;
  123. tm->tm_isdst = 0;
  124. }
  125. static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data)
  126. {
  127. data[RTC_SEC] = tm->tm_sec;
  128. data[RTC_MIN] = tm->tm_min;
  129. if (tm->tm_hour >= 12)
  130. data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK;
  131. else
  132. data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK;
  133. data[RTC_WEEKDAY] = 1 << tm->tm_wday;
  134. data[RTC_DATE] = tm->tm_mday;
  135. data[RTC_MONTH] = tm->tm_mon + 1;
  136. data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
  137. if (tm->tm_year < 100) {
  138. pr_err("s5m8767 RTC cannot handle the year %d.\n",
  139. 1900 + tm->tm_year);
  140. return -EINVAL;
  141. } else {
  142. return 0;
  143. }
  144. }
  145. /*
  146. * Read RTC_UDR_CON register and wait till UDR field is cleared.
  147. * This indicates that time/alarm update ended.
  148. */
  149. static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
  150. {
  151. int ret, retry = UDR_READ_RETRY_CNT;
  152. unsigned int data;
  153. do {
  154. ret = regmap_read(info->regmap, info->regs->rtc_udr_update,
  155. &data);
  156. } while (--retry && (data & info->regs->rtc_udr_mask) && !ret);
  157. if (!retry)
  158. dev_err(info->dev, "waiting for UDR update, reached max number of retries\n");
  159. return ret;
  160. }
  161. static inline int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info,
  162. struct rtc_wkalrm *alarm)
  163. {
  164. int ret;
  165. unsigned int val;
  166. switch (info->device_type) {
  167. case S5M8767X:
  168. case S5M8763X:
  169. ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val);
  170. val &= S5M_ALARM0_STATUS;
  171. break;
  172. case S2MPS14X:
  173. ret = regmap_read(info->s5m87xx->regmap_pmic, S2MPS14_REG_ST2,
  174. &val);
  175. val &= S2MPS_ALARM0_STATUS;
  176. break;
  177. default:
  178. return -EINVAL;
  179. }
  180. if (ret < 0)
  181. return ret;
  182. if (val)
  183. alarm->pending = 1;
  184. else
  185. alarm->pending = 0;
  186. return 0;
  187. }
  188. static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
  189. {
  190. int ret;
  191. unsigned int data;
  192. ret = regmap_read(info->regmap, info->regs->rtc_udr_update, &data);
  193. if (ret < 0) {
  194. dev_err(info->dev, "failed to read update reg(%d)\n", ret);
  195. return ret;
  196. }
  197. data |= info->regs->rtc_udr_mask;
  198. if (info->device_type == S5M8763X || info->device_type == S5M8767X)
  199. data |= S5M_RTC_TIME_EN_MASK;
  200. ret = regmap_write(info->regmap, info->regs->rtc_udr_update, data);
  201. if (ret < 0) {
  202. dev_err(info->dev, "failed to write update reg(%d)\n", ret);
  203. return ret;
  204. }
  205. ret = s5m8767_wait_for_udr_update(info);
  206. return ret;
  207. }
  208. static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
  209. {
  210. int ret;
  211. unsigned int data;
  212. ret = regmap_read(info->regmap, info->regs->rtc_udr_update, &data);
  213. if (ret < 0) {
  214. dev_err(info->dev, "%s: fail to read update reg(%d)\n",
  215. __func__, ret);
  216. return ret;
  217. }
  218. data |= info->regs->rtc_udr_mask;
  219. switch (info->device_type) {
  220. case S5M8763X:
  221. case S5M8767X:
  222. data &= ~S5M_RTC_TIME_EN_MASK;
  223. break;
  224. case S2MPS14X:
  225. data |= S2MPS_RTC_RUDR_MASK;
  226. break;
  227. default:
  228. return -EINVAL;
  229. }
  230. ret = regmap_write(info->regmap, info->regs->rtc_udr_update, data);
  231. if (ret < 0) {
  232. dev_err(info->dev, "%s: fail to write update reg(%d)\n",
  233. __func__, ret);
  234. return ret;
  235. }
  236. ret = s5m8767_wait_for_udr_update(info);
  237. return ret;
  238. }
  239. static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm)
  240. {
  241. tm->tm_sec = bcd2bin(data[RTC_SEC]);
  242. tm->tm_min = bcd2bin(data[RTC_MIN]);
  243. if (data[RTC_HOUR] & HOUR_12) {
  244. tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f);
  245. if (data[RTC_HOUR] & HOUR_PM)
  246. tm->tm_hour += 12;
  247. } else {
  248. tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f);
  249. }
  250. tm->tm_wday = data[RTC_WEEKDAY] & 0x07;
  251. tm->tm_mday = bcd2bin(data[RTC_DATE]);
  252. tm->tm_mon = bcd2bin(data[RTC_MONTH]);
  253. tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100;
  254. tm->tm_year -= 1900;
  255. }
  256. static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data)
  257. {
  258. data[RTC_SEC] = bin2bcd(tm->tm_sec);
  259. data[RTC_MIN] = bin2bcd(tm->tm_min);
  260. data[RTC_HOUR] = bin2bcd(tm->tm_hour);
  261. data[RTC_WEEKDAY] = tm->tm_wday;
  262. data[RTC_DATE] = bin2bcd(tm->tm_mday);
  263. data[RTC_MONTH] = bin2bcd(tm->tm_mon);
  264. data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100);
  265. data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100);
  266. }
  267. static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
  268. {
  269. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  270. u8 data[info->regs->regs_count];
  271. int ret;
  272. if (info->device_type == S2MPS14X) {
  273. ret = regmap_update_bits(info->regmap,
  274. info->regs->rtc_udr_update,
  275. S2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK);
  276. if (ret) {
  277. dev_err(dev,
  278. "Failed to prepare registers for time reading: %d\n",
  279. ret);
  280. return ret;
  281. }
  282. }
  283. ret = regmap_bulk_read(info->regmap, info->regs->time, data,
  284. info->regs->regs_count);
  285. if (ret < 0)
  286. return ret;
  287. switch (info->device_type) {
  288. case S5M8763X:
  289. s5m8763_data_to_tm(data, tm);
  290. break;
  291. case S5M8767X:
  292. case S2MPS14X:
  293. s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode);
  294. break;
  295. default:
  296. return -EINVAL;
  297. }
  298. dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  299. 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
  300. tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
  301. return rtc_valid_tm(tm);
  302. }
  303. static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
  304. {
  305. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  306. u8 data[info->regs->regs_count];
  307. int ret = 0;
  308. switch (info->device_type) {
  309. case S5M8763X:
  310. s5m8763_tm_to_data(tm, data);
  311. break;
  312. case S5M8767X:
  313. case S2MPS14X:
  314. ret = s5m8767_tm_to_data(tm, data);
  315. break;
  316. default:
  317. return -EINVAL;
  318. }
  319. if (ret < 0)
  320. return ret;
  321. dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  322. 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
  323. tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
  324. ret = regmap_raw_write(info->regmap, info->regs->time, data,
  325. info->regs->regs_count);
  326. if (ret < 0)
  327. return ret;
  328. ret = s5m8767_rtc_set_time_reg(info);
  329. return ret;
  330. }
  331. static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  332. {
  333. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  334. u8 data[info->regs->regs_count];
  335. unsigned int val;
  336. int ret, i;
  337. ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
  338. info->regs->regs_count);
  339. if (ret < 0)
  340. return ret;
  341. switch (info->device_type) {
  342. case S5M8763X:
  343. s5m8763_data_to_tm(data, &alrm->time);
  344. ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val);
  345. if (ret < 0)
  346. return ret;
  347. alrm->enabled = !!val;
  348. break;
  349. case S5M8767X:
  350. case S2MPS14X:
  351. s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
  352. alrm->enabled = 0;
  353. for (i = 0; i < info->regs->regs_count; i++) {
  354. if (data[i] & ALARM_ENABLE_MASK) {
  355. alrm->enabled = 1;
  356. break;
  357. }
  358. }
  359. break;
  360. default:
  361. return -EINVAL;
  362. }
  363. dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  364. 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
  365. alrm->time.tm_mday, alrm->time.tm_hour,
  366. alrm->time.tm_min, alrm->time.tm_sec,
  367. alrm->time.tm_wday);
  368. ret = s5m_check_peding_alarm_interrupt(info, alrm);
  369. return 0;
  370. }
  371. static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
  372. {
  373. u8 data[info->regs->regs_count];
  374. int ret, i;
  375. struct rtc_time tm;
  376. ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
  377. info->regs->regs_count);
  378. if (ret < 0)
  379. return ret;
  380. s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
  381. dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  382. 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
  383. tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
  384. switch (info->device_type) {
  385. case S5M8763X:
  386. ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0);
  387. break;
  388. case S5M8767X:
  389. case S2MPS14X:
  390. for (i = 0; i < info->regs->regs_count; i++)
  391. data[i] &= ~ALARM_ENABLE_MASK;
  392. ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
  393. info->regs->regs_count);
  394. if (ret < 0)
  395. return ret;
  396. ret = s5m8767_rtc_set_alarm_reg(info);
  397. break;
  398. default:
  399. return -EINVAL;
  400. }
  401. return ret;
  402. }
  403. static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
  404. {
  405. int ret;
  406. u8 data[info->regs->regs_count];
  407. u8 alarm0_conf;
  408. struct rtc_time tm;
  409. ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
  410. info->regs->regs_count);
  411. if (ret < 0)
  412. return ret;
  413. s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
  414. dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  415. 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
  416. tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
  417. switch (info->device_type) {
  418. case S5M8763X:
  419. alarm0_conf = 0x77;
  420. ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf);
  421. break;
  422. case S5M8767X:
  423. case S2MPS14X:
  424. data[RTC_SEC] |= ALARM_ENABLE_MASK;
  425. data[RTC_MIN] |= ALARM_ENABLE_MASK;
  426. data[RTC_HOUR] |= ALARM_ENABLE_MASK;
  427. data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
  428. if (data[RTC_DATE] & 0x1f)
  429. data[RTC_DATE] |= ALARM_ENABLE_MASK;
  430. if (data[RTC_MONTH] & 0xf)
  431. data[RTC_MONTH] |= ALARM_ENABLE_MASK;
  432. if (data[RTC_YEAR1] & 0x7f)
  433. data[RTC_YEAR1] |= ALARM_ENABLE_MASK;
  434. ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
  435. info->regs->regs_count);
  436. if (ret < 0)
  437. return ret;
  438. ret = s5m8767_rtc_set_alarm_reg(info);
  439. break;
  440. default:
  441. return -EINVAL;
  442. }
  443. return ret;
  444. }
  445. static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  446. {
  447. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  448. u8 data[info->regs->regs_count];
  449. int ret;
  450. switch (info->device_type) {
  451. case S5M8763X:
  452. s5m8763_tm_to_data(&alrm->time, data);
  453. break;
  454. case S5M8767X:
  455. case S2MPS14X:
  456. s5m8767_tm_to_data(&alrm->time, data);
  457. break;
  458. default:
  459. return -EINVAL;
  460. }
  461. dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  462. 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
  463. alrm->time.tm_mday, alrm->time.tm_hour, alrm->time.tm_min,
  464. alrm->time.tm_sec, alrm->time.tm_wday);
  465. ret = s5m_rtc_stop_alarm(info);
  466. if (ret < 0)
  467. return ret;
  468. ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
  469. info->regs->regs_count);
  470. if (ret < 0)
  471. return ret;
  472. ret = s5m8767_rtc_set_alarm_reg(info);
  473. if (ret < 0)
  474. return ret;
  475. if (alrm->enabled)
  476. ret = s5m_rtc_start_alarm(info);
  477. return ret;
  478. }
  479. static int s5m_rtc_alarm_irq_enable(struct device *dev,
  480. unsigned int enabled)
  481. {
  482. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  483. if (enabled)
  484. return s5m_rtc_start_alarm(info);
  485. else
  486. return s5m_rtc_stop_alarm(info);
  487. }
  488. static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data)
  489. {
  490. struct s5m_rtc_info *info = data;
  491. rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
  492. return IRQ_HANDLED;
  493. }
  494. static const struct rtc_class_ops s5m_rtc_ops = {
  495. .read_time = s5m_rtc_read_time,
  496. .set_time = s5m_rtc_set_time,
  497. .read_alarm = s5m_rtc_read_alarm,
  498. .set_alarm = s5m_rtc_set_alarm,
  499. .alarm_irq_enable = s5m_rtc_alarm_irq_enable,
  500. };
  501. static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable)
  502. {
  503. int ret;
  504. ret = regmap_update_bits(info->regmap, info->regs->smpl_wtsr,
  505. WTSR_ENABLE_MASK,
  506. enable ? WTSR_ENABLE_MASK : 0);
  507. if (ret < 0)
  508. dev_err(info->dev, "%s: fail to update WTSR reg(%d)\n",
  509. __func__, ret);
  510. }
  511. static void s5m_rtc_enable_smpl(struct s5m_rtc_info *info, bool enable)
  512. {
  513. int ret;
  514. ret = regmap_update_bits(info->regmap, info->regs->smpl_wtsr,
  515. SMPL_ENABLE_MASK,
  516. enable ? SMPL_ENABLE_MASK : 0);
  517. if (ret < 0)
  518. dev_err(info->dev, "%s: fail to update SMPL reg(%d)\n",
  519. __func__, ret);
  520. }
  521. static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
  522. {
  523. u8 data[2];
  524. int ret;
  525. switch (info->device_type) {
  526. case S5M8763X:
  527. case S5M8767X:
  528. /* UDR update time. Default of 7.32 ms is too long. */
  529. ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON,
  530. S5M_RTC_UDR_T_MASK, S5M_RTC_UDR_T_450_US);
  531. if (ret < 0)
  532. dev_err(info->dev, "%s: fail to change UDR time: %d\n",
  533. __func__, ret);
  534. /* Set RTC control register : Binary mode, 24hour mode */
  535. data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
  536. data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
  537. ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2);
  538. break;
  539. case S2MPS14X:
  540. data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
  541. ret = regmap_write(info->regmap, info->regs->ctrl, data[0]);
  542. break;
  543. default:
  544. return -EINVAL;
  545. }
  546. info->rtc_24hr_mode = 1;
  547. if (ret < 0) {
  548. dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
  549. __func__, ret);
  550. return ret;
  551. }
  552. return ret;
  553. }
  554. static int s5m_rtc_probe(struct platform_device *pdev)
  555. {
  556. struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent);
  557. struct sec_platform_data *pdata = s5m87xx->pdata;
  558. struct s5m_rtc_info *info;
  559. const struct regmap_config *regmap_cfg;
  560. int ret, alarm_irq;
  561. if (!pdata) {
  562. dev_err(pdev->dev.parent, "Platform data not supplied\n");
  563. return -ENODEV;
  564. }
  565. info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
  566. if (!info)
  567. return -ENOMEM;
  568. switch (pdata->device_type) {
  569. case S2MPS14X:
  570. regmap_cfg = &s2mps14_rtc_regmap_config;
  571. info->regs = &s2mps_rtc_regs;
  572. alarm_irq = S2MPS14_IRQ_RTCA0;
  573. break;
  574. case S5M8763X:
  575. regmap_cfg = &s5m_rtc_regmap_config;
  576. info->regs = &s5m_rtc_regs;
  577. alarm_irq = S5M8763_IRQ_ALARM0;
  578. break;
  579. case S5M8767X:
  580. regmap_cfg = &s5m_rtc_regmap_config;
  581. info->regs = &s5m_rtc_regs;
  582. alarm_irq = S5M8767_IRQ_RTCA1;
  583. break;
  584. default:
  585. dev_err(&pdev->dev, "Device type is not supported by RTC driver\n");
  586. return -ENODEV;
  587. }
  588. info->i2c = i2c_new_dummy(s5m87xx->i2c->adapter, RTC_I2C_ADDR);
  589. if (!info->i2c) {
  590. dev_err(&pdev->dev, "Failed to allocate I2C for RTC\n");
  591. return -ENODEV;
  592. }
  593. info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg);
  594. if (IS_ERR(info->regmap)) {
  595. ret = PTR_ERR(info->regmap);
  596. dev_err(&pdev->dev, "Failed to allocate RTC register map: %d\n",
  597. ret);
  598. goto err;
  599. }
  600. info->dev = &pdev->dev;
  601. info->s5m87xx = s5m87xx;
  602. info->device_type = s5m87xx->device_type;
  603. info->wtsr_smpl = s5m87xx->wtsr_smpl;
  604. info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
  605. if (info->irq <= 0) {
  606. ret = -EINVAL;
  607. dev_err(&pdev->dev, "Failed to get virtual IRQ %d\n",
  608. alarm_irq);
  609. goto err;
  610. }
  611. platform_set_drvdata(pdev, info);
  612. ret = s5m8767_rtc_init_reg(info);
  613. if (info->wtsr_smpl) {
  614. s5m_rtc_enable_wtsr(info, true);
  615. s5m_rtc_enable_smpl(info, true);
  616. }
  617. device_init_wakeup(&pdev->dev, 1);
  618. info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc",
  619. &s5m_rtc_ops, THIS_MODULE);
  620. if (IS_ERR(info->rtc_dev)) {
  621. ret = PTR_ERR(info->rtc_dev);
  622. goto err;
  623. }
  624. ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL,
  625. s5m_rtc_alarm_irq, 0, "rtc-alarm0",
  626. info);
  627. if (ret < 0) {
  628. dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
  629. info->irq, ret);
  630. goto err;
  631. }
  632. return 0;
  633. err:
  634. i2c_unregister_device(info->i2c);
  635. return ret;
  636. }
  637. static void s5m_rtc_shutdown(struct platform_device *pdev)
  638. {
  639. struct s5m_rtc_info *info = platform_get_drvdata(pdev);
  640. int i;
  641. unsigned int val = 0;
  642. if (info->wtsr_smpl) {
  643. for (i = 0; i < 3; i++) {
  644. s5m_rtc_enable_wtsr(info, false);
  645. regmap_read(info->regmap, info->regs->smpl_wtsr, &val);
  646. pr_debug("%s: WTSR_SMPL reg(0x%02x)\n", __func__, val);
  647. if (val & WTSR_ENABLE_MASK)
  648. pr_emerg("%s: fail to disable WTSR\n",
  649. __func__);
  650. else {
  651. pr_info("%s: success to disable WTSR\n",
  652. __func__);
  653. break;
  654. }
  655. }
  656. }
  657. /* Disable SMPL when power off */
  658. s5m_rtc_enable_smpl(info, false);
  659. }
  660. static int s5m_rtc_remove(struct platform_device *pdev)
  661. {
  662. struct s5m_rtc_info *info = platform_get_drvdata(pdev);
  663. /* Perform also all shutdown steps when removing */
  664. s5m_rtc_shutdown(pdev);
  665. i2c_unregister_device(info->i2c);
  666. return 0;
  667. }
  668. #ifdef CONFIG_PM_SLEEP
  669. static int s5m_rtc_resume(struct device *dev)
  670. {
  671. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  672. int ret = 0;
  673. if (device_may_wakeup(dev))
  674. ret = disable_irq_wake(info->irq);
  675. return ret;
  676. }
  677. static int s5m_rtc_suspend(struct device *dev)
  678. {
  679. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  680. int ret = 0;
  681. if (device_may_wakeup(dev))
  682. ret = enable_irq_wake(info->irq);
  683. return ret;
  684. }
  685. #endif /* CONFIG_PM_SLEEP */
  686. static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume);
  687. static const struct platform_device_id s5m_rtc_id[] = {
  688. { "s5m-rtc", S5M8767X },
  689. { "s2mps14-rtc", S2MPS14X },
  690. };
  691. static struct platform_driver s5m_rtc_driver = {
  692. .driver = {
  693. .name = "s5m-rtc",
  694. .owner = THIS_MODULE,
  695. .pm = &s5m_rtc_pm_ops,
  696. },
  697. .probe = s5m_rtc_probe,
  698. .remove = s5m_rtc_remove,
  699. .shutdown = s5m_rtc_shutdown,
  700. .id_table = s5m_rtc_id,
  701. };
  702. module_platform_driver(s5m_rtc_driver);
  703. /* Module information */
  704. MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
  705. MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver");
  706. MODULE_LICENSE("GPL");
  707. MODULE_ALIAS("platform:s5m-rtc");