rtc-ds1343.c 15 KB

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  1. /* rtc-ds1343.c
  2. *
  3. * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible
  4. * Real Time Clock
  5. *
  6. * Author : Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/init.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/device.h>
  17. #include <linux/spi/spi.h>
  18. #include <linux/regmap.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/pm.h>
  22. #include <linux/slab.h>
  23. #define DS1343_DRV_VERSION "01.00"
  24. #define DALLAS_MAXIM_DS1343 0
  25. #define DALLAS_MAXIM_DS1344 1
  26. /* RTC DS1343 Registers */
  27. #define DS1343_SECONDS_REG 0x00
  28. #define DS1343_MINUTES_REG 0x01
  29. #define DS1343_HOURS_REG 0x02
  30. #define DS1343_DAY_REG 0x03
  31. #define DS1343_DATE_REG 0x04
  32. #define DS1343_MONTH_REG 0x05
  33. #define DS1343_YEAR_REG 0x06
  34. #define DS1343_ALM0_SEC_REG 0x07
  35. #define DS1343_ALM0_MIN_REG 0x08
  36. #define DS1343_ALM0_HOUR_REG 0x09
  37. #define DS1343_ALM0_DAY_REG 0x0A
  38. #define DS1343_ALM1_SEC_REG 0x0B
  39. #define DS1343_ALM1_MIN_REG 0x0C
  40. #define DS1343_ALM1_HOUR_REG 0x0D
  41. #define DS1343_ALM1_DAY_REG 0x0E
  42. #define DS1343_CONTROL_REG 0x0F
  43. #define DS1343_STATUS_REG 0x10
  44. #define DS1343_TRICKLE_REG 0x11
  45. /* DS1343 Control Registers bits */
  46. #define DS1343_EOSC 0x80
  47. #define DS1343_DOSF 0x20
  48. #define DS1343_EGFIL 0x10
  49. #define DS1343_SQW 0x08
  50. #define DS1343_INTCN 0x04
  51. #define DS1343_A1IE 0x02
  52. #define DS1343_A0IE 0x01
  53. /* DS1343 Status Registers bits */
  54. #define DS1343_OSF 0x80
  55. #define DS1343_IRQF1 0x02
  56. #define DS1343_IRQF0 0x01
  57. /* DS1343 Trickle Charger Registers bits */
  58. #define DS1343_TRICKLE_MAGIC 0xa0
  59. #define DS1343_TRICKLE_DS1 0x08
  60. #define DS1343_TRICKLE_1K 0x01
  61. #define DS1343_TRICKLE_2K 0x02
  62. #define DS1343_TRICKLE_4K 0x03
  63. static const struct spi_device_id ds1343_id[] = {
  64. { "ds1343", DALLAS_MAXIM_DS1343 },
  65. { "ds1344", DALLAS_MAXIM_DS1344 },
  66. { }
  67. };
  68. MODULE_DEVICE_TABLE(spi, ds1343_id);
  69. struct ds1343_priv {
  70. struct spi_device *spi;
  71. struct rtc_device *rtc;
  72. struct regmap *map;
  73. struct mutex mutex;
  74. unsigned int irqen;
  75. int irq;
  76. int alarm_sec;
  77. int alarm_min;
  78. int alarm_hour;
  79. int alarm_mday;
  80. };
  81. static int ds1343_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  82. {
  83. switch (cmd) {
  84. #ifdef RTC_SET_CHARGE
  85. case RTC_SET_CHARGE:
  86. {
  87. int val;
  88. if (copy_from_user(&val, (int __user *)arg, sizeof(int)))
  89. return -EFAULT;
  90. return regmap_write(priv->map, DS1343_TRICKLE_REG, val);
  91. }
  92. break;
  93. #endif
  94. }
  95. return -ENOIOCTLCMD;
  96. }
  97. static ssize_t ds1343_show_glitchfilter(struct device *dev,
  98. struct device_attribute *attr, char *buf)
  99. {
  100. struct ds1343_priv *priv = dev_get_drvdata(dev);
  101. int glitch_filt_status, data;
  102. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  103. glitch_filt_status = !!(data & DS1343_EGFIL);
  104. if (glitch_filt_status)
  105. return sprintf(buf, "enabled\n");
  106. else
  107. return sprintf(buf, "disabled\n");
  108. }
  109. static ssize_t ds1343_store_glitchfilter(struct device *dev,
  110. struct device_attribute *attr,
  111. const char *buf, size_t count)
  112. {
  113. struct ds1343_priv *priv = dev_get_drvdata(dev);
  114. int data;
  115. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  116. if (strncmp(buf, "enabled", 7) == 0)
  117. data |= DS1343_EGFIL;
  118. else if (strncmp(buf, "disabled", 8) == 0)
  119. data &= ~(DS1343_EGFIL);
  120. else
  121. return -EINVAL;
  122. regmap_write(priv->map, DS1343_CONTROL_REG, data);
  123. return count;
  124. }
  125. static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter,
  126. ds1343_store_glitchfilter);
  127. static ssize_t ds1343_show_alarmstatus(struct device *dev,
  128. struct device_attribute *attr, char *buf)
  129. {
  130. struct ds1343_priv *priv = dev_get_drvdata(dev);
  131. int alarmstatus, data;
  132. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  133. alarmstatus = !!(data & DS1343_A0IE);
  134. if (alarmstatus)
  135. return sprintf(buf, "enabled\n");
  136. else
  137. return sprintf(buf, "disabled\n");
  138. }
  139. static DEVICE_ATTR(alarm_status, S_IRUGO, ds1343_show_alarmstatus, NULL);
  140. static ssize_t ds1343_show_alarmmode(struct device *dev,
  141. struct device_attribute *attr, char *buf)
  142. {
  143. struct ds1343_priv *priv = dev_get_drvdata(dev);
  144. int alarm_mode, data;
  145. char *alarm_str;
  146. regmap_read(priv->map, DS1343_ALM0_SEC_REG, &data);
  147. alarm_mode = (data & 0x80) >> 4;
  148. regmap_read(priv->map, DS1343_ALM0_MIN_REG, &data);
  149. alarm_mode |= (data & 0x80) >> 5;
  150. regmap_read(priv->map, DS1343_ALM0_HOUR_REG, &data);
  151. alarm_mode |= (data & 0x80) >> 6;
  152. regmap_read(priv->map, DS1343_ALM0_DAY_REG, &data);
  153. alarm_mode |= (data & 0x80) >> 7;
  154. switch (alarm_mode) {
  155. case 15:
  156. alarm_str = "each second";
  157. break;
  158. case 7:
  159. alarm_str = "seconds match";
  160. break;
  161. case 3:
  162. alarm_str = "minutes and seconds match";
  163. break;
  164. case 1:
  165. alarm_str = "hours, minutes and seconds match";
  166. break;
  167. case 0:
  168. alarm_str = "day, hours, minutes and seconds match";
  169. break;
  170. default:
  171. alarm_str = "invalid";
  172. break;
  173. }
  174. return sprintf(buf, "%s\n", alarm_str);
  175. }
  176. static DEVICE_ATTR(alarm_mode, S_IRUGO, ds1343_show_alarmmode, NULL);
  177. static ssize_t ds1343_show_tricklecharger(struct device *dev,
  178. struct device_attribute *attr, char *buf)
  179. {
  180. struct ds1343_priv *priv = dev_get_drvdata(dev);
  181. int data;
  182. char *diodes = "disabled", *resistors = " ";
  183. regmap_read(priv->map, DS1343_TRICKLE_REG, &data);
  184. if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) {
  185. switch (data & 0x0c) {
  186. case DS1343_TRICKLE_DS1:
  187. diodes = "one diode,";
  188. break;
  189. default:
  190. diodes = "no diode,";
  191. break;
  192. }
  193. switch (data & 0x03) {
  194. case DS1343_TRICKLE_1K:
  195. resistors = "1k Ohm";
  196. break;
  197. case DS1343_TRICKLE_2K:
  198. resistors = "2k Ohm";
  199. break;
  200. case DS1343_TRICKLE_4K:
  201. resistors = "4k Ohm";
  202. break;
  203. default:
  204. diodes = "disabled";
  205. break;
  206. }
  207. }
  208. return sprintf(buf, "%s %s\n", diodes, resistors);
  209. }
  210. static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL);
  211. static int ds1343_sysfs_register(struct device *dev)
  212. {
  213. struct ds1343_priv *priv = dev_get_drvdata(dev);
  214. int err;
  215. err = device_create_file(dev, &dev_attr_glitch_filter);
  216. if (err)
  217. return err;
  218. err = device_create_file(dev, &dev_attr_trickle_charger);
  219. if (err)
  220. goto error1;
  221. if (priv->irq <= 0)
  222. return err;
  223. err = device_create_file(dev, &dev_attr_alarm_mode);
  224. if (err)
  225. goto error2;
  226. err = device_create_file(dev, &dev_attr_alarm_status);
  227. if (!err)
  228. return err;
  229. device_remove_file(dev, &dev_attr_alarm_mode);
  230. error2:
  231. device_remove_file(dev, &dev_attr_trickle_charger);
  232. error1:
  233. device_remove_file(dev, &dev_attr_glitch_filter);
  234. return err;
  235. }
  236. static void ds1343_sysfs_unregister(struct device *dev)
  237. {
  238. struct ds1343_priv *priv = dev_get_drvdata(dev);
  239. device_remove_file(dev, &dev_attr_glitch_filter);
  240. device_remove_file(dev, &dev_attr_trickle_charger);
  241. if (priv->irq <= 0)
  242. return;
  243. device_remove_file(dev, &dev_attr_alarm_status);
  244. device_remove_file(dev, &dev_attr_alarm_mode);
  245. }
  246. static int ds1343_read_time(struct device *dev, struct rtc_time *dt)
  247. {
  248. struct ds1343_priv *priv = dev_get_drvdata(dev);
  249. unsigned char buf[7];
  250. int res;
  251. res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7);
  252. if (res)
  253. return res;
  254. dt->tm_sec = bcd2bin(buf[0]);
  255. dt->tm_min = bcd2bin(buf[1]);
  256. dt->tm_hour = bcd2bin(buf[2] & 0x3F);
  257. dt->tm_wday = bcd2bin(buf[3]) - 1;
  258. dt->tm_mday = bcd2bin(buf[4]);
  259. dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1;
  260. dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */
  261. return rtc_valid_tm(dt);
  262. }
  263. static int ds1343_set_time(struct device *dev, struct rtc_time *dt)
  264. {
  265. struct ds1343_priv *priv = dev_get_drvdata(dev);
  266. int res;
  267. res = regmap_write(priv->map, DS1343_SECONDS_REG,
  268. bin2bcd(dt->tm_sec));
  269. if (res)
  270. return res;
  271. res = regmap_write(priv->map, DS1343_MINUTES_REG,
  272. bin2bcd(dt->tm_min));
  273. if (res)
  274. return res;
  275. res = regmap_write(priv->map, DS1343_HOURS_REG,
  276. bin2bcd(dt->tm_hour) & 0x3F);
  277. if (res)
  278. return res;
  279. res = regmap_write(priv->map, DS1343_DAY_REG,
  280. bin2bcd(dt->tm_wday + 1));
  281. if (res)
  282. return res;
  283. res = regmap_write(priv->map, DS1343_DATE_REG,
  284. bin2bcd(dt->tm_mday));
  285. if (res)
  286. return res;
  287. res = regmap_write(priv->map, DS1343_MONTH_REG,
  288. bin2bcd(dt->tm_mon + 1));
  289. if (res)
  290. return res;
  291. dt->tm_year %= 100;
  292. res = regmap_write(priv->map, DS1343_YEAR_REG,
  293. bin2bcd(dt->tm_year));
  294. if (res)
  295. return res;
  296. return 0;
  297. }
  298. static int ds1343_update_alarm(struct device *dev)
  299. {
  300. struct ds1343_priv *priv = dev_get_drvdata(dev);
  301. unsigned int control, stat;
  302. unsigned char buf[4];
  303. int res = 0;
  304. res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
  305. if (res)
  306. return res;
  307. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  308. if (res)
  309. return res;
  310. control &= ~(DS1343_A0IE);
  311. stat &= ~(DS1343_IRQF0);
  312. res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
  313. if (res)
  314. return res;
  315. res = regmap_write(priv->map, DS1343_STATUS_REG, stat);
  316. if (res)
  317. return res;
  318. buf[0] = priv->alarm_sec < 0 || (priv->irqen & RTC_UF) ?
  319. 0x80 : bin2bcd(priv->alarm_sec) & 0x7F;
  320. buf[1] = priv->alarm_min < 0 || (priv->irqen & RTC_UF) ?
  321. 0x80 : bin2bcd(priv->alarm_min) & 0x7F;
  322. buf[2] = priv->alarm_hour < 0 || (priv->irqen & RTC_UF) ?
  323. 0x80 : bin2bcd(priv->alarm_hour) & 0x3F;
  324. buf[3] = priv->alarm_mday < 0 || (priv->irqen & RTC_UF) ?
  325. 0x80 : bin2bcd(priv->alarm_mday) & 0x7F;
  326. res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4);
  327. if (res)
  328. return res;
  329. if (priv->irqen) {
  330. control |= DS1343_A0IE;
  331. res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
  332. }
  333. return res;
  334. }
  335. static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  336. {
  337. struct ds1343_priv *priv = dev_get_drvdata(dev);
  338. int res = 0;
  339. unsigned int stat;
  340. if (priv->irq <= 0)
  341. return -EINVAL;
  342. mutex_lock(&priv->mutex);
  343. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  344. if (res)
  345. goto out;
  346. alarm->enabled = !!(priv->irqen & RTC_AF);
  347. alarm->pending = !!(stat & DS1343_IRQF0);
  348. alarm->time.tm_sec = priv->alarm_sec < 0 ? 0 : priv->alarm_sec;
  349. alarm->time.tm_min = priv->alarm_min < 0 ? 0 : priv->alarm_min;
  350. alarm->time.tm_hour = priv->alarm_hour < 0 ? 0 : priv->alarm_hour;
  351. alarm->time.tm_mday = priv->alarm_mday < 0 ? 0 : priv->alarm_mday;
  352. alarm->time.tm_mon = -1;
  353. alarm->time.tm_year = -1;
  354. alarm->time.tm_wday = -1;
  355. alarm->time.tm_yday = -1;
  356. alarm->time.tm_isdst = -1;
  357. out:
  358. mutex_unlock(&priv->mutex);
  359. return res;
  360. }
  361. static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  362. {
  363. struct ds1343_priv *priv = dev_get_drvdata(dev);
  364. int res = 0;
  365. if (priv->irq <= 0)
  366. return -EINVAL;
  367. mutex_lock(&priv->mutex);
  368. priv->alarm_sec = alarm->time.tm_sec;
  369. priv->alarm_min = alarm->time.tm_min;
  370. priv->alarm_hour = alarm->time.tm_hour;
  371. priv->alarm_mday = alarm->time.tm_mday;
  372. if (alarm->enabled)
  373. priv->irqen |= RTC_AF;
  374. res = ds1343_update_alarm(dev);
  375. mutex_unlock(&priv->mutex);
  376. return res;
  377. }
  378. static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled)
  379. {
  380. struct ds1343_priv *priv = dev_get_drvdata(dev);
  381. int res = 0;
  382. if (priv->irq <= 0)
  383. return -EINVAL;
  384. mutex_lock(&priv->mutex);
  385. if (enabled)
  386. priv->irqen |= RTC_AF;
  387. else
  388. priv->irqen &= ~RTC_AF;
  389. res = ds1343_update_alarm(dev);
  390. mutex_unlock(&priv->mutex);
  391. return res;
  392. }
  393. static irqreturn_t ds1343_thread(int irq, void *dev_id)
  394. {
  395. struct ds1343_priv *priv = dev_id;
  396. unsigned int stat, control;
  397. int res = 0;
  398. mutex_lock(&priv->mutex);
  399. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  400. if (res)
  401. goto out;
  402. if (stat & DS1343_IRQF0) {
  403. stat &= ~DS1343_IRQF0;
  404. regmap_write(priv->map, DS1343_STATUS_REG, stat);
  405. res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
  406. if (res)
  407. goto out;
  408. control &= ~DS1343_A0IE;
  409. regmap_write(priv->map, DS1343_CONTROL_REG, control);
  410. rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF);
  411. }
  412. out:
  413. mutex_unlock(&priv->mutex);
  414. return IRQ_HANDLED;
  415. }
  416. static const struct rtc_class_ops ds1343_rtc_ops = {
  417. .ioctl = ds1343_ioctl,
  418. .read_time = ds1343_read_time,
  419. .set_time = ds1343_set_time,
  420. .read_alarm = ds1343_read_alarm,
  421. .set_alarm = ds1343_set_alarm,
  422. .alarm_irq_enable = ds1343_alarm_irq_enable,
  423. };
  424. static int ds1343_probe(struct spi_device *spi)
  425. {
  426. struct ds1343_priv *priv;
  427. struct regmap_config config;
  428. unsigned int data;
  429. int res;
  430. memset(&config, 0, sizeof(config));
  431. config.reg_bits = 8;
  432. config.val_bits = 8;
  433. config.write_flag_mask = 0x80;
  434. priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL);
  435. if (!priv)
  436. return -ENOMEM;
  437. priv->spi = spi;
  438. mutex_init(&priv->mutex);
  439. /* RTC DS1347 works in spi mode 3 and
  440. * its chip select is active high
  441. */
  442. spi->mode = SPI_MODE_3 | SPI_CS_HIGH;
  443. spi->bits_per_word = 8;
  444. res = spi_setup(spi);
  445. if (res)
  446. return res;
  447. spi_set_drvdata(spi, priv);
  448. priv->map = devm_regmap_init_spi(spi, &config);
  449. if (IS_ERR(priv->map)) {
  450. dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n");
  451. return PTR_ERR(priv->map);
  452. }
  453. res = regmap_read(priv->map, DS1343_SECONDS_REG, &data);
  454. if (res)
  455. return res;
  456. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  457. data |= DS1343_INTCN;
  458. data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE);
  459. regmap_write(priv->map, DS1343_CONTROL_REG, data);
  460. regmap_read(priv->map, DS1343_STATUS_REG, &data);
  461. data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0);
  462. regmap_write(priv->map, DS1343_STATUS_REG, data);
  463. priv->rtc = devm_rtc_device_register(&spi->dev, "ds1343",
  464. &ds1343_rtc_ops, THIS_MODULE);
  465. if (IS_ERR(priv->rtc)) {
  466. dev_err(&spi->dev, "unable to register rtc ds1343\n");
  467. return PTR_ERR(priv->rtc);
  468. }
  469. priv->irq = spi->irq;
  470. if (priv->irq >= 0) {
  471. res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL,
  472. ds1343_thread,
  473. IRQF_NO_SUSPEND | IRQF_ONESHOT,
  474. "ds1343", priv);
  475. if (res) {
  476. priv->irq = -1;
  477. dev_err(&spi->dev,
  478. "unable to request irq for rtc ds1343\n");
  479. } else {
  480. device_set_wakeup_capable(&spi->dev, 1);
  481. }
  482. }
  483. res = ds1343_sysfs_register(&spi->dev);
  484. if (res)
  485. dev_err(&spi->dev,
  486. "unable to create sysfs entries for rtc ds1343\n");
  487. return 0;
  488. }
  489. static int ds1343_remove(struct spi_device *spi)
  490. {
  491. struct ds1343_priv *priv = spi_get_drvdata(spi);
  492. if (spi->irq) {
  493. mutex_lock(&priv->mutex);
  494. priv->irqen &= ~RTC_AF;
  495. mutex_unlock(&priv->mutex);
  496. devm_free_irq(&spi->dev, spi->irq, priv);
  497. }
  498. spi_set_drvdata(spi, NULL);
  499. ds1343_sysfs_unregister(&spi->dev);
  500. return 0;
  501. }
  502. #ifdef CONFIG_PM_SLEEP
  503. static int ds1343_suspend(struct device *dev)
  504. {
  505. struct spi_device *spi = to_spi_device(dev);
  506. if (spi->irq >= 0 && device_may_wakeup(dev))
  507. enable_irq_wake(spi->irq);
  508. return 0;
  509. }
  510. static int ds1343_resume(struct device *dev)
  511. {
  512. struct spi_device *spi = to_spi_device(dev);
  513. if (spi->irq >= 0 && device_may_wakeup(dev))
  514. disable_irq_wake(spi->irq);
  515. return 0;
  516. }
  517. #endif
  518. static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume);
  519. static struct spi_driver ds1343_driver = {
  520. .driver = {
  521. .name = "ds1343",
  522. .owner = THIS_MODULE,
  523. .pm = &ds1343_pm,
  524. },
  525. .probe = ds1343_probe,
  526. .remove = ds1343_remove,
  527. .id_table = ds1343_id,
  528. };
  529. module_spi_driver(ds1343_driver);
  530. MODULE_DESCRIPTION("DS1343 RTC SPI Driver");
  531. MODULE_AUTHOR("Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>");
  532. MODULE_LICENSE("GPL v2");
  533. MODULE_VERSION(DS1343_DRV_VERSION);