tps65910-regulator.c 33 KB

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  1. /*
  2. * tps65910.c -- TI tps65910
  3. *
  4. * Copyright 2010 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  7. * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/slab.h>
  23. #include <linux/gpio.h>
  24. #include <linux/mfd/tps65910.h>
  25. #include <linux/regulator/of_regulator.h>
  26. #define TPS65910_SUPPLY_STATE_ENABLED 0x1
  27. #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
  28. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
  29. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
  30. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  31. /* supported VIO voltages in microvolts */
  32. static const unsigned int VIO_VSEL_table[] = {
  33. 1500000, 1800000, 2500000, 3300000,
  34. };
  35. /* VSEL tables for TPS65910 specific LDOs and dcdc's */
  36. /* supported VRTC voltages in microvolts */
  37. static const unsigned int VRTC_VSEL_table[] = {
  38. 1800000,
  39. };
  40. /* supported VDD3 voltages in microvolts */
  41. static const unsigned int VDD3_VSEL_table[] = {
  42. 5000000,
  43. };
  44. /* supported VDIG1 voltages in microvolts */
  45. static const unsigned int VDIG1_VSEL_table[] = {
  46. 1200000, 1500000, 1800000, 2700000,
  47. };
  48. /* supported VDIG2 voltages in microvolts */
  49. static const unsigned int VDIG2_VSEL_table[] = {
  50. 1000000, 1100000, 1200000, 1800000,
  51. };
  52. /* supported VPLL voltages in microvolts */
  53. static const unsigned int VPLL_VSEL_table[] = {
  54. 1000000, 1100000, 1800000, 2500000,
  55. };
  56. /* supported VDAC voltages in microvolts */
  57. static const unsigned int VDAC_VSEL_table[] = {
  58. 1800000, 2600000, 2800000, 2850000,
  59. };
  60. /* supported VAUX1 voltages in microvolts */
  61. static const unsigned int VAUX1_VSEL_table[] = {
  62. 1800000, 2500000, 2800000, 2850000,
  63. };
  64. /* supported VAUX2 voltages in microvolts */
  65. static const unsigned int VAUX2_VSEL_table[] = {
  66. 1800000, 2800000, 2900000, 3300000,
  67. };
  68. /* supported VAUX33 voltages in microvolts */
  69. static const unsigned int VAUX33_VSEL_table[] = {
  70. 1800000, 2000000, 2800000, 3300000,
  71. };
  72. /* supported VMMC voltages in microvolts */
  73. static const unsigned int VMMC_VSEL_table[] = {
  74. 1800000, 2800000, 3000000, 3300000,
  75. };
  76. /* supported BBCH voltages in microvolts */
  77. static const unsigned int VBB_VSEL_table[] = {
  78. 3000000, 2520000, 3150000, 5000000,
  79. };
  80. struct tps_info {
  81. const char *name;
  82. const char *vin_name;
  83. u8 n_voltages;
  84. const unsigned int *voltage_table;
  85. int enable_time_us;
  86. };
  87. static struct tps_info tps65910_regs[] = {
  88. {
  89. .name = "vrtc",
  90. .vin_name = "vcc7",
  91. .n_voltages = ARRAY_SIZE(VRTC_VSEL_table),
  92. .voltage_table = VRTC_VSEL_table,
  93. .enable_time_us = 2200,
  94. },
  95. {
  96. .name = "vio",
  97. .vin_name = "vccio",
  98. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  99. .voltage_table = VIO_VSEL_table,
  100. .enable_time_us = 350,
  101. },
  102. {
  103. .name = "vdd1",
  104. .vin_name = "vcc1",
  105. .enable_time_us = 350,
  106. },
  107. {
  108. .name = "vdd2",
  109. .vin_name = "vcc2",
  110. .enable_time_us = 350,
  111. },
  112. {
  113. .name = "vdd3",
  114. .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
  115. .voltage_table = VDD3_VSEL_table,
  116. .enable_time_us = 200,
  117. },
  118. {
  119. .name = "vdig1",
  120. .vin_name = "vcc6",
  121. .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
  122. .voltage_table = VDIG1_VSEL_table,
  123. .enable_time_us = 100,
  124. },
  125. {
  126. .name = "vdig2",
  127. .vin_name = "vcc6",
  128. .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
  129. .voltage_table = VDIG2_VSEL_table,
  130. .enable_time_us = 100,
  131. },
  132. {
  133. .name = "vpll",
  134. .vin_name = "vcc5",
  135. .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
  136. .voltage_table = VPLL_VSEL_table,
  137. .enable_time_us = 100,
  138. },
  139. {
  140. .name = "vdac",
  141. .vin_name = "vcc5",
  142. .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
  143. .voltage_table = VDAC_VSEL_table,
  144. .enable_time_us = 100,
  145. },
  146. {
  147. .name = "vaux1",
  148. .vin_name = "vcc4",
  149. .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
  150. .voltage_table = VAUX1_VSEL_table,
  151. .enable_time_us = 100,
  152. },
  153. {
  154. .name = "vaux2",
  155. .vin_name = "vcc4",
  156. .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
  157. .voltage_table = VAUX2_VSEL_table,
  158. .enable_time_us = 100,
  159. },
  160. {
  161. .name = "vaux33",
  162. .vin_name = "vcc3",
  163. .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
  164. .voltage_table = VAUX33_VSEL_table,
  165. .enable_time_us = 100,
  166. },
  167. {
  168. .name = "vmmc",
  169. .vin_name = "vcc3",
  170. .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
  171. .voltage_table = VMMC_VSEL_table,
  172. .enable_time_us = 100,
  173. },
  174. {
  175. .name = "vbb",
  176. .vin_name = "vcc7",
  177. .n_voltages = ARRAY_SIZE(VBB_VSEL_table),
  178. .voltage_table = VBB_VSEL_table,
  179. },
  180. };
  181. static struct tps_info tps65911_regs[] = {
  182. {
  183. .name = "vrtc",
  184. .vin_name = "vcc7",
  185. .enable_time_us = 2200,
  186. },
  187. {
  188. .name = "vio",
  189. .vin_name = "vccio",
  190. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  191. .voltage_table = VIO_VSEL_table,
  192. .enable_time_us = 350,
  193. },
  194. {
  195. .name = "vdd1",
  196. .vin_name = "vcc1",
  197. .n_voltages = 0x4C,
  198. .enable_time_us = 350,
  199. },
  200. {
  201. .name = "vdd2",
  202. .vin_name = "vcc2",
  203. .n_voltages = 0x4C,
  204. .enable_time_us = 350,
  205. },
  206. {
  207. .name = "vddctrl",
  208. .n_voltages = 0x44,
  209. .enable_time_us = 900,
  210. },
  211. {
  212. .name = "ldo1",
  213. .vin_name = "vcc6",
  214. .n_voltages = 0x33,
  215. .enable_time_us = 420,
  216. },
  217. {
  218. .name = "ldo2",
  219. .vin_name = "vcc6",
  220. .n_voltages = 0x33,
  221. .enable_time_us = 420,
  222. },
  223. {
  224. .name = "ldo3",
  225. .vin_name = "vcc5",
  226. .n_voltages = 0x1A,
  227. .enable_time_us = 230,
  228. },
  229. {
  230. .name = "ldo4",
  231. .vin_name = "vcc5",
  232. .n_voltages = 0x33,
  233. .enable_time_us = 230,
  234. },
  235. {
  236. .name = "ldo5",
  237. .vin_name = "vcc4",
  238. .n_voltages = 0x1A,
  239. .enable_time_us = 230,
  240. },
  241. {
  242. .name = "ldo6",
  243. .vin_name = "vcc3",
  244. .n_voltages = 0x1A,
  245. .enable_time_us = 230,
  246. },
  247. {
  248. .name = "ldo7",
  249. .vin_name = "vcc3",
  250. .n_voltages = 0x1A,
  251. .enable_time_us = 230,
  252. },
  253. {
  254. .name = "ldo8",
  255. .vin_name = "vcc3",
  256. .n_voltages = 0x1A,
  257. .enable_time_us = 230,
  258. },
  259. };
  260. #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
  261. static unsigned int tps65910_ext_sleep_control[] = {
  262. 0,
  263. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  264. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  265. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  266. EXT_CONTROL_REG_BITS(VDD3, 1, 3),
  267. EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
  268. EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
  269. EXT_CONTROL_REG_BITS(VPLL, 0, 6),
  270. EXT_CONTROL_REG_BITS(VDAC, 0, 7),
  271. EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
  272. EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
  273. EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
  274. EXT_CONTROL_REG_BITS(VMMC, 0, 0),
  275. };
  276. static unsigned int tps65911_ext_sleep_control[] = {
  277. 0,
  278. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  279. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  280. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  281. EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
  282. EXT_CONTROL_REG_BITS(LDO1, 0, 1),
  283. EXT_CONTROL_REG_BITS(LDO2, 0, 2),
  284. EXT_CONTROL_REG_BITS(LDO3, 0, 7),
  285. EXT_CONTROL_REG_BITS(LDO4, 0, 6),
  286. EXT_CONTROL_REG_BITS(LDO5, 0, 3),
  287. EXT_CONTROL_REG_BITS(LDO6, 0, 0),
  288. EXT_CONTROL_REG_BITS(LDO7, 0, 5),
  289. EXT_CONTROL_REG_BITS(LDO8, 0, 4),
  290. };
  291. struct tps65910_reg {
  292. struct regulator_desc *desc;
  293. struct tps65910 *mfd;
  294. struct regulator_dev **rdev;
  295. struct tps_info **info;
  296. int num_regulators;
  297. int mode;
  298. int (*get_ctrl_reg)(int);
  299. unsigned int *ext_sleep_control;
  300. unsigned int board_ext_control[TPS65910_NUM_REGS];
  301. };
  302. static int tps65910_get_ctrl_register(int id)
  303. {
  304. switch (id) {
  305. case TPS65910_REG_VRTC:
  306. return TPS65910_VRTC;
  307. case TPS65910_REG_VIO:
  308. return TPS65910_VIO;
  309. case TPS65910_REG_VDD1:
  310. return TPS65910_VDD1;
  311. case TPS65910_REG_VDD2:
  312. return TPS65910_VDD2;
  313. case TPS65910_REG_VDD3:
  314. return TPS65910_VDD3;
  315. case TPS65910_REG_VDIG1:
  316. return TPS65910_VDIG1;
  317. case TPS65910_REG_VDIG2:
  318. return TPS65910_VDIG2;
  319. case TPS65910_REG_VPLL:
  320. return TPS65910_VPLL;
  321. case TPS65910_REG_VDAC:
  322. return TPS65910_VDAC;
  323. case TPS65910_REG_VAUX1:
  324. return TPS65910_VAUX1;
  325. case TPS65910_REG_VAUX2:
  326. return TPS65910_VAUX2;
  327. case TPS65910_REG_VAUX33:
  328. return TPS65910_VAUX33;
  329. case TPS65910_REG_VMMC:
  330. return TPS65910_VMMC;
  331. case TPS65910_REG_VBB:
  332. return TPS65910_BBCH;
  333. default:
  334. return -EINVAL;
  335. }
  336. }
  337. static int tps65911_get_ctrl_register(int id)
  338. {
  339. switch (id) {
  340. case TPS65910_REG_VRTC:
  341. return TPS65910_VRTC;
  342. case TPS65910_REG_VIO:
  343. return TPS65910_VIO;
  344. case TPS65910_REG_VDD1:
  345. return TPS65910_VDD1;
  346. case TPS65910_REG_VDD2:
  347. return TPS65910_VDD2;
  348. case TPS65911_REG_VDDCTRL:
  349. return TPS65911_VDDCTRL;
  350. case TPS65911_REG_LDO1:
  351. return TPS65911_LDO1;
  352. case TPS65911_REG_LDO2:
  353. return TPS65911_LDO2;
  354. case TPS65911_REG_LDO3:
  355. return TPS65911_LDO3;
  356. case TPS65911_REG_LDO4:
  357. return TPS65911_LDO4;
  358. case TPS65911_REG_LDO5:
  359. return TPS65911_LDO5;
  360. case TPS65911_REG_LDO6:
  361. return TPS65911_LDO6;
  362. case TPS65911_REG_LDO7:
  363. return TPS65911_LDO7;
  364. case TPS65911_REG_LDO8:
  365. return TPS65911_LDO8;
  366. default:
  367. return -EINVAL;
  368. }
  369. }
  370. static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
  371. {
  372. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  373. struct tps65910 *mfd = pmic->mfd;
  374. int reg, value, id = rdev_get_id(dev);
  375. reg = pmic->get_ctrl_reg(id);
  376. if (reg < 0)
  377. return reg;
  378. switch (mode) {
  379. case REGULATOR_MODE_NORMAL:
  380. return tps65910_reg_update_bits(pmic->mfd, reg,
  381. LDO_ST_MODE_BIT | LDO_ST_ON_BIT,
  382. LDO_ST_ON_BIT);
  383. case REGULATOR_MODE_IDLE:
  384. value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
  385. return tps65910_reg_set_bits(mfd, reg, value);
  386. case REGULATOR_MODE_STANDBY:
  387. return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
  388. }
  389. return -EINVAL;
  390. }
  391. static unsigned int tps65910_get_mode(struct regulator_dev *dev)
  392. {
  393. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  394. int ret, reg, value, id = rdev_get_id(dev);
  395. reg = pmic->get_ctrl_reg(id);
  396. if (reg < 0)
  397. return reg;
  398. ret = tps65910_reg_read(pmic->mfd, reg, &value);
  399. if (ret < 0)
  400. return ret;
  401. if (!(value & LDO_ST_ON_BIT))
  402. return REGULATOR_MODE_STANDBY;
  403. else if (value & LDO_ST_MODE_BIT)
  404. return REGULATOR_MODE_IDLE;
  405. else
  406. return REGULATOR_MODE_NORMAL;
  407. }
  408. static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
  409. {
  410. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  411. int ret, id = rdev_get_id(dev);
  412. int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
  413. switch (id) {
  414. case TPS65910_REG_VDD1:
  415. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_OP, &opvsel);
  416. if (ret < 0)
  417. return ret;
  418. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1, &mult);
  419. if (ret < 0)
  420. return ret;
  421. mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
  422. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_SR, &srvsel);
  423. if (ret < 0)
  424. return ret;
  425. sr = opvsel & VDD1_OP_CMD_MASK;
  426. opvsel &= VDD1_OP_SEL_MASK;
  427. srvsel &= VDD1_SR_SEL_MASK;
  428. vselmax = 75;
  429. break;
  430. case TPS65910_REG_VDD2:
  431. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_OP, &opvsel);
  432. if (ret < 0)
  433. return ret;
  434. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2, &mult);
  435. if (ret < 0)
  436. return ret;
  437. mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
  438. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_SR, &srvsel);
  439. if (ret < 0)
  440. return ret;
  441. sr = opvsel & VDD2_OP_CMD_MASK;
  442. opvsel &= VDD2_OP_SEL_MASK;
  443. srvsel &= VDD2_SR_SEL_MASK;
  444. vselmax = 75;
  445. break;
  446. case TPS65911_REG_VDDCTRL:
  447. ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_OP,
  448. &opvsel);
  449. if (ret < 0)
  450. return ret;
  451. ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_SR,
  452. &srvsel);
  453. if (ret < 0)
  454. return ret;
  455. sr = opvsel & VDDCTRL_OP_CMD_MASK;
  456. opvsel &= VDDCTRL_OP_SEL_MASK;
  457. srvsel &= VDDCTRL_SR_SEL_MASK;
  458. vselmax = 64;
  459. break;
  460. }
  461. /* multiplier 0 == 1 but 2,3 normal */
  462. if (!mult)
  463. mult = 1;
  464. if (sr) {
  465. /* normalise to valid range */
  466. if (srvsel < 3)
  467. srvsel = 3;
  468. if (srvsel > vselmax)
  469. srvsel = vselmax;
  470. return srvsel - 3;
  471. } else {
  472. /* normalise to valid range*/
  473. if (opvsel < 3)
  474. opvsel = 3;
  475. if (opvsel > vselmax)
  476. opvsel = vselmax;
  477. return opvsel - 3;
  478. }
  479. return -EINVAL;
  480. }
  481. static int tps65910_get_voltage_sel(struct regulator_dev *dev)
  482. {
  483. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  484. int ret, reg, value, id = rdev_get_id(dev);
  485. reg = pmic->get_ctrl_reg(id);
  486. if (reg < 0)
  487. return reg;
  488. ret = tps65910_reg_read(pmic->mfd, reg, &value);
  489. if (ret < 0)
  490. return ret;
  491. switch (id) {
  492. case TPS65910_REG_VIO:
  493. case TPS65910_REG_VDIG1:
  494. case TPS65910_REG_VDIG2:
  495. case TPS65910_REG_VPLL:
  496. case TPS65910_REG_VDAC:
  497. case TPS65910_REG_VAUX1:
  498. case TPS65910_REG_VAUX2:
  499. case TPS65910_REG_VAUX33:
  500. case TPS65910_REG_VMMC:
  501. value &= LDO_SEL_MASK;
  502. value >>= LDO_SEL_SHIFT;
  503. break;
  504. case TPS65910_REG_VBB:
  505. value &= BBCH_BBSEL_MASK;
  506. value >>= BBCH_BBSEL_SHIFT;
  507. break;
  508. default:
  509. return -EINVAL;
  510. }
  511. return value;
  512. }
  513. static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
  514. {
  515. return dev->desc->volt_table[0];
  516. }
  517. static int tps65911_get_voltage_sel(struct regulator_dev *dev)
  518. {
  519. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  520. int ret, id = rdev_get_id(dev);
  521. unsigned int value, reg;
  522. reg = pmic->get_ctrl_reg(id);
  523. ret = tps65910_reg_read(pmic->mfd, reg, &value);
  524. if (ret < 0)
  525. return ret;
  526. switch (id) {
  527. case TPS65911_REG_LDO1:
  528. case TPS65911_REG_LDO2:
  529. case TPS65911_REG_LDO4:
  530. value &= LDO1_SEL_MASK;
  531. value >>= LDO_SEL_SHIFT;
  532. break;
  533. case TPS65911_REG_LDO3:
  534. case TPS65911_REG_LDO5:
  535. case TPS65911_REG_LDO6:
  536. case TPS65911_REG_LDO7:
  537. case TPS65911_REG_LDO8:
  538. value &= LDO3_SEL_MASK;
  539. value >>= LDO_SEL_SHIFT;
  540. break;
  541. case TPS65910_REG_VIO:
  542. value &= LDO_SEL_MASK;
  543. value >>= LDO_SEL_SHIFT;
  544. break;
  545. default:
  546. return -EINVAL;
  547. }
  548. return value;
  549. }
  550. static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
  551. unsigned selector)
  552. {
  553. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  554. int id = rdev_get_id(dev), vsel;
  555. int dcdc_mult = 0;
  556. switch (id) {
  557. case TPS65910_REG_VDD1:
  558. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  559. if (dcdc_mult == 1)
  560. dcdc_mult--;
  561. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  562. tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD1,
  563. VDD1_VGAIN_SEL_MASK,
  564. dcdc_mult << VDD1_VGAIN_SEL_SHIFT);
  565. tps65910_reg_write(pmic->mfd, TPS65910_VDD1_OP, vsel);
  566. break;
  567. case TPS65910_REG_VDD2:
  568. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  569. if (dcdc_mult == 1)
  570. dcdc_mult--;
  571. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  572. tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD2,
  573. VDD1_VGAIN_SEL_MASK,
  574. dcdc_mult << VDD2_VGAIN_SEL_SHIFT);
  575. tps65910_reg_write(pmic->mfd, TPS65910_VDD2_OP, vsel);
  576. break;
  577. case TPS65911_REG_VDDCTRL:
  578. vsel = selector + 3;
  579. tps65910_reg_write(pmic->mfd, TPS65911_VDDCTRL_OP, vsel);
  580. }
  581. return 0;
  582. }
  583. static int tps65910_set_voltage_sel(struct regulator_dev *dev,
  584. unsigned selector)
  585. {
  586. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  587. int reg, id = rdev_get_id(dev);
  588. reg = pmic->get_ctrl_reg(id);
  589. if (reg < 0)
  590. return reg;
  591. switch (id) {
  592. case TPS65910_REG_VIO:
  593. case TPS65910_REG_VDIG1:
  594. case TPS65910_REG_VDIG2:
  595. case TPS65910_REG_VPLL:
  596. case TPS65910_REG_VDAC:
  597. case TPS65910_REG_VAUX1:
  598. case TPS65910_REG_VAUX2:
  599. case TPS65910_REG_VAUX33:
  600. case TPS65910_REG_VMMC:
  601. return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
  602. selector << LDO_SEL_SHIFT);
  603. case TPS65910_REG_VBB:
  604. return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
  605. selector << BBCH_BBSEL_SHIFT);
  606. }
  607. return -EINVAL;
  608. }
  609. static int tps65911_set_voltage_sel(struct regulator_dev *dev,
  610. unsigned selector)
  611. {
  612. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  613. int reg, id = rdev_get_id(dev);
  614. reg = pmic->get_ctrl_reg(id);
  615. if (reg < 0)
  616. return reg;
  617. switch (id) {
  618. case TPS65911_REG_LDO1:
  619. case TPS65911_REG_LDO2:
  620. case TPS65911_REG_LDO4:
  621. return tps65910_reg_update_bits(pmic->mfd, reg, LDO1_SEL_MASK,
  622. selector << LDO_SEL_SHIFT);
  623. case TPS65911_REG_LDO3:
  624. case TPS65911_REG_LDO5:
  625. case TPS65911_REG_LDO6:
  626. case TPS65911_REG_LDO7:
  627. case TPS65911_REG_LDO8:
  628. return tps65910_reg_update_bits(pmic->mfd, reg, LDO3_SEL_MASK,
  629. selector << LDO_SEL_SHIFT);
  630. case TPS65910_REG_VIO:
  631. return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
  632. selector << LDO_SEL_SHIFT);
  633. case TPS65910_REG_VBB:
  634. return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
  635. selector << BBCH_BBSEL_SHIFT);
  636. }
  637. return -EINVAL;
  638. }
  639. static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
  640. unsigned selector)
  641. {
  642. int volt, mult = 1, id = rdev_get_id(dev);
  643. switch (id) {
  644. case TPS65910_REG_VDD1:
  645. case TPS65910_REG_VDD2:
  646. mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  647. volt = VDD1_2_MIN_VOLT +
  648. (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
  649. break;
  650. case TPS65911_REG_VDDCTRL:
  651. volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
  652. break;
  653. default:
  654. BUG();
  655. return -EINVAL;
  656. }
  657. return volt * 100 * mult;
  658. }
  659. static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
  660. {
  661. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  662. int step_mv = 0, id = rdev_get_id(dev);
  663. switch (id) {
  664. case TPS65911_REG_LDO1:
  665. case TPS65911_REG_LDO2:
  666. case TPS65911_REG_LDO4:
  667. /* The first 5 values of the selector correspond to 1V */
  668. if (selector < 5)
  669. selector = 0;
  670. else
  671. selector -= 4;
  672. step_mv = 50;
  673. break;
  674. case TPS65911_REG_LDO3:
  675. case TPS65911_REG_LDO5:
  676. case TPS65911_REG_LDO6:
  677. case TPS65911_REG_LDO7:
  678. case TPS65911_REG_LDO8:
  679. /* The first 3 values of the selector correspond to 1V */
  680. if (selector < 3)
  681. selector = 0;
  682. else
  683. selector -= 2;
  684. step_mv = 100;
  685. break;
  686. case TPS65910_REG_VIO:
  687. return pmic->info[id]->voltage_table[selector];
  688. default:
  689. return -EINVAL;
  690. }
  691. return (LDO_MIN_VOLT + selector * step_mv) * 1000;
  692. }
  693. /* Regulator ops (except VRTC) */
  694. static struct regulator_ops tps65910_ops_dcdc = {
  695. .is_enabled = regulator_is_enabled_regmap,
  696. .enable = regulator_enable_regmap,
  697. .disable = regulator_disable_regmap,
  698. .set_mode = tps65910_set_mode,
  699. .get_mode = tps65910_get_mode,
  700. .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
  701. .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
  702. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  703. .list_voltage = tps65910_list_voltage_dcdc,
  704. .map_voltage = regulator_map_voltage_ascend,
  705. };
  706. static struct regulator_ops tps65910_ops_vdd3 = {
  707. .is_enabled = regulator_is_enabled_regmap,
  708. .enable = regulator_enable_regmap,
  709. .disable = regulator_disable_regmap,
  710. .set_mode = tps65910_set_mode,
  711. .get_mode = tps65910_get_mode,
  712. .get_voltage = tps65910_get_voltage_vdd3,
  713. .list_voltage = regulator_list_voltage_table,
  714. .map_voltage = regulator_map_voltage_ascend,
  715. };
  716. static struct regulator_ops tps65910_ops_vbb = {
  717. .is_enabled = regulator_is_enabled_regmap,
  718. .enable = regulator_enable_regmap,
  719. .disable = regulator_disable_regmap,
  720. .set_mode = tps65910_set_mode,
  721. .get_mode = tps65910_get_mode,
  722. .get_voltage_sel = tps65910_get_voltage_sel,
  723. .set_voltage_sel = tps65910_set_voltage_sel,
  724. .list_voltage = regulator_list_voltage_table,
  725. .map_voltage = regulator_map_voltage_iterate,
  726. };
  727. static struct regulator_ops tps65910_ops = {
  728. .is_enabled = regulator_is_enabled_regmap,
  729. .enable = regulator_enable_regmap,
  730. .disable = regulator_disable_regmap,
  731. .set_mode = tps65910_set_mode,
  732. .get_mode = tps65910_get_mode,
  733. .get_voltage_sel = tps65910_get_voltage_sel,
  734. .set_voltage_sel = tps65910_set_voltage_sel,
  735. .list_voltage = regulator_list_voltage_table,
  736. .map_voltage = regulator_map_voltage_ascend,
  737. };
  738. static struct regulator_ops tps65911_ops = {
  739. .is_enabled = regulator_is_enabled_regmap,
  740. .enable = regulator_enable_regmap,
  741. .disable = regulator_disable_regmap,
  742. .set_mode = tps65910_set_mode,
  743. .get_mode = tps65910_get_mode,
  744. .get_voltage_sel = tps65911_get_voltage_sel,
  745. .set_voltage_sel = tps65911_set_voltage_sel,
  746. .list_voltage = tps65911_list_voltage,
  747. .map_voltage = regulator_map_voltage_ascend,
  748. };
  749. static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
  750. int id, int ext_sleep_config)
  751. {
  752. struct tps65910 *mfd = pmic->mfd;
  753. u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
  754. u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
  755. int ret;
  756. /*
  757. * Regulator can not be control from multiple external input EN1, EN2
  758. * and EN3 together.
  759. */
  760. if (ext_sleep_config & EXT_SLEEP_CONTROL) {
  761. int en_count;
  762. en_count = ((ext_sleep_config &
  763. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
  764. en_count += ((ext_sleep_config &
  765. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
  766. en_count += ((ext_sleep_config &
  767. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
  768. en_count += ((ext_sleep_config &
  769. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
  770. if (en_count > 1) {
  771. dev_err(mfd->dev,
  772. "External sleep control flag is not proper\n");
  773. return -EINVAL;
  774. }
  775. }
  776. pmic->board_ext_control[id] = ext_sleep_config;
  777. /* External EN1 control */
  778. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
  779. ret = tps65910_reg_set_bits(mfd,
  780. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  781. else
  782. ret = tps65910_reg_clear_bits(mfd,
  783. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  784. if (ret < 0) {
  785. dev_err(mfd->dev,
  786. "Error in configuring external control EN1\n");
  787. return ret;
  788. }
  789. /* External EN2 control */
  790. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
  791. ret = tps65910_reg_set_bits(mfd,
  792. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  793. else
  794. ret = tps65910_reg_clear_bits(mfd,
  795. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  796. if (ret < 0) {
  797. dev_err(mfd->dev,
  798. "Error in configuring external control EN2\n");
  799. return ret;
  800. }
  801. /* External EN3 control for TPS65910 LDO only */
  802. if ((tps65910_chip_id(mfd) == TPS65910) &&
  803. (id >= TPS65910_REG_VDIG1)) {
  804. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
  805. ret = tps65910_reg_set_bits(mfd,
  806. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  807. else
  808. ret = tps65910_reg_clear_bits(mfd,
  809. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  810. if (ret < 0) {
  811. dev_err(mfd->dev,
  812. "Error in configuring external control EN3\n");
  813. return ret;
  814. }
  815. }
  816. /* Return if no external control is selected */
  817. if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
  818. /* Clear all sleep controls */
  819. ret = tps65910_reg_clear_bits(mfd,
  820. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  821. if (!ret)
  822. ret = tps65910_reg_clear_bits(mfd,
  823. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  824. if (ret < 0)
  825. dev_err(mfd->dev,
  826. "Error in configuring SLEEP register\n");
  827. return ret;
  828. }
  829. /*
  830. * For regulator that has separate operational and sleep register make
  831. * sure that operational is used and clear sleep register to turn
  832. * regulator off when external control is inactive
  833. */
  834. if ((id == TPS65910_REG_VDD1) ||
  835. (id == TPS65910_REG_VDD2) ||
  836. ((id == TPS65911_REG_VDDCTRL) &&
  837. (tps65910_chip_id(mfd) == TPS65911))) {
  838. int op_reg_add = pmic->get_ctrl_reg(id) + 1;
  839. int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
  840. int opvsel, srvsel;
  841. ret = tps65910_reg_read(pmic->mfd, op_reg_add, &opvsel);
  842. if (ret < 0)
  843. return ret;
  844. ret = tps65910_reg_read(pmic->mfd, sr_reg_add, &srvsel);
  845. if (ret < 0)
  846. return ret;
  847. if (opvsel & VDD1_OP_CMD_MASK) {
  848. u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
  849. ret = tps65910_reg_write(pmic->mfd, op_reg_add,
  850. reg_val);
  851. if (ret < 0) {
  852. dev_err(mfd->dev,
  853. "Error in configuring op register\n");
  854. return ret;
  855. }
  856. }
  857. ret = tps65910_reg_write(pmic->mfd, sr_reg_add, 0);
  858. if (ret < 0) {
  859. dev_err(mfd->dev, "Error in setting sr register\n");
  860. return ret;
  861. }
  862. }
  863. ret = tps65910_reg_clear_bits(mfd,
  864. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  865. if (!ret) {
  866. if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  867. ret = tps65910_reg_set_bits(mfd,
  868. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  869. else
  870. ret = tps65910_reg_clear_bits(mfd,
  871. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  872. }
  873. if (ret < 0)
  874. dev_err(mfd->dev,
  875. "Error in configuring SLEEP register\n");
  876. return ret;
  877. }
  878. #ifdef CONFIG_OF
  879. static struct of_regulator_match tps65910_matches[] = {
  880. { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
  881. { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
  882. { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
  883. { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
  884. { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
  885. { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
  886. { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
  887. { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
  888. { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
  889. { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
  890. { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
  891. { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
  892. { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
  893. { .name = "vbb", .driver_data = (void *) &tps65910_regs[13] },
  894. };
  895. static struct of_regulator_match tps65911_matches[] = {
  896. { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
  897. { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
  898. { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
  899. { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
  900. { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
  901. { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
  902. { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
  903. { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
  904. { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
  905. { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
  906. { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
  907. { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
  908. { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
  909. };
  910. static struct tps65910_board *tps65910_parse_dt_reg_data(
  911. struct platform_device *pdev,
  912. struct of_regulator_match **tps65910_reg_matches)
  913. {
  914. struct tps65910_board *pmic_plat_data;
  915. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  916. struct device_node *np, *regulators;
  917. struct of_regulator_match *matches;
  918. unsigned int prop;
  919. int idx = 0, ret, count;
  920. pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
  921. GFP_KERNEL);
  922. if (!pmic_plat_data)
  923. return NULL;
  924. np = of_node_get(pdev->dev.parent->of_node);
  925. regulators = of_get_child_by_name(np, "regulators");
  926. if (!regulators) {
  927. dev_err(&pdev->dev, "regulator node not found\n");
  928. return NULL;
  929. }
  930. switch (tps65910_chip_id(tps65910)) {
  931. case TPS65910:
  932. count = ARRAY_SIZE(tps65910_matches);
  933. matches = tps65910_matches;
  934. break;
  935. case TPS65911:
  936. count = ARRAY_SIZE(tps65911_matches);
  937. matches = tps65911_matches;
  938. break;
  939. default:
  940. of_node_put(regulators);
  941. dev_err(&pdev->dev, "Invalid tps chip version\n");
  942. return NULL;
  943. }
  944. ret = of_regulator_match(&pdev->dev, regulators, matches, count);
  945. of_node_put(regulators);
  946. if (ret < 0) {
  947. dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
  948. ret);
  949. return NULL;
  950. }
  951. *tps65910_reg_matches = matches;
  952. for (idx = 0; idx < count; idx++) {
  953. if (!matches[idx].init_data || !matches[idx].of_node)
  954. continue;
  955. pmic_plat_data->tps65910_pmic_init_data[idx] =
  956. matches[idx].init_data;
  957. ret = of_property_read_u32(matches[idx].of_node,
  958. "ti,regulator-ext-sleep-control", &prop);
  959. if (!ret)
  960. pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
  961. }
  962. return pmic_plat_data;
  963. }
  964. #else
  965. static inline struct tps65910_board *tps65910_parse_dt_reg_data(
  966. struct platform_device *pdev,
  967. struct of_regulator_match **tps65910_reg_matches)
  968. {
  969. *tps65910_reg_matches = NULL;
  970. return NULL;
  971. }
  972. #endif
  973. static int tps65910_probe(struct platform_device *pdev)
  974. {
  975. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  976. struct regulator_config config = { };
  977. struct tps_info *info;
  978. struct regulator_init_data *reg_data;
  979. struct regulator_dev *rdev;
  980. struct tps65910_reg *pmic;
  981. struct tps65910_board *pmic_plat_data;
  982. struct of_regulator_match *tps65910_reg_matches = NULL;
  983. int i, err;
  984. pmic_plat_data = dev_get_platdata(tps65910->dev);
  985. if (!pmic_plat_data && tps65910->dev->of_node)
  986. pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
  987. &tps65910_reg_matches);
  988. if (!pmic_plat_data) {
  989. dev_err(&pdev->dev, "Platform data not found\n");
  990. return -EINVAL;
  991. }
  992. pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
  993. if (!pmic)
  994. return -ENOMEM;
  995. pmic->mfd = tps65910;
  996. platform_set_drvdata(pdev, pmic);
  997. /* Give control of all register to control port */
  998. tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
  999. DEVCTRL_SR_CTL_I2C_SEL_MASK);
  1000. switch (tps65910_chip_id(tps65910)) {
  1001. case TPS65910:
  1002. pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
  1003. pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
  1004. pmic->ext_sleep_control = tps65910_ext_sleep_control;
  1005. info = tps65910_regs;
  1006. break;
  1007. case TPS65911:
  1008. pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
  1009. pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
  1010. pmic->ext_sleep_control = tps65911_ext_sleep_control;
  1011. info = tps65911_regs;
  1012. break;
  1013. default:
  1014. dev_err(&pdev->dev, "Invalid tps chip version\n");
  1015. return -ENODEV;
  1016. }
  1017. pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1018. sizeof(struct regulator_desc), GFP_KERNEL);
  1019. if (!pmic->desc)
  1020. return -ENOMEM;
  1021. pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1022. sizeof(struct tps_info *), GFP_KERNEL);
  1023. if (!pmic->info)
  1024. return -ENOMEM;
  1025. pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1026. sizeof(struct regulator_dev *), GFP_KERNEL);
  1027. if (!pmic->rdev)
  1028. return -ENOMEM;
  1029. for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
  1030. i++, info++) {
  1031. reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
  1032. /* Regulator API handles empty constraints but not NULL
  1033. * constraints */
  1034. if (!reg_data)
  1035. continue;
  1036. /* Register the regulators */
  1037. pmic->info[i] = info;
  1038. pmic->desc[i].name = info->name;
  1039. pmic->desc[i].supply_name = info->vin_name;
  1040. pmic->desc[i].id = i;
  1041. pmic->desc[i].n_voltages = info->n_voltages;
  1042. pmic->desc[i].enable_time = info->enable_time_us;
  1043. if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
  1044. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1045. pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
  1046. VDD1_2_NUM_VOLT_COARSE;
  1047. pmic->desc[i].ramp_delay = 12500;
  1048. } else if (i == TPS65910_REG_VDD3) {
  1049. if (tps65910_chip_id(tps65910) == TPS65910) {
  1050. pmic->desc[i].ops = &tps65910_ops_vdd3;
  1051. pmic->desc[i].volt_table = info->voltage_table;
  1052. } else {
  1053. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1054. pmic->desc[i].ramp_delay = 5000;
  1055. }
  1056. } else if (i == TPS65910_REG_VBB &&
  1057. tps65910_chip_id(tps65910) == TPS65910) {
  1058. pmic->desc[i].ops = &tps65910_ops_vbb;
  1059. pmic->desc[i].volt_table = info->voltage_table;
  1060. } else {
  1061. if (tps65910_chip_id(tps65910) == TPS65910) {
  1062. pmic->desc[i].ops = &tps65910_ops;
  1063. pmic->desc[i].volt_table = info->voltage_table;
  1064. } else {
  1065. pmic->desc[i].ops = &tps65911_ops;
  1066. }
  1067. }
  1068. err = tps65910_set_ext_sleep_config(pmic, i,
  1069. pmic_plat_data->regulator_ext_sleep_control[i]);
  1070. /*
  1071. * Failing on regulator for configuring externally control
  1072. * is not a serious issue, just throw warning.
  1073. */
  1074. if (err < 0)
  1075. dev_warn(tps65910->dev,
  1076. "Failed to initialise ext control config\n");
  1077. pmic->desc[i].type = REGULATOR_VOLTAGE;
  1078. pmic->desc[i].owner = THIS_MODULE;
  1079. pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
  1080. pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
  1081. config.dev = tps65910->dev;
  1082. config.init_data = reg_data;
  1083. config.driver_data = pmic;
  1084. config.regmap = tps65910->regmap;
  1085. if (tps65910_reg_matches)
  1086. config.of_node = tps65910_reg_matches[i].of_node;
  1087. rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i],
  1088. &config);
  1089. if (IS_ERR(rdev)) {
  1090. dev_err(tps65910->dev,
  1091. "failed to register %s regulator\n",
  1092. pdev->name);
  1093. return PTR_ERR(rdev);
  1094. }
  1095. /* Save regulator for cleanup */
  1096. pmic->rdev[i] = rdev;
  1097. }
  1098. return 0;
  1099. }
  1100. static void tps65910_shutdown(struct platform_device *pdev)
  1101. {
  1102. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1103. int i;
  1104. /*
  1105. * Before bootloader jumps to kernel, it makes sure that required
  1106. * external control signals are in desired state so that given rails
  1107. * can be configure accordingly.
  1108. * If rails are configured to be controlled from external control
  1109. * then before shutting down/rebooting the system, the external
  1110. * control configuration need to be remove from the rails so that
  1111. * its output will be available as per register programming even
  1112. * if external controls are removed. This is require when the POR
  1113. * value of the control signals are not in active state and before
  1114. * bootloader initializes it, the system requires the rail output
  1115. * to be active for booting.
  1116. */
  1117. for (i = 0; i < pmic->num_regulators; i++) {
  1118. int err;
  1119. if (!pmic->rdev[i])
  1120. continue;
  1121. err = tps65910_set_ext_sleep_config(pmic, i, 0);
  1122. if (err < 0)
  1123. dev_err(&pdev->dev,
  1124. "Error in clearing external control\n");
  1125. }
  1126. }
  1127. static struct platform_driver tps65910_driver = {
  1128. .driver = {
  1129. .name = "tps65910-pmic",
  1130. .owner = THIS_MODULE,
  1131. },
  1132. .probe = tps65910_probe,
  1133. .shutdown = tps65910_shutdown,
  1134. };
  1135. static int __init tps65910_init(void)
  1136. {
  1137. return platform_driver_register(&tps65910_driver);
  1138. }
  1139. subsys_initcall(tps65910_init);
  1140. static void __exit tps65910_cleanup(void)
  1141. {
  1142. platform_driver_unregister(&tps65910_driver);
  1143. }
  1144. module_exit(tps65910_cleanup);
  1145. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  1146. MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
  1147. MODULE_LICENSE("GPL v2");
  1148. MODULE_ALIAS("platform:tps65910-pmic");