phy-omap-control.c 8.3 KB

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  1. /*
  2. * omap-control-phy.c - The PHY part of control module.
  3. *
  4. * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * Author: Kishon Vijay Abraham I <kishon@ti.com>
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. */
  18. #include <linux/module.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/slab.h>
  21. #include <linux/of.h>
  22. #include <linux/of_device.h>
  23. #include <linux/err.h>
  24. #include <linux/io.h>
  25. #include <linux/clk.h>
  26. #include <linux/phy/omap_control_phy.h>
  27. /**
  28. * omap_control_phy_power - power on/off the phy using control module reg
  29. * @dev: the control module device
  30. * @on: 0 or 1, based on powering on or off the PHY
  31. */
  32. void omap_control_phy_power(struct device *dev, int on)
  33. {
  34. u32 val;
  35. unsigned long rate;
  36. struct omap_control_phy *control_phy;
  37. if (IS_ERR(dev) || !dev) {
  38. pr_err("%s: invalid device\n", __func__);
  39. return;
  40. }
  41. control_phy = dev_get_drvdata(dev);
  42. if (!control_phy) {
  43. dev_err(dev, "%s: invalid control phy device\n", __func__);
  44. return;
  45. }
  46. if (control_phy->type == OMAP_CTRL_TYPE_OTGHS)
  47. return;
  48. val = readl(control_phy->power);
  49. switch (control_phy->type) {
  50. case OMAP_CTRL_TYPE_USB2:
  51. if (on)
  52. val &= ~OMAP_CTRL_DEV_PHY_PD;
  53. else
  54. val |= OMAP_CTRL_DEV_PHY_PD;
  55. break;
  56. case OMAP_CTRL_TYPE_PIPE3:
  57. rate = clk_get_rate(control_phy->sys_clk);
  58. rate = rate/1000000;
  59. if (on) {
  60. val &= ~(OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK |
  61. OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK);
  62. val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON <<
  63. OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
  64. val |= rate <<
  65. OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT;
  66. } else {
  67. val &= ~OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK;
  68. val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF <<
  69. OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
  70. }
  71. break;
  72. case OMAP_CTRL_TYPE_DRA7USB2:
  73. if (on)
  74. val &= ~OMAP_CTRL_USB2_PHY_PD;
  75. else
  76. val |= OMAP_CTRL_USB2_PHY_PD;
  77. break;
  78. case OMAP_CTRL_TYPE_AM437USB2:
  79. if (on) {
  80. val &= ~(AM437X_CTRL_USB2_PHY_PD |
  81. AM437X_CTRL_USB2_OTG_PD);
  82. val |= (AM437X_CTRL_USB2_OTGVDET_EN |
  83. AM437X_CTRL_USB2_OTGSESSEND_EN);
  84. } else {
  85. val &= ~(AM437X_CTRL_USB2_OTGVDET_EN |
  86. AM437X_CTRL_USB2_OTGSESSEND_EN);
  87. val |= (AM437X_CTRL_USB2_PHY_PD |
  88. AM437X_CTRL_USB2_OTG_PD);
  89. }
  90. break;
  91. default:
  92. dev_err(dev, "%s: type %d not recognized\n",
  93. __func__, control_phy->type);
  94. break;
  95. }
  96. writel(val, control_phy->power);
  97. }
  98. EXPORT_SYMBOL_GPL(omap_control_phy_power);
  99. /**
  100. * omap_control_usb_host_mode - set AVALID, VBUSVALID and ID pin in grounded
  101. * @ctrl_phy: struct omap_control_phy *
  102. *
  103. * Writes to the mailbox register to notify the usb core that a usb
  104. * device has been connected.
  105. */
  106. static void omap_control_usb_host_mode(struct omap_control_phy *ctrl_phy)
  107. {
  108. u32 val;
  109. val = readl(ctrl_phy->otghs_control);
  110. val &= ~(OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_SESSEND);
  111. val |= OMAP_CTRL_DEV_AVALID | OMAP_CTRL_DEV_VBUSVALID;
  112. writel(val, ctrl_phy->otghs_control);
  113. }
  114. /**
  115. * omap_control_usb_device_mode - set AVALID, VBUSVALID and ID pin in high
  116. * impedance
  117. * @ctrl_phy: struct omap_control_phy *
  118. *
  119. * Writes to the mailbox register to notify the usb core that it has been
  120. * connected to a usb host.
  121. */
  122. static void omap_control_usb_device_mode(struct omap_control_phy *ctrl_phy)
  123. {
  124. u32 val;
  125. val = readl(ctrl_phy->otghs_control);
  126. val &= ~OMAP_CTRL_DEV_SESSEND;
  127. val |= OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_AVALID |
  128. OMAP_CTRL_DEV_VBUSVALID;
  129. writel(val, ctrl_phy->otghs_control);
  130. }
  131. /**
  132. * omap_control_usb_set_sessionend - Enable SESSIONEND and IDIG to high
  133. * impedance
  134. * @ctrl_phy: struct omap_control_phy *
  135. *
  136. * Writes to the mailbox register to notify the usb core it's now in
  137. * disconnected state.
  138. */
  139. static void omap_control_usb_set_sessionend(struct omap_control_phy *ctrl_phy)
  140. {
  141. u32 val;
  142. val = readl(ctrl_phy->otghs_control);
  143. val &= ~(OMAP_CTRL_DEV_AVALID | OMAP_CTRL_DEV_VBUSVALID);
  144. val |= OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_SESSEND;
  145. writel(val, ctrl_phy->otghs_control);
  146. }
  147. /**
  148. * omap_control_usb_set_mode - Calls to functions to set USB in one of host mode
  149. * or device mode or to denote disconnected state
  150. * @dev: the control module device
  151. * @mode: The mode to which usb should be configured
  152. *
  153. * This is an API to write to the mailbox register to notify the usb core that
  154. * a usb device has been connected.
  155. */
  156. void omap_control_usb_set_mode(struct device *dev,
  157. enum omap_control_usb_mode mode)
  158. {
  159. struct omap_control_phy *ctrl_phy;
  160. if (IS_ERR(dev) || !dev)
  161. return;
  162. ctrl_phy = dev_get_drvdata(dev);
  163. if (!ctrl_phy) {
  164. dev_err(dev, "Invalid control phy device\n");
  165. return;
  166. }
  167. if (ctrl_phy->type != OMAP_CTRL_TYPE_OTGHS)
  168. return;
  169. switch (mode) {
  170. case USB_MODE_HOST:
  171. omap_control_usb_host_mode(ctrl_phy);
  172. break;
  173. case USB_MODE_DEVICE:
  174. omap_control_usb_device_mode(ctrl_phy);
  175. break;
  176. case USB_MODE_DISCONNECT:
  177. omap_control_usb_set_sessionend(ctrl_phy);
  178. break;
  179. default:
  180. dev_vdbg(dev, "invalid omap control usb mode\n");
  181. }
  182. }
  183. EXPORT_SYMBOL_GPL(omap_control_usb_set_mode);
  184. #ifdef CONFIG_OF
  185. static const enum omap_control_phy_type otghs_data = OMAP_CTRL_TYPE_OTGHS;
  186. static const enum omap_control_phy_type usb2_data = OMAP_CTRL_TYPE_USB2;
  187. static const enum omap_control_phy_type pipe3_data = OMAP_CTRL_TYPE_PIPE3;
  188. static const enum omap_control_phy_type dra7usb2_data = OMAP_CTRL_TYPE_DRA7USB2;
  189. static const enum omap_control_phy_type am437usb2_data = OMAP_CTRL_TYPE_AM437USB2;
  190. static const struct of_device_id omap_control_phy_id_table[] = {
  191. {
  192. .compatible = "ti,control-phy-otghs",
  193. .data = &otghs_data,
  194. },
  195. {
  196. .compatible = "ti,control-phy-usb2",
  197. .data = &usb2_data,
  198. },
  199. {
  200. .compatible = "ti,control-phy-pipe3",
  201. .data = &pipe3_data,
  202. },
  203. {
  204. .compatible = "ti,control-phy-usb2-dra7",
  205. .data = &dra7usb2_data,
  206. },
  207. {
  208. .compatible = "ti,control-phy-usb2-am437",
  209. .data = &am437usb2_data,
  210. },
  211. {},
  212. };
  213. MODULE_DEVICE_TABLE(of, omap_control_phy_id_table);
  214. #endif
  215. static int omap_control_phy_probe(struct platform_device *pdev)
  216. {
  217. struct resource *res;
  218. const struct of_device_id *of_id;
  219. struct omap_control_phy *control_phy;
  220. of_id = of_match_device(of_match_ptr(omap_control_phy_id_table),
  221. &pdev->dev);
  222. if (!of_id)
  223. return -EINVAL;
  224. control_phy = devm_kzalloc(&pdev->dev, sizeof(*control_phy),
  225. GFP_KERNEL);
  226. if (!control_phy) {
  227. dev_err(&pdev->dev, "unable to alloc memory for control phy\n");
  228. return -ENOMEM;
  229. }
  230. control_phy->dev = &pdev->dev;
  231. control_phy->type = *(enum omap_control_phy_type *)of_id->data;
  232. if (control_phy->type == OMAP_CTRL_TYPE_OTGHS) {
  233. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  234. "otghs_control");
  235. control_phy->otghs_control = devm_ioremap_resource(
  236. &pdev->dev, res);
  237. if (IS_ERR(control_phy->otghs_control))
  238. return PTR_ERR(control_phy->otghs_control);
  239. } else {
  240. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  241. "power");
  242. control_phy->power = devm_ioremap_resource(&pdev->dev, res);
  243. if (IS_ERR(control_phy->power)) {
  244. dev_err(&pdev->dev, "Couldn't get power register\n");
  245. return PTR_ERR(control_phy->power);
  246. }
  247. }
  248. if (control_phy->type == OMAP_CTRL_TYPE_PIPE3) {
  249. control_phy->sys_clk = devm_clk_get(control_phy->dev,
  250. "sys_clkin");
  251. if (IS_ERR(control_phy->sys_clk)) {
  252. pr_err("%s: unable to get sys_clkin\n", __func__);
  253. return -EINVAL;
  254. }
  255. }
  256. dev_set_drvdata(control_phy->dev, control_phy);
  257. return 0;
  258. }
  259. static struct platform_driver omap_control_phy_driver = {
  260. .probe = omap_control_phy_probe,
  261. .driver = {
  262. .name = "omap-control-phy",
  263. .owner = THIS_MODULE,
  264. .of_match_table = of_match_ptr(omap_control_phy_id_table),
  265. },
  266. };
  267. static int __init omap_control_phy_init(void)
  268. {
  269. return platform_driver_register(&omap_control_phy_driver);
  270. }
  271. subsys_initcall(omap_control_phy_init);
  272. static void __exit omap_control_phy_exit(void)
  273. {
  274. platform_driver_unregister(&omap_control_phy_driver);
  275. }
  276. module_exit(omap_control_phy_exit);
  277. MODULE_ALIAS("platform: omap_control_phy");
  278. MODULE_AUTHOR("Texas Instruments Inc.");
  279. MODULE_DESCRIPTION("OMAP Control Module PHY Driver");
  280. MODULE_LICENSE("GPL v2");