pci-sysfs.c 39 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/of.h>
  31. #include "pci.h"
  32. static int sysfs_initialized; /* = 0 */
  33. /* show configuration fields */
  34. #define pci_config_attr(field, format_string) \
  35. static ssize_t \
  36. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  37. { \
  38. struct pci_dev *pdev; \
  39. \
  40. pdev = to_pci_dev(dev); \
  41. return sprintf(buf, format_string, pdev->field); \
  42. } \
  43. static DEVICE_ATTR_RO(field)
  44. pci_config_attr(vendor, "0x%04x\n");
  45. pci_config_attr(device, "0x%04x\n");
  46. pci_config_attr(subsystem_vendor, "0x%04x\n");
  47. pci_config_attr(subsystem_device, "0x%04x\n");
  48. pci_config_attr(class, "0x%06x\n");
  49. pci_config_attr(irq, "%u\n");
  50. static ssize_t broken_parity_status_show(struct device *dev,
  51. struct device_attribute *attr,
  52. char *buf)
  53. {
  54. struct pci_dev *pdev = to_pci_dev(dev);
  55. return sprintf(buf, "%u\n", pdev->broken_parity_status);
  56. }
  57. static ssize_t broken_parity_status_store(struct device *dev,
  58. struct device_attribute *attr,
  59. const char *buf, size_t count)
  60. {
  61. struct pci_dev *pdev = to_pci_dev(dev);
  62. unsigned long val;
  63. if (kstrtoul(buf, 0, &val) < 0)
  64. return -EINVAL;
  65. pdev->broken_parity_status = !!val;
  66. return count;
  67. }
  68. static DEVICE_ATTR_RW(broken_parity_status);
  69. static ssize_t pci_dev_show_local_cpu(struct device *dev, int type,
  70. struct device_attribute *attr, char *buf)
  71. {
  72. const struct cpumask *mask;
  73. int len;
  74. #ifdef CONFIG_NUMA
  75. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  76. cpumask_of_node(dev_to_node(dev));
  77. #else
  78. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  79. #endif
  80. len = type ?
  81. cpumask_scnprintf(buf, PAGE_SIZE-2, mask) :
  82. cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  83. buf[len++] = '\n';
  84. buf[len] = '\0';
  85. return len;
  86. }
  87. static ssize_t local_cpus_show(struct device *dev,
  88. struct device_attribute *attr, char *buf)
  89. {
  90. return pci_dev_show_local_cpu(dev, 1, attr, buf);
  91. }
  92. static DEVICE_ATTR_RO(local_cpus);
  93. static ssize_t local_cpulist_show(struct device *dev,
  94. struct device_attribute *attr, char *buf)
  95. {
  96. return pci_dev_show_local_cpu(dev, 0, attr, buf);
  97. }
  98. static DEVICE_ATTR_RO(local_cpulist);
  99. /*
  100. * PCI Bus Class Devices
  101. */
  102. static ssize_t pci_bus_show_cpuaffinity(struct device *dev, int type,
  103. struct device_attribute *attr,
  104. char *buf)
  105. {
  106. int ret;
  107. const struct cpumask *cpumask;
  108. cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  109. ret = type ?
  110. cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
  111. cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
  112. buf[ret++] = '\n';
  113. buf[ret] = '\0';
  114. return ret;
  115. }
  116. static ssize_t cpuaffinity_show(struct device *dev,
  117. struct device_attribute *attr, char *buf)
  118. {
  119. return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
  120. }
  121. static DEVICE_ATTR_RO(cpuaffinity);
  122. static ssize_t cpulistaffinity_show(struct device *dev,
  123. struct device_attribute *attr, char *buf)
  124. {
  125. return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
  126. }
  127. static DEVICE_ATTR_RO(cpulistaffinity);
  128. /* show resources */
  129. static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
  130. char *buf)
  131. {
  132. struct pci_dev *pci_dev = to_pci_dev(dev);
  133. char *str = buf;
  134. int i;
  135. int max;
  136. resource_size_t start, end;
  137. if (pci_dev->subordinate)
  138. max = DEVICE_COUNT_RESOURCE;
  139. else
  140. max = PCI_BRIDGE_RESOURCES;
  141. for (i = 0; i < max; i++) {
  142. struct resource *res = &pci_dev->resource[i];
  143. pci_resource_to_user(pci_dev, i, res, &start, &end);
  144. str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
  145. (unsigned long long)start,
  146. (unsigned long long)end,
  147. (unsigned long long)res->flags);
  148. }
  149. return (str - buf);
  150. }
  151. static DEVICE_ATTR_RO(resource);
  152. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
  153. char *buf)
  154. {
  155. struct pci_dev *pci_dev = to_pci_dev(dev);
  156. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  157. pci_dev->vendor, pci_dev->device,
  158. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  159. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  160. (u8)(pci_dev->class));
  161. }
  162. static DEVICE_ATTR_RO(modalias);
  163. static ssize_t enabled_store(struct device *dev, struct device_attribute *attr,
  164. const char *buf, size_t count)
  165. {
  166. struct pci_dev *pdev = to_pci_dev(dev);
  167. unsigned long val;
  168. ssize_t result = kstrtoul(buf, 0, &val);
  169. if (result < 0)
  170. return result;
  171. /* this can crash the machine when done on the "wrong" device */
  172. if (!capable(CAP_SYS_ADMIN))
  173. return -EPERM;
  174. if (!val) {
  175. if (pci_is_enabled(pdev))
  176. pci_disable_device(pdev);
  177. else
  178. result = -EIO;
  179. } else
  180. result = pci_enable_device(pdev);
  181. return result < 0 ? result : count;
  182. }
  183. static ssize_t enabled_show(struct device *dev, struct device_attribute *attr,
  184. char *buf)
  185. {
  186. struct pci_dev *pdev;
  187. pdev = to_pci_dev(dev);
  188. return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
  189. }
  190. static DEVICE_ATTR_RW(enabled);
  191. #ifdef CONFIG_NUMA
  192. static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
  193. char *buf)
  194. {
  195. return sprintf(buf, "%d\n", dev->numa_node);
  196. }
  197. static DEVICE_ATTR_RO(numa_node);
  198. #endif
  199. static ssize_t dma_mask_bits_show(struct device *dev,
  200. struct device_attribute *attr, char *buf)
  201. {
  202. struct pci_dev *pdev = to_pci_dev(dev);
  203. return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
  204. }
  205. static DEVICE_ATTR_RO(dma_mask_bits);
  206. static ssize_t consistent_dma_mask_bits_show(struct device *dev,
  207. struct device_attribute *attr,
  208. char *buf)
  209. {
  210. return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
  211. }
  212. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  213. static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
  214. char *buf)
  215. {
  216. struct pci_dev *pdev = to_pci_dev(dev);
  217. if (!pdev->subordinate)
  218. return 0;
  219. return sprintf(buf, "%u\n",
  220. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  221. }
  222. static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
  223. const char *buf, size_t count)
  224. {
  225. struct pci_dev *pdev = to_pci_dev(dev);
  226. unsigned long val;
  227. if (kstrtoul(buf, 0, &val) < 0)
  228. return -EINVAL;
  229. /*
  230. * Bad things may happen if the no_msi flag is changed
  231. * while drivers are loaded.
  232. */
  233. if (!capable(CAP_SYS_ADMIN))
  234. return -EPERM;
  235. /*
  236. * Maybe devices without subordinate buses shouldn't have this
  237. * attribute in the first place?
  238. */
  239. if (!pdev->subordinate)
  240. return count;
  241. /* Is the flag going to change, or keep the value it already had? */
  242. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  243. !!val) {
  244. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  245. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI, bad things could happen\n",
  246. val ? "" : " not");
  247. }
  248. return count;
  249. }
  250. static DEVICE_ATTR_RW(msi_bus);
  251. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  252. size_t count)
  253. {
  254. unsigned long val;
  255. struct pci_bus *b = NULL;
  256. if (kstrtoul(buf, 0, &val) < 0)
  257. return -EINVAL;
  258. if (val) {
  259. pci_lock_rescan_remove();
  260. while ((b = pci_find_next_bus(b)) != NULL)
  261. pci_rescan_bus(b);
  262. pci_unlock_rescan_remove();
  263. }
  264. return count;
  265. }
  266. static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
  267. static struct attribute *pci_bus_attrs[] = {
  268. &bus_attr_rescan.attr,
  269. NULL,
  270. };
  271. static const struct attribute_group pci_bus_group = {
  272. .attrs = pci_bus_attrs,
  273. };
  274. const struct attribute_group *pci_bus_groups[] = {
  275. &pci_bus_group,
  276. NULL,
  277. };
  278. static ssize_t dev_rescan_store(struct device *dev,
  279. struct device_attribute *attr, const char *buf,
  280. size_t count)
  281. {
  282. unsigned long val;
  283. struct pci_dev *pdev = to_pci_dev(dev);
  284. if (kstrtoul(buf, 0, &val) < 0)
  285. return -EINVAL;
  286. if (val) {
  287. pci_lock_rescan_remove();
  288. pci_rescan_bus(pdev->bus);
  289. pci_unlock_rescan_remove();
  290. }
  291. return count;
  292. }
  293. static struct device_attribute dev_rescan_attr = __ATTR(rescan,
  294. (S_IWUSR|S_IWGRP),
  295. NULL, dev_rescan_store);
  296. static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
  297. const char *buf, size_t count)
  298. {
  299. unsigned long val;
  300. if (kstrtoul(buf, 0, &val) < 0)
  301. return -EINVAL;
  302. if (val && device_remove_file_self(dev, attr))
  303. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  304. return count;
  305. }
  306. static struct device_attribute dev_remove_attr = __ATTR(remove,
  307. (S_IWUSR|S_IWGRP),
  308. NULL, remove_store);
  309. static ssize_t dev_bus_rescan_store(struct device *dev,
  310. struct device_attribute *attr,
  311. const char *buf, size_t count)
  312. {
  313. unsigned long val;
  314. struct pci_bus *bus = to_pci_bus(dev);
  315. if (kstrtoul(buf, 0, &val) < 0)
  316. return -EINVAL;
  317. if (val) {
  318. pci_lock_rescan_remove();
  319. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  320. pci_rescan_bus_bridge_resize(bus->self);
  321. else
  322. pci_rescan_bus(bus);
  323. pci_unlock_rescan_remove();
  324. }
  325. return count;
  326. }
  327. static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
  328. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  329. static ssize_t d3cold_allowed_store(struct device *dev,
  330. struct device_attribute *attr,
  331. const char *buf, size_t count)
  332. {
  333. struct pci_dev *pdev = to_pci_dev(dev);
  334. unsigned long val;
  335. if (kstrtoul(buf, 0, &val) < 0)
  336. return -EINVAL;
  337. pdev->d3cold_allowed = !!val;
  338. pm_runtime_resume(dev);
  339. return count;
  340. }
  341. static ssize_t d3cold_allowed_show(struct device *dev,
  342. struct device_attribute *attr, char *buf)
  343. {
  344. struct pci_dev *pdev = to_pci_dev(dev);
  345. return sprintf(buf, "%u\n", pdev->d3cold_allowed);
  346. }
  347. static DEVICE_ATTR_RW(d3cold_allowed);
  348. #endif
  349. #ifdef CONFIG_OF
  350. static ssize_t devspec_show(struct device *dev,
  351. struct device_attribute *attr, char *buf)
  352. {
  353. struct pci_dev *pdev = to_pci_dev(dev);
  354. struct device_node *np = pci_device_to_OF_node(pdev);
  355. if (np == NULL || np->full_name == NULL)
  356. return 0;
  357. return sprintf(buf, "%s", np->full_name);
  358. }
  359. static DEVICE_ATTR_RO(devspec);
  360. #endif
  361. #ifdef CONFIG_PCI_IOV
  362. static ssize_t sriov_totalvfs_show(struct device *dev,
  363. struct device_attribute *attr,
  364. char *buf)
  365. {
  366. struct pci_dev *pdev = to_pci_dev(dev);
  367. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  368. }
  369. static ssize_t sriov_numvfs_show(struct device *dev,
  370. struct device_attribute *attr,
  371. char *buf)
  372. {
  373. struct pci_dev *pdev = to_pci_dev(dev);
  374. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  375. }
  376. /*
  377. * num_vfs > 0; number of VFs to enable
  378. * num_vfs = 0; disable all VFs
  379. *
  380. * Note: SRIOV spec doesn't allow partial VF
  381. * disable, so it's all or none.
  382. */
  383. static ssize_t sriov_numvfs_store(struct device *dev,
  384. struct device_attribute *attr,
  385. const char *buf, size_t count)
  386. {
  387. struct pci_dev *pdev = to_pci_dev(dev);
  388. int ret;
  389. u16 num_vfs;
  390. ret = kstrtou16(buf, 0, &num_vfs);
  391. if (ret < 0)
  392. return ret;
  393. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  394. return -ERANGE;
  395. if (num_vfs == pdev->sriov->num_VFs)
  396. return count; /* no change */
  397. /* is PF driver loaded w/callback */
  398. if (!pdev->driver || !pdev->driver->sriov_configure) {
  399. dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
  400. return -ENOSYS;
  401. }
  402. if (num_vfs == 0) {
  403. /* disable VFs */
  404. ret = pdev->driver->sriov_configure(pdev, 0);
  405. if (ret < 0)
  406. return ret;
  407. return count;
  408. }
  409. /* enable VFs */
  410. if (pdev->sriov->num_VFs) {
  411. dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  412. pdev->sriov->num_VFs, num_vfs);
  413. return -EBUSY;
  414. }
  415. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  416. if (ret < 0)
  417. return ret;
  418. if (ret != num_vfs)
  419. dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
  420. num_vfs, ret);
  421. return count;
  422. }
  423. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  424. static struct device_attribute sriov_numvfs_attr =
  425. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  426. sriov_numvfs_show, sriov_numvfs_store);
  427. #endif /* CONFIG_PCI_IOV */
  428. static ssize_t driver_override_store(struct device *dev,
  429. struct device_attribute *attr,
  430. const char *buf, size_t count)
  431. {
  432. struct pci_dev *pdev = to_pci_dev(dev);
  433. char *driver_override, *old = pdev->driver_override, *cp;
  434. if (count > PATH_MAX)
  435. return -EINVAL;
  436. driver_override = kstrndup(buf, count, GFP_KERNEL);
  437. if (!driver_override)
  438. return -ENOMEM;
  439. cp = strchr(driver_override, '\n');
  440. if (cp)
  441. *cp = '\0';
  442. if (strlen(driver_override)) {
  443. pdev->driver_override = driver_override;
  444. } else {
  445. kfree(driver_override);
  446. pdev->driver_override = NULL;
  447. }
  448. kfree(old);
  449. return count;
  450. }
  451. static ssize_t driver_override_show(struct device *dev,
  452. struct device_attribute *attr, char *buf)
  453. {
  454. struct pci_dev *pdev = to_pci_dev(dev);
  455. return sprintf(buf, "%s\n", pdev->driver_override);
  456. }
  457. static DEVICE_ATTR_RW(driver_override);
  458. static struct attribute *pci_dev_attrs[] = {
  459. &dev_attr_resource.attr,
  460. &dev_attr_vendor.attr,
  461. &dev_attr_device.attr,
  462. &dev_attr_subsystem_vendor.attr,
  463. &dev_attr_subsystem_device.attr,
  464. &dev_attr_class.attr,
  465. &dev_attr_irq.attr,
  466. &dev_attr_local_cpus.attr,
  467. &dev_attr_local_cpulist.attr,
  468. &dev_attr_modalias.attr,
  469. #ifdef CONFIG_NUMA
  470. &dev_attr_numa_node.attr,
  471. #endif
  472. &dev_attr_dma_mask_bits.attr,
  473. &dev_attr_consistent_dma_mask_bits.attr,
  474. &dev_attr_enabled.attr,
  475. &dev_attr_broken_parity_status.attr,
  476. &dev_attr_msi_bus.attr,
  477. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  478. &dev_attr_d3cold_allowed.attr,
  479. #endif
  480. #ifdef CONFIG_OF
  481. &dev_attr_devspec.attr,
  482. #endif
  483. &dev_attr_driver_override.attr,
  484. NULL,
  485. };
  486. static const struct attribute_group pci_dev_group = {
  487. .attrs = pci_dev_attrs,
  488. };
  489. const struct attribute_group *pci_dev_groups[] = {
  490. &pci_dev_group,
  491. NULL,
  492. };
  493. static struct attribute *pcibus_attrs[] = {
  494. &dev_attr_rescan.attr,
  495. &dev_attr_cpuaffinity.attr,
  496. &dev_attr_cpulistaffinity.attr,
  497. NULL,
  498. };
  499. static const struct attribute_group pcibus_group = {
  500. .attrs = pcibus_attrs,
  501. };
  502. const struct attribute_group *pcibus_groups[] = {
  503. &pcibus_group,
  504. NULL,
  505. };
  506. static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
  507. char *buf)
  508. {
  509. struct pci_dev *pdev = to_pci_dev(dev);
  510. struct pci_dev *vga_dev = vga_default_device();
  511. if (vga_dev)
  512. return sprintf(buf, "%u\n", (pdev == vga_dev));
  513. return sprintf(buf, "%u\n",
  514. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  515. IORESOURCE_ROM_SHADOW));
  516. }
  517. static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  518. static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
  519. struct bin_attribute *bin_attr, char *buf,
  520. loff_t off, size_t count)
  521. {
  522. struct pci_dev *dev = to_pci_dev(container_of(kobj, struct device,
  523. kobj));
  524. unsigned int size = 64;
  525. loff_t init_off = off;
  526. u8 *data = (u8 *) buf;
  527. /* Several chips lock up trying to read undefined config space */
  528. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0)
  529. size = dev->cfg_size;
  530. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  531. size = 128;
  532. if (off > size)
  533. return 0;
  534. if (off + count > size) {
  535. size -= off;
  536. count = size;
  537. } else {
  538. size = count;
  539. }
  540. pci_config_pm_runtime_get(dev);
  541. if ((off & 1) && size) {
  542. u8 val;
  543. pci_user_read_config_byte(dev, off, &val);
  544. data[off - init_off] = val;
  545. off++;
  546. size--;
  547. }
  548. if ((off & 3) && size > 2) {
  549. u16 val;
  550. pci_user_read_config_word(dev, off, &val);
  551. data[off - init_off] = val & 0xff;
  552. data[off - init_off + 1] = (val >> 8) & 0xff;
  553. off += 2;
  554. size -= 2;
  555. }
  556. while (size > 3) {
  557. u32 val;
  558. pci_user_read_config_dword(dev, off, &val);
  559. data[off - init_off] = val & 0xff;
  560. data[off - init_off + 1] = (val >> 8) & 0xff;
  561. data[off - init_off + 2] = (val >> 16) & 0xff;
  562. data[off - init_off + 3] = (val >> 24) & 0xff;
  563. off += 4;
  564. size -= 4;
  565. }
  566. if (size >= 2) {
  567. u16 val;
  568. pci_user_read_config_word(dev, off, &val);
  569. data[off - init_off] = val & 0xff;
  570. data[off - init_off + 1] = (val >> 8) & 0xff;
  571. off += 2;
  572. size -= 2;
  573. }
  574. if (size > 0) {
  575. u8 val;
  576. pci_user_read_config_byte(dev, off, &val);
  577. data[off - init_off] = val;
  578. off++;
  579. --size;
  580. }
  581. pci_config_pm_runtime_put(dev);
  582. return count;
  583. }
  584. static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
  585. struct bin_attribute *bin_attr, char *buf,
  586. loff_t off, size_t count)
  587. {
  588. struct pci_dev *dev = to_pci_dev(container_of(kobj, struct device,
  589. kobj));
  590. unsigned int size = count;
  591. loff_t init_off = off;
  592. u8 *data = (u8 *) buf;
  593. if (off > dev->cfg_size)
  594. return 0;
  595. if (off + count > dev->cfg_size) {
  596. size = dev->cfg_size - off;
  597. count = size;
  598. }
  599. pci_config_pm_runtime_get(dev);
  600. if ((off & 1) && size) {
  601. pci_user_write_config_byte(dev, off, data[off - init_off]);
  602. off++;
  603. size--;
  604. }
  605. if ((off & 3) && size > 2) {
  606. u16 val = data[off - init_off];
  607. val |= (u16) data[off - init_off + 1] << 8;
  608. pci_user_write_config_word(dev, off, val);
  609. off += 2;
  610. size -= 2;
  611. }
  612. while (size > 3) {
  613. u32 val = data[off - init_off];
  614. val |= (u32) data[off - init_off + 1] << 8;
  615. val |= (u32) data[off - init_off + 2] << 16;
  616. val |= (u32) data[off - init_off + 3] << 24;
  617. pci_user_write_config_dword(dev, off, val);
  618. off += 4;
  619. size -= 4;
  620. }
  621. if (size >= 2) {
  622. u16 val = data[off - init_off];
  623. val |= (u16) data[off - init_off + 1] << 8;
  624. pci_user_write_config_word(dev, off, val);
  625. off += 2;
  626. size -= 2;
  627. }
  628. if (size) {
  629. pci_user_write_config_byte(dev, off, data[off - init_off]);
  630. off++;
  631. --size;
  632. }
  633. pci_config_pm_runtime_put(dev);
  634. return count;
  635. }
  636. static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
  637. struct bin_attribute *bin_attr, char *buf,
  638. loff_t off, size_t count)
  639. {
  640. struct pci_dev *dev =
  641. to_pci_dev(container_of(kobj, struct device, kobj));
  642. if (off > bin_attr->size)
  643. count = 0;
  644. else if (count > bin_attr->size - off)
  645. count = bin_attr->size - off;
  646. return pci_read_vpd(dev, off, count, buf);
  647. }
  648. static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
  649. struct bin_attribute *bin_attr, char *buf,
  650. loff_t off, size_t count)
  651. {
  652. struct pci_dev *dev =
  653. to_pci_dev(container_of(kobj, struct device, kobj));
  654. if (off > bin_attr->size)
  655. count = 0;
  656. else if (count > bin_attr->size - off)
  657. count = bin_attr->size - off;
  658. return pci_write_vpd(dev, off, count, buf);
  659. }
  660. #ifdef HAVE_PCI_LEGACY
  661. /**
  662. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  663. * @filp: open sysfs file
  664. * @kobj: kobject corresponding to file to read from
  665. * @bin_attr: struct bin_attribute for this file
  666. * @buf: buffer to store results
  667. * @off: offset into legacy I/O port space
  668. * @count: number of bytes to read
  669. *
  670. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  671. * callback routine (pci_legacy_read).
  672. */
  673. static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  674. struct bin_attribute *bin_attr, char *buf,
  675. loff_t off, size_t count)
  676. {
  677. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  678. kobj));
  679. /* Only support 1, 2 or 4 byte accesses */
  680. if (count != 1 && count != 2 && count != 4)
  681. return -EINVAL;
  682. return pci_legacy_read(bus, off, (u32 *)buf, count);
  683. }
  684. /**
  685. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  686. * @filp: open sysfs file
  687. * @kobj: kobject corresponding to file to read from
  688. * @bin_attr: struct bin_attribute for this file
  689. * @buf: buffer containing value to be written
  690. * @off: offset into legacy I/O port space
  691. * @count: number of bytes to write
  692. *
  693. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  694. * callback routine (pci_legacy_write).
  695. */
  696. static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  697. struct bin_attribute *bin_attr, char *buf,
  698. loff_t off, size_t count)
  699. {
  700. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  701. kobj));
  702. /* Only support 1, 2 or 4 byte accesses */
  703. if (count != 1 && count != 2 && count != 4)
  704. return -EINVAL;
  705. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  706. }
  707. /**
  708. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  709. * @filp: open sysfs file
  710. * @kobj: kobject corresponding to device to be mapped
  711. * @attr: struct bin_attribute for this file
  712. * @vma: struct vm_area_struct passed to mmap
  713. *
  714. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  715. * legacy memory space (first meg of bus space) into application virtual
  716. * memory space.
  717. */
  718. static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  719. struct bin_attribute *attr,
  720. struct vm_area_struct *vma)
  721. {
  722. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  723. kobj));
  724. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  725. }
  726. /**
  727. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  728. * @filp: open sysfs file
  729. * @kobj: kobject corresponding to device to be mapped
  730. * @attr: struct bin_attribute for this file
  731. * @vma: struct vm_area_struct passed to mmap
  732. *
  733. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  734. * legacy IO space (first meg of bus space) into application virtual
  735. * memory space. Returns -ENOSYS if the operation isn't supported
  736. */
  737. static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  738. struct bin_attribute *attr,
  739. struct vm_area_struct *vma)
  740. {
  741. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  742. kobj));
  743. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  744. }
  745. /**
  746. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  747. * @b: bus to create files under
  748. * @mmap_type: I/O port or memory
  749. *
  750. * Stub implementation. Can be overridden by arch if necessary.
  751. */
  752. void __weak pci_adjust_legacy_attr(struct pci_bus *b,
  753. enum pci_mmap_state mmap_type)
  754. {
  755. }
  756. /**
  757. * pci_create_legacy_files - create legacy I/O port and memory files
  758. * @b: bus to create files under
  759. *
  760. * Some platforms allow access to legacy I/O port and ISA memory space on
  761. * a per-bus basis. This routine creates the files and ties them into
  762. * their associated read, write and mmap files from pci-sysfs.c
  763. *
  764. * On error unwind, but don't propagate the error to the caller
  765. * as it is ok to set up the PCI bus without these files.
  766. */
  767. void pci_create_legacy_files(struct pci_bus *b)
  768. {
  769. int error;
  770. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  771. GFP_ATOMIC);
  772. if (!b->legacy_io)
  773. goto kzalloc_err;
  774. sysfs_bin_attr_init(b->legacy_io);
  775. b->legacy_io->attr.name = "legacy_io";
  776. b->legacy_io->size = 0xffff;
  777. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  778. b->legacy_io->read = pci_read_legacy_io;
  779. b->legacy_io->write = pci_write_legacy_io;
  780. b->legacy_io->mmap = pci_mmap_legacy_io;
  781. pci_adjust_legacy_attr(b, pci_mmap_io);
  782. error = device_create_bin_file(&b->dev, b->legacy_io);
  783. if (error)
  784. goto legacy_io_err;
  785. /* Allocated above after the legacy_io struct */
  786. b->legacy_mem = b->legacy_io + 1;
  787. sysfs_bin_attr_init(b->legacy_mem);
  788. b->legacy_mem->attr.name = "legacy_mem";
  789. b->legacy_mem->size = 1024*1024;
  790. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  791. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  792. pci_adjust_legacy_attr(b, pci_mmap_mem);
  793. error = device_create_bin_file(&b->dev, b->legacy_mem);
  794. if (error)
  795. goto legacy_mem_err;
  796. return;
  797. legacy_mem_err:
  798. device_remove_bin_file(&b->dev, b->legacy_io);
  799. legacy_io_err:
  800. kfree(b->legacy_io);
  801. b->legacy_io = NULL;
  802. kzalloc_err:
  803. printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
  804. return;
  805. }
  806. void pci_remove_legacy_files(struct pci_bus *b)
  807. {
  808. if (b->legacy_io) {
  809. device_remove_bin_file(&b->dev, b->legacy_io);
  810. device_remove_bin_file(&b->dev, b->legacy_mem);
  811. kfree(b->legacy_io); /* both are allocated here */
  812. }
  813. }
  814. #endif /* HAVE_PCI_LEGACY */
  815. #ifdef HAVE_PCI_MMAP
  816. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  817. enum pci_mmap_api mmap_api)
  818. {
  819. unsigned long nr, start, size, pci_start;
  820. if (pci_resource_len(pdev, resno) == 0)
  821. return 0;
  822. nr = vma_pages(vma);
  823. start = vma->vm_pgoff;
  824. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  825. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  826. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  827. if (start >= pci_start && start < pci_start + size &&
  828. start + nr <= pci_start + size)
  829. return 1;
  830. return 0;
  831. }
  832. /**
  833. * pci_mmap_resource - map a PCI resource into user memory space
  834. * @kobj: kobject for mapping
  835. * @attr: struct bin_attribute for the file being mapped
  836. * @vma: struct vm_area_struct passed into the mmap
  837. * @write_combine: 1 for write_combine mapping
  838. *
  839. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  840. */
  841. static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  842. struct vm_area_struct *vma, int write_combine)
  843. {
  844. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  845. struct device, kobj));
  846. struct resource *res = attr->private;
  847. enum pci_mmap_state mmap_type;
  848. resource_size_t start, end;
  849. int i;
  850. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  851. if (res == &pdev->resource[i])
  852. break;
  853. if (i >= PCI_ROM_RESOURCE)
  854. return -ENODEV;
  855. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  856. WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  857. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  858. pci_name(pdev), i,
  859. (u64)pci_resource_start(pdev, i),
  860. (u64)pci_resource_len(pdev, i));
  861. return -EINVAL;
  862. }
  863. /* pci_mmap_page_range() expects the same kind of entry as coming
  864. * from /proc/bus/pci/ which is a "user visible" value. If this is
  865. * different from the resource itself, arch will do necessary fixup.
  866. */
  867. pci_resource_to_user(pdev, i, res, &start, &end);
  868. vma->vm_pgoff += start >> PAGE_SHIFT;
  869. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  870. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  871. return -EINVAL;
  872. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  873. }
  874. static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  875. struct bin_attribute *attr,
  876. struct vm_area_struct *vma)
  877. {
  878. return pci_mmap_resource(kobj, attr, vma, 0);
  879. }
  880. static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  881. struct bin_attribute *attr,
  882. struct vm_area_struct *vma)
  883. {
  884. return pci_mmap_resource(kobj, attr, vma, 1);
  885. }
  886. static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
  887. struct bin_attribute *attr, char *buf,
  888. loff_t off, size_t count, bool write)
  889. {
  890. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  891. struct device, kobj));
  892. struct resource *res = attr->private;
  893. unsigned long port = off;
  894. int i;
  895. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  896. if (res == &pdev->resource[i])
  897. break;
  898. if (i >= PCI_ROM_RESOURCE)
  899. return -ENODEV;
  900. port += pci_resource_start(pdev, i);
  901. if (port > pci_resource_end(pdev, i))
  902. return 0;
  903. if (port + count - 1 > pci_resource_end(pdev, i))
  904. return -EINVAL;
  905. switch (count) {
  906. case 1:
  907. if (write)
  908. outb(*(u8 *)buf, port);
  909. else
  910. *(u8 *)buf = inb(port);
  911. return 1;
  912. case 2:
  913. if (write)
  914. outw(*(u16 *)buf, port);
  915. else
  916. *(u16 *)buf = inw(port);
  917. return 2;
  918. case 4:
  919. if (write)
  920. outl(*(u32 *)buf, port);
  921. else
  922. *(u32 *)buf = inl(port);
  923. return 4;
  924. }
  925. return -EINVAL;
  926. }
  927. static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
  928. struct bin_attribute *attr, char *buf,
  929. loff_t off, size_t count)
  930. {
  931. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  932. }
  933. static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
  934. struct bin_attribute *attr, char *buf,
  935. loff_t off, size_t count)
  936. {
  937. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  938. }
  939. /**
  940. * pci_remove_resource_files - cleanup resource files
  941. * @pdev: dev to cleanup
  942. *
  943. * If we created resource files for @pdev, remove them from sysfs and
  944. * free their resources.
  945. */
  946. static void pci_remove_resource_files(struct pci_dev *pdev)
  947. {
  948. int i;
  949. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  950. struct bin_attribute *res_attr;
  951. res_attr = pdev->res_attr[i];
  952. if (res_attr) {
  953. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  954. kfree(res_attr);
  955. }
  956. res_attr = pdev->res_attr_wc[i];
  957. if (res_attr) {
  958. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  959. kfree(res_attr);
  960. }
  961. }
  962. }
  963. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  964. {
  965. /* allocate attribute structure, piggyback attribute name */
  966. int name_len = write_combine ? 13 : 10;
  967. struct bin_attribute *res_attr;
  968. int retval;
  969. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  970. if (res_attr) {
  971. char *res_attr_name = (char *)(res_attr + 1);
  972. sysfs_bin_attr_init(res_attr);
  973. if (write_combine) {
  974. pdev->res_attr_wc[num] = res_attr;
  975. sprintf(res_attr_name, "resource%d_wc", num);
  976. res_attr->mmap = pci_mmap_resource_wc;
  977. } else {
  978. pdev->res_attr[num] = res_attr;
  979. sprintf(res_attr_name, "resource%d", num);
  980. res_attr->mmap = pci_mmap_resource_uc;
  981. }
  982. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  983. res_attr->read = pci_read_resource_io;
  984. res_attr->write = pci_write_resource_io;
  985. }
  986. res_attr->attr.name = res_attr_name;
  987. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  988. res_attr->size = pci_resource_len(pdev, num);
  989. res_attr->private = &pdev->resource[num];
  990. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  991. } else
  992. retval = -ENOMEM;
  993. return retval;
  994. }
  995. /**
  996. * pci_create_resource_files - create resource files in sysfs for @dev
  997. * @pdev: dev in question
  998. *
  999. * Walk the resources in @pdev creating files for each resource available.
  1000. */
  1001. static int pci_create_resource_files(struct pci_dev *pdev)
  1002. {
  1003. int i;
  1004. int retval;
  1005. /* Expose the PCI resources from this device as files */
  1006. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1007. /* skip empty resources */
  1008. if (!pci_resource_len(pdev, i))
  1009. continue;
  1010. retval = pci_create_attr(pdev, i, 0);
  1011. /* for prefetchable resources, create a WC mappable file */
  1012. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1013. retval = pci_create_attr(pdev, i, 1);
  1014. if (retval) {
  1015. pci_remove_resource_files(pdev);
  1016. return retval;
  1017. }
  1018. }
  1019. return 0;
  1020. }
  1021. #else /* !HAVE_PCI_MMAP */
  1022. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1023. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1024. #endif /* HAVE_PCI_MMAP */
  1025. /**
  1026. * pci_write_rom - used to enable access to the PCI ROM display
  1027. * @filp: sysfs file
  1028. * @kobj: kernel object handle
  1029. * @bin_attr: struct bin_attribute for this file
  1030. * @buf: user input
  1031. * @off: file offset
  1032. * @count: number of byte in input
  1033. *
  1034. * writing anything except 0 enables it
  1035. */
  1036. static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
  1037. struct bin_attribute *bin_attr, char *buf,
  1038. loff_t off, size_t count)
  1039. {
  1040. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1041. if ((off == 0) && (*buf == '0') && (count == 2))
  1042. pdev->rom_attr_enabled = 0;
  1043. else
  1044. pdev->rom_attr_enabled = 1;
  1045. return count;
  1046. }
  1047. /**
  1048. * pci_read_rom - read a PCI ROM
  1049. * @filp: sysfs file
  1050. * @kobj: kernel object handle
  1051. * @bin_attr: struct bin_attribute for this file
  1052. * @buf: where to put the data we read from the ROM
  1053. * @off: file offset
  1054. * @count: number of bytes to read
  1055. *
  1056. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1057. * device corresponding to @kobj.
  1058. */
  1059. static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
  1060. struct bin_attribute *bin_attr, char *buf,
  1061. loff_t off, size_t count)
  1062. {
  1063. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1064. void __iomem *rom;
  1065. size_t size;
  1066. if (!pdev->rom_attr_enabled)
  1067. return -EINVAL;
  1068. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1069. if (!rom || !size)
  1070. return -EIO;
  1071. if (off >= size)
  1072. count = 0;
  1073. else {
  1074. if (off + count > size)
  1075. count = size - off;
  1076. memcpy_fromio(buf, rom + off, count);
  1077. }
  1078. pci_unmap_rom(pdev, rom);
  1079. return count;
  1080. }
  1081. static struct bin_attribute pci_config_attr = {
  1082. .attr = {
  1083. .name = "config",
  1084. .mode = S_IRUGO | S_IWUSR,
  1085. },
  1086. .size = PCI_CFG_SPACE_SIZE,
  1087. .read = pci_read_config,
  1088. .write = pci_write_config,
  1089. };
  1090. static struct bin_attribute pcie_config_attr = {
  1091. .attr = {
  1092. .name = "config",
  1093. .mode = S_IRUGO | S_IWUSR,
  1094. },
  1095. .size = PCI_CFG_SPACE_EXP_SIZE,
  1096. .read = pci_read_config,
  1097. .write = pci_write_config,
  1098. };
  1099. static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
  1100. const char *buf, size_t count)
  1101. {
  1102. struct pci_dev *pdev = to_pci_dev(dev);
  1103. unsigned long val;
  1104. ssize_t result = kstrtoul(buf, 0, &val);
  1105. if (result < 0)
  1106. return result;
  1107. if (val != 1)
  1108. return -EINVAL;
  1109. result = pci_reset_function(pdev);
  1110. if (result < 0)
  1111. return result;
  1112. return count;
  1113. }
  1114. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1115. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1116. {
  1117. int retval;
  1118. struct bin_attribute *attr;
  1119. /* If the device has VPD, try to expose it in sysfs. */
  1120. if (dev->vpd) {
  1121. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1122. if (!attr)
  1123. return -ENOMEM;
  1124. sysfs_bin_attr_init(attr);
  1125. attr->size = dev->vpd->len;
  1126. attr->attr.name = "vpd";
  1127. attr->attr.mode = S_IRUSR | S_IWUSR;
  1128. attr->read = read_vpd_attr;
  1129. attr->write = write_vpd_attr;
  1130. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1131. if (retval) {
  1132. kfree(attr);
  1133. return retval;
  1134. }
  1135. dev->vpd->attr = attr;
  1136. }
  1137. /* Active State Power Management */
  1138. pcie_aspm_create_sysfs_dev_files(dev);
  1139. if (!pci_probe_reset_function(dev)) {
  1140. retval = device_create_file(&dev->dev, &reset_attr);
  1141. if (retval)
  1142. goto error;
  1143. dev->reset_fn = 1;
  1144. }
  1145. return 0;
  1146. error:
  1147. pcie_aspm_remove_sysfs_dev_files(dev);
  1148. if (dev->vpd && dev->vpd->attr) {
  1149. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1150. kfree(dev->vpd->attr);
  1151. }
  1152. return retval;
  1153. }
  1154. int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
  1155. {
  1156. int retval;
  1157. int rom_size = 0;
  1158. struct bin_attribute *attr;
  1159. if (!sysfs_initialized)
  1160. return -EACCES;
  1161. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1162. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1163. else
  1164. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1165. if (retval)
  1166. goto err;
  1167. retval = pci_create_resource_files(pdev);
  1168. if (retval)
  1169. goto err_config_file;
  1170. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1171. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1172. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1173. rom_size = 0x20000;
  1174. /* If the device has a ROM, try to expose it in sysfs. */
  1175. if (rom_size) {
  1176. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1177. if (!attr) {
  1178. retval = -ENOMEM;
  1179. goto err_resource_files;
  1180. }
  1181. sysfs_bin_attr_init(attr);
  1182. attr->size = rom_size;
  1183. attr->attr.name = "rom";
  1184. attr->attr.mode = S_IRUSR | S_IWUSR;
  1185. attr->read = pci_read_rom;
  1186. attr->write = pci_write_rom;
  1187. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1188. if (retval) {
  1189. kfree(attr);
  1190. goto err_resource_files;
  1191. }
  1192. pdev->rom_attr = attr;
  1193. }
  1194. /* add sysfs entries for various capabilities */
  1195. retval = pci_create_capabilities_sysfs(pdev);
  1196. if (retval)
  1197. goto err_rom_file;
  1198. pci_create_firmware_label_files(pdev);
  1199. return 0;
  1200. err_rom_file:
  1201. if (rom_size) {
  1202. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1203. kfree(pdev->rom_attr);
  1204. pdev->rom_attr = NULL;
  1205. }
  1206. err_resource_files:
  1207. pci_remove_resource_files(pdev);
  1208. err_config_file:
  1209. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1210. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1211. else
  1212. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1213. err:
  1214. return retval;
  1215. }
  1216. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1217. {
  1218. if (dev->vpd && dev->vpd->attr) {
  1219. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1220. kfree(dev->vpd->attr);
  1221. }
  1222. pcie_aspm_remove_sysfs_dev_files(dev);
  1223. if (dev->reset_fn) {
  1224. device_remove_file(&dev->dev, &reset_attr);
  1225. dev->reset_fn = 0;
  1226. }
  1227. }
  1228. /**
  1229. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1230. * @pdev: device whose entries we should free
  1231. *
  1232. * Cleanup when @pdev is removed from sysfs.
  1233. */
  1234. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1235. {
  1236. int rom_size = 0;
  1237. if (!sysfs_initialized)
  1238. return;
  1239. pci_remove_capabilities_sysfs(pdev);
  1240. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1241. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1242. else
  1243. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1244. pci_remove_resource_files(pdev);
  1245. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1246. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1247. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1248. rom_size = 0x20000;
  1249. if (rom_size && pdev->rom_attr) {
  1250. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1251. kfree(pdev->rom_attr);
  1252. }
  1253. pci_remove_firmware_label_files(pdev);
  1254. }
  1255. static int __init pci_sysfs_init(void)
  1256. {
  1257. struct pci_dev *pdev = NULL;
  1258. int retval;
  1259. sysfs_initialized = 1;
  1260. for_each_pci_dev(pdev) {
  1261. retval = pci_create_sysfs_dev_files(pdev);
  1262. if (retval) {
  1263. pci_dev_put(pdev);
  1264. return retval;
  1265. }
  1266. }
  1267. return 0;
  1268. }
  1269. late_initcall(pci_sysfs_init);
  1270. static struct attribute *pci_dev_dev_attrs[] = {
  1271. &vga_attr.attr,
  1272. NULL,
  1273. };
  1274. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1275. struct attribute *a, int n)
  1276. {
  1277. struct device *dev = container_of(kobj, struct device, kobj);
  1278. struct pci_dev *pdev = to_pci_dev(dev);
  1279. if (a == &vga_attr.attr)
  1280. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1281. return 0;
  1282. return a->mode;
  1283. }
  1284. static struct attribute *pci_dev_hp_attrs[] = {
  1285. &dev_remove_attr.attr,
  1286. &dev_rescan_attr.attr,
  1287. NULL,
  1288. };
  1289. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1290. struct attribute *a, int n)
  1291. {
  1292. struct device *dev = container_of(kobj, struct device, kobj);
  1293. struct pci_dev *pdev = to_pci_dev(dev);
  1294. if (pdev->is_virtfn)
  1295. return 0;
  1296. return a->mode;
  1297. }
  1298. static struct attribute_group pci_dev_hp_attr_group = {
  1299. .attrs = pci_dev_hp_attrs,
  1300. .is_visible = pci_dev_hp_attrs_are_visible,
  1301. };
  1302. #ifdef CONFIG_PCI_IOV
  1303. static struct attribute *sriov_dev_attrs[] = {
  1304. &sriov_totalvfs_attr.attr,
  1305. &sriov_numvfs_attr.attr,
  1306. NULL,
  1307. };
  1308. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1309. struct attribute *a, int n)
  1310. {
  1311. struct device *dev = container_of(kobj, struct device, kobj);
  1312. if (!dev_is_pf(dev))
  1313. return 0;
  1314. return a->mode;
  1315. }
  1316. static struct attribute_group sriov_dev_attr_group = {
  1317. .attrs = sriov_dev_attrs,
  1318. .is_visible = sriov_attrs_are_visible,
  1319. };
  1320. #endif /* CONFIG_PCI_IOV */
  1321. static struct attribute_group pci_dev_attr_group = {
  1322. .attrs = pci_dev_dev_attrs,
  1323. .is_visible = pci_dev_attrs_are_visible,
  1324. };
  1325. static const struct attribute_group *pci_dev_attr_groups[] = {
  1326. &pci_dev_attr_group,
  1327. &pci_dev_hp_attr_group,
  1328. #ifdef CONFIG_PCI_IOV
  1329. &sriov_dev_attr_group,
  1330. #endif
  1331. NULL,
  1332. };
  1333. struct device_type pci_dev_type = {
  1334. .groups = pci_dev_attr_groups,
  1335. };