pwrseqcmd.c 4.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2014 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #include "pwrseq.h"
  26. /* Description:
  27. * This routine deal with the Power Configuration CMDs
  28. * parsing for RTL8723/RTL8188E Series IC.
  29. * Assumption:
  30. * We should follow specific format which was released from HW SD.
  31. *
  32. * 2011.07.07, added by Roger.
  33. */
  34. bool rtlbe_hal_pwrseqcmdparsing(struct rtl_priv *rtlpriv, u8 cut_version,
  35. u8 fab_version, u8 interface_type,
  36. struct wlan_pwr_cfg pwrcfgcmd[])
  37. {
  38. struct wlan_pwr_cfg pwr_cfg_cmd = {0};
  39. bool b_polling_bit = false;
  40. u32 ary_idx = 0;
  41. u8 value = 0;
  42. u32 offset = 0;
  43. u32 polling_count = 0;
  44. u32 max_polling_cnt = 5000;
  45. do {
  46. pwr_cfg_cmd = pwrcfgcmd[ary_idx];
  47. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  48. "rtlbe_hal_pwrseqcmdparsing(): "
  49. "offset(%#x),cut_msk(%#x), fab_msk(%#x),"
  50. "interface_msk(%#x), base(%#x), "
  51. "cmd(%#x), msk(%#x), value(%#x)\n",
  52. GET_PWR_CFG_OFFSET(pwr_cfg_cmd),
  53. GET_PWR_CFG_CUT_MASK(pwr_cfg_cmd),
  54. GET_PWR_CFG_FAB_MASK(pwr_cfg_cmd),
  55. GET_PWR_CFG_INTF_MASK(pwr_cfg_cmd),
  56. GET_PWR_CFG_BASE(pwr_cfg_cmd),
  57. GET_PWR_CFG_CMD(pwr_cfg_cmd),
  58. GET_PWR_CFG_MASK(pwr_cfg_cmd),
  59. GET_PWR_CFG_VALUE(pwr_cfg_cmd));
  60. if ((GET_PWR_CFG_FAB_MASK(pwr_cfg_cmd)&fab_version) &&
  61. (GET_PWR_CFG_CUT_MASK(pwr_cfg_cmd)&cut_version) &&
  62. (GET_PWR_CFG_INTF_MASK(pwr_cfg_cmd)&interface_type)) {
  63. switch (GET_PWR_CFG_CMD(pwr_cfg_cmd)) {
  64. case PWR_CMD_READ:
  65. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  66. "rtlbe_hal_pwrseqcmdparsing(): "
  67. "PWR_CMD_READ\n");
  68. break;
  69. case PWR_CMD_WRITE:
  70. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  71. "rtlbe_hal_pwrseqcmdparsing(): "
  72. "PWR_CMD_WRITE\n");
  73. offset = GET_PWR_CFG_OFFSET(pwr_cfg_cmd);
  74. /*Read the value from system register*/
  75. value = rtl_read_byte(rtlpriv, offset);
  76. value &= (~(GET_PWR_CFG_MASK(pwr_cfg_cmd)));
  77. value = value | (GET_PWR_CFG_VALUE(pwr_cfg_cmd)
  78. & GET_PWR_CFG_MASK(pwr_cfg_cmd));
  79. /*Write the value back to sytem register*/
  80. rtl_write_byte(rtlpriv, offset, value);
  81. break;
  82. case PWR_CMD_POLLING:
  83. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  84. "rtlbe_hal_pwrseqcmdparsing(): "
  85. "PWR_CMD_POLLING\n");
  86. b_polling_bit = false;
  87. offset = GET_PWR_CFG_OFFSET(pwr_cfg_cmd);
  88. do {
  89. value = rtl_read_byte(rtlpriv, offset);
  90. value &= GET_PWR_CFG_MASK(pwr_cfg_cmd);
  91. if (value ==
  92. (GET_PWR_CFG_VALUE(pwr_cfg_cmd) &
  93. GET_PWR_CFG_MASK(pwr_cfg_cmd)))
  94. b_polling_bit = true;
  95. else
  96. udelay(10);
  97. if (polling_count++ > max_polling_cnt)
  98. return false;
  99. } while (!b_polling_bit);
  100. break;
  101. case PWR_CMD_DELAY:
  102. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  103. "rtlbe_hal_pwrseqcmdparsing(): "
  104. "PWR_CMD_DELAY\n");
  105. if (GET_PWR_CFG_VALUE(pwr_cfg_cmd) ==
  106. PWRSEQ_DELAY_US)
  107. udelay(GET_PWR_CFG_OFFSET(pwr_cfg_cmd));
  108. else
  109. mdelay(GET_PWR_CFG_OFFSET(pwr_cfg_cmd));
  110. break;
  111. case PWR_CMD_END:
  112. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  113. "rtlbe_hal_pwrseqcmdparsing(): "
  114. "PWR_CMD_END\n");
  115. return true;
  116. break;
  117. default:
  118. RT_ASSERT(false,
  119. "rtlbe_hal_pwrseqcmdparsing(): "
  120. "Unknown CMD!!\n");
  121. break;
  122. }
  123. }
  124. ary_idx++;
  125. } while (1);
  126. return true;
  127. }