trx.c 18 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #include "../wifi.h"
  30. #include "../pci.h"
  31. #include "../base.h"
  32. #include "../stats.h"
  33. #include "reg.h"
  34. #include "def.h"
  35. #include "phy.h"
  36. #include "fw.h"
  37. #include "trx.h"
  38. #include "led.h"
  39. static u8 _rtl92se_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 skb_queue)
  40. {
  41. __le16 fc = rtl_get_fc(skb);
  42. if (unlikely(ieee80211_is_beacon(fc)))
  43. return QSLT_BEACON;
  44. if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  45. return QSLT_MGNT;
  46. if (ieee80211_is_nullfunc(fc))
  47. return QSLT_HIGH;
  48. /* Kernel commit 1bf4bbb4024dcdab changed EAPOL packets to use
  49. * queue V0 at priority 7; however, the RTL8192SE appears to have
  50. * that queue at priority 6
  51. */
  52. if (skb->priority == 7)
  53. return QSLT_VO;
  54. return skb->priority;
  55. }
  56. static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw,
  57. struct rtl_stats *pstats, u8 *pdesc,
  58. struct rx_fwinfo *p_drvinfo,
  59. bool packet_match_bssid,
  60. bool packet_toself,
  61. bool packet_beacon)
  62. {
  63. struct rtl_priv *rtlpriv = rtl_priv(hw);
  64. struct phy_sts_cck_8192s_t *cck_buf;
  65. struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
  66. s8 rx_pwr_all = 0, rx_pwr[4];
  67. u8 rf_rx_num = 0, evm, pwdb_all;
  68. u8 i, max_spatial_stream;
  69. u32 rssi, total_rssi = 0;
  70. bool is_cck = pstats->is_cck;
  71. pstats->packet_matchbssid = packet_match_bssid;
  72. pstats->packet_toself = packet_toself;
  73. pstats->packet_beacon = packet_beacon;
  74. pstats->rx_mimo_sig_qual[0] = -1;
  75. pstats->rx_mimo_sig_qual[1] = -1;
  76. if (is_cck) {
  77. u8 report, cck_highpwr;
  78. cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
  79. if (ppsc->rfpwr_state == ERFON)
  80. cck_highpwr = (u8) rtl_get_bbreg(hw,
  81. RFPGA0_XA_HSSIPARAMETER2,
  82. 0x200);
  83. else
  84. cck_highpwr = false;
  85. if (!cck_highpwr) {
  86. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  87. report = cck_buf->cck_agc_rpt & 0xc0;
  88. report = report >> 6;
  89. switch (report) {
  90. case 0x3:
  91. rx_pwr_all = -40 - (cck_agc_rpt & 0x3e);
  92. break;
  93. case 0x2:
  94. rx_pwr_all = -20 - (cck_agc_rpt & 0x3e);
  95. break;
  96. case 0x1:
  97. rx_pwr_all = -2 - (cck_agc_rpt & 0x3e);
  98. break;
  99. case 0x0:
  100. rx_pwr_all = 14 - (cck_agc_rpt & 0x3e);
  101. break;
  102. }
  103. } else {
  104. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  105. report = p_drvinfo->cfosho[0] & 0x60;
  106. report = report >> 5;
  107. switch (report) {
  108. case 0x3:
  109. rx_pwr_all = -40 - ((cck_agc_rpt & 0x1f) << 1);
  110. break;
  111. case 0x2:
  112. rx_pwr_all = -20 - ((cck_agc_rpt & 0x1f) << 1);
  113. break;
  114. case 0x1:
  115. rx_pwr_all = -2 - ((cck_agc_rpt & 0x1f) << 1);
  116. break;
  117. case 0x0:
  118. rx_pwr_all = 14 - ((cck_agc_rpt & 0x1f) << 1);
  119. break;
  120. }
  121. }
  122. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  123. /* CCK gain is smaller than OFDM/MCS gain, */
  124. /* so we add gain diff by experiences, the val is 6 */
  125. pwdb_all += 6;
  126. if (pwdb_all > 100)
  127. pwdb_all = 100;
  128. /* modify the offset to make the same gain index with OFDM. */
  129. if (pwdb_all > 34 && pwdb_all <= 42)
  130. pwdb_all -= 2;
  131. else if (pwdb_all > 26 && pwdb_all <= 34)
  132. pwdb_all -= 6;
  133. else if (pwdb_all > 14 && pwdb_all <= 26)
  134. pwdb_all -= 8;
  135. else if (pwdb_all > 4 && pwdb_all <= 14)
  136. pwdb_all -= 4;
  137. pstats->rx_pwdb_all = pwdb_all;
  138. pstats->recvsignalpower = rx_pwr_all;
  139. if (packet_match_bssid) {
  140. u8 sq;
  141. if (pstats->rx_pwdb_all > 40) {
  142. sq = 100;
  143. } else {
  144. sq = cck_buf->sq_rpt;
  145. if (sq > 64)
  146. sq = 0;
  147. else if (sq < 20)
  148. sq = 100;
  149. else
  150. sq = ((64 - sq) * 100) / 44;
  151. }
  152. pstats->signalquality = sq;
  153. pstats->rx_mimo_sig_qual[0] = sq;
  154. pstats->rx_mimo_sig_qual[1] = -1;
  155. }
  156. } else {
  157. rtlpriv->dm.rfpath_rxenable[0] =
  158. rtlpriv->dm.rfpath_rxenable[1] = true;
  159. for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
  160. if (rtlpriv->dm.rfpath_rxenable[i])
  161. rf_rx_num++;
  162. rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
  163. 0x3f) * 2) - 110;
  164. rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
  165. total_rssi += rssi;
  166. rtlpriv->stats.rx_snr_db[i] =
  167. (long)(p_drvinfo->rxsnr[i] / 2);
  168. if (packet_match_bssid)
  169. pstats->rx_mimo_signalstrength[i] = (u8) rssi;
  170. }
  171. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  172. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  173. pstats->rx_pwdb_all = pwdb_all;
  174. pstats->rxpower = rx_pwr_all;
  175. pstats->recvsignalpower = rx_pwr_all;
  176. if (pstats->is_ht && pstats->rate >= DESC92_RATEMCS8 &&
  177. pstats->rate <= DESC92_RATEMCS15)
  178. max_spatial_stream = 2;
  179. else
  180. max_spatial_stream = 1;
  181. for (i = 0; i < max_spatial_stream; i++) {
  182. evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  183. if (packet_match_bssid) {
  184. if (i == 0)
  185. pstats->signalquality = (u8)(evm &
  186. 0xff);
  187. pstats->rx_mimo_sig_qual[i] = (u8) (evm & 0xff);
  188. }
  189. }
  190. }
  191. if (is_cck)
  192. pstats->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
  193. pwdb_all));
  194. else if (rf_rx_num != 0)
  195. pstats->signalstrength = (u8) (rtl_signal_scale_mapping(hw,
  196. total_rssi /= rf_rx_num));
  197. }
  198. static void _rtl92se_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  199. struct sk_buff *skb, struct rtl_stats *pstats,
  200. u8 *pdesc, struct rx_fwinfo *p_drvinfo)
  201. {
  202. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  203. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  204. struct ieee80211_hdr *hdr;
  205. u8 *tmp_buf;
  206. u8 *praddr;
  207. __le16 fc;
  208. u16 type, cfc;
  209. bool packet_matchbssid, packet_toself, packet_beacon = false;
  210. tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
  211. hdr = (struct ieee80211_hdr *)tmp_buf;
  212. fc = hdr->frame_control;
  213. cfc = le16_to_cpu(fc);
  214. type = WLAN_FC_GET_TYPE(fc);
  215. praddr = hdr->addr1;
  216. packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
  217. ether_addr_equal(mac->bssid,
  218. (cfc & IEEE80211_FCTL_TODS) ? hdr->addr1 :
  219. (cfc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 :
  220. hdr->addr3) &&
  221. (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
  222. packet_toself = packet_matchbssid &&
  223. ether_addr_equal(praddr, rtlefuse->dev_addr);
  224. if (ieee80211_is_beacon(fc))
  225. packet_beacon = true;
  226. _rtl92se_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
  227. packet_matchbssid, packet_toself, packet_beacon);
  228. rtl_process_phyinfo(hw, tmp_buf, pstats);
  229. }
  230. bool rtl92se_rx_query_desc(struct ieee80211_hw *hw, struct rtl_stats *stats,
  231. struct ieee80211_rx_status *rx_status, u8 *pdesc,
  232. struct sk_buff *skb)
  233. {
  234. struct rx_fwinfo *p_drvinfo;
  235. u32 phystatus = (u32)GET_RX_STATUS_DESC_PHY_STATUS(pdesc);
  236. struct ieee80211_hdr *hdr;
  237. bool first_ampdu = false;
  238. stats->length = (u16)GET_RX_STATUS_DESC_PKT_LEN(pdesc);
  239. stats->rx_drvinfo_size = (u8)GET_RX_STATUS_DESC_DRVINFO_SIZE(pdesc) * 8;
  240. stats->rx_bufshift = (u8)(GET_RX_STATUS_DESC_SHIFT(pdesc) & 0x03);
  241. stats->icv = (u16)GET_RX_STATUS_DESC_ICV(pdesc);
  242. stats->crc = (u16)GET_RX_STATUS_DESC_CRC32(pdesc);
  243. stats->hwerror = (u16)(stats->crc | stats->icv);
  244. stats->decrypted = !GET_RX_STATUS_DESC_SWDEC(pdesc);
  245. stats->rate = (u8)GET_RX_STATUS_DESC_RX_MCS(pdesc);
  246. stats->shortpreamble = (u16)GET_RX_STATUS_DESC_SPLCP(pdesc);
  247. stats->isampdu = (bool)(GET_RX_STATUS_DESC_PAGGR(pdesc) == 1);
  248. stats->isfirst_ampdu = (bool) ((GET_RX_STATUS_DESC_PAGGR(pdesc) == 1)
  249. && (GET_RX_STATUS_DESC_FAGGR(pdesc) == 1));
  250. stats->timestamp_low = GET_RX_STATUS_DESC_TSFL(pdesc);
  251. stats->rx_is40Mhzpacket = (bool)GET_RX_STATUS_DESC_BW(pdesc);
  252. stats->is_ht = (bool)GET_RX_STATUS_DESC_RX_HT(pdesc);
  253. stats->is_cck = SE_RX_HAL_IS_CCK_RATE(pdesc);
  254. if (stats->hwerror)
  255. return false;
  256. rx_status->freq = hw->conf.chandef.chan->center_freq;
  257. rx_status->band = hw->conf.chandef.chan->band;
  258. if (stats->crc)
  259. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  260. if (stats->rx_is40Mhzpacket)
  261. rx_status->flag |= RX_FLAG_40MHZ;
  262. if (stats->is_ht)
  263. rx_status->flag |= RX_FLAG_HT;
  264. rx_status->flag |= RX_FLAG_MACTIME_START;
  265. /* hw will set stats->decrypted true, if it finds the
  266. * frame is open data frame or mgmt frame,
  267. * hw will not decrypt robust managment frame
  268. * for IEEE80211w but still set stats->decrypted
  269. * true, so here we should set it back to undecrypted
  270. * for IEEE80211w frame, and mac80211 sw will help
  271. * to decrypt it */
  272. if (stats->decrypted) {
  273. hdr = (struct ieee80211_hdr *)(skb->data +
  274. stats->rx_drvinfo_size + stats->rx_bufshift);
  275. if (!hdr) {
  276. /* during testing, hdr was NULL here */
  277. return false;
  278. }
  279. if ((_ieee80211_is_robust_mgmt_frame(hdr)) &&
  280. (ieee80211_has_protected(hdr->frame_control)))
  281. rx_status->flag &= ~RX_FLAG_DECRYPTED;
  282. else
  283. rx_status->flag |= RX_FLAG_DECRYPTED;
  284. }
  285. rx_status->rate_idx = rtlwifi_rate_mapping(hw,
  286. stats->is_ht, stats->rate, first_ampdu);
  287. rx_status->mactime = stats->timestamp_low;
  288. if (phystatus) {
  289. p_drvinfo = (struct rx_fwinfo *)(skb->data +
  290. stats->rx_bufshift);
  291. _rtl92se_translate_rx_signal_stuff(hw, skb, stats, pdesc,
  292. p_drvinfo);
  293. }
  294. /*rx_status->qual = stats->signal; */
  295. rx_status->signal = stats->recvsignalpower + 10;
  296. return true;
  297. }
  298. void rtl92se_tx_fill_desc(struct ieee80211_hw *hw,
  299. struct ieee80211_hdr *hdr, u8 *pdesc_tx,
  300. u8 *pbd_desc_tx, struct ieee80211_tx_info *info,
  301. struct ieee80211_sta *sta,
  302. struct sk_buff *skb,
  303. u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
  304. {
  305. struct rtl_priv *rtlpriv = rtl_priv(hw);
  306. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  307. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  308. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  309. u8 *pdesc = pdesc_tx;
  310. u16 seq_number;
  311. __le16 fc = hdr->frame_control;
  312. u8 reserved_macid = 0;
  313. u8 fw_qsel = _rtl92se_map_hwqueue_to_fwqueue(skb, hw_queue);
  314. bool firstseg = (!(hdr->seq_ctrl & cpu_to_le16(IEEE80211_SCTL_FRAG)));
  315. bool lastseg = (!(hdr->frame_control &
  316. cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)));
  317. dma_addr_t mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
  318. PCI_DMA_TODEVICE);
  319. u8 bw_40 = 0;
  320. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  321. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  322. "DMA mapping error");
  323. return;
  324. }
  325. if (mac->opmode == NL80211_IFTYPE_STATION) {
  326. bw_40 = mac->bw_40;
  327. } else if (mac->opmode == NL80211_IFTYPE_AP ||
  328. mac->opmode == NL80211_IFTYPE_ADHOC) {
  329. if (sta)
  330. bw_40 = sta->bandwidth >= IEEE80211_STA_RX_BW_40;
  331. }
  332. seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  333. rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
  334. CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE_RTL8192S);
  335. if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
  336. firstseg = true;
  337. lastseg = true;
  338. }
  339. if (firstseg) {
  340. if (rtlpriv->dm.useramask) {
  341. /* set txdesc macId */
  342. if (ptcb_desc->mac_id < 32) {
  343. SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
  344. reserved_macid |= ptcb_desc->mac_id;
  345. }
  346. }
  347. SET_TX_DESC_RSVD_MACID(pdesc, reserved_macid);
  348. SET_TX_DESC_TXHT(pdesc, ((ptcb_desc->hw_rate >=
  349. DESC92_RATEMCS0) ? 1 : 0));
  350. if (rtlhal->version == VERSION_8192S_ACUT) {
  351. if (ptcb_desc->hw_rate == DESC92_RATE1M ||
  352. ptcb_desc->hw_rate == DESC92_RATE2M ||
  353. ptcb_desc->hw_rate == DESC92_RATE5_5M ||
  354. ptcb_desc->hw_rate == DESC92_RATE11M) {
  355. ptcb_desc->hw_rate = DESC92_RATE12M;
  356. }
  357. }
  358. SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
  359. if (ptcb_desc->use_shortgi || ptcb_desc->use_shortpreamble)
  360. SET_TX_DESC_TX_SHORT(pdesc, 0);
  361. /* Aggregation related */
  362. if (info->flags & IEEE80211_TX_CTL_AMPDU)
  363. SET_TX_DESC_AGG_ENABLE(pdesc, 1);
  364. /* For AMPDU, we must insert SSN into TX_DESC */
  365. SET_TX_DESC_SEQ(pdesc, seq_number);
  366. /* Protection mode related */
  367. /* For 92S, if RTS/CTS are set, HW will execute RTS. */
  368. /* We choose only one protection mode to execute */
  369. SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
  370. !ptcb_desc->cts_enable) ? 1 : 0));
  371. SET_TX_DESC_CTS_ENABLE(pdesc, ((ptcb_desc->cts_enable) ?
  372. 1 : 0));
  373. SET_TX_DESC_RTS_STBC(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0));
  374. SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
  375. SET_TX_DESC_RTS_BANDWIDTH(pdesc, 0);
  376. SET_TX_DESC_RTS_SUB_CARRIER(pdesc, ptcb_desc->rts_sc);
  377. SET_TX_DESC_RTS_SHORT(pdesc, ((ptcb_desc->rts_rate <=
  378. DESC92_RATE54M) ?
  379. (ptcb_desc->rts_use_shortpreamble ? 1 : 0)
  380. : (ptcb_desc->rts_use_shortgi ? 1 : 0)));
  381. /* Set Bandwidth and sub-channel settings. */
  382. if (bw_40) {
  383. if (ptcb_desc->packet_bw) {
  384. SET_TX_DESC_TX_BANDWIDTH(pdesc, 1);
  385. /* use duplicated mode */
  386. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
  387. } else {
  388. SET_TX_DESC_TX_BANDWIDTH(pdesc, 0);
  389. SET_TX_DESC_TX_SUB_CARRIER(pdesc,
  390. mac->cur_40_prime_sc);
  391. }
  392. } else {
  393. SET_TX_DESC_TX_BANDWIDTH(pdesc, 0);
  394. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
  395. }
  396. /* 3 Fill necessary field in First Descriptor */
  397. /*DWORD 0*/
  398. SET_TX_DESC_LINIP(pdesc, 0);
  399. SET_TX_DESC_OFFSET(pdesc, 32);
  400. SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb->len);
  401. /*DWORD 1*/
  402. SET_TX_DESC_RA_BRSR_ID(pdesc, ptcb_desc->ratr_index);
  403. /* Fill security related */
  404. if (info->control.hw_key) {
  405. struct ieee80211_key_conf *keyconf;
  406. keyconf = info->control.hw_key;
  407. switch (keyconf->cipher) {
  408. case WLAN_CIPHER_SUITE_WEP40:
  409. case WLAN_CIPHER_SUITE_WEP104:
  410. SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
  411. break;
  412. case WLAN_CIPHER_SUITE_TKIP:
  413. SET_TX_DESC_SEC_TYPE(pdesc, 0x2);
  414. break;
  415. case WLAN_CIPHER_SUITE_CCMP:
  416. SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
  417. break;
  418. default:
  419. SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
  420. break;
  421. }
  422. }
  423. /* Set Packet ID */
  424. SET_TX_DESC_PACKET_ID(pdesc, 0);
  425. /* We will assign magement queue to BK. */
  426. SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
  427. /* Alwasy enable all rate fallback range */
  428. SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
  429. /* Fix: I don't kown why hw use 6.5M to tx when set it */
  430. SET_TX_DESC_USER_RATE(pdesc,
  431. ptcb_desc->use_driver_rate ? 1 : 0);
  432. /* Set NON_QOS bit. */
  433. if (!ieee80211_is_data_qos(fc))
  434. SET_TX_DESC_NON_QOS(pdesc, 1);
  435. }
  436. /* Fill fields that are required to be initialized
  437. * in all of the descriptors */
  438. /*DWORD 0 */
  439. SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
  440. SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
  441. /* DWORD 7 */
  442. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) skb->len);
  443. /* DOWRD 8 */
  444. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  445. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
  446. }
  447. void rtl92se_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
  448. bool firstseg, bool lastseg, struct sk_buff *skb)
  449. {
  450. struct rtl_priv *rtlpriv = rtl_priv(hw);
  451. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  452. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  453. struct rtl_tcb_desc *tcb_desc = (struct rtl_tcb_desc *)(skb->cb);
  454. dma_addr_t mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
  455. PCI_DMA_TODEVICE);
  456. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  457. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  458. "DMA mapping error");
  459. return;
  460. }
  461. /* Clear all status */
  462. CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_CMDDESC_SIZE_RTL8192S);
  463. /* This bit indicate this packet is used for FW download. */
  464. if (tcb_desc->cmd_or_init == DESC_PACKET_TYPE_INIT) {
  465. /* For firmware downlaod we only need to set LINIP */
  466. SET_TX_DESC_LINIP(pdesc, tcb_desc->last_inipkt);
  467. /* 92SE must set as 1 for firmware download HW DMA error */
  468. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  469. SET_TX_DESC_LAST_SEG(pdesc, 1);
  470. /* 92SE need not to set TX packet size when firmware download */
  471. SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len));
  472. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
  473. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  474. wmb();
  475. SET_TX_DESC_OWN(pdesc, 1);
  476. } else { /* H2C Command Desc format (Host TXCMD) */
  477. /* 92SE must set as 1 for firmware download HW DMA error */
  478. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  479. SET_TX_DESC_LAST_SEG(pdesc, 1);
  480. SET_TX_DESC_OFFSET(pdesc, 0x20);
  481. /* Buffer size + command header */
  482. SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len));
  483. /* Fixed queue of H2C command */
  484. SET_TX_DESC_QUEUE_SEL(pdesc, 0x13);
  485. SET_BITS_TO_LE_4BYTE(skb->data, 24, 7, rtlhal->h2c_txcmd_seq);
  486. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
  487. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  488. wmb();
  489. SET_TX_DESC_OWN(pdesc, 1);
  490. }
  491. }
  492. void rtl92se_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
  493. u8 desc_name, u8 *val)
  494. {
  495. if (istx) {
  496. switch (desc_name) {
  497. case HW_DESC_OWN:
  498. wmb();
  499. SET_TX_DESC_OWN(pdesc, 1);
  500. break;
  501. case HW_DESC_TX_NEXTDESC_ADDR:
  502. SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
  503. break;
  504. default:
  505. RT_ASSERT(false, "ERR txdesc :%d not process\n",
  506. desc_name);
  507. break;
  508. }
  509. } else {
  510. switch (desc_name) {
  511. case HW_DESC_RXOWN:
  512. wmb();
  513. SET_RX_STATUS_DESC_OWN(pdesc, 1);
  514. break;
  515. case HW_DESC_RXBUFF_ADDR:
  516. SET_RX_STATUS__DESC_BUFF_ADDR(pdesc, *(u32 *) val);
  517. break;
  518. case HW_DESC_RXPKT_LEN:
  519. SET_RX_STATUS_DESC_PKT_LEN(pdesc, *(u32 *) val);
  520. break;
  521. case HW_DESC_RXERO:
  522. SET_RX_STATUS_DESC_EOR(pdesc, 1);
  523. break;
  524. default:
  525. RT_ASSERT(false, "ERR rxdesc :%d not process\n",
  526. desc_name);
  527. break;
  528. }
  529. }
  530. }
  531. u32 rtl92se_get_desc(u8 *desc, bool istx, u8 desc_name)
  532. {
  533. u32 ret = 0;
  534. if (istx) {
  535. switch (desc_name) {
  536. case HW_DESC_OWN:
  537. ret = GET_TX_DESC_OWN(desc);
  538. break;
  539. case HW_DESC_TXBUFF_ADDR:
  540. ret = GET_TX_DESC_TX_BUFFER_ADDRESS(desc);
  541. break;
  542. default:
  543. RT_ASSERT(false, "ERR txdesc :%d not process\n",
  544. desc_name);
  545. break;
  546. }
  547. } else {
  548. switch (desc_name) {
  549. case HW_DESC_OWN:
  550. ret = GET_RX_STATUS_DESC_OWN(desc);
  551. break;
  552. case HW_DESC_RXPKT_LEN:
  553. ret = GET_RX_STATUS_DESC_PKT_LEN(desc);
  554. break;
  555. default:
  556. RT_ASSERT(false, "ERR rxdesc :%d not process\n",
  557. desc_name);
  558. break;
  559. }
  560. }
  561. return ret;
  562. }
  563. void rtl92se_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
  564. {
  565. struct rtl_priv *rtlpriv = rtl_priv(hw);
  566. rtl_write_word(rtlpriv, TP_POLL, BIT(0) << (hw_queue));
  567. }