rsi_91x_sdio_ops.c 14 KB

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  1. /**
  2. * Copyright (c) 2014 Redpine Signals Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. *
  16. */
  17. #include <linux/firmware.h>
  18. #include "rsi_sdio.h"
  19. #include "rsi_common.h"
  20. /**
  21. * rsi_sdio_master_access_msword() - This function sets the AHB master access
  22. * MS word in the SDIO slave registers.
  23. * @adapter: Pointer to the adapter structure.
  24. * @ms_word: ms word need to be initialized.
  25. *
  26. * Return: status: 0 on success, -1 on failure.
  27. */
  28. static int rsi_sdio_master_access_msword(struct rsi_hw *adapter,
  29. u16 ms_word)
  30. {
  31. u8 byte;
  32. u8 function = 0;
  33. int status = 0;
  34. byte = (u8)(ms_word & 0x00FF);
  35. rsi_dbg(INIT_ZONE,
  36. "%s: MASTER_ACCESS_MSBYTE:0x%x\n", __func__, byte);
  37. status = rsi_sdio_write_register(adapter,
  38. function,
  39. SDIO_MASTER_ACCESS_MSBYTE,
  40. &byte);
  41. if (status) {
  42. rsi_dbg(ERR_ZONE,
  43. "%s: fail to access MASTER_ACCESS_MSBYTE\n",
  44. __func__);
  45. return -1;
  46. }
  47. byte = (u8)(ms_word >> 8);
  48. rsi_dbg(INIT_ZONE, "%s:MASTER_ACCESS_LSBYTE:0x%x\n", __func__, byte);
  49. status = rsi_sdio_write_register(adapter,
  50. function,
  51. SDIO_MASTER_ACCESS_LSBYTE,
  52. &byte);
  53. return status;
  54. }
  55. /**
  56. * rsi_copy_to_card() - This function includes the actual funtionality of
  57. * copying the TA firmware to the card.Basically this
  58. * function includes opening the TA file,reading the
  59. * TA file and writing their values in blocks of data.
  60. * @common: Pointer to the driver private structure.
  61. * @fw: Pointer to the firmware value to be written.
  62. * @len: length of firmware file.
  63. * @num_blocks: Number of blocks to be written to the card.
  64. *
  65. * Return: 0 on success and -1 on failure.
  66. */
  67. static int rsi_copy_to_card(struct rsi_common *common,
  68. const u8 *fw,
  69. u32 len,
  70. u32 num_blocks)
  71. {
  72. struct rsi_hw *adapter = common->priv;
  73. struct rsi_91x_sdiodev *dev =
  74. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  75. u32 indx, ii;
  76. u32 block_size = dev->tx_blk_size;
  77. u32 lsb_address;
  78. __le32 data[] = { TA_HOLD_THREAD_VALUE, TA_SOFT_RST_CLR,
  79. TA_PC_ZERO, TA_RELEASE_THREAD_VALUE };
  80. u32 address[] = { TA_HOLD_THREAD_REG, TA_SOFT_RESET_REG,
  81. TA_TH0_PC_REG, TA_RELEASE_THREAD_REG };
  82. u32 base_address;
  83. u16 msb_address;
  84. base_address = TA_LOAD_ADDRESS;
  85. msb_address = base_address >> 16;
  86. for (indx = 0, ii = 0; ii < num_blocks; ii++, indx += block_size) {
  87. lsb_address = ((u16) base_address | RSI_SD_REQUEST_MASTER);
  88. if (rsi_sdio_write_register_multiple(adapter,
  89. lsb_address,
  90. (u8 *)(fw + indx),
  91. block_size)) {
  92. rsi_dbg(ERR_ZONE,
  93. "%s: Unable to load %s blk\n", __func__,
  94. FIRMWARE_RSI9113);
  95. return -1;
  96. }
  97. rsi_dbg(INIT_ZONE, "%s: loading block: %d\n", __func__, ii);
  98. base_address += block_size;
  99. if ((base_address >> 16) != msb_address) {
  100. msb_address += 1;
  101. if (rsi_sdio_master_access_msword(adapter,
  102. msb_address)) {
  103. rsi_dbg(ERR_ZONE,
  104. "%s: Unable to set ms word reg\n",
  105. __func__);
  106. return -1;
  107. }
  108. }
  109. }
  110. if (len % block_size) {
  111. lsb_address = ((u16) base_address | RSI_SD_REQUEST_MASTER);
  112. if (rsi_sdio_write_register_multiple(adapter,
  113. lsb_address,
  114. (u8 *)(fw + indx),
  115. len % block_size)) {
  116. rsi_dbg(ERR_ZONE,
  117. "%s: Unable to load f/w\n", __func__);
  118. return -1;
  119. }
  120. }
  121. rsi_dbg(INIT_ZONE,
  122. "%s: Succesfully loaded TA instructions\n", __func__);
  123. if (rsi_sdio_master_access_msword(adapter, TA_BASE_ADDR)) {
  124. rsi_dbg(ERR_ZONE,
  125. "%s: Unable to set ms word to common reg\n",
  126. __func__);
  127. return -1;
  128. }
  129. for (ii = 0; ii < ARRAY_SIZE(data); ii++) {
  130. /* Bringing TA out of reset */
  131. if (rsi_sdio_write_register_multiple(adapter,
  132. (address[ii] |
  133. RSI_SD_REQUEST_MASTER),
  134. (u8 *)&data[ii],
  135. 4)) {
  136. rsi_dbg(ERR_ZONE,
  137. "%s: Unable to hold TA threads\n", __func__);
  138. return -1;
  139. }
  140. }
  141. rsi_dbg(INIT_ZONE, "%s: loaded firmware\n", __func__);
  142. return 0;
  143. }
  144. /**
  145. * rsi_load_ta_instructions() - This function includes the actual funtionality
  146. * of loading the TA firmware.This function also
  147. * includes opening the TA file,reading the TA
  148. * file and writing their value in blocks of data.
  149. * @common: Pointer to the driver private structure.
  150. *
  151. * Return: status: 0 on success, -1 on failure.
  152. */
  153. static int rsi_load_ta_instructions(struct rsi_common *common)
  154. {
  155. struct rsi_hw *adapter = common->priv;
  156. struct rsi_91x_sdiodev *dev =
  157. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  158. u32 len;
  159. u32 num_blocks;
  160. const u8 *fw;
  161. const struct firmware *fw_entry = NULL;
  162. u32 block_size = dev->tx_blk_size;
  163. int status = 0;
  164. u32 base_address;
  165. u16 msb_address;
  166. if (rsi_sdio_master_access_msword(adapter, TA_BASE_ADDR)) {
  167. rsi_dbg(ERR_ZONE,
  168. "%s: Unable to set ms word to common reg\n",
  169. __func__);
  170. return -1;
  171. }
  172. base_address = TA_LOAD_ADDRESS;
  173. msb_address = (base_address >> 16);
  174. if (rsi_sdio_master_access_msword(adapter, msb_address)) {
  175. rsi_dbg(ERR_ZONE,
  176. "%s: Unable to set ms word reg\n", __func__);
  177. return -1;
  178. }
  179. status = request_firmware(&fw_entry, FIRMWARE_RSI9113, adapter->device);
  180. if (status < 0) {
  181. rsi_dbg(ERR_ZONE, "%s Firmware file %s not found\n",
  182. __func__, FIRMWARE_RSI9113);
  183. return status;
  184. }
  185. fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  186. len = fw_entry->size;
  187. if (len % 4)
  188. len += (4 - (len % 4));
  189. num_blocks = (len / block_size);
  190. rsi_dbg(INIT_ZONE, "%s: Instruction size:%d\n", __func__, len);
  191. rsi_dbg(INIT_ZONE, "%s: num blocks: %d\n", __func__, num_blocks);
  192. status = rsi_copy_to_card(common, fw, len, num_blocks);
  193. release_firmware(fw_entry);
  194. return status;
  195. }
  196. /**
  197. * rsi_process_pkt() - This Function reads rx_blocks register and figures out
  198. * the size of the rx pkt.
  199. * @common: Pointer to the driver private structure.
  200. *
  201. * Return: 0 on success, -1 on failure.
  202. */
  203. static int rsi_process_pkt(struct rsi_common *common)
  204. {
  205. struct rsi_hw *adapter = common->priv;
  206. u8 num_blks = 0;
  207. u32 rcv_pkt_len = 0;
  208. int status = 0;
  209. status = rsi_sdio_read_register(adapter,
  210. SDIO_RX_NUM_BLOCKS_REG,
  211. &num_blks);
  212. if (status) {
  213. rsi_dbg(ERR_ZONE,
  214. "%s: Failed to read pkt length from the card:\n",
  215. __func__);
  216. return status;
  217. }
  218. rcv_pkt_len = (num_blks * 256);
  219. common->rx_data_pkt = kmalloc(rcv_pkt_len, GFP_KERNEL);
  220. if (!common->rx_data_pkt) {
  221. rsi_dbg(ERR_ZONE, "%s: Failed in memory allocation\n",
  222. __func__);
  223. return -ENOMEM;
  224. }
  225. status = rsi_sdio_host_intf_read_pkt(adapter,
  226. common->rx_data_pkt,
  227. rcv_pkt_len);
  228. if (status) {
  229. rsi_dbg(ERR_ZONE, "%s: Failed to read packet from card\n",
  230. __func__);
  231. goto fail;
  232. }
  233. status = rsi_read_pkt(common, rcv_pkt_len);
  234. fail:
  235. kfree(common->rx_data_pkt);
  236. return status;
  237. }
  238. /**
  239. * rsi_init_sdio_slave_regs() - This function does the actual initialization
  240. * of SDBUS slave registers.
  241. * @adapter: Pointer to the adapter structure.
  242. *
  243. * Return: status: 0 on success, -1 on failure.
  244. */
  245. int rsi_init_sdio_slave_regs(struct rsi_hw *adapter)
  246. {
  247. struct rsi_91x_sdiodev *dev =
  248. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  249. u8 function = 0;
  250. u8 byte;
  251. int status = 0;
  252. if (dev->next_read_delay) {
  253. byte = dev->next_read_delay;
  254. status = rsi_sdio_write_register(adapter,
  255. function,
  256. SDIO_NXT_RD_DELAY2,
  257. &byte);
  258. if (status) {
  259. rsi_dbg(ERR_ZONE,
  260. "%s: Failed to write SDIO_NXT_RD_DELAY2\n",
  261. __func__);
  262. return -1;
  263. }
  264. }
  265. if (dev->sdio_high_speed_enable) {
  266. rsi_dbg(INIT_ZONE, "%s: Enabling SDIO High speed\n", __func__);
  267. byte = 0x3;
  268. status = rsi_sdio_write_register(adapter,
  269. function,
  270. SDIO_REG_HIGH_SPEED,
  271. &byte);
  272. if (status) {
  273. rsi_dbg(ERR_ZONE,
  274. "%s: Failed to enable SDIO high speed\n",
  275. __func__);
  276. return -1;
  277. }
  278. }
  279. /* This tells SDIO FIFO when to start read to host */
  280. rsi_dbg(INIT_ZONE, "%s: Initialzing SDIO read start level\n", __func__);
  281. byte = 0x24;
  282. status = rsi_sdio_write_register(adapter,
  283. function,
  284. SDIO_READ_START_LVL,
  285. &byte);
  286. if (status) {
  287. rsi_dbg(ERR_ZONE,
  288. "%s: Failed to write SDIO_READ_START_LVL\n", __func__);
  289. return -1;
  290. }
  291. rsi_dbg(INIT_ZONE, "%s: Initialzing FIFO ctrl registers\n", __func__);
  292. byte = (128 - 32);
  293. status = rsi_sdio_write_register(adapter,
  294. function,
  295. SDIO_READ_FIFO_CTL,
  296. &byte);
  297. if (status) {
  298. rsi_dbg(ERR_ZONE,
  299. "%s: Failed to write SDIO_READ_FIFO_CTL\n", __func__);
  300. return -1;
  301. }
  302. byte = 32;
  303. status = rsi_sdio_write_register(adapter,
  304. function,
  305. SDIO_WRITE_FIFO_CTL,
  306. &byte);
  307. if (status) {
  308. rsi_dbg(ERR_ZONE,
  309. "%s: Failed to write SDIO_WRITE_FIFO_CTL\n", __func__);
  310. return -1;
  311. }
  312. return 0;
  313. }
  314. /**
  315. * rsi_interrupt_handler() - This function read and process SDIO interrupts.
  316. * @adapter: Pointer to the adapter structure.
  317. *
  318. * Return: None.
  319. */
  320. void rsi_interrupt_handler(struct rsi_hw *adapter)
  321. {
  322. struct rsi_common *common = adapter->priv;
  323. struct rsi_91x_sdiodev *dev =
  324. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  325. int status;
  326. enum sdio_interrupt_type isr_type;
  327. u8 isr_status = 0;
  328. u8 fw_status = 0;
  329. dev->rx_info.sdio_int_counter++;
  330. do {
  331. mutex_lock(&common->tx_rxlock);
  332. status = rsi_sdio_read_register(common->priv,
  333. RSI_FN1_INT_REGISTER,
  334. &isr_status);
  335. if (status) {
  336. rsi_dbg(ERR_ZONE,
  337. "%s: Failed to Read Intr Status Register\n",
  338. __func__);
  339. mutex_unlock(&common->tx_rxlock);
  340. return;
  341. }
  342. if (isr_status == 0) {
  343. rsi_set_event(&common->tx_thread.event);
  344. dev->rx_info.sdio_intr_status_zero++;
  345. mutex_unlock(&common->tx_rxlock);
  346. return;
  347. }
  348. rsi_dbg(ISR_ZONE, "%s: Intr_status = %x %d %d\n",
  349. __func__, isr_status, (1 << MSDU_PKT_PENDING),
  350. (1 << FW_ASSERT_IND));
  351. do {
  352. RSI_GET_SDIO_INTERRUPT_TYPE(isr_status, isr_type);
  353. switch (isr_type) {
  354. case BUFFER_AVAILABLE:
  355. dev->rx_info.watch_bufferfull_count = 0;
  356. dev->rx_info.buffer_full = false;
  357. dev->rx_info.mgmt_buffer_full = false;
  358. rsi_sdio_ack_intr(common->priv,
  359. (1 << PKT_BUFF_AVAILABLE));
  360. rsi_set_event((&common->tx_thread.event));
  361. rsi_dbg(ISR_ZONE,
  362. "%s: ==> BUFFER_AVILABLE <==\n",
  363. __func__);
  364. dev->rx_info.buf_avilable_counter++;
  365. break;
  366. case FIRMWARE_ASSERT_IND:
  367. rsi_dbg(ERR_ZONE,
  368. "%s: ==> FIRMWARE Assert <==\n",
  369. __func__);
  370. status = rsi_sdio_read_register(common->priv,
  371. SDIO_FW_STATUS_REG,
  372. &fw_status);
  373. if (status) {
  374. rsi_dbg(ERR_ZONE,
  375. "%s: Failed to read f/w reg\n",
  376. __func__);
  377. } else {
  378. rsi_dbg(ERR_ZONE,
  379. "%s: Firmware Status is 0x%x\n",
  380. __func__ , fw_status);
  381. rsi_sdio_ack_intr(common->priv,
  382. (1 << FW_ASSERT_IND));
  383. }
  384. common->fsm_state = FSM_CARD_NOT_READY;
  385. break;
  386. case MSDU_PACKET_PENDING:
  387. rsi_dbg(ISR_ZONE, "Pkt pending interrupt\n");
  388. dev->rx_info.total_sdio_msdu_pending_intr++;
  389. status = rsi_process_pkt(common);
  390. if (status) {
  391. rsi_dbg(ERR_ZONE,
  392. "%s: Failed to read pkt\n",
  393. __func__);
  394. mutex_unlock(&common->tx_rxlock);
  395. return;
  396. }
  397. break;
  398. default:
  399. rsi_sdio_ack_intr(common->priv, isr_status);
  400. dev->rx_info.total_sdio_unknown_intr++;
  401. isr_status = 0;
  402. rsi_dbg(ISR_ZONE,
  403. "Unknown Interrupt %x\n",
  404. isr_status);
  405. break;
  406. }
  407. isr_status ^= BIT(isr_type - 1);
  408. } while (isr_status);
  409. mutex_unlock(&common->tx_rxlock);
  410. } while (1);
  411. }
  412. /**
  413. * rsi_device_init() - This Function Initializes The HAL.
  414. * @common: Pointer to the driver private structure.
  415. *
  416. * Return: 0 on success, -1 on failure.
  417. */
  418. int rsi_sdio_device_init(struct rsi_common *common)
  419. {
  420. if (rsi_load_ta_instructions(common))
  421. return -1;
  422. if (rsi_sdio_master_access_msword(common->priv, MISC_CFG_BASE_ADDR)) {
  423. rsi_dbg(ERR_ZONE, "%s: Unable to set ms word reg\n",
  424. __func__);
  425. return -1;
  426. }
  427. rsi_dbg(INIT_ZONE,
  428. "%s: Setting ms word to 0x41050000\n", __func__);
  429. return 0;
  430. }
  431. /**
  432. * rsi_sdio_read_buffer_status_register() - This function is used to the read
  433. * buffer status register and set
  434. * relevant fields in
  435. * rsi_91x_sdiodev struct.
  436. * @adapter: Pointer to the driver hw structure.
  437. * @q_num: The Q number whose status is to be found.
  438. *
  439. * Return: status: -1 on failure or else queue full/stop is indicated.
  440. */
  441. int rsi_sdio_read_buffer_status_register(struct rsi_hw *adapter, u8 q_num)
  442. {
  443. struct rsi_common *common = adapter->priv;
  444. struct rsi_91x_sdiodev *dev =
  445. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  446. u8 buf_status = 0;
  447. int status = 0;
  448. status = rsi_sdio_read_register(common->priv,
  449. RSI_DEVICE_BUFFER_STATUS_REGISTER,
  450. &buf_status);
  451. if (status) {
  452. rsi_dbg(ERR_ZONE,
  453. "%s: Failed to read status register\n", __func__);
  454. return -1;
  455. }
  456. if (buf_status & (BIT(PKT_MGMT_BUFF_FULL))) {
  457. if (!dev->rx_info.mgmt_buffer_full)
  458. dev->rx_info.mgmt_buf_full_counter++;
  459. dev->rx_info.mgmt_buffer_full = true;
  460. } else {
  461. dev->rx_info.mgmt_buffer_full = false;
  462. }
  463. if (buf_status & (BIT(PKT_BUFF_FULL))) {
  464. if (!dev->rx_info.buffer_full)
  465. dev->rx_info.buf_full_counter++;
  466. dev->rx_info.buffer_full = true;
  467. } else {
  468. dev->rx_info.buffer_full = false;
  469. }
  470. if (buf_status & (BIT(PKT_BUFF_SEMI_FULL))) {
  471. if (!dev->rx_info.semi_buffer_full)
  472. dev->rx_info.buf_semi_full_counter++;
  473. dev->rx_info.semi_buffer_full = true;
  474. } else {
  475. dev->rx_info.semi_buffer_full = false;
  476. }
  477. if ((q_num == MGMT_SOFT_Q) && (dev->rx_info.mgmt_buffer_full))
  478. return QUEUE_FULL;
  479. if (dev->rx_info.buffer_full)
  480. return QUEUE_FULL;
  481. return QUEUE_NOT_FULL;
  482. }
  483. /**
  484. * rsi_sdio_determine_event_timeout() - This Function determines the event
  485. * timeout duration.
  486. * @adapter: Pointer to the adapter structure.
  487. *
  488. * Return: timeout duration is returned.
  489. */
  490. int rsi_sdio_determine_event_timeout(struct rsi_hw *adapter)
  491. {
  492. struct rsi_91x_sdiodev *dev =
  493. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  494. /* Once buffer full is seen, event timeout to occur every 2 msecs */
  495. if (dev->rx_info.buffer_full)
  496. return 2;
  497. return EVENT_WAIT_FOREVER;
  498. }