power.c 12 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/slab.h>
  31. #include <net/mac80211.h>
  32. #include "iwl-io.h"
  33. #include "iwl-debug.h"
  34. #include "iwl-trans.h"
  35. #include "iwl-modparams.h"
  36. #include "dev.h"
  37. #include "agn.h"
  38. #include "commands.h"
  39. #include "power.h"
  40. /*
  41. * Setting power level allows the card to go to sleep when not busy.
  42. *
  43. * We calculate a sleep command based on the required latency, which
  44. * we get from mac80211. In order to handle thermal throttling, we can
  45. * also use pre-defined power levels.
  46. */
  47. /*
  48. * This defines the old power levels. They are still used by default
  49. * (level 1) and for thermal throttle (levels 3 through 5)
  50. */
  51. struct iwl_power_vec_entry {
  52. struct iwl_powertable_cmd cmd;
  53. u8 no_dtim; /* number of skip dtim */
  54. };
  55. #define IWL_DTIM_RANGE_0_MAX 2
  56. #define IWL_DTIM_RANGE_1_MAX 10
  57. #define NOSLP cpu_to_le16(0), 0, 0
  58. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  59. #define ASLP (IWL_POWER_POWER_SAVE_ENA_MSK | \
  60. IWL_POWER_POWER_MANAGEMENT_ENA_MSK | \
  61. IWL_POWER_ADVANCE_PM_ENA_MSK)
  62. #define ASLP_TOUT(T) cpu_to_le32(T)
  63. #define TU_TO_USEC 1024
  64. #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC)
  65. #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
  66. cpu_to_le32(X1), \
  67. cpu_to_le32(X2), \
  68. cpu_to_le32(X3), \
  69. cpu_to_le32(X4)}
  70. /* default power management (not Tx power) table values */
  71. /* for DTIM period 0 through IWL_DTIM_RANGE_0_MAX */
  72. /* DTIM 0 - 2 */
  73. static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = {
  74. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 1, 2, 2, 0xFF)}, 0},
  75. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
  76. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0},
  77. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1},
  78. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 2, 4, 6, 0xFF)}, 2}
  79. };
  80. /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
  81. /* DTIM 3 - 10 */
  82. static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = {
  83. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  84. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0},
  85. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0},
  86. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1},
  87. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 6, 10, 10)}, 2}
  88. };
  89. /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
  90. /* DTIM 11 - */
  91. static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = {
  92. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  93. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  94. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  95. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  96. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  97. };
  98. /* advance power management */
  99. /* DTIM 0 - 2 */
  100. static const struct iwl_power_vec_entry apm_range_0[IWL_POWER_NUM] = {
  101. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  102. SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
  103. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  104. SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
  105. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  106. SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
  107. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  108. SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
  109. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  110. SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
  111. };
  112. /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
  113. /* DTIM 3 - 10 */
  114. static const struct iwl_power_vec_entry apm_range_1[IWL_POWER_NUM] = {
  115. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  116. SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
  117. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  118. SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
  119. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  120. SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
  121. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  122. SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
  123. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  124. SLP_VEC(1, 2, 6, 8, 0xFF), 0}, 2}
  125. };
  126. /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
  127. /* DTIM 11 - */
  128. static const struct iwl_power_vec_entry apm_range_2[IWL_POWER_NUM] = {
  129. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  130. SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
  131. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  132. SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
  133. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  134. SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
  135. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  136. SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
  137. {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
  138. SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
  139. };
  140. static void iwl_static_sleep_cmd(struct iwl_priv *priv,
  141. struct iwl_powertable_cmd *cmd,
  142. enum iwl_power_level lvl, int period)
  143. {
  144. const struct iwl_power_vec_entry *table;
  145. int max_sleep[IWL_POWER_VEC_SIZE] = { 0 };
  146. int i;
  147. u8 skip;
  148. u32 slp_itrvl;
  149. if (priv->lib->adv_pm) {
  150. table = apm_range_2;
  151. if (period <= IWL_DTIM_RANGE_1_MAX)
  152. table = apm_range_1;
  153. if (period <= IWL_DTIM_RANGE_0_MAX)
  154. table = apm_range_0;
  155. } else {
  156. table = range_2;
  157. if (period <= IWL_DTIM_RANGE_1_MAX)
  158. table = range_1;
  159. if (period <= IWL_DTIM_RANGE_0_MAX)
  160. table = range_0;
  161. }
  162. if (WARN_ON(lvl < 0 || lvl >= IWL_POWER_NUM))
  163. memset(cmd, 0, sizeof(*cmd));
  164. else
  165. *cmd = table[lvl].cmd;
  166. if (period == 0) {
  167. skip = 0;
  168. period = 1;
  169. for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
  170. max_sleep[i] = 1;
  171. } else {
  172. skip = table[lvl].no_dtim;
  173. for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
  174. max_sleep[i] = le32_to_cpu(cmd->sleep_interval[i]);
  175. max_sleep[IWL_POWER_VEC_SIZE - 1] = skip + 1;
  176. }
  177. slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
  178. /* figure out the listen interval based on dtim period and skip */
  179. if (slp_itrvl == 0xFF)
  180. cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
  181. cpu_to_le32(period * (skip + 1));
  182. slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
  183. if (slp_itrvl > period)
  184. cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
  185. cpu_to_le32((slp_itrvl / period) * period);
  186. if (skip)
  187. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  188. else
  189. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  190. if (priv->cfg->base_params->shadow_reg_enable)
  191. cmd->flags |= IWL_POWER_SHADOW_REG_ENA;
  192. else
  193. cmd->flags &= ~IWL_POWER_SHADOW_REG_ENA;
  194. if (iwl_advanced_bt_coexist(priv)) {
  195. if (!priv->lib->bt_params->bt_sco_disable)
  196. cmd->flags |= IWL_POWER_BT_SCO_ENA;
  197. else
  198. cmd->flags &= ~IWL_POWER_BT_SCO_ENA;
  199. }
  200. slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
  201. if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL)
  202. cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
  203. cpu_to_le32(IWL_CONN_MAX_LISTEN_INTERVAL);
  204. /* enforce max sleep interval */
  205. for (i = IWL_POWER_VEC_SIZE - 1; i >= 0 ; i--) {
  206. if (le32_to_cpu(cmd->sleep_interval[i]) >
  207. (max_sleep[i] * period))
  208. cmd->sleep_interval[i] =
  209. cpu_to_le32(max_sleep[i] * period);
  210. if (i != (IWL_POWER_VEC_SIZE - 1)) {
  211. if (le32_to_cpu(cmd->sleep_interval[i]) >
  212. le32_to_cpu(cmd->sleep_interval[i+1]))
  213. cmd->sleep_interval[i] =
  214. cmd->sleep_interval[i+1];
  215. }
  216. }
  217. if (priv->power_data.bus_pm)
  218. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  219. else
  220. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  221. IWL_DEBUG_POWER(priv, "numSkipDtim = %u, dtimPeriod = %d\n",
  222. skip, period);
  223. /* The power level here is 0-4 (used as array index), but user expects
  224. to see 1-5 (according to spec). */
  225. IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1);
  226. }
  227. static void iwl_power_sleep_cam_cmd(struct iwl_priv *priv,
  228. struct iwl_powertable_cmd *cmd)
  229. {
  230. memset(cmd, 0, sizeof(*cmd));
  231. if (priv->power_data.bus_pm)
  232. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  233. IWL_DEBUG_POWER(priv, "Sleep command for CAM\n");
  234. }
  235. static int iwl_set_power(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd)
  236. {
  237. IWL_DEBUG_POWER(priv, "Sending power/sleep command\n");
  238. IWL_DEBUG_POWER(priv, "Flags value = 0x%08X\n", cmd->flags);
  239. IWL_DEBUG_POWER(priv, "Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  240. IWL_DEBUG_POWER(priv, "Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  241. IWL_DEBUG_POWER(priv, "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  242. le32_to_cpu(cmd->sleep_interval[0]),
  243. le32_to_cpu(cmd->sleep_interval[1]),
  244. le32_to_cpu(cmd->sleep_interval[2]),
  245. le32_to_cpu(cmd->sleep_interval[3]),
  246. le32_to_cpu(cmd->sleep_interval[4]));
  247. return iwl_dvm_send_cmd_pdu(priv, POWER_TABLE_CMD, 0,
  248. sizeof(struct iwl_powertable_cmd), cmd);
  249. }
  250. static void iwl_power_build_cmd(struct iwl_priv *priv,
  251. struct iwl_powertable_cmd *cmd)
  252. {
  253. bool enabled = priv->hw->conf.flags & IEEE80211_CONF_PS;
  254. int dtimper;
  255. dtimper = priv->hw->conf.ps_dtim_period ?: 1;
  256. if (priv->wowlan)
  257. iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, dtimper);
  258. else if (!priv->lib->no_idle_support &&
  259. priv->hw->conf.flags & IEEE80211_CONF_IDLE)
  260. iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, 20);
  261. else if (iwl_tt_is_low_power_state(priv)) {
  262. /* in thermal throttling low power state */
  263. iwl_static_sleep_cmd(priv, cmd,
  264. iwl_tt_current_power_mode(priv), dtimper);
  265. } else if (!enabled)
  266. iwl_power_sleep_cam_cmd(priv, cmd);
  267. else if (priv->power_data.debug_sleep_level_override >= 0)
  268. iwl_static_sleep_cmd(priv, cmd,
  269. priv->power_data.debug_sleep_level_override,
  270. dtimper);
  271. else {
  272. /* Note that the user parameter is 1-5 (according to spec),
  273. but we pass 0-4 because it acts as an array index. */
  274. if (iwlwifi_mod_params.power_level > IWL_POWER_INDEX_1 &&
  275. iwlwifi_mod_params.power_level <= IWL_POWER_NUM)
  276. iwl_static_sleep_cmd(priv, cmd,
  277. iwlwifi_mod_params.power_level - 1, dtimper);
  278. else
  279. iwl_static_sleep_cmd(priv, cmd,
  280. IWL_POWER_INDEX_1, dtimper);
  281. }
  282. }
  283. int iwl_power_set_mode(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd,
  284. bool force)
  285. {
  286. int ret;
  287. bool update_chains;
  288. lockdep_assert_held(&priv->mutex);
  289. /* Don't update the RX chain when chain noise calibration is running */
  290. update_chains = priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE ||
  291. priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE;
  292. if (!memcmp(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
  293. return 0;
  294. if (!iwl_is_ready_rf(priv))
  295. return -EIO;
  296. /* scan complete use sleep_power_next, need to be updated */
  297. memcpy(&priv->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
  298. if (test_bit(STATUS_SCANNING, &priv->status) && !force) {
  299. IWL_DEBUG_INFO(priv, "Defer power set mode while scanning\n");
  300. return 0;
  301. }
  302. if (cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK)
  303. iwl_dvm_set_pmi(priv, true);
  304. ret = iwl_set_power(priv, cmd);
  305. if (!ret) {
  306. if (!(cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK))
  307. iwl_dvm_set_pmi(priv, false);
  308. if (update_chains)
  309. iwl_update_chain_flags(priv);
  310. else
  311. IWL_DEBUG_POWER(priv,
  312. "Cannot update the power, chain noise "
  313. "calibration running: %d\n",
  314. priv->chain_noise_data.state);
  315. memcpy(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd));
  316. } else
  317. IWL_ERR(priv, "set power fail, ret = %d\n", ret);
  318. return ret;
  319. }
  320. int iwl_power_update_mode(struct iwl_priv *priv, bool force)
  321. {
  322. struct iwl_powertable_cmd cmd;
  323. iwl_power_build_cmd(priv, &cmd);
  324. return iwl_power_set_mode(priv, &cmd, force);
  325. }
  326. /* initialize to default */
  327. void iwl_power_initialize(struct iwl_priv *priv)
  328. {
  329. priv->power_data.bus_pm = priv->trans->pm_support;
  330. priv->power_data.debug_sleep_level_override = -1;
  331. memset(&priv->power_data.sleep_cmd, 0,
  332. sizeof(priv->power_data.sleep_cmd));
  333. }