btcoex.c 12 KB

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  1. /*
  2. * Copyright (c) 2009-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/export.h>
  17. #include "hw.h"
  18. enum ath_bt_mode {
  19. ATH_BT_COEX_MODE_LEGACY, /* legacy rx_clear mode */
  20. ATH_BT_COEX_MODE_UNSLOTTED, /* untimed/unslotted mode */
  21. ATH_BT_COEX_MODE_SLOTTED, /* slotted mode */
  22. ATH_BT_COEX_MODE_DISABLED, /* coexistence disabled */
  23. };
  24. struct ath_btcoex_config {
  25. u8 bt_time_extend;
  26. bool bt_txstate_extend;
  27. bool bt_txframe_extend;
  28. enum ath_bt_mode bt_mode; /* coexistence mode */
  29. bool bt_quiet_collision;
  30. bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
  31. u8 bt_priority_time;
  32. u8 bt_first_slot_time;
  33. bool bt_hold_rx_clear;
  34. };
  35. static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
  36. [AR9300_NUM_WLAN_WEIGHTS] = {
  37. { 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
  38. { 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
  39. { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
  40. };
  41. static const u32 mci_wlan_weights[ATH_BTCOEX_STOMP_MAX]
  42. [AR9300_NUM_WLAN_WEIGHTS] = {
  43. { 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
  44. { 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
  45. { 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
  46. { 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
  47. { 0xffffff01, 0xffffffff, 0xffffff01, 0xffffffff }, /* STOMP_AUDIO */
  48. };
  49. void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
  50. {
  51. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  52. const struct ath_btcoex_config ath_bt_config = {
  53. .bt_time_extend = 0,
  54. .bt_txstate_extend = true,
  55. .bt_txframe_extend = true,
  56. .bt_mode = ATH_BT_COEX_MODE_SLOTTED,
  57. .bt_quiet_collision = true,
  58. .bt_rxclear_polarity = true,
  59. .bt_priority_time = 2,
  60. .bt_first_slot_time = 5,
  61. .bt_hold_rx_clear = true,
  62. };
  63. bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
  64. if (AR_SREV_9300_20_OR_LATER(ah))
  65. rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
  66. btcoex_hw->bt_coex_mode =
  67. (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
  68. SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
  69. SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
  70. SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
  71. SM(ath_bt_config.bt_mode, AR_BT_MODE) |
  72. SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
  73. SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
  74. SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
  75. SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
  76. SM(qnum, AR_BT_QCU_THRESH);
  77. btcoex_hw->bt_coex_mode2 =
  78. SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
  79. SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
  80. AR_BT_DISABLE_BT_ANT;
  81. }
  82. EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
  83. void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
  84. {
  85. struct ath_common *common = ath9k_hw_common(ah);
  86. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  87. /*
  88. * Check if BTCOEX is globally disabled.
  89. */
  90. if (!common->btcoex_enabled) {
  91. btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
  92. return;
  93. }
  94. if (AR_SREV_9300_20_OR_LATER(ah)) {
  95. btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
  96. btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9300;
  97. btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9300;
  98. btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9300;
  99. } else if (AR_SREV_9280_20_OR_LATER(ah)) {
  100. btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9280;
  101. btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9280;
  102. if (AR_SREV_9285(ah)) {
  103. btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
  104. btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9285;
  105. } else {
  106. btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
  107. }
  108. }
  109. }
  110. EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);
  111. void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
  112. {
  113. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  114. /* connect bt_active to baseband */
  115. REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
  116. (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
  117. AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
  118. REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
  119. AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
  120. /* Set input mux for bt_active to gpio pin */
  121. REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
  122. AR_GPIO_INPUT_MUX1_BT_ACTIVE,
  123. btcoex_hw->btactive_gpio);
  124. /* Configure the desired gpio port for input */
  125. ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
  126. }
  127. EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
  128. void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
  129. {
  130. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  131. /* btcoex 3-wire */
  132. REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
  133. (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
  134. AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
  135. /* Set input mux for bt_prority_async and
  136. * bt_active_async to GPIO pins */
  137. REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
  138. AR_GPIO_INPUT_MUX1_BT_ACTIVE,
  139. btcoex_hw->btactive_gpio);
  140. REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
  141. AR_GPIO_INPUT_MUX1_BT_PRIORITY,
  142. btcoex_hw->btpriority_gpio);
  143. /* Configure the desired GPIO ports for input */
  144. ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
  145. ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
  146. }
  147. EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
  148. void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
  149. {
  150. ah->btcoex_hw.mci.ready = false;
  151. ah->btcoex_hw.mci.bt_state = 0;
  152. ah->btcoex_hw.mci.bt_ver_major = 3;
  153. ah->btcoex_hw.mci.bt_ver_minor = 0;
  154. ah->btcoex_hw.mci.bt_version_known = false;
  155. ah->btcoex_hw.mci.update_2g5g = true;
  156. ah->btcoex_hw.mci.is_2g = true;
  157. ah->btcoex_hw.mci.wlan_channels_update = false;
  158. ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
  159. ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
  160. ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
  161. ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
  162. ah->btcoex_hw.mci.query_bt = true;
  163. ah->btcoex_hw.mci.unhalt_bt_gpm = true;
  164. ah->btcoex_hw.mci.halted_bt_gpm = false;
  165. ah->btcoex_hw.mci.need_flush_btinfo = false;
  166. ah->btcoex_hw.mci.wlan_cal_seq = 0;
  167. ah->btcoex_hw.mci.wlan_cal_done = 0;
  168. ah->btcoex_hw.mci.config = (AR_SREV_9462(ah)) ? 0x2201 : 0xa4c1;
  169. }
  170. EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);
  171. static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
  172. {
  173. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  174. /* Configure the desired GPIO port for TX_FRAME output */
  175. ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
  176. AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
  177. }
  178. /*
  179. * For AR9002, bt_weight/wlan_weight are used.
  180. * For AR9003 and above, stomp_type is used.
  181. */
  182. void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
  183. u32 bt_weight,
  184. u32 wlan_weight,
  185. enum ath_stomp_type stomp_type)
  186. {
  187. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  188. struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
  189. u8 txprio_shift[] = { 24, 16, 16, 0 }; /* tx priority weight */
  190. bool concur_tx = (mci_hw->concur_tx && btcoex_hw->tx_prio[stomp_type]);
  191. const u32 *weight = ar9003_wlan_weights[stomp_type];
  192. int i;
  193. if (!AR_SREV_9300_20_OR_LATER(ah)) {
  194. btcoex_hw->bt_coex_weights =
  195. SM(bt_weight, AR_BTCOEX_BT_WGHT) |
  196. SM(wlan_weight, AR_BTCOEX_WL_WGHT);
  197. return;
  198. }
  199. if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
  200. enum ath_stomp_type stype =
  201. ((stomp_type == ATH_BTCOEX_STOMP_LOW) &&
  202. btcoex_hw->mci.stomp_ftp) ?
  203. ATH_BTCOEX_STOMP_LOW_FTP : stomp_type;
  204. weight = mci_wlan_weights[stype];
  205. }
  206. for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
  207. btcoex_hw->bt_weight[i] = AR9300_BT_WGHT;
  208. btcoex_hw->wlan_weight[i] = weight[i];
  209. if (concur_tx && i) {
  210. btcoex_hw->wlan_weight[i] &=
  211. ~(0xff << txprio_shift[i-1]);
  212. btcoex_hw->wlan_weight[i] |=
  213. (btcoex_hw->tx_prio[stomp_type] <<
  214. txprio_shift[i-1]);
  215. }
  216. }
  217. /* Last WLAN weight has to be adjusted wrt tx priority */
  218. if (concur_tx) {
  219. btcoex_hw->wlan_weight[i-1] &= ~(0xff << txprio_shift[i-1]);
  220. btcoex_hw->wlan_weight[i-1] |= (btcoex_hw->tx_prio[stomp_type]
  221. << txprio_shift[i-1]);
  222. }
  223. }
  224. EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
  225. static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
  226. {
  227. struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
  228. u32 val;
  229. int i;
  230. /*
  231. * Program coex mode and weight registers to
  232. * enable coex 3-wire
  233. */
  234. REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
  235. REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);
  236. if (AR_SREV_9300_20_OR_LATER(ah)) {
  237. REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
  238. REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
  239. for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
  240. REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
  241. btcoex->bt_weight[i]);
  242. } else
  243. REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);
  244. if (AR_SREV_9271(ah)) {
  245. val = REG_READ(ah, 0x50040);
  246. val &= 0xFFFFFEFF;
  247. REG_WRITE(ah, 0x50040, val);
  248. }
  249. REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
  250. REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
  251. ath9k_hw_cfg_output(ah, btcoex->wlanactive_gpio,
  252. AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
  253. }
  254. static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
  255. {
  256. struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
  257. int i;
  258. for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
  259. REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
  260. btcoex->wlan_weight[i]);
  261. REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
  262. btcoex->enabled = true;
  263. }
  264. void ath9k_hw_btcoex_enable(struct ath_hw *ah)
  265. {
  266. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  267. switch (ath9k_hw_get_btcoex_scheme(ah)) {
  268. case ATH_BTCOEX_CFG_NONE:
  269. return;
  270. case ATH_BTCOEX_CFG_2WIRE:
  271. ath9k_hw_btcoex_enable_2wire(ah);
  272. break;
  273. case ATH_BTCOEX_CFG_3WIRE:
  274. if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
  275. ath9k_hw_btcoex_enable_mci(ah);
  276. return;
  277. }
  278. ath9k_hw_btcoex_enable_3wire(ah);
  279. break;
  280. }
  281. REG_RMW(ah, AR_GPIO_PDPU,
  282. (0x2 << (btcoex_hw->btactive_gpio * 2)),
  283. (0x3 << (btcoex_hw->btactive_gpio * 2)));
  284. ah->btcoex_hw.enabled = true;
  285. }
  286. EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
  287. void ath9k_hw_btcoex_disable(struct ath_hw *ah)
  288. {
  289. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  290. int i;
  291. btcoex_hw->enabled = false;
  292. if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
  293. ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
  294. for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
  295. REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
  296. btcoex_hw->wlan_weight[i]);
  297. return;
  298. }
  299. ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
  300. ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
  301. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  302. if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
  303. REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
  304. REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
  305. if (AR_SREV_9300_20_OR_LATER(ah)) {
  306. REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
  307. REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
  308. for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
  309. REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
  310. } else
  311. REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
  312. }
  313. }
  314. EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
  315. /*
  316. * Configures appropriate weight based on stomp type.
  317. */
  318. void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
  319. enum ath_stomp_type stomp_type)
  320. {
  321. if (AR_SREV_9300_20_OR_LATER(ah)) {
  322. ath9k_hw_btcoex_set_weight(ah, 0, 0, stomp_type);
  323. return;
  324. }
  325. switch (stomp_type) {
  326. case ATH_BTCOEX_STOMP_ALL:
  327. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  328. AR_STOMP_ALL_WLAN_WGHT, 0);
  329. break;
  330. case ATH_BTCOEX_STOMP_LOW:
  331. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  332. AR_STOMP_LOW_WLAN_WGHT, 0);
  333. break;
  334. case ATH_BTCOEX_STOMP_NONE:
  335. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  336. AR_STOMP_NONE_WLAN_WGHT, 0);
  337. break;
  338. default:
  339. ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
  340. break;
  341. }
  342. }
  343. EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);
  344. void ath9k_hw_btcoex_set_concur_txprio(struct ath_hw *ah, u8 *stomp_txprio)
  345. {
  346. struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
  347. int i;
  348. for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
  349. btcoex->tx_prio[i] = stomp_txprio[i];
  350. }
  351. EXPORT_SYMBOL(ath9k_hw_btcoex_set_concur_txprio);