wmi.c 111 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/skbuff.h>
  18. #include <linux/ctype.h>
  19. #include "core.h"
  20. #include "htc.h"
  21. #include "debug.h"
  22. #include "wmi.h"
  23. #include "mac.h"
  24. /* MAIN WMI cmd track */
  25. static struct wmi_cmd_map wmi_cmd_map = {
  26. .init_cmdid = WMI_INIT_CMDID,
  27. .start_scan_cmdid = WMI_START_SCAN_CMDID,
  28. .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
  29. .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
  30. .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
  31. .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
  32. .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
  33. .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
  34. .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
  35. .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
  36. .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
  37. .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
  38. .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
  39. .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
  40. .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
  41. .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  42. .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
  43. .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
  44. .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
  45. .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
  46. .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
  47. .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
  48. .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
  49. .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
  50. .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
  51. .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
  52. .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
  53. .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
  54. .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
  55. .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
  56. .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
  57. .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
  58. .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
  59. .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
  60. .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
  61. .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
  62. .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
  63. .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
  64. .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
  65. .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
  66. .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
  67. .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
  68. .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
  69. .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
  70. .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
  71. .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
  72. .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
  73. .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
  74. .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
  75. .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
  76. .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
  77. .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
  78. .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
  79. .roam_scan_mode = WMI_ROAM_SCAN_MODE,
  80. .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
  81. .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
  82. .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  83. .roam_ap_profile = WMI_ROAM_AP_PROFILE,
  84. .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
  85. .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
  86. .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
  87. .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
  88. .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
  89. .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
  90. .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
  91. .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
  92. .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
  93. .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
  94. .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
  95. .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
  96. .wlan_profile_set_hist_intvl_cmdid =
  97. WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  98. .wlan_profile_get_profile_data_cmdid =
  99. WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  100. .wlan_profile_enable_profile_id_cmdid =
  101. WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  102. .wlan_profile_list_profile_id_cmdid =
  103. WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  104. .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
  105. .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
  106. .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
  107. .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
  108. .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
  109. .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
  110. .wow_enable_disable_wake_event_cmdid =
  111. WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  112. .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
  113. .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  114. .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
  115. .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
  116. .vdev_spectral_scan_configure_cmdid =
  117. WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  118. .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  119. .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
  120. .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
  121. .network_list_offload_config_cmdid =
  122. WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
  123. .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
  124. .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
  125. .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
  126. .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
  127. .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
  128. .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
  129. .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
  130. .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
  131. .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
  132. .echo_cmdid = WMI_ECHO_CMDID,
  133. .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
  134. .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
  135. .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
  136. .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
  137. .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
  138. .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
  139. .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
  140. .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
  141. .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
  142. };
  143. /* 10.X WMI cmd track */
  144. static struct wmi_cmd_map wmi_10x_cmd_map = {
  145. .init_cmdid = WMI_10X_INIT_CMDID,
  146. .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
  147. .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
  148. .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
  149. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  150. .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
  151. .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
  152. .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
  153. .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
  154. .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
  155. .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
  156. .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
  157. .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
  158. .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
  159. .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
  160. .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  161. .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
  162. .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
  163. .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
  164. .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
  165. .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
  166. .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
  167. .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
  168. .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
  169. .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
  170. .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
  171. .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
  172. .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
  173. .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
  174. .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
  175. .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
  176. .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
  177. .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
  178. .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
  179. .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
  180. .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
  181. .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
  182. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  183. .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
  184. .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
  185. .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
  186. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  187. .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
  188. .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
  189. .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
  190. .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
  191. .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
  192. .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
  193. .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
  194. .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
  195. .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
  196. .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
  197. .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
  198. .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
  199. .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
  200. .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
  201. .roam_scan_rssi_change_threshold =
  202. WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  203. .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
  204. .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
  205. .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
  206. .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
  207. .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
  208. .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
  209. .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
  210. .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
  211. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  212. .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
  213. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  214. .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
  215. .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
  216. .wlan_profile_set_hist_intvl_cmdid =
  217. WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  218. .wlan_profile_get_profile_data_cmdid =
  219. WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  220. .wlan_profile_enable_profile_id_cmdid =
  221. WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  222. .wlan_profile_list_profile_id_cmdid =
  223. WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  224. .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
  225. .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
  226. .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
  227. .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
  228. .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
  229. .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
  230. .wow_enable_disable_wake_event_cmdid =
  231. WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  232. .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
  233. .wow_hostwakeup_from_sleep_cmdid =
  234. WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  235. .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
  236. .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
  237. .vdev_spectral_scan_configure_cmdid =
  238. WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  239. .vdev_spectral_scan_enable_cmdid =
  240. WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  241. .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
  242. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  243. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  244. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  245. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  246. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  247. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  248. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  249. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  250. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  251. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  252. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  253. .echo_cmdid = WMI_10X_ECHO_CMDID,
  254. .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
  255. .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
  256. .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
  257. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  258. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  259. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  260. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  261. .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
  262. .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
  263. };
  264. /* MAIN WMI VDEV param map */
  265. static struct wmi_vdev_param_map wmi_vdev_param_map = {
  266. .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
  267. .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  268. .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
  269. .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
  270. .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
  271. .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
  272. .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
  273. .preamble = WMI_VDEV_PARAM_PREAMBLE,
  274. .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
  275. .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
  276. .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
  277. .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
  278. .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
  279. .wmi_vdev_oc_scheduler_air_time_limit =
  280. WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  281. .wds = WMI_VDEV_PARAM_WDS,
  282. .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
  283. .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
  284. .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
  285. .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
  286. .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
  287. .chwidth = WMI_VDEV_PARAM_CHWIDTH,
  288. .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
  289. .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
  290. .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
  291. .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
  292. .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
  293. .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
  294. .sgi = WMI_VDEV_PARAM_SGI,
  295. .ldpc = WMI_VDEV_PARAM_LDPC,
  296. .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
  297. .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
  298. .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
  299. .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
  300. .nss = WMI_VDEV_PARAM_NSS,
  301. .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
  302. .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
  303. .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
  304. .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
  305. .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  306. .ap_keepalive_min_idle_inactive_time_secs =
  307. WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  308. .ap_keepalive_max_idle_inactive_time_secs =
  309. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  310. .ap_keepalive_max_unresponsive_time_secs =
  311. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  312. .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
  313. .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
  314. .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
  315. .txbf = WMI_VDEV_PARAM_TXBF,
  316. .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
  317. .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
  318. .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
  319. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  320. WMI_VDEV_PARAM_UNSUPPORTED,
  321. };
  322. /* 10.X WMI VDEV param map */
  323. static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
  324. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  325. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  326. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  327. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  328. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  329. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  330. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  331. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  332. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  333. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  334. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  335. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  336. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  337. .wmi_vdev_oc_scheduler_air_time_limit =
  338. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  339. .wds = WMI_10X_VDEV_PARAM_WDS,
  340. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  341. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  342. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  343. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  344. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  345. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  346. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  347. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  348. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  349. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  350. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  351. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  352. .sgi = WMI_10X_VDEV_PARAM_SGI,
  353. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  354. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  355. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  356. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  357. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  358. .nss = WMI_10X_VDEV_PARAM_NSS,
  359. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  360. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  361. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  362. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  363. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  364. .ap_keepalive_min_idle_inactive_time_secs =
  365. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  366. .ap_keepalive_max_idle_inactive_time_secs =
  367. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  368. .ap_keepalive_max_unresponsive_time_secs =
  369. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  370. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  371. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  372. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  373. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  374. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  375. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  376. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  377. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  378. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  379. };
  380. static struct wmi_pdev_param_map wmi_pdev_param_map = {
  381. .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
  382. .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
  383. .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
  384. .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
  385. .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
  386. .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
  387. .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
  388. .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  389. .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
  390. .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
  391. .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  392. .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
  393. .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
  394. .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  395. .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
  396. .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
  397. .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
  398. .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
  399. .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
  400. .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  401. .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  402. .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
  403. .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  404. .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
  405. .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
  406. .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  407. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  408. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  409. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  410. .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  411. .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  412. .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  413. .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  414. .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
  415. .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
  416. .dcs = WMI_PDEV_PARAM_DCS,
  417. .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
  418. .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
  419. .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
  420. .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
  421. .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
  422. .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
  423. .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
  424. .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
  425. .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
  426. .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  427. .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
  428. .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  429. };
  430. static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
  431. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  432. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  433. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  434. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  435. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  436. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  437. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  438. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  439. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  440. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  441. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  442. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  443. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  444. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  445. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  446. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  447. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  448. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  449. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  450. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  451. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  452. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  453. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  454. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  455. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  456. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  457. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  458. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  459. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  460. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  461. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  462. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  463. .bcnflt_stats_update_period =
  464. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  465. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  466. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  467. .dcs = WMI_10X_PDEV_PARAM_DCS,
  468. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  469. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  470. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  471. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  472. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  473. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  474. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  475. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  476. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  477. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  478. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  479. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  480. };
  481. int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
  482. {
  483. int ret;
  484. ret = wait_for_completion_timeout(&ar->wmi.service_ready,
  485. WMI_SERVICE_READY_TIMEOUT_HZ);
  486. return ret;
  487. }
  488. int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
  489. {
  490. int ret;
  491. ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
  492. WMI_UNIFIED_READY_TIMEOUT_HZ);
  493. return ret;
  494. }
  495. static struct sk_buff *ath10k_wmi_alloc_skb(u32 len)
  496. {
  497. struct sk_buff *skb;
  498. u32 round_len = roundup(len, 4);
  499. skb = ath10k_htc_alloc_skb(WMI_SKB_HEADROOM + round_len);
  500. if (!skb)
  501. return NULL;
  502. skb_reserve(skb, WMI_SKB_HEADROOM);
  503. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  504. ath10k_warn("Unaligned WMI skb\n");
  505. skb_put(skb, round_len);
  506. memset(skb->data, 0, round_len);
  507. return skb;
  508. }
  509. static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  510. {
  511. dev_kfree_skb(skb);
  512. }
  513. static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
  514. u32 cmd_id)
  515. {
  516. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  517. struct wmi_cmd_hdr *cmd_hdr;
  518. int ret;
  519. u32 cmd = 0;
  520. if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  521. return -ENOMEM;
  522. cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
  523. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  524. cmd_hdr->cmd_id = __cpu_to_le32(cmd);
  525. memset(skb_cb, 0, sizeof(*skb_cb));
  526. ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
  527. trace_ath10k_wmi_cmd(cmd_id, skb->data, skb->len, ret);
  528. if (ret)
  529. goto err_pull;
  530. return 0;
  531. err_pull:
  532. skb_pull(skb, sizeof(struct wmi_cmd_hdr));
  533. return ret;
  534. }
  535. static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
  536. {
  537. int ret;
  538. lockdep_assert_held(&arvif->ar->data_lock);
  539. if (arvif->beacon == NULL)
  540. return;
  541. if (arvif->beacon_sent)
  542. return;
  543. ret = ath10k_wmi_beacon_send_ref_nowait(arvif);
  544. if (ret)
  545. return;
  546. /* We need to retain the arvif->beacon reference for DMA unmapping and
  547. * freeing the skbuff later. */
  548. arvif->beacon_sent = true;
  549. }
  550. static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
  551. struct ieee80211_vif *vif)
  552. {
  553. struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
  554. ath10k_wmi_tx_beacon_nowait(arvif);
  555. }
  556. static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
  557. {
  558. spin_lock_bh(&ar->data_lock);
  559. ieee80211_iterate_active_interfaces_atomic(ar->hw,
  560. IEEE80211_IFACE_ITER_NORMAL,
  561. ath10k_wmi_tx_beacons_iter,
  562. NULL);
  563. spin_unlock_bh(&ar->data_lock);
  564. }
  565. static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
  566. {
  567. /* try to send pending beacons first. they take priority */
  568. ath10k_wmi_tx_beacons_nowait(ar);
  569. wake_up(&ar->wmi.tx_credits_wq);
  570. }
  571. static int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb,
  572. u32 cmd_id)
  573. {
  574. int ret = -EOPNOTSUPP;
  575. might_sleep();
  576. if (cmd_id == WMI_CMD_UNSUPPORTED) {
  577. ath10k_warn("wmi command %d is not supported by firmware\n",
  578. cmd_id);
  579. return ret;
  580. }
  581. wait_event_timeout(ar->wmi.tx_credits_wq, ({
  582. /* try to send pending beacons first. they take priority */
  583. ath10k_wmi_tx_beacons_nowait(ar);
  584. ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
  585. (ret != -EAGAIN);
  586. }), 3*HZ);
  587. if (ret)
  588. dev_kfree_skb_any(skb);
  589. return ret;
  590. }
  591. int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb)
  592. {
  593. int ret = 0;
  594. struct wmi_mgmt_tx_cmd *cmd;
  595. struct ieee80211_hdr *hdr;
  596. struct sk_buff *wmi_skb;
  597. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  598. int len;
  599. u32 buf_len = skb->len;
  600. u16 fc;
  601. hdr = (struct ieee80211_hdr *)skb->data;
  602. fc = le16_to_cpu(hdr->frame_control);
  603. if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
  604. return -EINVAL;
  605. len = sizeof(cmd->hdr) + skb->len;
  606. if ((ieee80211_is_action(hdr->frame_control) ||
  607. ieee80211_is_deauth(hdr->frame_control) ||
  608. ieee80211_is_disassoc(hdr->frame_control)) &&
  609. ieee80211_has_protected(hdr->frame_control)) {
  610. len += IEEE80211_CCMP_MIC_LEN;
  611. buf_len += IEEE80211_CCMP_MIC_LEN;
  612. }
  613. len = round_up(len, 4);
  614. wmi_skb = ath10k_wmi_alloc_skb(len);
  615. if (!wmi_skb)
  616. return -ENOMEM;
  617. cmd = (struct wmi_mgmt_tx_cmd *)wmi_skb->data;
  618. cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(skb)->vdev_id);
  619. cmd->hdr.tx_rate = 0;
  620. cmd->hdr.tx_power = 0;
  621. cmd->hdr.buf_len = __cpu_to_le32(buf_len);
  622. memcpy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr), ETH_ALEN);
  623. memcpy(cmd->buf, skb->data, skb->len);
  624. ath10k_dbg(ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
  625. wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE,
  626. fc & IEEE80211_FCTL_STYPE);
  627. /* Send the management frame buffer to the target */
  628. ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid);
  629. if (ret)
  630. return ret;
  631. /* TODO: report tx status to mac80211 - temporary just ACK */
  632. info->flags |= IEEE80211_TX_STAT_ACK;
  633. ieee80211_tx_status_irqsafe(ar->hw, skb);
  634. return ret;
  635. }
  636. static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
  637. {
  638. struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data;
  639. enum wmi_scan_event_type event_type;
  640. enum wmi_scan_completion_reason reason;
  641. u32 freq;
  642. u32 req_id;
  643. u32 scan_id;
  644. u32 vdev_id;
  645. event_type = __le32_to_cpu(event->event_type);
  646. reason = __le32_to_cpu(event->reason);
  647. freq = __le32_to_cpu(event->channel_freq);
  648. req_id = __le32_to_cpu(event->scan_req_id);
  649. scan_id = __le32_to_cpu(event->scan_id);
  650. vdev_id = __le32_to_cpu(event->vdev_id);
  651. ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENTID\n");
  652. ath10k_dbg(ATH10K_DBG_WMI,
  653. "scan event type %d reason %d freq %d req_id %d "
  654. "scan_id %d vdev_id %d\n",
  655. event_type, reason, freq, req_id, scan_id, vdev_id);
  656. spin_lock_bh(&ar->data_lock);
  657. switch (event_type) {
  658. case WMI_SCAN_EVENT_STARTED:
  659. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_STARTED\n");
  660. if (ar->scan.in_progress && ar->scan.is_roc)
  661. ieee80211_ready_on_channel(ar->hw);
  662. complete(&ar->scan.started);
  663. break;
  664. case WMI_SCAN_EVENT_COMPLETED:
  665. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_COMPLETED\n");
  666. switch (reason) {
  667. case WMI_SCAN_REASON_COMPLETED:
  668. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_COMPLETED\n");
  669. break;
  670. case WMI_SCAN_REASON_CANCELLED:
  671. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_CANCELED\n");
  672. break;
  673. case WMI_SCAN_REASON_PREEMPTED:
  674. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_PREEMPTED\n");
  675. break;
  676. case WMI_SCAN_REASON_TIMEDOUT:
  677. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_TIMEDOUT\n");
  678. break;
  679. default:
  680. break;
  681. }
  682. ar->scan_channel = NULL;
  683. if (!ar->scan.in_progress) {
  684. ath10k_warn("no scan requested, ignoring\n");
  685. break;
  686. }
  687. if (ar->scan.is_roc) {
  688. ath10k_offchan_tx_purge(ar);
  689. if (!ar->scan.aborting)
  690. ieee80211_remain_on_channel_expired(ar->hw);
  691. } else {
  692. ieee80211_scan_completed(ar->hw, ar->scan.aborting);
  693. }
  694. del_timer(&ar->scan.timeout);
  695. complete_all(&ar->scan.completed);
  696. ar->scan.in_progress = false;
  697. break;
  698. case WMI_SCAN_EVENT_BSS_CHANNEL:
  699. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_BSS_CHANNEL\n");
  700. ar->scan_channel = NULL;
  701. break;
  702. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  703. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_FOREIGN_CHANNEL\n");
  704. ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
  705. if (ar->scan.in_progress && ar->scan.is_roc &&
  706. ar->scan.roc_freq == freq) {
  707. complete(&ar->scan.on_channel);
  708. }
  709. break;
  710. case WMI_SCAN_EVENT_DEQUEUED:
  711. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_DEQUEUED\n");
  712. break;
  713. case WMI_SCAN_EVENT_PREEMPTED:
  714. ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_PREEMPTED\n");
  715. break;
  716. case WMI_SCAN_EVENT_START_FAILED:
  717. ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_START_FAILED\n");
  718. break;
  719. default:
  720. break;
  721. }
  722. spin_unlock_bh(&ar->data_lock);
  723. return 0;
  724. }
  725. static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
  726. {
  727. enum ieee80211_band band;
  728. switch (phy_mode) {
  729. case MODE_11A:
  730. case MODE_11NA_HT20:
  731. case MODE_11NA_HT40:
  732. case MODE_11AC_VHT20:
  733. case MODE_11AC_VHT40:
  734. case MODE_11AC_VHT80:
  735. band = IEEE80211_BAND_5GHZ;
  736. break;
  737. case MODE_11G:
  738. case MODE_11B:
  739. case MODE_11GONLY:
  740. case MODE_11NG_HT20:
  741. case MODE_11NG_HT40:
  742. case MODE_11AC_VHT20_2G:
  743. case MODE_11AC_VHT40_2G:
  744. case MODE_11AC_VHT80_2G:
  745. default:
  746. band = IEEE80211_BAND_2GHZ;
  747. }
  748. return band;
  749. }
  750. static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
  751. {
  752. u8 rate_idx = 0;
  753. /* rate in Kbps */
  754. switch (rate) {
  755. case 1000:
  756. rate_idx = 0;
  757. break;
  758. case 2000:
  759. rate_idx = 1;
  760. break;
  761. case 5500:
  762. rate_idx = 2;
  763. break;
  764. case 11000:
  765. rate_idx = 3;
  766. break;
  767. case 6000:
  768. rate_idx = 4;
  769. break;
  770. case 9000:
  771. rate_idx = 5;
  772. break;
  773. case 12000:
  774. rate_idx = 6;
  775. break;
  776. case 18000:
  777. rate_idx = 7;
  778. break;
  779. case 24000:
  780. rate_idx = 8;
  781. break;
  782. case 36000:
  783. rate_idx = 9;
  784. break;
  785. case 48000:
  786. rate_idx = 10;
  787. break;
  788. case 54000:
  789. rate_idx = 11;
  790. break;
  791. default:
  792. break;
  793. }
  794. if (band == IEEE80211_BAND_5GHZ) {
  795. if (rate_idx > 3)
  796. /* Omit CCK rates */
  797. rate_idx -= 4;
  798. else
  799. rate_idx = 0;
  800. }
  801. return rate_idx;
  802. }
  803. static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
  804. {
  805. struct wmi_mgmt_rx_event_v1 *ev_v1;
  806. struct wmi_mgmt_rx_event_v2 *ev_v2;
  807. struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
  808. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  809. struct ieee80211_channel *ch;
  810. struct ieee80211_hdr *hdr;
  811. u32 rx_status;
  812. u32 channel;
  813. u32 phy_mode;
  814. u32 snr;
  815. u32 rate;
  816. u32 buf_len;
  817. u16 fc;
  818. int pull_len;
  819. if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
  820. ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
  821. ev_hdr = &ev_v2->hdr.v1;
  822. pull_len = sizeof(*ev_v2);
  823. } else {
  824. ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
  825. ev_hdr = &ev_v1->hdr;
  826. pull_len = sizeof(*ev_v1);
  827. }
  828. channel = __le32_to_cpu(ev_hdr->channel);
  829. buf_len = __le32_to_cpu(ev_hdr->buf_len);
  830. rx_status = __le32_to_cpu(ev_hdr->status);
  831. snr = __le32_to_cpu(ev_hdr->snr);
  832. phy_mode = __le32_to_cpu(ev_hdr->phy_mode);
  833. rate = __le32_to_cpu(ev_hdr->rate);
  834. memset(status, 0, sizeof(*status));
  835. ath10k_dbg(ATH10K_DBG_MGMT,
  836. "event mgmt rx status %08x\n", rx_status);
  837. if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
  838. dev_kfree_skb(skb);
  839. return 0;
  840. }
  841. if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
  842. dev_kfree_skb(skb);
  843. return 0;
  844. }
  845. if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
  846. dev_kfree_skb(skb);
  847. return 0;
  848. }
  849. if (rx_status & WMI_RX_STATUS_ERR_CRC)
  850. status->flag |= RX_FLAG_FAILED_FCS_CRC;
  851. if (rx_status & WMI_RX_STATUS_ERR_MIC)
  852. status->flag |= RX_FLAG_MMIC_ERROR;
  853. /* HW can Rx CCK rates on 5GHz. In that case phy_mode is set to
  854. * MODE_11B. This means phy_mode is not a reliable source for the band
  855. * of mgmt rx. */
  856. ch = ar->scan_channel;
  857. if (!ch)
  858. ch = ar->rx_channel;
  859. if (ch) {
  860. status->band = ch->band;
  861. if (phy_mode == MODE_11B &&
  862. status->band == IEEE80211_BAND_5GHZ)
  863. ath10k_dbg(ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
  864. } else {
  865. ath10k_warn("using (unreliable) phy_mode to extract band for mgmt rx\n");
  866. status->band = phy_mode_to_band(phy_mode);
  867. }
  868. status->freq = ieee80211_channel_to_frequency(channel, status->band);
  869. status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
  870. status->rate_idx = get_rate_idx(rate, status->band);
  871. skb_pull(skb, pull_len);
  872. hdr = (struct ieee80211_hdr *)skb->data;
  873. fc = le16_to_cpu(hdr->frame_control);
  874. /* FW delivers WEP Shared Auth frame with Protected Bit set and
  875. * encrypted payload. However in case of PMF it delivers decrypted
  876. * frames with Protected Bit set. */
  877. if (ieee80211_has_protected(hdr->frame_control) &&
  878. !ieee80211_is_auth(hdr->frame_control)) {
  879. status->flag |= RX_FLAG_DECRYPTED;
  880. if (!ieee80211_is_action(hdr->frame_control) &&
  881. !ieee80211_is_deauth(hdr->frame_control) &&
  882. !ieee80211_is_disassoc(hdr->frame_control)) {
  883. status->flag |= RX_FLAG_IV_STRIPPED |
  884. RX_FLAG_MMIC_STRIPPED;
  885. hdr->frame_control = __cpu_to_le16(fc &
  886. ~IEEE80211_FCTL_PROTECTED);
  887. }
  888. }
  889. ath10k_dbg(ATH10K_DBG_MGMT,
  890. "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
  891. skb, skb->len,
  892. fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
  893. ath10k_dbg(ATH10K_DBG_MGMT,
  894. "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
  895. status->freq, status->band, status->signal,
  896. status->rate_idx);
  897. /*
  898. * packets from HTC come aligned to 4byte boundaries
  899. * because they can originally come in along with a trailer
  900. */
  901. skb_trim(skb, buf_len);
  902. ieee80211_rx(ar->hw, skb);
  903. return 0;
  904. }
  905. static int freq_to_idx(struct ath10k *ar, int freq)
  906. {
  907. struct ieee80211_supported_band *sband;
  908. int band, ch, idx = 0;
  909. for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
  910. sband = ar->hw->wiphy->bands[band];
  911. if (!sband)
  912. continue;
  913. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  914. if (sband->channels[ch].center_freq == freq)
  915. goto exit;
  916. }
  917. exit:
  918. return idx;
  919. }
  920. static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
  921. {
  922. struct wmi_chan_info_event *ev;
  923. struct survey_info *survey;
  924. u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
  925. int idx;
  926. ev = (struct wmi_chan_info_event *)skb->data;
  927. err_code = __le32_to_cpu(ev->err_code);
  928. freq = __le32_to_cpu(ev->freq);
  929. cmd_flags = __le32_to_cpu(ev->cmd_flags);
  930. noise_floor = __le32_to_cpu(ev->noise_floor);
  931. rx_clear_count = __le32_to_cpu(ev->rx_clear_count);
  932. cycle_count = __le32_to_cpu(ev->cycle_count);
  933. ath10k_dbg(ATH10K_DBG_WMI,
  934. "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
  935. err_code, freq, cmd_flags, noise_floor, rx_clear_count,
  936. cycle_count);
  937. spin_lock_bh(&ar->data_lock);
  938. if (!ar->scan.in_progress) {
  939. ath10k_warn("chan info event without a scan request?\n");
  940. goto exit;
  941. }
  942. idx = freq_to_idx(ar, freq);
  943. if (idx >= ARRAY_SIZE(ar->survey)) {
  944. ath10k_warn("chan info: invalid frequency %d (idx %d out of bounds)\n",
  945. freq, idx);
  946. goto exit;
  947. }
  948. if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  949. /* During scanning chan info is reported twice for each
  950. * visited channel. The reported cycle count is global
  951. * and per-channel cycle count must be calculated */
  952. cycle_count -= ar->survey_last_cycle_count;
  953. rx_clear_count -= ar->survey_last_rx_clear_count;
  954. survey = &ar->survey[idx];
  955. survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count);
  956. survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
  957. survey->noise = noise_floor;
  958. survey->filled = SURVEY_INFO_CHANNEL_TIME |
  959. SURVEY_INFO_CHANNEL_TIME_RX |
  960. SURVEY_INFO_NOISE_DBM;
  961. }
  962. ar->survey_last_rx_clear_count = rx_clear_count;
  963. ar->survey_last_cycle_count = cycle_count;
  964. exit:
  965. spin_unlock_bh(&ar->data_lock);
  966. }
  967. static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
  968. {
  969. ath10k_dbg(ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
  970. }
  971. static int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
  972. {
  973. ath10k_dbg(ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
  974. skb->len);
  975. trace_ath10k_wmi_dbglog(skb->data, skb->len);
  976. return 0;
  977. }
  978. static void ath10k_wmi_event_update_stats(struct ath10k *ar,
  979. struct sk_buff *skb)
  980. {
  981. struct wmi_stats_event *ev = (struct wmi_stats_event *)skb->data;
  982. ath10k_dbg(ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
  983. ath10k_debug_read_target_stats(ar, ev);
  984. }
  985. static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar,
  986. struct sk_buff *skb)
  987. {
  988. struct wmi_vdev_start_response_event *ev;
  989. ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
  990. ev = (struct wmi_vdev_start_response_event *)skb->data;
  991. if (WARN_ON(__le32_to_cpu(ev->status)))
  992. return;
  993. complete(&ar->vdev_setup_done);
  994. }
  995. static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar,
  996. struct sk_buff *skb)
  997. {
  998. ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
  999. complete(&ar->vdev_setup_done);
  1000. }
  1001. static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar,
  1002. struct sk_buff *skb)
  1003. {
  1004. struct wmi_peer_sta_kickout_event *ev;
  1005. struct ieee80211_sta *sta;
  1006. ev = (struct wmi_peer_sta_kickout_event *)skb->data;
  1007. ath10k_dbg(ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
  1008. ev->peer_macaddr.addr);
  1009. rcu_read_lock();
  1010. sta = ieee80211_find_sta_by_ifaddr(ar->hw, ev->peer_macaddr.addr, NULL);
  1011. if (!sta) {
  1012. ath10k_warn("Spurious quick kickout for STA %pM\n",
  1013. ev->peer_macaddr.addr);
  1014. goto exit;
  1015. }
  1016. ieee80211_report_low_ack(sta, 10);
  1017. exit:
  1018. rcu_read_unlock();
  1019. }
  1020. /*
  1021. * FIXME
  1022. *
  1023. * We don't report to mac80211 sleep state of connected
  1024. * stations. Due to this mac80211 can't fill in TIM IE
  1025. * correctly.
  1026. *
  1027. * I know of no way of getting nullfunc frames that contain
  1028. * sleep transition from connected stations - these do not
  1029. * seem to be sent from the target to the host. There also
  1030. * doesn't seem to be a dedicated event for that. So the
  1031. * only way left to do this would be to read tim_bitmap
  1032. * during SWBA.
  1033. *
  1034. * We could probably try using tim_bitmap from SWBA to tell
  1035. * mac80211 which stations are asleep and which are not. The
  1036. * problem here is calling mac80211 functions so many times
  1037. * could take too long and make us miss the time to submit
  1038. * the beacon to the target.
  1039. *
  1040. * So as a workaround we try to extend the TIM IE if there
  1041. * is unicast buffered for stations with aid > 7 and fill it
  1042. * in ourselves.
  1043. */
  1044. static void ath10k_wmi_update_tim(struct ath10k *ar,
  1045. struct ath10k_vif *arvif,
  1046. struct sk_buff *bcn,
  1047. struct wmi_bcn_info *bcn_info)
  1048. {
  1049. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
  1050. struct ieee80211_tim_ie *tim;
  1051. u8 *ies, *ie;
  1052. u8 ie_len, pvm_len;
  1053. /* if next SWBA has no tim_changed the tim_bitmap is garbage.
  1054. * we must copy the bitmap upon change and reuse it later */
  1055. if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) {
  1056. int i;
  1057. BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
  1058. sizeof(bcn_info->tim_info.tim_bitmap));
  1059. for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
  1060. __le32 t = bcn_info->tim_info.tim_bitmap[i / 4];
  1061. u32 v = __le32_to_cpu(t);
  1062. arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
  1063. }
  1064. /* FW reports either length 0 or 16
  1065. * so we calculate this on our own */
  1066. arvif->u.ap.tim_len = 0;
  1067. for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
  1068. if (arvif->u.ap.tim_bitmap[i])
  1069. arvif->u.ap.tim_len = i;
  1070. arvif->u.ap.tim_len++;
  1071. }
  1072. ies = bcn->data;
  1073. ies += ieee80211_hdrlen(hdr->frame_control);
  1074. ies += 12; /* fixed parameters */
  1075. ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
  1076. (u8 *)skb_tail_pointer(bcn) - ies);
  1077. if (!ie) {
  1078. if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
  1079. ath10k_warn("no tim ie found;\n");
  1080. return;
  1081. }
  1082. tim = (void *)ie + 2;
  1083. ie_len = ie[1];
  1084. pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
  1085. if (pvm_len < arvif->u.ap.tim_len) {
  1086. int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
  1087. int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
  1088. void *next_ie = ie + 2 + ie_len;
  1089. if (skb_put(bcn, expand_size)) {
  1090. memmove(next_ie + expand_size, next_ie, move_size);
  1091. ie[1] += expand_size;
  1092. ie_len += expand_size;
  1093. pvm_len += expand_size;
  1094. } else {
  1095. ath10k_warn("tim expansion failed\n");
  1096. }
  1097. }
  1098. if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
  1099. ath10k_warn("tim pvm length is too great (%d)\n", pvm_len);
  1100. return;
  1101. }
  1102. tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast);
  1103. memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
  1104. if (tim->dtim_count == 0) {
  1105. ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true;
  1106. if (__le32_to_cpu(bcn_info->tim_info.tim_mcast) == 1)
  1107. ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true;
  1108. }
  1109. ath10k_dbg(ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
  1110. tim->dtim_count, tim->dtim_period,
  1111. tim->bitmap_ctrl, pvm_len);
  1112. }
  1113. static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
  1114. struct wmi_p2p_noa_info *noa)
  1115. {
  1116. struct ieee80211_p2p_noa_attr *noa_attr;
  1117. u8 ctwindow_oppps = noa->ctwindow_oppps;
  1118. u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
  1119. bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
  1120. __le16 *noa_attr_len;
  1121. u16 attr_len;
  1122. u8 noa_descriptors = noa->num_descriptors;
  1123. int i;
  1124. /* P2P IE */
  1125. data[0] = WLAN_EID_VENDOR_SPECIFIC;
  1126. data[1] = len - 2;
  1127. data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
  1128. data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
  1129. data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
  1130. data[5] = WLAN_OUI_TYPE_WFA_P2P;
  1131. /* NOA ATTR */
  1132. data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
  1133. noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
  1134. noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
  1135. noa_attr->index = noa->index;
  1136. noa_attr->oppps_ctwindow = ctwindow;
  1137. if (oppps)
  1138. noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
  1139. for (i = 0; i < noa_descriptors; i++) {
  1140. noa_attr->desc[i].count =
  1141. __le32_to_cpu(noa->descriptors[i].type_count);
  1142. noa_attr->desc[i].duration = noa->descriptors[i].duration;
  1143. noa_attr->desc[i].interval = noa->descriptors[i].interval;
  1144. noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
  1145. }
  1146. attr_len = 2; /* index + oppps_ctwindow */
  1147. attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
  1148. *noa_attr_len = __cpu_to_le16(attr_len);
  1149. }
  1150. static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa)
  1151. {
  1152. u32 len = 0;
  1153. u8 noa_descriptors = noa->num_descriptors;
  1154. u8 opp_ps_info = noa->ctwindow_oppps;
  1155. bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
  1156. if (!noa_descriptors && !opps_enabled)
  1157. return len;
  1158. len += 1 + 1 + 4; /* EID + len + OUI */
  1159. len += 1 + 2; /* noa attr + attr len */
  1160. len += 1 + 1; /* index + oppps_ctwindow */
  1161. len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
  1162. return len;
  1163. }
  1164. static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
  1165. struct sk_buff *bcn,
  1166. struct wmi_bcn_info *bcn_info)
  1167. {
  1168. struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info;
  1169. u8 *new_data, *old_data = arvif->u.ap.noa_data;
  1170. u32 new_len;
  1171. if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
  1172. return;
  1173. ath10k_dbg(ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
  1174. if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
  1175. new_len = ath10k_p2p_calc_noa_ie_len(noa);
  1176. if (!new_len)
  1177. goto cleanup;
  1178. new_data = kmalloc(new_len, GFP_ATOMIC);
  1179. if (!new_data)
  1180. goto cleanup;
  1181. ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
  1182. spin_lock_bh(&ar->data_lock);
  1183. arvif->u.ap.noa_data = new_data;
  1184. arvif->u.ap.noa_len = new_len;
  1185. spin_unlock_bh(&ar->data_lock);
  1186. kfree(old_data);
  1187. }
  1188. if (arvif->u.ap.noa_data)
  1189. if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
  1190. memcpy(skb_put(bcn, arvif->u.ap.noa_len),
  1191. arvif->u.ap.noa_data,
  1192. arvif->u.ap.noa_len);
  1193. return;
  1194. cleanup:
  1195. spin_lock_bh(&ar->data_lock);
  1196. arvif->u.ap.noa_data = NULL;
  1197. arvif->u.ap.noa_len = 0;
  1198. spin_unlock_bh(&ar->data_lock);
  1199. kfree(old_data);
  1200. }
  1201. static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
  1202. {
  1203. struct wmi_host_swba_event *ev;
  1204. u32 map;
  1205. int i = -1;
  1206. struct wmi_bcn_info *bcn_info;
  1207. struct ath10k_vif *arvif;
  1208. struct sk_buff *bcn;
  1209. int ret, vdev_id = 0;
  1210. ev = (struct wmi_host_swba_event *)skb->data;
  1211. map = __le32_to_cpu(ev->vdev_map);
  1212. ath10k_dbg(ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
  1213. ev->vdev_map);
  1214. for (; map; map >>= 1, vdev_id++) {
  1215. if (!(map & 0x1))
  1216. continue;
  1217. i++;
  1218. if (i >= WMI_MAX_AP_VDEV) {
  1219. ath10k_warn("swba has corrupted vdev map\n");
  1220. break;
  1221. }
  1222. bcn_info = &ev->bcn_info[i];
  1223. ath10k_dbg(ATH10K_DBG_MGMT,
  1224. "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
  1225. i,
  1226. __le32_to_cpu(bcn_info->tim_info.tim_len),
  1227. __le32_to_cpu(bcn_info->tim_info.tim_mcast),
  1228. __le32_to_cpu(bcn_info->tim_info.tim_changed),
  1229. __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending),
  1230. __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]),
  1231. __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]),
  1232. __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]),
  1233. __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0]));
  1234. arvif = ath10k_get_arvif(ar, vdev_id);
  1235. if (arvif == NULL) {
  1236. ath10k_warn("no vif for vdev_id %d found\n", vdev_id);
  1237. continue;
  1238. }
  1239. /* There are no completions for beacons so wait for next SWBA
  1240. * before telling mac80211 to decrement CSA counter
  1241. *
  1242. * Once CSA counter is completed stop sending beacons until
  1243. * actual channel switch is done */
  1244. if (arvif->vif->csa_active &&
  1245. ieee80211_csa_is_complete(arvif->vif)) {
  1246. ieee80211_csa_finish(arvif->vif);
  1247. continue;
  1248. }
  1249. bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
  1250. if (!bcn) {
  1251. ath10k_warn("could not get mac80211 beacon\n");
  1252. continue;
  1253. }
  1254. ath10k_tx_h_seq_no(bcn);
  1255. ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info);
  1256. ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info);
  1257. spin_lock_bh(&ar->data_lock);
  1258. if (arvif->beacon) {
  1259. if (!arvif->beacon_sent)
  1260. ath10k_warn("SWBA overrun on vdev %d\n",
  1261. arvif->vdev_id);
  1262. dma_unmap_single(arvif->ar->dev,
  1263. ATH10K_SKB_CB(arvif->beacon)->paddr,
  1264. arvif->beacon->len, DMA_TO_DEVICE);
  1265. dev_kfree_skb_any(arvif->beacon);
  1266. arvif->beacon = NULL;
  1267. }
  1268. ATH10K_SKB_CB(bcn)->paddr = dma_map_single(arvif->ar->dev,
  1269. bcn->data, bcn->len,
  1270. DMA_TO_DEVICE);
  1271. ret = dma_mapping_error(arvif->ar->dev,
  1272. ATH10K_SKB_CB(bcn)->paddr);
  1273. if (ret) {
  1274. ath10k_warn("failed to map beacon: %d\n", ret);
  1275. dev_kfree_skb_any(bcn);
  1276. goto skip;
  1277. }
  1278. arvif->beacon = bcn;
  1279. arvif->beacon_sent = false;
  1280. ath10k_wmi_tx_beacon_nowait(arvif);
  1281. skip:
  1282. spin_unlock_bh(&ar->data_lock);
  1283. }
  1284. }
  1285. static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
  1286. struct sk_buff *skb)
  1287. {
  1288. ath10k_dbg(ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
  1289. }
  1290. static void ath10k_dfs_radar_report(struct ath10k *ar,
  1291. struct wmi_single_phyerr_rx_event *event,
  1292. struct phyerr_radar_report *rr,
  1293. u64 tsf)
  1294. {
  1295. u32 reg0, reg1, tsf32l;
  1296. struct pulse_event pe;
  1297. u64 tsf64;
  1298. u8 rssi, width;
  1299. reg0 = __le32_to_cpu(rr->reg0);
  1300. reg1 = __le32_to_cpu(rr->reg1);
  1301. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1302. "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
  1303. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
  1304. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
  1305. MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
  1306. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
  1307. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1308. "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
  1309. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
  1310. MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
  1311. MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
  1312. MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
  1313. MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
  1314. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1315. "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
  1316. MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
  1317. MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
  1318. if (!ar->dfs_detector)
  1319. return;
  1320. /* report event to DFS pattern detector */
  1321. tsf32l = __le32_to_cpu(event->hdr.tsf_timestamp);
  1322. tsf64 = tsf & (~0xFFFFFFFFULL);
  1323. tsf64 |= tsf32l;
  1324. width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
  1325. rssi = event->hdr.rssi_combined;
  1326. /* hardware store this as 8 bit signed value,
  1327. * set to zero if negative number
  1328. */
  1329. if (rssi & 0x80)
  1330. rssi = 0;
  1331. pe.ts = tsf64;
  1332. pe.freq = ar->hw->conf.chandef.chan->center_freq;
  1333. pe.width = width;
  1334. pe.rssi = rssi;
  1335. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1336. "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
  1337. pe.freq, pe.width, pe.rssi, pe.ts);
  1338. ATH10K_DFS_STAT_INC(ar, pulses_detected);
  1339. if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
  1340. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1341. "dfs no pulse pattern detected, yet\n");
  1342. return;
  1343. }
  1344. ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs radar detected\n");
  1345. ATH10K_DFS_STAT_INC(ar, radar_detected);
  1346. /* Control radar events reporting in debugfs file
  1347. dfs_block_radar_events */
  1348. if (ar->dfs_block_radar_events) {
  1349. ath10k_info("DFS Radar detected, but ignored as requested\n");
  1350. return;
  1351. }
  1352. ieee80211_radar_detected(ar->hw);
  1353. }
  1354. static int ath10k_dfs_fft_report(struct ath10k *ar,
  1355. struct wmi_single_phyerr_rx_event *event,
  1356. struct phyerr_fft_report *fftr,
  1357. u64 tsf)
  1358. {
  1359. u32 reg0, reg1;
  1360. u8 rssi, peak_mag;
  1361. reg0 = __le32_to_cpu(fftr->reg0);
  1362. reg1 = __le32_to_cpu(fftr->reg1);
  1363. rssi = event->hdr.rssi_combined;
  1364. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1365. "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
  1366. MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
  1367. MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
  1368. MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
  1369. MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
  1370. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1371. "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
  1372. MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
  1373. MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
  1374. MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
  1375. MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
  1376. peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
  1377. /* false event detection */
  1378. if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
  1379. peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
  1380. ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
  1381. ATH10K_DFS_STAT_INC(ar, pulses_discarded);
  1382. return -EINVAL;
  1383. }
  1384. return 0;
  1385. }
  1386. static void ath10k_wmi_event_dfs(struct ath10k *ar,
  1387. struct wmi_single_phyerr_rx_event *event,
  1388. u64 tsf)
  1389. {
  1390. int buf_len, tlv_len, res, i = 0;
  1391. struct phyerr_tlv *tlv;
  1392. struct phyerr_radar_report *rr;
  1393. struct phyerr_fft_report *fftr;
  1394. u8 *tlv_buf;
  1395. buf_len = __le32_to_cpu(event->hdr.buf_len);
  1396. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1397. "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
  1398. event->hdr.phy_err_code, event->hdr.rssi_combined,
  1399. __le32_to_cpu(event->hdr.tsf_timestamp), tsf, buf_len);
  1400. /* Skip event if DFS disabled */
  1401. if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
  1402. return;
  1403. ATH10K_DFS_STAT_INC(ar, pulses_total);
  1404. while (i < buf_len) {
  1405. if (i + sizeof(*tlv) > buf_len) {
  1406. ath10k_warn("too short buf for tlv header (%d)\n", i);
  1407. return;
  1408. }
  1409. tlv = (struct phyerr_tlv *)&event->bufp[i];
  1410. tlv_len = __le16_to_cpu(tlv->len);
  1411. tlv_buf = &event->bufp[i + sizeof(*tlv)];
  1412. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1413. "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
  1414. tlv_len, tlv->tag, tlv->sig);
  1415. switch (tlv->tag) {
  1416. case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
  1417. if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
  1418. ath10k_warn("too short radar pulse summary (%d)\n",
  1419. i);
  1420. return;
  1421. }
  1422. rr = (struct phyerr_radar_report *)tlv_buf;
  1423. ath10k_dfs_radar_report(ar, event, rr, tsf);
  1424. break;
  1425. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  1426. if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
  1427. ath10k_warn("too short fft report (%d)\n", i);
  1428. return;
  1429. }
  1430. fftr = (struct phyerr_fft_report *)tlv_buf;
  1431. res = ath10k_dfs_fft_report(ar, event, fftr, tsf);
  1432. if (res)
  1433. return;
  1434. break;
  1435. }
  1436. i += sizeof(*tlv) + tlv_len;
  1437. }
  1438. }
  1439. static void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
  1440. struct wmi_single_phyerr_rx_event *event,
  1441. u64 tsf)
  1442. {
  1443. ath10k_dbg(ATH10K_DBG_WMI, "wmi event spectral scan\n");
  1444. }
  1445. static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
  1446. {
  1447. struct wmi_comb_phyerr_rx_event *comb_event;
  1448. struct wmi_single_phyerr_rx_event *event;
  1449. u32 count, i, buf_len, phy_err_code;
  1450. u64 tsf;
  1451. int left_len = skb->len;
  1452. ATH10K_DFS_STAT_INC(ar, phy_errors);
  1453. /* Check if combined event available */
  1454. if (left_len < sizeof(*comb_event)) {
  1455. ath10k_warn("wmi phyerr combined event wrong len\n");
  1456. return;
  1457. }
  1458. left_len -= sizeof(*comb_event);
  1459. /* Check number of included events */
  1460. comb_event = (struct wmi_comb_phyerr_rx_event *)skb->data;
  1461. count = __le32_to_cpu(comb_event->hdr.num_phyerr_events);
  1462. tsf = __le32_to_cpu(comb_event->hdr.tsf_u32);
  1463. tsf <<= 32;
  1464. tsf |= __le32_to_cpu(comb_event->hdr.tsf_l32);
  1465. ath10k_dbg(ATH10K_DBG_WMI,
  1466. "wmi event phyerr count %d tsf64 0x%llX\n",
  1467. count, tsf);
  1468. event = (struct wmi_single_phyerr_rx_event *)comb_event->bufp;
  1469. for (i = 0; i < count; i++) {
  1470. /* Check if we can read event header */
  1471. if (left_len < sizeof(*event)) {
  1472. ath10k_warn("single event (%d) wrong head len\n", i);
  1473. return;
  1474. }
  1475. left_len -= sizeof(*event);
  1476. buf_len = __le32_to_cpu(event->hdr.buf_len);
  1477. phy_err_code = event->hdr.phy_err_code;
  1478. if (left_len < buf_len) {
  1479. ath10k_warn("single event (%d) wrong buf len\n", i);
  1480. return;
  1481. }
  1482. left_len -= buf_len;
  1483. switch (phy_err_code) {
  1484. case PHY_ERROR_RADAR:
  1485. ath10k_wmi_event_dfs(ar, event, tsf);
  1486. break;
  1487. case PHY_ERROR_SPECTRAL_SCAN:
  1488. ath10k_wmi_event_spectral_scan(ar, event, tsf);
  1489. break;
  1490. case PHY_ERROR_FALSE_RADAR_EXT:
  1491. ath10k_wmi_event_dfs(ar, event, tsf);
  1492. ath10k_wmi_event_spectral_scan(ar, event, tsf);
  1493. break;
  1494. default:
  1495. break;
  1496. }
  1497. event += sizeof(*event) + buf_len;
  1498. }
  1499. }
  1500. static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
  1501. {
  1502. ath10k_dbg(ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
  1503. }
  1504. static void ath10k_wmi_event_profile_match(struct ath10k *ar,
  1505. struct sk_buff *skb)
  1506. {
  1507. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
  1508. }
  1509. static void ath10k_wmi_event_debug_print(struct ath10k *ar,
  1510. struct sk_buff *skb)
  1511. {
  1512. char buf[101], c;
  1513. int i;
  1514. for (i = 0; i < sizeof(buf) - 1; i++) {
  1515. if (i >= skb->len)
  1516. break;
  1517. c = skb->data[i];
  1518. if (c == '\0')
  1519. break;
  1520. if (isascii(c) && isprint(c))
  1521. buf[i] = c;
  1522. else
  1523. buf[i] = '.';
  1524. }
  1525. if (i == sizeof(buf) - 1)
  1526. ath10k_warn("wmi debug print truncated: %d\n", skb->len);
  1527. /* for some reason the debug prints end with \n, remove that */
  1528. if (skb->data[i - 1] == '\n')
  1529. i--;
  1530. /* the last byte is always reserved for the null character */
  1531. buf[i] = '\0';
  1532. ath10k_dbg(ATH10K_DBG_WMI, "wmi event debug print '%s'\n", buf);
  1533. }
  1534. static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
  1535. {
  1536. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
  1537. }
  1538. static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar,
  1539. struct sk_buff *skb)
  1540. {
  1541. ath10k_dbg(ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
  1542. }
  1543. static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
  1544. struct sk_buff *skb)
  1545. {
  1546. ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
  1547. }
  1548. static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
  1549. struct sk_buff *skb)
  1550. {
  1551. ath10k_dbg(ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
  1552. }
  1553. static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar,
  1554. struct sk_buff *skb)
  1555. {
  1556. ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
  1557. }
  1558. static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar,
  1559. struct sk_buff *skb)
  1560. {
  1561. ath10k_dbg(ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
  1562. }
  1563. static void ath10k_wmi_event_dcs_interference(struct ath10k *ar,
  1564. struct sk_buff *skb)
  1565. {
  1566. ath10k_dbg(ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
  1567. }
  1568. static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar,
  1569. struct sk_buff *skb)
  1570. {
  1571. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
  1572. }
  1573. static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar,
  1574. struct sk_buff *skb)
  1575. {
  1576. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
  1577. }
  1578. static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
  1579. struct sk_buff *skb)
  1580. {
  1581. ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
  1582. }
  1583. static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar,
  1584. struct sk_buff *skb)
  1585. {
  1586. ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
  1587. }
  1588. static void ath10k_wmi_event_delba_complete(struct ath10k *ar,
  1589. struct sk_buff *skb)
  1590. {
  1591. ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
  1592. }
  1593. static void ath10k_wmi_event_addba_complete(struct ath10k *ar,
  1594. struct sk_buff *skb)
  1595. {
  1596. ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
  1597. }
  1598. static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
  1599. struct sk_buff *skb)
  1600. {
  1601. ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
  1602. }
  1603. static void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar,
  1604. struct sk_buff *skb)
  1605. {
  1606. ath10k_dbg(ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
  1607. }
  1608. static void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar,
  1609. struct sk_buff *skb)
  1610. {
  1611. ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
  1612. }
  1613. static void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar,
  1614. struct sk_buff *skb)
  1615. {
  1616. ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
  1617. }
  1618. static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
  1619. u32 num_units, u32 unit_len)
  1620. {
  1621. dma_addr_t paddr;
  1622. u32 pool_size;
  1623. int idx = ar->wmi.num_mem_chunks;
  1624. pool_size = num_units * round_up(unit_len, 4);
  1625. if (!pool_size)
  1626. return -EINVAL;
  1627. ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
  1628. pool_size,
  1629. &paddr,
  1630. GFP_ATOMIC);
  1631. if (!ar->wmi.mem_chunks[idx].vaddr) {
  1632. ath10k_warn("failed to allocate memory chunk\n");
  1633. return -ENOMEM;
  1634. }
  1635. memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
  1636. ar->wmi.mem_chunks[idx].paddr = paddr;
  1637. ar->wmi.mem_chunks[idx].len = pool_size;
  1638. ar->wmi.mem_chunks[idx].req_id = req_id;
  1639. ar->wmi.num_mem_chunks++;
  1640. return 0;
  1641. }
  1642. static void ath10k_wmi_service_ready_event_rx(struct ath10k *ar,
  1643. struct sk_buff *skb)
  1644. {
  1645. struct wmi_service_ready_event *ev = (void *)skb->data;
  1646. if (skb->len < sizeof(*ev)) {
  1647. ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
  1648. skb->len, sizeof(*ev));
  1649. return;
  1650. }
  1651. ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
  1652. ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
  1653. ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
  1654. ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
  1655. ar->fw_version_major =
  1656. (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
  1657. ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
  1658. ar->fw_version_release =
  1659. (__le32_to_cpu(ev->sw_version_1) & 0xffff0000) >> 16;
  1660. ar->fw_version_build = (__le32_to_cpu(ev->sw_version_1) & 0x0000ffff);
  1661. ar->phy_capability = __le32_to_cpu(ev->phy_capability);
  1662. ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
  1663. /* only manually set fw features when not using FW IE format */
  1664. if (ar->fw_api == 1 && ar->fw_version_build > 636)
  1665. set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
  1666. if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
  1667. ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
  1668. ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
  1669. ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
  1670. }
  1671. ar->ath_common.regulatory.current_rd =
  1672. __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
  1673. ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
  1674. sizeof(ev->wmi_service_bitmap));
  1675. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  1676. snprintf(ar->hw->wiphy->fw_version,
  1677. sizeof(ar->hw->wiphy->fw_version),
  1678. "%u.%u.%u.%u",
  1679. ar->fw_version_major,
  1680. ar->fw_version_minor,
  1681. ar->fw_version_release,
  1682. ar->fw_version_build);
  1683. }
  1684. /* FIXME: it probably should be better to support this */
  1685. if (__le32_to_cpu(ev->num_mem_reqs) > 0) {
  1686. ath10k_warn("target requested %d memory chunks; ignoring\n",
  1687. __le32_to_cpu(ev->num_mem_reqs));
  1688. }
  1689. ath10k_dbg(ATH10K_DBG_WMI,
  1690. "wmi event service ready sw_ver 0x%08x sw_ver1 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
  1691. __le32_to_cpu(ev->sw_version),
  1692. __le32_to_cpu(ev->sw_version_1),
  1693. __le32_to_cpu(ev->abi_version),
  1694. __le32_to_cpu(ev->phy_capability),
  1695. __le32_to_cpu(ev->ht_cap_info),
  1696. __le32_to_cpu(ev->vht_cap_info),
  1697. __le32_to_cpu(ev->vht_supp_mcs),
  1698. __le32_to_cpu(ev->sys_cap_info),
  1699. __le32_to_cpu(ev->num_mem_reqs),
  1700. __le32_to_cpu(ev->num_rf_chains));
  1701. complete(&ar->wmi.service_ready);
  1702. }
  1703. static void ath10k_wmi_10x_service_ready_event_rx(struct ath10k *ar,
  1704. struct sk_buff *skb)
  1705. {
  1706. u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
  1707. int ret;
  1708. struct wmi_service_ready_event_10x *ev = (void *)skb->data;
  1709. if (skb->len < sizeof(*ev)) {
  1710. ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
  1711. skb->len, sizeof(*ev));
  1712. return;
  1713. }
  1714. ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
  1715. ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
  1716. ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
  1717. ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
  1718. ar->fw_version_major =
  1719. (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
  1720. ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
  1721. ar->phy_capability = __le32_to_cpu(ev->phy_capability);
  1722. ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
  1723. if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
  1724. ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
  1725. ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
  1726. ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
  1727. }
  1728. ar->ath_common.regulatory.current_rd =
  1729. __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
  1730. ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
  1731. sizeof(ev->wmi_service_bitmap));
  1732. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  1733. snprintf(ar->hw->wiphy->fw_version,
  1734. sizeof(ar->hw->wiphy->fw_version),
  1735. "%u.%u",
  1736. ar->fw_version_major,
  1737. ar->fw_version_minor);
  1738. }
  1739. num_mem_reqs = __le32_to_cpu(ev->num_mem_reqs);
  1740. if (num_mem_reqs > ATH10K_MAX_MEM_REQS) {
  1741. ath10k_warn("requested memory chunks number (%d) exceeds the limit\n",
  1742. num_mem_reqs);
  1743. return;
  1744. }
  1745. if (!num_mem_reqs)
  1746. goto exit;
  1747. ath10k_dbg(ATH10K_DBG_WMI, "firmware has requested %d memory chunks\n",
  1748. num_mem_reqs);
  1749. for (i = 0; i < num_mem_reqs; ++i) {
  1750. req_id = __le32_to_cpu(ev->mem_reqs[i].req_id);
  1751. num_units = __le32_to_cpu(ev->mem_reqs[i].num_units);
  1752. unit_size = __le32_to_cpu(ev->mem_reqs[i].unit_size);
  1753. num_unit_info = __le32_to_cpu(ev->mem_reqs[i].num_unit_info);
  1754. if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
  1755. /* number of units to allocate is number of
  1756. * peers, 1 extra for self peer on target */
  1757. /* this needs to be tied, host and target
  1758. * can get out of sync */
  1759. num_units = TARGET_10X_NUM_PEERS + 1;
  1760. else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
  1761. num_units = TARGET_10X_NUM_VDEVS + 1;
  1762. ath10k_dbg(ATH10K_DBG_WMI,
  1763. "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
  1764. req_id,
  1765. __le32_to_cpu(ev->mem_reqs[i].num_units),
  1766. num_unit_info,
  1767. unit_size,
  1768. num_units);
  1769. ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
  1770. unit_size);
  1771. if (ret)
  1772. return;
  1773. }
  1774. exit:
  1775. ath10k_dbg(ATH10K_DBG_WMI,
  1776. "wmi event service ready sw_ver 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
  1777. __le32_to_cpu(ev->sw_version),
  1778. __le32_to_cpu(ev->abi_version),
  1779. __le32_to_cpu(ev->phy_capability),
  1780. __le32_to_cpu(ev->ht_cap_info),
  1781. __le32_to_cpu(ev->vht_cap_info),
  1782. __le32_to_cpu(ev->vht_supp_mcs),
  1783. __le32_to_cpu(ev->sys_cap_info),
  1784. __le32_to_cpu(ev->num_mem_reqs),
  1785. __le32_to_cpu(ev->num_rf_chains));
  1786. complete(&ar->wmi.service_ready);
  1787. }
  1788. static int ath10k_wmi_ready_event_rx(struct ath10k *ar, struct sk_buff *skb)
  1789. {
  1790. struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data;
  1791. if (WARN_ON(skb->len < sizeof(*ev)))
  1792. return -EINVAL;
  1793. memcpy(ar->mac_addr, ev->mac_addr.addr, ETH_ALEN);
  1794. ath10k_dbg(ATH10K_DBG_WMI,
  1795. "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d skb->len %i ev-sz %zu\n",
  1796. __le32_to_cpu(ev->sw_version),
  1797. __le32_to_cpu(ev->abi_version),
  1798. ev->mac_addr.addr,
  1799. __le32_to_cpu(ev->status), skb->len, sizeof(*ev));
  1800. complete(&ar->wmi.unified_ready);
  1801. return 0;
  1802. }
  1803. static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb)
  1804. {
  1805. struct wmi_cmd_hdr *cmd_hdr;
  1806. enum wmi_event_id id;
  1807. u16 len;
  1808. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1809. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  1810. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  1811. return;
  1812. len = skb->len;
  1813. trace_ath10k_wmi_event(id, skb->data, skb->len);
  1814. switch (id) {
  1815. case WMI_MGMT_RX_EVENTID:
  1816. ath10k_wmi_event_mgmt_rx(ar, skb);
  1817. /* mgmt_rx() owns the skb now! */
  1818. return;
  1819. case WMI_SCAN_EVENTID:
  1820. ath10k_wmi_event_scan(ar, skb);
  1821. break;
  1822. case WMI_CHAN_INFO_EVENTID:
  1823. ath10k_wmi_event_chan_info(ar, skb);
  1824. break;
  1825. case WMI_ECHO_EVENTID:
  1826. ath10k_wmi_event_echo(ar, skb);
  1827. break;
  1828. case WMI_DEBUG_MESG_EVENTID:
  1829. ath10k_wmi_event_debug_mesg(ar, skb);
  1830. break;
  1831. case WMI_UPDATE_STATS_EVENTID:
  1832. ath10k_wmi_event_update_stats(ar, skb);
  1833. break;
  1834. case WMI_VDEV_START_RESP_EVENTID:
  1835. ath10k_wmi_event_vdev_start_resp(ar, skb);
  1836. break;
  1837. case WMI_VDEV_STOPPED_EVENTID:
  1838. ath10k_wmi_event_vdev_stopped(ar, skb);
  1839. break;
  1840. case WMI_PEER_STA_KICKOUT_EVENTID:
  1841. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  1842. break;
  1843. case WMI_HOST_SWBA_EVENTID:
  1844. ath10k_wmi_event_host_swba(ar, skb);
  1845. break;
  1846. case WMI_TBTTOFFSET_UPDATE_EVENTID:
  1847. ath10k_wmi_event_tbttoffset_update(ar, skb);
  1848. break;
  1849. case WMI_PHYERR_EVENTID:
  1850. ath10k_wmi_event_phyerr(ar, skb);
  1851. break;
  1852. case WMI_ROAM_EVENTID:
  1853. ath10k_wmi_event_roam(ar, skb);
  1854. break;
  1855. case WMI_PROFILE_MATCH:
  1856. ath10k_wmi_event_profile_match(ar, skb);
  1857. break;
  1858. case WMI_DEBUG_PRINT_EVENTID:
  1859. ath10k_wmi_event_debug_print(ar, skb);
  1860. break;
  1861. case WMI_PDEV_QVIT_EVENTID:
  1862. ath10k_wmi_event_pdev_qvit(ar, skb);
  1863. break;
  1864. case WMI_WLAN_PROFILE_DATA_EVENTID:
  1865. ath10k_wmi_event_wlan_profile_data(ar, skb);
  1866. break;
  1867. case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
  1868. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  1869. break;
  1870. case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
  1871. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  1872. break;
  1873. case WMI_RTT_ERROR_REPORT_EVENTID:
  1874. ath10k_wmi_event_rtt_error_report(ar, skb);
  1875. break;
  1876. case WMI_WOW_WAKEUP_HOST_EVENTID:
  1877. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  1878. break;
  1879. case WMI_DCS_INTERFERENCE_EVENTID:
  1880. ath10k_wmi_event_dcs_interference(ar, skb);
  1881. break;
  1882. case WMI_PDEV_TPC_CONFIG_EVENTID:
  1883. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  1884. break;
  1885. case WMI_PDEV_FTM_INTG_EVENTID:
  1886. ath10k_wmi_event_pdev_ftm_intg(ar, skb);
  1887. break;
  1888. case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  1889. ath10k_wmi_event_gtk_offload_status(ar, skb);
  1890. break;
  1891. case WMI_GTK_REKEY_FAIL_EVENTID:
  1892. ath10k_wmi_event_gtk_rekey_fail(ar, skb);
  1893. break;
  1894. case WMI_TX_DELBA_COMPLETE_EVENTID:
  1895. ath10k_wmi_event_delba_complete(ar, skb);
  1896. break;
  1897. case WMI_TX_ADDBA_COMPLETE_EVENTID:
  1898. ath10k_wmi_event_addba_complete(ar, skb);
  1899. break;
  1900. case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
  1901. ath10k_wmi_event_vdev_install_key_complete(ar, skb);
  1902. break;
  1903. case WMI_SERVICE_READY_EVENTID:
  1904. ath10k_wmi_service_ready_event_rx(ar, skb);
  1905. break;
  1906. case WMI_READY_EVENTID:
  1907. ath10k_wmi_ready_event_rx(ar, skb);
  1908. break;
  1909. default:
  1910. ath10k_warn("Unknown eventid: %d\n", id);
  1911. break;
  1912. }
  1913. dev_kfree_skb(skb);
  1914. }
  1915. static void ath10k_wmi_10x_process_rx(struct ath10k *ar, struct sk_buff *skb)
  1916. {
  1917. struct wmi_cmd_hdr *cmd_hdr;
  1918. enum wmi_10x_event_id id;
  1919. u16 len;
  1920. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1921. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  1922. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  1923. return;
  1924. len = skb->len;
  1925. trace_ath10k_wmi_event(id, skb->data, skb->len);
  1926. switch (id) {
  1927. case WMI_10X_MGMT_RX_EVENTID:
  1928. ath10k_wmi_event_mgmt_rx(ar, skb);
  1929. /* mgmt_rx() owns the skb now! */
  1930. return;
  1931. case WMI_10X_SCAN_EVENTID:
  1932. ath10k_wmi_event_scan(ar, skb);
  1933. break;
  1934. case WMI_10X_CHAN_INFO_EVENTID:
  1935. ath10k_wmi_event_chan_info(ar, skb);
  1936. break;
  1937. case WMI_10X_ECHO_EVENTID:
  1938. ath10k_wmi_event_echo(ar, skb);
  1939. break;
  1940. case WMI_10X_DEBUG_MESG_EVENTID:
  1941. ath10k_wmi_event_debug_mesg(ar, skb);
  1942. break;
  1943. case WMI_10X_UPDATE_STATS_EVENTID:
  1944. ath10k_wmi_event_update_stats(ar, skb);
  1945. break;
  1946. case WMI_10X_VDEV_START_RESP_EVENTID:
  1947. ath10k_wmi_event_vdev_start_resp(ar, skb);
  1948. break;
  1949. case WMI_10X_VDEV_STOPPED_EVENTID:
  1950. ath10k_wmi_event_vdev_stopped(ar, skb);
  1951. break;
  1952. case WMI_10X_PEER_STA_KICKOUT_EVENTID:
  1953. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  1954. break;
  1955. case WMI_10X_HOST_SWBA_EVENTID:
  1956. ath10k_wmi_event_host_swba(ar, skb);
  1957. break;
  1958. case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
  1959. ath10k_wmi_event_tbttoffset_update(ar, skb);
  1960. break;
  1961. case WMI_10X_PHYERR_EVENTID:
  1962. ath10k_wmi_event_phyerr(ar, skb);
  1963. break;
  1964. case WMI_10X_ROAM_EVENTID:
  1965. ath10k_wmi_event_roam(ar, skb);
  1966. break;
  1967. case WMI_10X_PROFILE_MATCH:
  1968. ath10k_wmi_event_profile_match(ar, skb);
  1969. break;
  1970. case WMI_10X_DEBUG_PRINT_EVENTID:
  1971. ath10k_wmi_event_debug_print(ar, skb);
  1972. break;
  1973. case WMI_10X_PDEV_QVIT_EVENTID:
  1974. ath10k_wmi_event_pdev_qvit(ar, skb);
  1975. break;
  1976. case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
  1977. ath10k_wmi_event_wlan_profile_data(ar, skb);
  1978. break;
  1979. case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
  1980. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  1981. break;
  1982. case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
  1983. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  1984. break;
  1985. case WMI_10X_RTT_ERROR_REPORT_EVENTID:
  1986. ath10k_wmi_event_rtt_error_report(ar, skb);
  1987. break;
  1988. case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
  1989. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  1990. break;
  1991. case WMI_10X_DCS_INTERFERENCE_EVENTID:
  1992. ath10k_wmi_event_dcs_interference(ar, skb);
  1993. break;
  1994. case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
  1995. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  1996. break;
  1997. case WMI_10X_INST_RSSI_STATS_EVENTID:
  1998. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  1999. break;
  2000. case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
  2001. ath10k_wmi_event_vdev_standby_req(ar, skb);
  2002. break;
  2003. case WMI_10X_VDEV_RESUME_REQ_EVENTID:
  2004. ath10k_wmi_event_vdev_resume_req(ar, skb);
  2005. break;
  2006. case WMI_10X_SERVICE_READY_EVENTID:
  2007. ath10k_wmi_10x_service_ready_event_rx(ar, skb);
  2008. break;
  2009. case WMI_10X_READY_EVENTID:
  2010. ath10k_wmi_ready_event_rx(ar, skb);
  2011. break;
  2012. default:
  2013. ath10k_warn("Unknown eventid: %d\n", id);
  2014. break;
  2015. }
  2016. dev_kfree_skb(skb);
  2017. }
  2018. static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
  2019. {
  2020. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
  2021. ath10k_wmi_10x_process_rx(ar, skb);
  2022. else
  2023. ath10k_wmi_main_process_rx(ar, skb);
  2024. }
  2025. /* WMI Initialization functions */
  2026. int ath10k_wmi_attach(struct ath10k *ar)
  2027. {
  2028. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
  2029. ar->wmi.cmd = &wmi_10x_cmd_map;
  2030. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  2031. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  2032. } else {
  2033. ar->wmi.cmd = &wmi_cmd_map;
  2034. ar->wmi.vdev_param = &wmi_vdev_param_map;
  2035. ar->wmi.pdev_param = &wmi_pdev_param_map;
  2036. }
  2037. init_completion(&ar->wmi.service_ready);
  2038. init_completion(&ar->wmi.unified_ready);
  2039. init_waitqueue_head(&ar->wmi.tx_credits_wq);
  2040. return 0;
  2041. }
  2042. void ath10k_wmi_detach(struct ath10k *ar)
  2043. {
  2044. int i;
  2045. /* free the host memory chunks requested by firmware */
  2046. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  2047. dma_free_coherent(ar->dev,
  2048. ar->wmi.mem_chunks[i].len,
  2049. ar->wmi.mem_chunks[i].vaddr,
  2050. ar->wmi.mem_chunks[i].paddr);
  2051. }
  2052. ar->wmi.num_mem_chunks = 0;
  2053. }
  2054. int ath10k_wmi_connect(struct ath10k *ar)
  2055. {
  2056. int status;
  2057. struct ath10k_htc_svc_conn_req conn_req;
  2058. struct ath10k_htc_svc_conn_resp conn_resp;
  2059. memset(&conn_req, 0, sizeof(conn_req));
  2060. memset(&conn_resp, 0, sizeof(conn_resp));
  2061. /* these fields are the same for all service endpoints */
  2062. conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
  2063. conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
  2064. conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
  2065. /* connect to control service */
  2066. conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
  2067. status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
  2068. if (status) {
  2069. ath10k_warn("failed to connect to WMI CONTROL service status: %d\n",
  2070. status);
  2071. return status;
  2072. }
  2073. ar->wmi.eid = conn_resp.eid;
  2074. return 0;
  2075. }
  2076. static int ath10k_wmi_main_pdev_set_regdomain(struct ath10k *ar, u16 rd,
  2077. u16 rd2g, u16 rd5g, u16 ctl2g,
  2078. u16 ctl5g)
  2079. {
  2080. struct wmi_pdev_set_regdomain_cmd *cmd;
  2081. struct sk_buff *skb;
  2082. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2083. if (!skb)
  2084. return -ENOMEM;
  2085. cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
  2086. cmd->reg_domain = __cpu_to_le32(rd);
  2087. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  2088. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  2089. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  2090. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  2091. ath10k_dbg(ATH10K_DBG_WMI,
  2092. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
  2093. rd, rd2g, rd5g, ctl2g, ctl5g);
  2094. return ath10k_wmi_cmd_send(ar, skb,
  2095. ar->wmi.cmd->pdev_set_regdomain_cmdid);
  2096. }
  2097. static int ath10k_wmi_10x_pdev_set_regdomain(struct ath10k *ar, u16 rd,
  2098. u16 rd2g, u16 rd5g,
  2099. u16 ctl2g, u16 ctl5g,
  2100. enum wmi_dfs_region dfs_reg)
  2101. {
  2102. struct wmi_pdev_set_regdomain_cmd_10x *cmd;
  2103. struct sk_buff *skb;
  2104. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2105. if (!skb)
  2106. return -ENOMEM;
  2107. cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
  2108. cmd->reg_domain = __cpu_to_le32(rd);
  2109. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  2110. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  2111. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  2112. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  2113. cmd->dfs_domain = __cpu_to_le32(dfs_reg);
  2114. ath10k_dbg(ATH10K_DBG_WMI,
  2115. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
  2116. rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
  2117. return ath10k_wmi_cmd_send(ar, skb,
  2118. ar->wmi.cmd->pdev_set_regdomain_cmdid);
  2119. }
  2120. int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g,
  2121. u16 rd5g, u16 ctl2g, u16 ctl5g,
  2122. enum wmi_dfs_region dfs_reg)
  2123. {
  2124. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
  2125. return ath10k_wmi_10x_pdev_set_regdomain(ar, rd, rd2g, rd5g,
  2126. ctl2g, ctl5g, dfs_reg);
  2127. else
  2128. return ath10k_wmi_main_pdev_set_regdomain(ar, rd, rd2g, rd5g,
  2129. ctl2g, ctl5g);
  2130. }
  2131. int ath10k_wmi_pdev_set_channel(struct ath10k *ar,
  2132. const struct wmi_channel_arg *arg)
  2133. {
  2134. struct wmi_set_channel_cmd *cmd;
  2135. struct sk_buff *skb;
  2136. u32 ch_flags = 0;
  2137. if (arg->passive)
  2138. return -EINVAL;
  2139. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2140. if (!skb)
  2141. return -ENOMEM;
  2142. if (arg->chan_radar)
  2143. ch_flags |= WMI_CHAN_FLAG_DFS;
  2144. cmd = (struct wmi_set_channel_cmd *)skb->data;
  2145. cmd->chan.mhz = __cpu_to_le32(arg->freq);
  2146. cmd->chan.band_center_freq1 = __cpu_to_le32(arg->freq);
  2147. cmd->chan.mode = arg->mode;
  2148. cmd->chan.flags |= __cpu_to_le32(ch_flags);
  2149. cmd->chan.min_power = arg->min_power;
  2150. cmd->chan.max_power = arg->max_power;
  2151. cmd->chan.reg_power = arg->max_reg_power;
  2152. cmd->chan.reg_classid = arg->reg_class_id;
  2153. cmd->chan.antenna_max = arg->max_antenna_gain;
  2154. ath10k_dbg(ATH10K_DBG_WMI,
  2155. "wmi set channel mode %d freq %d\n",
  2156. arg->mode, arg->freq);
  2157. return ath10k_wmi_cmd_send(ar, skb,
  2158. ar->wmi.cmd->pdev_set_channel_cmdid);
  2159. }
  2160. int ath10k_wmi_pdev_suspend_target(struct ath10k *ar, u32 suspend_opt)
  2161. {
  2162. struct wmi_pdev_suspend_cmd *cmd;
  2163. struct sk_buff *skb;
  2164. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2165. if (!skb)
  2166. return -ENOMEM;
  2167. cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
  2168. cmd->suspend_opt = __cpu_to_le32(suspend_opt);
  2169. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_suspend_cmdid);
  2170. }
  2171. int ath10k_wmi_pdev_resume_target(struct ath10k *ar)
  2172. {
  2173. struct sk_buff *skb;
  2174. skb = ath10k_wmi_alloc_skb(0);
  2175. if (skb == NULL)
  2176. return -ENOMEM;
  2177. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid);
  2178. }
  2179. int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
  2180. {
  2181. struct wmi_pdev_set_param_cmd *cmd;
  2182. struct sk_buff *skb;
  2183. if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
  2184. ath10k_warn("pdev param %d not supported by firmware\n", id);
  2185. return -EOPNOTSUPP;
  2186. }
  2187. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2188. if (!skb)
  2189. return -ENOMEM;
  2190. cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
  2191. cmd->param_id = __cpu_to_le32(id);
  2192. cmd->param_value = __cpu_to_le32(value);
  2193. ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
  2194. id, value);
  2195. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_set_param_cmdid);
  2196. }
  2197. static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
  2198. {
  2199. struct wmi_init_cmd *cmd;
  2200. struct sk_buff *buf;
  2201. struct wmi_resource_config config = {};
  2202. u32 len, val;
  2203. int i;
  2204. config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
  2205. config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS);
  2206. config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
  2207. config.num_offload_reorder_bufs =
  2208. __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
  2209. config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
  2210. config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
  2211. config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
  2212. config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
  2213. config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
  2214. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  2215. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  2216. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  2217. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
  2218. config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
  2219. config.scan_max_pending_reqs =
  2220. __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
  2221. config.bmiss_offload_max_vdev =
  2222. __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
  2223. config.roam_offload_max_vdev =
  2224. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
  2225. config.roam_offload_max_ap_profiles =
  2226. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
  2227. config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
  2228. config.num_mcast_table_elems =
  2229. __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
  2230. config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
  2231. config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
  2232. config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
  2233. config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
  2234. config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
  2235. val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  2236. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  2237. config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
  2238. config.gtk_offload_max_vdev =
  2239. __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
  2240. config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
  2241. config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
  2242. len = sizeof(*cmd) +
  2243. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  2244. buf = ath10k_wmi_alloc_skb(len);
  2245. if (!buf)
  2246. return -ENOMEM;
  2247. cmd = (struct wmi_init_cmd *)buf->data;
  2248. if (ar->wmi.num_mem_chunks == 0) {
  2249. cmd->num_host_mem_chunks = 0;
  2250. goto out;
  2251. }
  2252. ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
  2253. ar->wmi.num_mem_chunks);
  2254. cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
  2255. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  2256. cmd->host_mem_chunks[i].ptr =
  2257. __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  2258. cmd->host_mem_chunks[i].size =
  2259. __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  2260. cmd->host_mem_chunks[i].req_id =
  2261. __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  2262. ath10k_dbg(ATH10K_DBG_WMI,
  2263. "wmi chunk %d len %d requested, addr 0x%llx\n",
  2264. i,
  2265. ar->wmi.mem_chunks[i].len,
  2266. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  2267. }
  2268. out:
  2269. memcpy(&cmd->resource_config, &config, sizeof(config));
  2270. ath10k_dbg(ATH10K_DBG_WMI, "wmi init\n");
  2271. return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
  2272. }
  2273. static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
  2274. {
  2275. struct wmi_init_cmd_10x *cmd;
  2276. struct sk_buff *buf;
  2277. struct wmi_resource_config_10x config = {};
  2278. u32 len, val;
  2279. int i;
  2280. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  2281. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  2282. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  2283. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  2284. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  2285. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  2286. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  2287. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  2288. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  2289. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  2290. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  2291. config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
  2292. config.scan_max_pending_reqs =
  2293. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  2294. config.bmiss_offload_max_vdev =
  2295. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  2296. config.roam_offload_max_vdev =
  2297. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  2298. config.roam_offload_max_ap_profiles =
  2299. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  2300. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  2301. config.num_mcast_table_elems =
  2302. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  2303. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  2304. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  2305. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  2306. config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
  2307. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  2308. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  2309. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  2310. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  2311. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  2312. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  2313. len = sizeof(*cmd) +
  2314. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  2315. buf = ath10k_wmi_alloc_skb(len);
  2316. if (!buf)
  2317. return -ENOMEM;
  2318. cmd = (struct wmi_init_cmd_10x *)buf->data;
  2319. if (ar->wmi.num_mem_chunks == 0) {
  2320. cmd->num_host_mem_chunks = 0;
  2321. goto out;
  2322. }
  2323. ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
  2324. ar->wmi.num_mem_chunks);
  2325. cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
  2326. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  2327. cmd->host_mem_chunks[i].ptr =
  2328. __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  2329. cmd->host_mem_chunks[i].size =
  2330. __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  2331. cmd->host_mem_chunks[i].req_id =
  2332. __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  2333. ath10k_dbg(ATH10K_DBG_WMI,
  2334. "wmi chunk %d len %d requested, addr 0x%llx\n",
  2335. i,
  2336. ar->wmi.mem_chunks[i].len,
  2337. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  2338. }
  2339. out:
  2340. memcpy(&cmd->resource_config, &config, sizeof(config));
  2341. ath10k_dbg(ATH10K_DBG_WMI, "wmi init 10x\n");
  2342. return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
  2343. }
  2344. int ath10k_wmi_cmd_init(struct ath10k *ar)
  2345. {
  2346. int ret;
  2347. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
  2348. ret = ath10k_wmi_10x_cmd_init(ar);
  2349. else
  2350. ret = ath10k_wmi_main_cmd_init(ar);
  2351. return ret;
  2352. }
  2353. static int ath10k_wmi_start_scan_calc_len(struct ath10k *ar,
  2354. const struct wmi_start_scan_arg *arg)
  2355. {
  2356. int len;
  2357. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
  2358. len = sizeof(struct wmi_start_scan_cmd_10x);
  2359. else
  2360. len = sizeof(struct wmi_start_scan_cmd);
  2361. if (arg->ie_len) {
  2362. if (!arg->ie)
  2363. return -EINVAL;
  2364. if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
  2365. return -EINVAL;
  2366. len += sizeof(struct wmi_ie_data);
  2367. len += roundup(arg->ie_len, 4);
  2368. }
  2369. if (arg->n_channels) {
  2370. if (!arg->channels)
  2371. return -EINVAL;
  2372. if (arg->n_channels > ARRAY_SIZE(arg->channels))
  2373. return -EINVAL;
  2374. len += sizeof(struct wmi_chan_list);
  2375. len += sizeof(__le32) * arg->n_channels;
  2376. }
  2377. if (arg->n_ssids) {
  2378. if (!arg->ssids)
  2379. return -EINVAL;
  2380. if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
  2381. return -EINVAL;
  2382. len += sizeof(struct wmi_ssid_list);
  2383. len += sizeof(struct wmi_ssid) * arg->n_ssids;
  2384. }
  2385. if (arg->n_bssids) {
  2386. if (!arg->bssids)
  2387. return -EINVAL;
  2388. if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
  2389. return -EINVAL;
  2390. len += sizeof(struct wmi_bssid_list);
  2391. len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  2392. }
  2393. return len;
  2394. }
  2395. int ath10k_wmi_start_scan(struct ath10k *ar,
  2396. const struct wmi_start_scan_arg *arg)
  2397. {
  2398. struct wmi_start_scan_cmd *cmd;
  2399. struct sk_buff *skb;
  2400. struct wmi_ie_data *ie;
  2401. struct wmi_chan_list *channels;
  2402. struct wmi_ssid_list *ssids;
  2403. struct wmi_bssid_list *bssids;
  2404. u32 scan_id;
  2405. u32 scan_req_id;
  2406. int off;
  2407. int len = 0;
  2408. int i;
  2409. len = ath10k_wmi_start_scan_calc_len(ar, arg);
  2410. if (len < 0)
  2411. return len; /* len contains error code here */
  2412. skb = ath10k_wmi_alloc_skb(len);
  2413. if (!skb)
  2414. return -ENOMEM;
  2415. scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
  2416. scan_id |= arg->scan_id;
  2417. scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  2418. scan_req_id |= arg->scan_req_id;
  2419. cmd = (struct wmi_start_scan_cmd *)skb->data;
  2420. cmd->scan_id = __cpu_to_le32(scan_id);
  2421. cmd->scan_req_id = __cpu_to_le32(scan_req_id);
  2422. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  2423. cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
  2424. cmd->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
  2425. cmd->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
  2426. cmd->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
  2427. cmd->min_rest_time = __cpu_to_le32(arg->min_rest_time);
  2428. cmd->max_rest_time = __cpu_to_le32(arg->max_rest_time);
  2429. cmd->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
  2430. cmd->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
  2431. cmd->idle_time = __cpu_to_le32(arg->idle_time);
  2432. cmd->max_scan_time = __cpu_to_le32(arg->max_scan_time);
  2433. cmd->probe_delay = __cpu_to_le32(arg->probe_delay);
  2434. cmd->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
  2435. /* TLV list starts after fields included in the struct */
  2436. /* There's just one filed that differes the two start_scan
  2437. * structures - burst_duration, which we are not using btw,
  2438. no point to make the split here, just shift the buffer to fit with
  2439. given FW */
  2440. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
  2441. off = sizeof(struct wmi_start_scan_cmd_10x);
  2442. else
  2443. off = sizeof(struct wmi_start_scan_cmd);
  2444. if (arg->n_channels) {
  2445. channels = (void *)skb->data + off;
  2446. channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
  2447. channels->num_chan = __cpu_to_le32(arg->n_channels);
  2448. for (i = 0; i < arg->n_channels; i++)
  2449. channels->channel_list[i] =
  2450. __cpu_to_le32(arg->channels[i]);
  2451. off += sizeof(*channels);
  2452. off += sizeof(__le32) * arg->n_channels;
  2453. }
  2454. if (arg->n_ssids) {
  2455. ssids = (void *)skb->data + off;
  2456. ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
  2457. ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
  2458. for (i = 0; i < arg->n_ssids; i++) {
  2459. ssids->ssids[i].ssid_len =
  2460. __cpu_to_le32(arg->ssids[i].len);
  2461. memcpy(&ssids->ssids[i].ssid,
  2462. arg->ssids[i].ssid,
  2463. arg->ssids[i].len);
  2464. }
  2465. off += sizeof(*ssids);
  2466. off += sizeof(struct wmi_ssid) * arg->n_ssids;
  2467. }
  2468. if (arg->n_bssids) {
  2469. bssids = (void *)skb->data + off;
  2470. bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
  2471. bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
  2472. for (i = 0; i < arg->n_bssids; i++)
  2473. memcpy(&bssids->bssid_list[i],
  2474. arg->bssids[i].bssid,
  2475. ETH_ALEN);
  2476. off += sizeof(*bssids);
  2477. off += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  2478. }
  2479. if (arg->ie_len) {
  2480. ie = (void *)skb->data + off;
  2481. ie->tag = __cpu_to_le32(WMI_IE_TAG);
  2482. ie->ie_len = __cpu_to_le32(arg->ie_len);
  2483. memcpy(ie->ie_data, arg->ie, arg->ie_len);
  2484. off += sizeof(*ie);
  2485. off += roundup(arg->ie_len, 4);
  2486. }
  2487. if (off != skb->len) {
  2488. dev_kfree_skb(skb);
  2489. return -EINVAL;
  2490. }
  2491. ath10k_dbg(ATH10K_DBG_WMI, "wmi start scan\n");
  2492. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->start_scan_cmdid);
  2493. }
  2494. void ath10k_wmi_start_scan_init(struct ath10k *ar,
  2495. struct wmi_start_scan_arg *arg)
  2496. {
  2497. /* setup commonly used values */
  2498. arg->scan_req_id = 1;
  2499. arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
  2500. arg->dwell_time_active = 50;
  2501. arg->dwell_time_passive = 150;
  2502. arg->min_rest_time = 50;
  2503. arg->max_rest_time = 500;
  2504. arg->repeat_probe_time = 0;
  2505. arg->probe_spacing_time = 0;
  2506. arg->idle_time = 0;
  2507. arg->max_scan_time = 20000;
  2508. arg->probe_delay = 5;
  2509. arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
  2510. | WMI_SCAN_EVENT_COMPLETED
  2511. | WMI_SCAN_EVENT_BSS_CHANNEL
  2512. | WMI_SCAN_EVENT_FOREIGN_CHANNEL
  2513. | WMI_SCAN_EVENT_DEQUEUED;
  2514. arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
  2515. arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
  2516. arg->n_bssids = 1;
  2517. arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
  2518. }
  2519. int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg)
  2520. {
  2521. struct wmi_stop_scan_cmd *cmd;
  2522. struct sk_buff *skb;
  2523. u32 scan_id;
  2524. u32 req_id;
  2525. if (arg->req_id > 0xFFF)
  2526. return -EINVAL;
  2527. if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
  2528. return -EINVAL;
  2529. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2530. if (!skb)
  2531. return -ENOMEM;
  2532. scan_id = arg->u.scan_id;
  2533. scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
  2534. req_id = arg->req_id;
  2535. req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  2536. cmd = (struct wmi_stop_scan_cmd *)skb->data;
  2537. cmd->req_type = __cpu_to_le32(arg->req_type);
  2538. cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
  2539. cmd->scan_id = __cpu_to_le32(scan_id);
  2540. cmd->scan_req_id = __cpu_to_le32(req_id);
  2541. ath10k_dbg(ATH10K_DBG_WMI,
  2542. "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
  2543. arg->req_id, arg->req_type, arg->u.scan_id);
  2544. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->stop_scan_cmdid);
  2545. }
  2546. int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id,
  2547. enum wmi_vdev_type type,
  2548. enum wmi_vdev_subtype subtype,
  2549. const u8 macaddr[ETH_ALEN])
  2550. {
  2551. struct wmi_vdev_create_cmd *cmd;
  2552. struct sk_buff *skb;
  2553. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2554. if (!skb)
  2555. return -ENOMEM;
  2556. cmd = (struct wmi_vdev_create_cmd *)skb->data;
  2557. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2558. cmd->vdev_type = __cpu_to_le32(type);
  2559. cmd->vdev_subtype = __cpu_to_le32(subtype);
  2560. memcpy(cmd->vdev_macaddr.addr, macaddr, ETH_ALEN);
  2561. ath10k_dbg(ATH10K_DBG_WMI,
  2562. "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
  2563. vdev_id, type, subtype, macaddr);
  2564. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_create_cmdid);
  2565. }
  2566. int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id)
  2567. {
  2568. struct wmi_vdev_delete_cmd *cmd;
  2569. struct sk_buff *skb;
  2570. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2571. if (!skb)
  2572. return -ENOMEM;
  2573. cmd = (struct wmi_vdev_delete_cmd *)skb->data;
  2574. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2575. ath10k_dbg(ATH10K_DBG_WMI,
  2576. "WMI vdev delete id %d\n", vdev_id);
  2577. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_delete_cmdid);
  2578. }
  2579. static int ath10k_wmi_vdev_start_restart(struct ath10k *ar,
  2580. const struct wmi_vdev_start_request_arg *arg,
  2581. u32 cmd_id)
  2582. {
  2583. struct wmi_vdev_start_request_cmd *cmd;
  2584. struct sk_buff *skb;
  2585. const char *cmdname;
  2586. u32 flags = 0;
  2587. u32 ch_flags = 0;
  2588. if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid &&
  2589. cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid)
  2590. return -EINVAL;
  2591. if (WARN_ON(arg->ssid && arg->ssid_len == 0))
  2592. return -EINVAL;
  2593. if (WARN_ON(arg->hidden_ssid && !arg->ssid))
  2594. return -EINVAL;
  2595. if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
  2596. return -EINVAL;
  2597. if (cmd_id == ar->wmi.cmd->vdev_start_request_cmdid)
  2598. cmdname = "start";
  2599. else if (cmd_id == ar->wmi.cmd->vdev_restart_request_cmdid)
  2600. cmdname = "restart";
  2601. else
  2602. return -EINVAL; /* should not happen, we already check cmd_id */
  2603. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2604. if (!skb)
  2605. return -ENOMEM;
  2606. if (arg->hidden_ssid)
  2607. flags |= WMI_VDEV_START_HIDDEN_SSID;
  2608. if (arg->pmf_enabled)
  2609. flags |= WMI_VDEV_START_PMF_ENABLED;
  2610. if (arg->channel.chan_radar)
  2611. ch_flags |= WMI_CHAN_FLAG_DFS;
  2612. cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
  2613. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  2614. cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
  2615. cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
  2616. cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
  2617. cmd->flags = __cpu_to_le32(flags);
  2618. cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
  2619. cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
  2620. if (arg->ssid) {
  2621. cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
  2622. memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
  2623. }
  2624. cmd->chan.mhz = __cpu_to_le32(arg->channel.freq);
  2625. cmd->chan.band_center_freq1 =
  2626. __cpu_to_le32(arg->channel.band_center_freq1);
  2627. cmd->chan.mode = arg->channel.mode;
  2628. cmd->chan.flags |= __cpu_to_le32(ch_flags);
  2629. cmd->chan.min_power = arg->channel.min_power;
  2630. cmd->chan.max_power = arg->channel.max_power;
  2631. cmd->chan.reg_power = arg->channel.max_reg_power;
  2632. cmd->chan.reg_classid = arg->channel.reg_class_id;
  2633. cmd->chan.antenna_max = arg->channel.max_antenna_gain;
  2634. ath10k_dbg(ATH10K_DBG_WMI,
  2635. "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, "
  2636. "ch_flags: 0x%0X, max_power: %d\n", cmdname, arg->vdev_id,
  2637. flags, arg->channel.freq, arg->channel.mode,
  2638. cmd->chan.flags, arg->channel.max_power);
  2639. return ath10k_wmi_cmd_send(ar, skb, cmd_id);
  2640. }
  2641. int ath10k_wmi_vdev_start(struct ath10k *ar,
  2642. const struct wmi_vdev_start_request_arg *arg)
  2643. {
  2644. u32 cmd_id = ar->wmi.cmd->vdev_start_request_cmdid;
  2645. return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
  2646. }
  2647. int ath10k_wmi_vdev_restart(struct ath10k *ar,
  2648. const struct wmi_vdev_start_request_arg *arg)
  2649. {
  2650. u32 cmd_id = ar->wmi.cmd->vdev_restart_request_cmdid;
  2651. return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
  2652. }
  2653. int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id)
  2654. {
  2655. struct wmi_vdev_stop_cmd *cmd;
  2656. struct sk_buff *skb;
  2657. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2658. if (!skb)
  2659. return -ENOMEM;
  2660. cmd = (struct wmi_vdev_stop_cmd *)skb->data;
  2661. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2662. ath10k_dbg(ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
  2663. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_stop_cmdid);
  2664. }
  2665. int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
  2666. {
  2667. struct wmi_vdev_up_cmd *cmd;
  2668. struct sk_buff *skb;
  2669. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2670. if (!skb)
  2671. return -ENOMEM;
  2672. cmd = (struct wmi_vdev_up_cmd *)skb->data;
  2673. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2674. cmd->vdev_assoc_id = __cpu_to_le32(aid);
  2675. memcpy(&cmd->vdev_bssid.addr, bssid, ETH_ALEN);
  2676. ath10k_dbg(ATH10K_DBG_WMI,
  2677. "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
  2678. vdev_id, aid, bssid);
  2679. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_up_cmdid);
  2680. }
  2681. int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id)
  2682. {
  2683. struct wmi_vdev_down_cmd *cmd;
  2684. struct sk_buff *skb;
  2685. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2686. if (!skb)
  2687. return -ENOMEM;
  2688. cmd = (struct wmi_vdev_down_cmd *)skb->data;
  2689. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2690. ath10k_dbg(ATH10K_DBG_WMI,
  2691. "wmi mgmt vdev down id 0x%x\n", vdev_id);
  2692. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_down_cmdid);
  2693. }
  2694. int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id,
  2695. u32 param_id, u32 param_value)
  2696. {
  2697. struct wmi_vdev_set_param_cmd *cmd;
  2698. struct sk_buff *skb;
  2699. if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
  2700. ath10k_dbg(ATH10K_DBG_WMI,
  2701. "vdev param %d not supported by firmware\n",
  2702. param_id);
  2703. return -EOPNOTSUPP;
  2704. }
  2705. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2706. if (!skb)
  2707. return -ENOMEM;
  2708. cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
  2709. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2710. cmd->param_id = __cpu_to_le32(param_id);
  2711. cmd->param_value = __cpu_to_le32(param_value);
  2712. ath10k_dbg(ATH10K_DBG_WMI,
  2713. "wmi vdev id 0x%x set param %d value %d\n",
  2714. vdev_id, param_id, param_value);
  2715. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_set_param_cmdid);
  2716. }
  2717. int ath10k_wmi_vdev_install_key(struct ath10k *ar,
  2718. const struct wmi_vdev_install_key_arg *arg)
  2719. {
  2720. struct wmi_vdev_install_key_cmd *cmd;
  2721. struct sk_buff *skb;
  2722. if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
  2723. return -EINVAL;
  2724. if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
  2725. return -EINVAL;
  2726. skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->key_len);
  2727. if (!skb)
  2728. return -ENOMEM;
  2729. cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
  2730. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  2731. cmd->key_idx = __cpu_to_le32(arg->key_idx);
  2732. cmd->key_flags = __cpu_to_le32(arg->key_flags);
  2733. cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
  2734. cmd->key_len = __cpu_to_le32(arg->key_len);
  2735. cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
  2736. cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
  2737. if (arg->macaddr)
  2738. memcpy(cmd->peer_macaddr.addr, arg->macaddr, ETH_ALEN);
  2739. if (arg->key_data)
  2740. memcpy(cmd->key_data, arg->key_data, arg->key_len);
  2741. ath10k_dbg(ATH10K_DBG_WMI,
  2742. "wmi vdev install key idx %d cipher %d len %d\n",
  2743. arg->key_idx, arg->key_cipher, arg->key_len);
  2744. return ath10k_wmi_cmd_send(ar, skb,
  2745. ar->wmi.cmd->vdev_install_key_cmdid);
  2746. }
  2747. int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id,
  2748. const u8 peer_addr[ETH_ALEN])
  2749. {
  2750. struct wmi_peer_create_cmd *cmd;
  2751. struct sk_buff *skb;
  2752. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2753. if (!skb)
  2754. return -ENOMEM;
  2755. cmd = (struct wmi_peer_create_cmd *)skb->data;
  2756. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2757. memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
  2758. ath10k_dbg(ATH10K_DBG_WMI,
  2759. "wmi peer create vdev_id %d peer_addr %pM\n",
  2760. vdev_id, peer_addr);
  2761. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_create_cmdid);
  2762. }
  2763. int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id,
  2764. const u8 peer_addr[ETH_ALEN])
  2765. {
  2766. struct wmi_peer_delete_cmd *cmd;
  2767. struct sk_buff *skb;
  2768. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2769. if (!skb)
  2770. return -ENOMEM;
  2771. cmd = (struct wmi_peer_delete_cmd *)skb->data;
  2772. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2773. memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
  2774. ath10k_dbg(ATH10K_DBG_WMI,
  2775. "wmi peer delete vdev_id %d peer_addr %pM\n",
  2776. vdev_id, peer_addr);
  2777. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_delete_cmdid);
  2778. }
  2779. int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id,
  2780. const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
  2781. {
  2782. struct wmi_peer_flush_tids_cmd *cmd;
  2783. struct sk_buff *skb;
  2784. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2785. if (!skb)
  2786. return -ENOMEM;
  2787. cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
  2788. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2789. cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
  2790. memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
  2791. ath10k_dbg(ATH10K_DBG_WMI,
  2792. "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
  2793. vdev_id, peer_addr, tid_bitmap);
  2794. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_flush_tids_cmdid);
  2795. }
  2796. int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id,
  2797. const u8 *peer_addr, enum wmi_peer_param param_id,
  2798. u32 param_value)
  2799. {
  2800. struct wmi_peer_set_param_cmd *cmd;
  2801. struct sk_buff *skb;
  2802. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2803. if (!skb)
  2804. return -ENOMEM;
  2805. cmd = (struct wmi_peer_set_param_cmd *)skb->data;
  2806. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2807. cmd->param_id = __cpu_to_le32(param_id);
  2808. cmd->param_value = __cpu_to_le32(param_value);
  2809. memcpy(&cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
  2810. ath10k_dbg(ATH10K_DBG_WMI,
  2811. "wmi vdev %d peer 0x%pM set param %d value %d\n",
  2812. vdev_id, peer_addr, param_id, param_value);
  2813. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_set_param_cmdid);
  2814. }
  2815. int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id,
  2816. enum wmi_sta_ps_mode psmode)
  2817. {
  2818. struct wmi_sta_powersave_mode_cmd *cmd;
  2819. struct sk_buff *skb;
  2820. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2821. if (!skb)
  2822. return -ENOMEM;
  2823. cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
  2824. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2825. cmd->sta_ps_mode = __cpu_to_le32(psmode);
  2826. ath10k_dbg(ATH10K_DBG_WMI,
  2827. "wmi set powersave id 0x%x mode %d\n",
  2828. vdev_id, psmode);
  2829. return ath10k_wmi_cmd_send(ar, skb,
  2830. ar->wmi.cmd->sta_powersave_mode_cmdid);
  2831. }
  2832. int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id,
  2833. enum wmi_sta_powersave_param param_id,
  2834. u32 value)
  2835. {
  2836. struct wmi_sta_powersave_param_cmd *cmd;
  2837. struct sk_buff *skb;
  2838. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2839. if (!skb)
  2840. return -ENOMEM;
  2841. cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
  2842. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2843. cmd->param_id = __cpu_to_le32(param_id);
  2844. cmd->param_value = __cpu_to_le32(value);
  2845. ath10k_dbg(ATH10K_DBG_WMI,
  2846. "wmi sta ps param vdev_id 0x%x param %d value %d\n",
  2847. vdev_id, param_id, value);
  2848. return ath10k_wmi_cmd_send(ar, skb,
  2849. ar->wmi.cmd->sta_powersave_param_cmdid);
  2850. }
  2851. int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  2852. enum wmi_ap_ps_peer_param param_id, u32 value)
  2853. {
  2854. struct wmi_ap_ps_peer_cmd *cmd;
  2855. struct sk_buff *skb;
  2856. if (!mac)
  2857. return -EINVAL;
  2858. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2859. if (!skb)
  2860. return -ENOMEM;
  2861. cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
  2862. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2863. cmd->param_id = __cpu_to_le32(param_id);
  2864. cmd->param_value = __cpu_to_le32(value);
  2865. memcpy(&cmd->peer_macaddr, mac, ETH_ALEN);
  2866. ath10k_dbg(ATH10K_DBG_WMI,
  2867. "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
  2868. vdev_id, param_id, value, mac);
  2869. return ath10k_wmi_cmd_send(ar, skb,
  2870. ar->wmi.cmd->ap_ps_peer_param_cmdid);
  2871. }
  2872. int ath10k_wmi_scan_chan_list(struct ath10k *ar,
  2873. const struct wmi_scan_chan_list_arg *arg)
  2874. {
  2875. struct wmi_scan_chan_list_cmd *cmd;
  2876. struct sk_buff *skb;
  2877. struct wmi_channel_arg *ch;
  2878. struct wmi_channel *ci;
  2879. int len;
  2880. int i;
  2881. len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
  2882. skb = ath10k_wmi_alloc_skb(len);
  2883. if (!skb)
  2884. return -EINVAL;
  2885. cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
  2886. cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
  2887. for (i = 0; i < arg->n_channels; i++) {
  2888. u32 flags = 0;
  2889. ch = &arg->channels[i];
  2890. ci = &cmd->chan_info[i];
  2891. if (ch->passive)
  2892. flags |= WMI_CHAN_FLAG_PASSIVE;
  2893. if (ch->allow_ibss)
  2894. flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
  2895. if (ch->allow_ht)
  2896. flags |= WMI_CHAN_FLAG_ALLOW_HT;
  2897. if (ch->allow_vht)
  2898. flags |= WMI_CHAN_FLAG_ALLOW_VHT;
  2899. if (ch->ht40plus)
  2900. flags |= WMI_CHAN_FLAG_HT40_PLUS;
  2901. if (ch->chan_radar)
  2902. flags |= WMI_CHAN_FLAG_DFS;
  2903. ci->mhz = __cpu_to_le32(ch->freq);
  2904. ci->band_center_freq1 = __cpu_to_le32(ch->freq);
  2905. ci->band_center_freq2 = 0;
  2906. ci->min_power = ch->min_power;
  2907. ci->max_power = ch->max_power;
  2908. ci->reg_power = ch->max_reg_power;
  2909. ci->antenna_max = ch->max_antenna_gain;
  2910. /* mode & flags share storage */
  2911. ci->mode = ch->mode;
  2912. ci->flags |= __cpu_to_le32(flags);
  2913. }
  2914. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->scan_chan_list_cmdid);
  2915. }
  2916. int ath10k_wmi_peer_assoc(struct ath10k *ar,
  2917. const struct wmi_peer_assoc_complete_arg *arg)
  2918. {
  2919. struct wmi_peer_assoc_complete_cmd *cmd;
  2920. struct sk_buff *skb;
  2921. if (arg->peer_mpdu_density > 16)
  2922. return -EINVAL;
  2923. if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
  2924. return -EINVAL;
  2925. if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
  2926. return -EINVAL;
  2927. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2928. if (!skb)
  2929. return -ENOMEM;
  2930. cmd = (struct wmi_peer_assoc_complete_cmd *)skb->data;
  2931. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  2932. cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
  2933. cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
  2934. cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
  2935. cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
  2936. cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
  2937. cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
  2938. cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
  2939. cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
  2940. cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
  2941. cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
  2942. cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
  2943. cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
  2944. memcpy(cmd->peer_macaddr.addr, arg->addr, ETH_ALEN);
  2945. cmd->peer_legacy_rates.num_rates =
  2946. __cpu_to_le32(arg->peer_legacy_rates.num_rates);
  2947. memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
  2948. arg->peer_legacy_rates.num_rates);
  2949. cmd->peer_ht_rates.num_rates =
  2950. __cpu_to_le32(arg->peer_ht_rates.num_rates);
  2951. memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
  2952. arg->peer_ht_rates.num_rates);
  2953. cmd->peer_vht_rates.rx_max_rate =
  2954. __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
  2955. cmd->peer_vht_rates.rx_mcs_set =
  2956. __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
  2957. cmd->peer_vht_rates.tx_max_rate =
  2958. __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
  2959. cmd->peer_vht_rates.tx_mcs_set =
  2960. __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
  2961. ath10k_dbg(ATH10K_DBG_WMI,
  2962. "wmi peer assoc vdev %d addr %pM (%s)\n",
  2963. arg->vdev_id, arg->addr,
  2964. arg->peer_reassoc ? "reassociate" : "new");
  2965. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_assoc_cmdid);
  2966. }
  2967. /* This function assumes the beacon is already DMA mapped */
  2968. int ath10k_wmi_beacon_send_ref_nowait(struct ath10k_vif *arvif)
  2969. {
  2970. struct wmi_bcn_tx_ref_cmd *cmd;
  2971. struct sk_buff *skb;
  2972. struct sk_buff *beacon = arvif->beacon;
  2973. struct ath10k *ar = arvif->ar;
  2974. struct ieee80211_hdr *hdr;
  2975. int ret;
  2976. u16 fc;
  2977. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2978. if (!skb)
  2979. return -ENOMEM;
  2980. hdr = (struct ieee80211_hdr *)beacon->data;
  2981. fc = le16_to_cpu(hdr->frame_control);
  2982. cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
  2983. cmd->vdev_id = __cpu_to_le32(arvif->vdev_id);
  2984. cmd->data_len = __cpu_to_le32(beacon->len);
  2985. cmd->data_ptr = __cpu_to_le32(ATH10K_SKB_CB(beacon)->paddr);
  2986. cmd->msdu_id = 0;
  2987. cmd->frame_control = __cpu_to_le32(fc);
  2988. cmd->flags = 0;
  2989. if (ATH10K_SKB_CB(beacon)->bcn.dtim_zero)
  2990. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
  2991. if (ATH10K_SKB_CB(beacon)->bcn.deliver_cab)
  2992. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
  2993. ret = ath10k_wmi_cmd_send_nowait(ar, skb,
  2994. ar->wmi.cmd->pdev_send_bcn_cmdid);
  2995. if (ret)
  2996. dev_kfree_skb(skb);
  2997. return ret;
  2998. }
  2999. static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
  3000. const struct wmi_wmm_params_arg *arg)
  3001. {
  3002. params->cwmin = __cpu_to_le32(arg->cwmin);
  3003. params->cwmax = __cpu_to_le32(arg->cwmax);
  3004. params->aifs = __cpu_to_le32(arg->aifs);
  3005. params->txop = __cpu_to_le32(arg->txop);
  3006. params->acm = __cpu_to_le32(arg->acm);
  3007. params->no_ack = __cpu_to_le32(arg->no_ack);
  3008. }
  3009. int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar,
  3010. const struct wmi_pdev_set_wmm_params_arg *arg)
  3011. {
  3012. struct wmi_pdev_set_wmm_params *cmd;
  3013. struct sk_buff *skb;
  3014. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  3015. if (!skb)
  3016. return -ENOMEM;
  3017. cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
  3018. ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be);
  3019. ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
  3020. ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
  3021. ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
  3022. ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
  3023. return ath10k_wmi_cmd_send(ar, skb,
  3024. ar->wmi.cmd->pdev_set_wmm_params_cmdid);
  3025. }
  3026. int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
  3027. {
  3028. struct wmi_request_stats_cmd *cmd;
  3029. struct sk_buff *skb;
  3030. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  3031. if (!skb)
  3032. return -ENOMEM;
  3033. cmd = (struct wmi_request_stats_cmd *)skb->data;
  3034. cmd->stats_id = __cpu_to_le32(stats_id);
  3035. ath10k_dbg(ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
  3036. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->request_stats_cmdid);
  3037. }
  3038. int ath10k_wmi_force_fw_hang(struct ath10k *ar,
  3039. enum wmi_force_fw_hang_type type, u32 delay_ms)
  3040. {
  3041. struct wmi_force_fw_hang_cmd *cmd;
  3042. struct sk_buff *skb;
  3043. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  3044. if (!skb)
  3045. return -ENOMEM;
  3046. cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
  3047. cmd->type = __cpu_to_le32(type);
  3048. cmd->delay_ms = __cpu_to_le32(delay_ms);
  3049. ath10k_dbg(ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
  3050. type, delay_ms);
  3051. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
  3052. }
  3053. int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable)
  3054. {
  3055. struct wmi_dbglog_cfg_cmd *cmd;
  3056. struct sk_buff *skb;
  3057. u32 cfg;
  3058. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  3059. if (!skb)
  3060. return -ENOMEM;
  3061. cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
  3062. if (module_enable) {
  3063. cfg = SM(ATH10K_DBGLOG_LEVEL_VERBOSE,
  3064. ATH10K_DBGLOG_CFG_LOG_LVL);
  3065. } else {
  3066. /* set back defaults, all modules with WARN level */
  3067. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  3068. ATH10K_DBGLOG_CFG_LOG_LVL);
  3069. module_enable = ~0;
  3070. }
  3071. cmd->module_enable = __cpu_to_le32(module_enable);
  3072. cmd->module_valid = __cpu_to_le32(~0);
  3073. cmd->config_enable = __cpu_to_le32(cfg);
  3074. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  3075. ath10k_dbg(ATH10K_DBG_WMI,
  3076. "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
  3077. __le32_to_cpu(cmd->module_enable),
  3078. __le32_to_cpu(cmd->module_valid),
  3079. __le32_to_cpu(cmd->config_enable),
  3080. __le32_to_cpu(cmd->config_valid));
  3081. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->dbglog_cfg_cmdid);
  3082. }