htt_rx.c 42 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "core.h"
  18. #include "htc.h"
  19. #include "htt.h"
  20. #include "txrx.h"
  21. #include "debug.h"
  22. #include "trace.h"
  23. #include <linux/log2.h>
  24. /* slightly larger than one large A-MPDU */
  25. #define HTT_RX_RING_SIZE_MIN 128
  26. /* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
  27. #define HTT_RX_RING_SIZE_MAX 2048
  28. #define HTT_RX_AVG_FRM_BYTES 1000
  29. /* ms, very conservative */
  30. #define HTT_RX_HOST_LATENCY_MAX_MS 20
  31. /* ms, conservative */
  32. #define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
  33. /* when under memory pressure rx ring refill may fail and needs a retry */
  34. #define HTT_RX_RING_REFILL_RETRY_MS 50
  35. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
  36. static void ath10k_htt_txrx_compl_task(unsigned long ptr);
  37. static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
  38. {
  39. int size;
  40. /*
  41. * It is expected that the host CPU will typically be able to
  42. * service the rx indication from one A-MPDU before the rx
  43. * indication from the subsequent A-MPDU happens, roughly 1-2 ms
  44. * later. However, the rx ring should be sized very conservatively,
  45. * to accomodate the worst reasonable delay before the host CPU
  46. * services a rx indication interrupt.
  47. *
  48. * The rx ring need not be kept full of empty buffers. In theory,
  49. * the htt host SW can dynamically track the low-water mark in the
  50. * rx ring, and dynamically adjust the level to which the rx ring
  51. * is filled with empty buffers, to dynamically meet the desired
  52. * low-water mark.
  53. *
  54. * In contrast, it's difficult to resize the rx ring itself, once
  55. * it's in use. Thus, the ring itself should be sized very
  56. * conservatively, while the degree to which the ring is filled
  57. * with empty buffers should be sized moderately conservatively.
  58. */
  59. /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
  60. size =
  61. htt->max_throughput_mbps +
  62. 1000 /
  63. (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
  64. if (size < HTT_RX_RING_SIZE_MIN)
  65. size = HTT_RX_RING_SIZE_MIN;
  66. if (size > HTT_RX_RING_SIZE_MAX)
  67. size = HTT_RX_RING_SIZE_MAX;
  68. size = roundup_pow_of_two(size);
  69. return size;
  70. }
  71. static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
  72. {
  73. int size;
  74. /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
  75. size =
  76. htt->max_throughput_mbps *
  77. 1000 /
  78. (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
  79. /*
  80. * Make sure the fill level is at least 1 less than the ring size.
  81. * Leaving 1 element empty allows the SW to easily distinguish
  82. * between a full ring vs. an empty ring.
  83. */
  84. if (size >= htt->rx_ring.size)
  85. size = htt->rx_ring.size - 1;
  86. return size;
  87. }
  88. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  89. {
  90. struct sk_buff *skb;
  91. struct ath10k_skb_cb *cb;
  92. int i;
  93. for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
  94. skb = htt->rx_ring.netbufs_ring[i];
  95. cb = ATH10K_SKB_CB(skb);
  96. dma_unmap_single(htt->ar->dev, cb->paddr,
  97. skb->len + skb_tailroom(skb),
  98. DMA_FROM_DEVICE);
  99. dev_kfree_skb_any(skb);
  100. }
  101. htt->rx_ring.fill_cnt = 0;
  102. }
  103. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  104. {
  105. struct htt_rx_desc *rx_desc;
  106. struct sk_buff *skb;
  107. dma_addr_t paddr;
  108. int ret = 0, idx;
  109. idx = __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr));
  110. while (num > 0) {
  111. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  112. if (!skb) {
  113. ret = -ENOMEM;
  114. goto fail;
  115. }
  116. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  117. skb_pull(skb,
  118. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  119. skb->data);
  120. /* Clear rx_desc attention word before posting to Rx ring */
  121. rx_desc = (struct htt_rx_desc *)skb->data;
  122. rx_desc->attention.flags = __cpu_to_le32(0);
  123. paddr = dma_map_single(htt->ar->dev, skb->data,
  124. skb->len + skb_tailroom(skb),
  125. DMA_FROM_DEVICE);
  126. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  127. dev_kfree_skb_any(skb);
  128. ret = -ENOMEM;
  129. goto fail;
  130. }
  131. ATH10K_SKB_CB(skb)->paddr = paddr;
  132. htt->rx_ring.netbufs_ring[idx] = skb;
  133. htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
  134. htt->rx_ring.fill_cnt++;
  135. num--;
  136. idx++;
  137. idx &= htt->rx_ring.size_mask;
  138. }
  139. fail:
  140. *(htt->rx_ring.alloc_idx.vaddr) = __cpu_to_le32(idx);
  141. return ret;
  142. }
  143. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  144. {
  145. lockdep_assert_held(&htt->rx_ring.lock);
  146. return __ath10k_htt_rx_ring_fill_n(htt, num);
  147. }
  148. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  149. {
  150. int ret, num_deficit, num_to_fill;
  151. /* Refilling the whole RX ring buffer proves to be a bad idea. The
  152. * reason is RX may take up significant amount of CPU cycles and starve
  153. * other tasks, e.g. TX on an ethernet device while acting as a bridge
  154. * with ath10k wlan interface. This ended up with very poor performance
  155. * once CPU the host system was overwhelmed with RX on ath10k.
  156. *
  157. * By limiting the number of refills the replenishing occurs
  158. * progressively. This in turns makes use of the fact tasklets are
  159. * processed in FIFO order. This means actual RX processing can starve
  160. * out refilling. If there's not enough buffers on RX ring FW will not
  161. * report RX until it is refilled with enough buffers. This
  162. * automatically balances load wrt to CPU power.
  163. *
  164. * This probably comes at a cost of lower maximum throughput but
  165. * improves the avarage and stability. */
  166. spin_lock_bh(&htt->rx_ring.lock);
  167. num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  168. num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
  169. num_deficit -= num_to_fill;
  170. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  171. if (ret == -ENOMEM) {
  172. /*
  173. * Failed to fill it to the desired level -
  174. * we'll start a timer and try again next time.
  175. * As long as enough buffers are left in the ring for
  176. * another A-MPDU rx, no special recovery is needed.
  177. */
  178. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  179. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  180. } else if (num_deficit > 0) {
  181. tasklet_schedule(&htt->rx_replenish_task);
  182. }
  183. spin_unlock_bh(&htt->rx_ring.lock);
  184. }
  185. static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
  186. {
  187. struct ath10k_htt *htt = (struct ath10k_htt *)arg;
  188. ath10k_htt_rx_msdu_buff_replenish(htt);
  189. }
  190. static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt)
  191. {
  192. struct sk_buff *skb;
  193. int i;
  194. for (i = 0; i < htt->rx_ring.size; i++) {
  195. skb = htt->rx_ring.netbufs_ring[i];
  196. if (!skb)
  197. continue;
  198. dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr,
  199. skb->len + skb_tailroom(skb),
  200. DMA_FROM_DEVICE);
  201. dev_kfree_skb_any(skb);
  202. htt->rx_ring.netbufs_ring[i] = NULL;
  203. }
  204. }
  205. void ath10k_htt_rx_free(struct ath10k_htt *htt)
  206. {
  207. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  208. tasklet_kill(&htt->rx_replenish_task);
  209. tasklet_kill(&htt->txrx_compl_task);
  210. skb_queue_purge(&htt->tx_compl_q);
  211. skb_queue_purge(&htt->rx_compl_q);
  212. ath10k_htt_rx_ring_clean_up(htt);
  213. dma_free_coherent(htt->ar->dev,
  214. (htt->rx_ring.size *
  215. sizeof(htt->rx_ring.paddrs_ring)),
  216. htt->rx_ring.paddrs_ring,
  217. htt->rx_ring.base_paddr);
  218. dma_free_coherent(htt->ar->dev,
  219. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  220. htt->rx_ring.alloc_idx.vaddr,
  221. htt->rx_ring.alloc_idx.paddr);
  222. kfree(htt->rx_ring.netbufs_ring);
  223. }
  224. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  225. {
  226. int idx;
  227. struct sk_buff *msdu;
  228. lockdep_assert_held(&htt->rx_ring.lock);
  229. if (htt->rx_ring.fill_cnt == 0) {
  230. ath10k_warn("tried to pop sk_buff from an empty rx ring\n");
  231. return NULL;
  232. }
  233. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  234. msdu = htt->rx_ring.netbufs_ring[idx];
  235. htt->rx_ring.netbufs_ring[idx] = NULL;
  236. idx++;
  237. idx &= htt->rx_ring.size_mask;
  238. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  239. htt->rx_ring.fill_cnt--;
  240. return msdu;
  241. }
  242. static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
  243. {
  244. struct sk_buff *next;
  245. while (skb) {
  246. next = skb->next;
  247. dev_kfree_skb_any(skb);
  248. skb = next;
  249. }
  250. }
  251. /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
  252. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  253. u8 **fw_desc, int *fw_desc_len,
  254. struct sk_buff **head_msdu,
  255. struct sk_buff **tail_msdu)
  256. {
  257. int msdu_len, msdu_chaining = 0;
  258. struct sk_buff *msdu;
  259. struct htt_rx_desc *rx_desc;
  260. lockdep_assert_held(&htt->rx_ring.lock);
  261. if (htt->rx_confused) {
  262. ath10k_warn("htt is confused. refusing rx\n");
  263. return -1;
  264. }
  265. msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
  266. while (msdu) {
  267. int last_msdu, msdu_len_invalid, msdu_chained;
  268. dma_unmap_single(htt->ar->dev,
  269. ATH10K_SKB_CB(msdu)->paddr,
  270. msdu->len + skb_tailroom(msdu),
  271. DMA_FROM_DEVICE);
  272. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
  273. msdu->data, msdu->len + skb_tailroom(msdu));
  274. rx_desc = (struct htt_rx_desc *)msdu->data;
  275. /* FIXME: we must report msdu payload since this is what caller
  276. * expects now */
  277. skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  278. skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  279. /*
  280. * Sanity check - confirm the HW is finished filling in the
  281. * rx data.
  282. * If the HW and SW are working correctly, then it's guaranteed
  283. * that the HW's MAC DMA is done before this point in the SW.
  284. * To prevent the case that we handle a stale Rx descriptor,
  285. * just assert for now until we have a way to recover.
  286. */
  287. if (!(__le32_to_cpu(rx_desc->attention.flags)
  288. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  289. ath10k_htt_rx_free_msdu_chain(*head_msdu);
  290. *head_msdu = NULL;
  291. msdu = NULL;
  292. ath10k_err("htt rx stopped. cannot recover\n");
  293. htt->rx_confused = true;
  294. break;
  295. }
  296. /*
  297. * Copy the FW rx descriptor for this MSDU from the rx
  298. * indication message into the MSDU's netbuf. HL uses the
  299. * same rx indication message definition as LL, and simply
  300. * appends new info (fields from the HW rx desc, and the
  301. * MSDU payload itself). So, the offset into the rx
  302. * indication message only has to account for the standard
  303. * offset of the per-MSDU FW rx desc info within the
  304. * message, and how many bytes of the per-MSDU FW rx desc
  305. * info have already been consumed. (And the endianness of
  306. * the host, since for a big-endian host, the rx ind
  307. * message contents, including the per-MSDU rx desc bytes,
  308. * were byteswapped during upload.)
  309. */
  310. if (*fw_desc_len > 0) {
  311. rx_desc->fw_desc.info0 = **fw_desc;
  312. /*
  313. * The target is expected to only provide the basic
  314. * per-MSDU rx descriptors. Just to be sure, verify
  315. * that the target has not attached extension data
  316. * (e.g. LRO flow ID).
  317. */
  318. /* or more, if there's extension data */
  319. (*fw_desc)++;
  320. (*fw_desc_len)--;
  321. } else {
  322. /*
  323. * When an oversized AMSDU happened, FW will lost
  324. * some of MSDU status - in this case, the FW
  325. * descriptors provided will be less than the
  326. * actual MSDUs inside this MPDU. Mark the FW
  327. * descriptors so that it will still deliver to
  328. * upper stack, if no CRC error for this MPDU.
  329. *
  330. * FIX THIS - the FW descriptors are actually for
  331. * MSDUs in the end of this A-MSDU instead of the
  332. * beginning.
  333. */
  334. rx_desc->fw_desc.info0 = 0;
  335. }
  336. msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
  337. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  338. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  339. msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
  340. RX_MSDU_START_INFO0_MSDU_LENGTH);
  341. msdu_chained = rx_desc->frag_info.ring2_more_count;
  342. if (msdu_len_invalid)
  343. msdu_len = 0;
  344. skb_trim(msdu, 0);
  345. skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
  346. msdu_len -= msdu->len;
  347. /* FIXME: Do chained buffers include htt_rx_desc or not? */
  348. while (msdu_chained--) {
  349. struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
  350. dma_unmap_single(htt->ar->dev,
  351. ATH10K_SKB_CB(next)->paddr,
  352. next->len + skb_tailroom(next),
  353. DMA_FROM_DEVICE);
  354. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL,
  355. "htt rx chained: ", next->data,
  356. next->len + skb_tailroom(next));
  357. skb_trim(next, 0);
  358. skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
  359. msdu_len -= next->len;
  360. msdu->next = next;
  361. msdu = next;
  362. msdu_chaining = 1;
  363. }
  364. last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
  365. RX_MSDU_END_INFO0_LAST_MSDU;
  366. if (last_msdu) {
  367. msdu->next = NULL;
  368. break;
  369. } else {
  370. struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
  371. msdu->next = next;
  372. msdu = next;
  373. }
  374. }
  375. *tail_msdu = msdu;
  376. if (*head_msdu == NULL)
  377. msdu_chaining = -1;
  378. /*
  379. * Don't refill the ring yet.
  380. *
  381. * First, the elements popped here are still in use - it is not
  382. * safe to overwrite them until the matching call to
  383. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  384. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  385. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  386. * (something like 3 buffers). Consequently, we'll rely on the txrx
  387. * SW to tell us when it is done pulling all the PPDU's rx buffers
  388. * out of the rx ring, and then refill it just once.
  389. */
  390. return msdu_chaining;
  391. }
  392. static void ath10k_htt_rx_replenish_task(unsigned long ptr)
  393. {
  394. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  395. ath10k_htt_rx_msdu_buff_replenish(htt);
  396. }
  397. int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
  398. {
  399. dma_addr_t paddr;
  400. void *vaddr;
  401. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  402. htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
  403. if (!is_power_of_2(htt->rx_ring.size)) {
  404. ath10k_warn("htt rx ring size is not power of 2\n");
  405. return -EINVAL;
  406. }
  407. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  408. /*
  409. * Set the initial value for the level to which the rx ring
  410. * should be filled, based on the max throughput and the
  411. * worst likely latency for the host to fill the rx ring
  412. * with new buffers. In theory, this fill level can be
  413. * dynamically adjusted from the initial value set here, to
  414. * reflect the actual host latency rather than a
  415. * conservative assumption about the host latency.
  416. */
  417. htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
  418. htt->rx_ring.netbufs_ring =
  419. kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
  420. GFP_KERNEL);
  421. if (!htt->rx_ring.netbufs_ring)
  422. goto err_netbuf;
  423. vaddr = dma_alloc_coherent(htt->ar->dev,
  424. (htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring)),
  425. &paddr, GFP_DMA);
  426. if (!vaddr)
  427. goto err_dma_ring;
  428. htt->rx_ring.paddrs_ring = vaddr;
  429. htt->rx_ring.base_paddr = paddr;
  430. vaddr = dma_alloc_coherent(htt->ar->dev,
  431. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  432. &paddr, GFP_DMA);
  433. if (!vaddr)
  434. goto err_dma_idx;
  435. htt->rx_ring.alloc_idx.vaddr = vaddr;
  436. htt->rx_ring.alloc_idx.paddr = paddr;
  437. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  438. *htt->rx_ring.alloc_idx.vaddr = 0;
  439. /* Initialize the Rx refill retry timer */
  440. setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
  441. spin_lock_init(&htt->rx_ring.lock);
  442. htt->rx_ring.fill_cnt = 0;
  443. if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
  444. goto err_fill_ring;
  445. tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
  446. (unsigned long)htt);
  447. skb_queue_head_init(&htt->tx_compl_q);
  448. skb_queue_head_init(&htt->rx_compl_q);
  449. tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
  450. (unsigned long)htt);
  451. ath10k_dbg(ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
  452. htt->rx_ring.size, htt->rx_ring.fill_level);
  453. return 0;
  454. err_fill_ring:
  455. ath10k_htt_rx_ring_free(htt);
  456. dma_free_coherent(htt->ar->dev,
  457. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  458. htt->rx_ring.alloc_idx.vaddr,
  459. htt->rx_ring.alloc_idx.paddr);
  460. err_dma_idx:
  461. dma_free_coherent(htt->ar->dev,
  462. (htt->rx_ring.size *
  463. sizeof(htt->rx_ring.paddrs_ring)),
  464. htt->rx_ring.paddrs_ring,
  465. htt->rx_ring.base_paddr);
  466. err_dma_ring:
  467. kfree(htt->rx_ring.netbufs_ring);
  468. err_netbuf:
  469. return -ENOMEM;
  470. }
  471. static int ath10k_htt_rx_crypto_param_len(enum htt_rx_mpdu_encrypt_type type)
  472. {
  473. switch (type) {
  474. case HTT_RX_MPDU_ENCRYPT_WEP40:
  475. case HTT_RX_MPDU_ENCRYPT_WEP104:
  476. return 4;
  477. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  478. case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */
  479. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  480. case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */
  481. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  482. return 8;
  483. case HTT_RX_MPDU_ENCRYPT_NONE:
  484. return 0;
  485. }
  486. ath10k_warn("unknown encryption type %d\n", type);
  487. return 0;
  488. }
  489. static int ath10k_htt_rx_crypto_tail_len(enum htt_rx_mpdu_encrypt_type type)
  490. {
  491. switch (type) {
  492. case HTT_RX_MPDU_ENCRYPT_NONE:
  493. case HTT_RX_MPDU_ENCRYPT_WEP40:
  494. case HTT_RX_MPDU_ENCRYPT_WEP104:
  495. case HTT_RX_MPDU_ENCRYPT_WEP128:
  496. case HTT_RX_MPDU_ENCRYPT_WAPI:
  497. return 0;
  498. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  499. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  500. return 4;
  501. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  502. return 8;
  503. }
  504. ath10k_warn("unknown encryption type %d\n", type);
  505. return 0;
  506. }
  507. /* Applies for first msdu in chain, before altering it. */
  508. static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
  509. {
  510. struct htt_rx_desc *rxd;
  511. enum rx_msdu_decap_format fmt;
  512. rxd = (void *)skb->data - sizeof(*rxd);
  513. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  514. RX_MSDU_START_INFO1_DECAP_FORMAT);
  515. if (fmt == RX_MSDU_DECAP_RAW)
  516. return (void *)skb->data;
  517. else
  518. return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
  519. }
  520. /* This function only applies for first msdu in an msdu chain */
  521. static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
  522. {
  523. if (ieee80211_is_data_qos(hdr->frame_control)) {
  524. u8 *qc = ieee80211_get_qos_ctl(hdr);
  525. if (qc[0] & 0x80)
  526. return true;
  527. }
  528. return false;
  529. }
  530. struct rfc1042_hdr {
  531. u8 llc_dsap;
  532. u8 llc_ssap;
  533. u8 llc_ctrl;
  534. u8 snap_oui[3];
  535. __be16 snap_type;
  536. } __packed;
  537. struct amsdu_subframe_hdr {
  538. u8 dst[ETH_ALEN];
  539. u8 src[ETH_ALEN];
  540. __be16 len;
  541. } __packed;
  542. static const u8 rx_legacy_rate_idx[] = {
  543. 3, /* 0x00 - 11Mbps */
  544. 2, /* 0x01 - 5.5Mbps */
  545. 1, /* 0x02 - 2Mbps */
  546. 0, /* 0x03 - 1Mbps */
  547. 3, /* 0x04 - 11Mbps */
  548. 2, /* 0x05 - 5.5Mbps */
  549. 1, /* 0x06 - 2Mbps */
  550. 0, /* 0x07 - 1Mbps */
  551. 10, /* 0x08 - 48Mbps */
  552. 8, /* 0x09 - 24Mbps */
  553. 6, /* 0x0A - 12Mbps */
  554. 4, /* 0x0B - 6Mbps */
  555. 11, /* 0x0C - 54Mbps */
  556. 9, /* 0x0D - 36Mbps */
  557. 7, /* 0x0E - 18Mbps */
  558. 5, /* 0x0F - 9Mbps */
  559. };
  560. static void ath10k_htt_rx_h_rates(struct ath10k *ar,
  561. enum ieee80211_band band,
  562. u8 info0, u32 info1, u32 info2,
  563. struct ieee80211_rx_status *status)
  564. {
  565. u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
  566. u8 preamble = 0;
  567. /* Check if valid fields */
  568. if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
  569. return;
  570. preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
  571. switch (preamble) {
  572. case HTT_RX_LEGACY:
  573. cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
  574. rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
  575. rate_idx = 0;
  576. if (rate < 0x08 || rate > 0x0F)
  577. break;
  578. switch (band) {
  579. case IEEE80211_BAND_2GHZ:
  580. if (cck)
  581. rate &= ~BIT(3);
  582. rate_idx = rx_legacy_rate_idx[rate];
  583. break;
  584. case IEEE80211_BAND_5GHZ:
  585. rate_idx = rx_legacy_rate_idx[rate];
  586. /* We are using same rate table registering
  587. HW - ath10k_rates[]. In case of 5GHz skip
  588. CCK rates, so -4 here */
  589. rate_idx -= 4;
  590. break;
  591. default:
  592. break;
  593. }
  594. status->rate_idx = rate_idx;
  595. break;
  596. case HTT_RX_HT:
  597. case HTT_RX_HT_WITH_TXBF:
  598. /* HT-SIG - Table 20-11 in info1 and info2 */
  599. mcs = info1 & 0x1F;
  600. nss = mcs >> 3;
  601. bw = (info1 >> 7) & 1;
  602. sgi = (info2 >> 7) & 1;
  603. status->rate_idx = mcs;
  604. status->flag |= RX_FLAG_HT;
  605. if (sgi)
  606. status->flag |= RX_FLAG_SHORT_GI;
  607. if (bw)
  608. status->flag |= RX_FLAG_40MHZ;
  609. break;
  610. case HTT_RX_VHT:
  611. case HTT_RX_VHT_WITH_TXBF:
  612. /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
  613. TODO check this */
  614. mcs = (info2 >> 4) & 0x0F;
  615. nss = ((info1 >> 10) & 0x07) + 1;
  616. bw = info1 & 3;
  617. sgi = info2 & 1;
  618. status->rate_idx = mcs;
  619. status->vht_nss = nss;
  620. if (sgi)
  621. status->flag |= RX_FLAG_SHORT_GI;
  622. switch (bw) {
  623. /* 20MHZ */
  624. case 0:
  625. break;
  626. /* 40MHZ */
  627. case 1:
  628. status->flag |= RX_FLAG_40MHZ;
  629. break;
  630. /* 80MHZ */
  631. case 2:
  632. status->vht_flag |= RX_VHT_FLAG_80MHZ;
  633. }
  634. status->flag |= RX_FLAG_VHT;
  635. break;
  636. default:
  637. break;
  638. }
  639. }
  640. static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt,
  641. struct ieee80211_rx_status *rx_status,
  642. struct sk_buff *skb,
  643. enum htt_rx_mpdu_encrypt_type enctype,
  644. enum rx_msdu_decap_format fmt,
  645. bool dot11frag)
  646. {
  647. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  648. rx_status->flag &= ~(RX_FLAG_DECRYPTED |
  649. RX_FLAG_IV_STRIPPED |
  650. RX_FLAG_MMIC_STRIPPED);
  651. if (enctype == HTT_RX_MPDU_ENCRYPT_NONE)
  652. return;
  653. /*
  654. * There's no explicit rx descriptor flag to indicate whether a given
  655. * frame has been decrypted or not. We're forced to use the decap
  656. * format as an implicit indication. However fragmentation rx is always
  657. * raw and it probably never reports undecrypted raws.
  658. *
  659. * This makes sure sniffed frames are reported as-is without stripping
  660. * the protected flag.
  661. */
  662. if (fmt == RX_MSDU_DECAP_RAW && !dot11frag)
  663. return;
  664. rx_status->flag |= RX_FLAG_DECRYPTED |
  665. RX_FLAG_IV_STRIPPED |
  666. RX_FLAG_MMIC_STRIPPED;
  667. hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) &
  668. ~IEEE80211_FCTL_PROTECTED);
  669. }
  670. static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
  671. struct ieee80211_rx_status *status)
  672. {
  673. struct ieee80211_channel *ch;
  674. spin_lock_bh(&ar->data_lock);
  675. ch = ar->scan_channel;
  676. if (!ch)
  677. ch = ar->rx_channel;
  678. spin_unlock_bh(&ar->data_lock);
  679. if (!ch)
  680. return false;
  681. status->band = ch->band;
  682. status->freq = ch->center_freq;
  683. return true;
  684. }
  685. static void ath10k_process_rx(struct ath10k *ar,
  686. struct ieee80211_rx_status *rx_status,
  687. struct sk_buff *skb)
  688. {
  689. struct ieee80211_rx_status *status;
  690. status = IEEE80211_SKB_RXCB(skb);
  691. *status = *rx_status;
  692. ath10k_dbg(ATH10K_DBG_DATA,
  693. "rx skb %p len %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %imic-err %i\n",
  694. skb,
  695. skb->len,
  696. status->flag == 0 ? "legacy" : "",
  697. status->flag & RX_FLAG_HT ? "ht" : "",
  698. status->flag & RX_FLAG_VHT ? "vht" : "",
  699. status->flag & RX_FLAG_40MHZ ? "40" : "",
  700. status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
  701. status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
  702. status->rate_idx,
  703. status->vht_nss,
  704. status->freq,
  705. status->band, status->flag,
  706. !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
  707. !!(status->flag & RX_FLAG_MMIC_ERROR));
  708. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
  709. skb->data, skb->len);
  710. ieee80211_rx(ar->hw, skb);
  711. }
  712. static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
  713. {
  714. /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
  715. return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
  716. }
  717. static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
  718. struct ieee80211_rx_status *rx_status,
  719. struct sk_buff *skb_in)
  720. {
  721. struct htt_rx_desc *rxd;
  722. struct sk_buff *skb = skb_in;
  723. struct sk_buff *first;
  724. enum rx_msdu_decap_format fmt;
  725. enum htt_rx_mpdu_encrypt_type enctype;
  726. struct ieee80211_hdr *hdr;
  727. u8 hdr_buf[64], addr[ETH_ALEN], *qos;
  728. unsigned int hdr_len;
  729. rxd = (void *)skb->data - sizeof(*rxd);
  730. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  731. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  732. hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
  733. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  734. memcpy(hdr_buf, hdr, hdr_len);
  735. hdr = (struct ieee80211_hdr *)hdr_buf;
  736. first = skb;
  737. while (skb) {
  738. void *decap_hdr;
  739. int len;
  740. rxd = (void *)skb->data - sizeof(*rxd);
  741. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  742. RX_MSDU_START_INFO1_DECAP_FORMAT);
  743. decap_hdr = (void *)rxd->rx_hdr_status;
  744. skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
  745. /* First frame in an A-MSDU chain has more decapped data. */
  746. if (skb == first) {
  747. len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
  748. len += round_up(ath10k_htt_rx_crypto_param_len(enctype),
  749. 4);
  750. decap_hdr += len;
  751. }
  752. switch (fmt) {
  753. case RX_MSDU_DECAP_RAW:
  754. /* remove trailing FCS */
  755. skb_trim(skb, skb->len - FCS_LEN);
  756. break;
  757. case RX_MSDU_DECAP_NATIVE_WIFI:
  758. /* pull decapped header and copy DA */
  759. hdr = (struct ieee80211_hdr *)skb->data;
  760. hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
  761. memcpy(addr, ieee80211_get_DA(hdr), ETH_ALEN);
  762. skb_pull(skb, hdr_len);
  763. /* push original 802.11 header */
  764. hdr = (struct ieee80211_hdr *)hdr_buf;
  765. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  766. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  767. /* original A-MSDU header has the bit set but we're
  768. * not including A-MSDU subframe header */
  769. hdr = (struct ieee80211_hdr *)skb->data;
  770. qos = ieee80211_get_qos_ctl(hdr);
  771. qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
  772. /* original 802.11 header has a different DA */
  773. memcpy(ieee80211_get_DA(hdr), addr, ETH_ALEN);
  774. break;
  775. case RX_MSDU_DECAP_ETHERNET2_DIX:
  776. /* strip ethernet header and insert decapped 802.11
  777. * header, amsdu subframe header and rfc1042 header */
  778. len = 0;
  779. len += sizeof(struct rfc1042_hdr);
  780. len += sizeof(struct amsdu_subframe_hdr);
  781. skb_pull(skb, sizeof(struct ethhdr));
  782. memcpy(skb_push(skb, len), decap_hdr, len);
  783. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  784. break;
  785. case RX_MSDU_DECAP_8023_SNAP_LLC:
  786. /* insert decapped 802.11 header making a singly
  787. * A-MSDU */
  788. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  789. break;
  790. }
  791. skb_in = skb;
  792. ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype, fmt,
  793. false);
  794. skb = skb->next;
  795. skb_in->next = NULL;
  796. if (skb)
  797. rx_status->flag |= RX_FLAG_AMSDU_MORE;
  798. else
  799. rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
  800. ath10k_process_rx(htt->ar, rx_status, skb_in);
  801. }
  802. /* FIXME: It might be nice to re-assemble the A-MSDU when there's a
  803. * monitor interface active for sniffing purposes. */
  804. }
  805. static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
  806. struct ieee80211_rx_status *rx_status,
  807. struct sk_buff *skb)
  808. {
  809. struct htt_rx_desc *rxd;
  810. struct ieee80211_hdr *hdr;
  811. enum rx_msdu_decap_format fmt;
  812. enum htt_rx_mpdu_encrypt_type enctype;
  813. int hdr_len;
  814. void *rfc1042;
  815. /* This shouldn't happen. If it does than it may be a FW bug. */
  816. if (skb->next) {
  817. ath10k_warn("htt rx received chained non A-MSDU frame\n");
  818. ath10k_htt_rx_free_msdu_chain(skb->next);
  819. skb->next = NULL;
  820. }
  821. rxd = (void *)skb->data - sizeof(*rxd);
  822. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  823. RX_MSDU_START_INFO1_DECAP_FORMAT);
  824. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  825. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  826. hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
  827. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  828. skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
  829. switch (fmt) {
  830. case RX_MSDU_DECAP_RAW:
  831. /* remove trailing FCS */
  832. skb_trim(skb, skb->len - FCS_LEN);
  833. break;
  834. case RX_MSDU_DECAP_NATIVE_WIFI:
  835. /* Pull decapped header */
  836. hdr = (struct ieee80211_hdr *)skb->data;
  837. hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
  838. skb_pull(skb, hdr_len);
  839. /* Push original header */
  840. hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
  841. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  842. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  843. break;
  844. case RX_MSDU_DECAP_ETHERNET2_DIX:
  845. /* strip ethernet header and insert decapped 802.11 header and
  846. * rfc1042 header */
  847. rfc1042 = hdr;
  848. rfc1042 += roundup(hdr_len, 4);
  849. rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(enctype), 4);
  850. skb_pull(skb, sizeof(struct ethhdr));
  851. memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
  852. rfc1042, sizeof(struct rfc1042_hdr));
  853. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  854. break;
  855. case RX_MSDU_DECAP_8023_SNAP_LLC:
  856. /* remove A-MSDU subframe header and insert
  857. * decapped 802.11 header. rfc1042 header is already there */
  858. skb_pull(skb, sizeof(struct amsdu_subframe_hdr));
  859. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  860. break;
  861. }
  862. ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype, fmt, false);
  863. ath10k_process_rx(htt->ar, rx_status, skb);
  864. }
  865. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
  866. {
  867. struct htt_rx_desc *rxd;
  868. u32 flags, info;
  869. bool is_ip4, is_ip6;
  870. bool is_tcp, is_udp;
  871. bool ip_csum_ok, tcpudp_csum_ok;
  872. rxd = (void *)skb->data - sizeof(*rxd);
  873. flags = __le32_to_cpu(rxd->attention.flags);
  874. info = __le32_to_cpu(rxd->msdu_start.info1);
  875. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  876. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  877. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  878. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  879. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  880. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  881. if (!is_ip4 && !is_ip6)
  882. return CHECKSUM_NONE;
  883. if (!is_tcp && !is_udp)
  884. return CHECKSUM_NONE;
  885. if (!ip_csum_ok)
  886. return CHECKSUM_NONE;
  887. if (!tcpudp_csum_ok)
  888. return CHECKSUM_NONE;
  889. return CHECKSUM_UNNECESSARY;
  890. }
  891. static int ath10k_unchain_msdu(struct sk_buff *msdu_head)
  892. {
  893. struct sk_buff *next = msdu_head->next;
  894. struct sk_buff *to_free = next;
  895. int space;
  896. int total_len = 0;
  897. /* TODO: Might could optimize this by using
  898. * skb_try_coalesce or similar method to
  899. * decrease copying, or maybe get mac80211 to
  900. * provide a way to just receive a list of
  901. * skb?
  902. */
  903. msdu_head->next = NULL;
  904. /* Allocate total length all at once. */
  905. while (next) {
  906. total_len += next->len;
  907. next = next->next;
  908. }
  909. space = total_len - skb_tailroom(msdu_head);
  910. if ((space > 0) &&
  911. (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) {
  912. /* TODO: bump some rx-oom error stat */
  913. /* put it back together so we can free the
  914. * whole list at once.
  915. */
  916. msdu_head->next = to_free;
  917. return -1;
  918. }
  919. /* Walk list again, copying contents into
  920. * msdu_head
  921. */
  922. next = to_free;
  923. while (next) {
  924. skb_copy_from_linear_data(next, skb_put(msdu_head, next->len),
  925. next->len);
  926. next = next->next;
  927. }
  928. /* If here, we have consolidated skb. Free the
  929. * fragments and pass the main skb on up the
  930. * stack.
  931. */
  932. ath10k_htt_rx_free_msdu_chain(to_free);
  933. return 0;
  934. }
  935. static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
  936. struct sk_buff *head,
  937. enum htt_rx_mpdu_status status,
  938. bool channel_set,
  939. u32 attention)
  940. {
  941. if (head->len == 0) {
  942. ath10k_dbg(ATH10K_DBG_HTT,
  943. "htt rx dropping due to zero-len\n");
  944. return false;
  945. }
  946. if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) {
  947. ath10k_dbg(ATH10K_DBG_HTT,
  948. "htt rx dropping due to decrypt-err\n");
  949. return false;
  950. }
  951. if (!channel_set) {
  952. ath10k_warn("no channel configured; ignoring frame!\n");
  953. return false;
  954. }
  955. /* Skip mgmt frames while we handle this in WMI */
  956. if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL ||
  957. attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
  958. ath10k_dbg(ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
  959. return false;
  960. }
  961. if (status != HTT_RX_IND_MPDU_STATUS_OK &&
  962. status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
  963. status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER &&
  964. !htt->ar->monitor_started) {
  965. ath10k_dbg(ATH10K_DBG_HTT,
  966. "htt rx ignoring frame w/ status %d\n",
  967. status);
  968. return false;
  969. }
  970. if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
  971. ath10k_dbg(ATH10K_DBG_HTT,
  972. "htt rx CAC running\n");
  973. return false;
  974. }
  975. return true;
  976. }
  977. static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
  978. struct htt_rx_indication *rx)
  979. {
  980. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  981. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  982. struct htt_rx_desc *rxd;
  983. enum htt_rx_mpdu_status status;
  984. struct ieee80211_hdr *hdr;
  985. int num_mpdu_ranges;
  986. u32 attention;
  987. int fw_desc_len;
  988. u8 *fw_desc;
  989. bool channel_set;
  990. int i, j;
  991. int ret;
  992. lockdep_assert_held(&htt->rx_ring.lock);
  993. fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
  994. fw_desc = (u8 *)&rx->fw_desc;
  995. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  996. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  997. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  998. /* Fill this once, while this is per-ppdu */
  999. if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) {
  1000. memset(rx_status, 0, sizeof(*rx_status));
  1001. rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
  1002. rx->ppdu.combined_rssi;
  1003. }
  1004. if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
  1005. /* TSF available only in 32-bit */
  1006. rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff;
  1007. rx_status->flag |= RX_FLAG_MACTIME_END;
  1008. }
  1009. channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status);
  1010. if (channel_set) {
  1011. ath10k_htt_rx_h_rates(htt->ar, rx_status->band,
  1012. rx->ppdu.info0,
  1013. __le32_to_cpu(rx->ppdu.info1),
  1014. __le32_to_cpu(rx->ppdu.info2),
  1015. rx_status);
  1016. }
  1017. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  1018. rx, sizeof(*rx) +
  1019. (sizeof(struct htt_rx_indication_mpdu_range) *
  1020. num_mpdu_ranges));
  1021. for (i = 0; i < num_mpdu_ranges; i++) {
  1022. status = mpdu_ranges[i].mpdu_range_status;
  1023. for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
  1024. struct sk_buff *msdu_head, *msdu_tail;
  1025. msdu_head = NULL;
  1026. msdu_tail = NULL;
  1027. ret = ath10k_htt_rx_amsdu_pop(htt,
  1028. &fw_desc,
  1029. &fw_desc_len,
  1030. &msdu_head,
  1031. &msdu_tail);
  1032. if (ret < 0) {
  1033. ath10k_warn("failed to pop amsdu from htt rx ring %d\n",
  1034. ret);
  1035. ath10k_htt_rx_free_msdu_chain(msdu_head);
  1036. continue;
  1037. }
  1038. rxd = container_of((void *)msdu_head->data,
  1039. struct htt_rx_desc,
  1040. msdu_payload);
  1041. attention = __le32_to_cpu(rxd->attention.flags);
  1042. if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head,
  1043. status,
  1044. channel_set,
  1045. attention)) {
  1046. ath10k_htt_rx_free_msdu_chain(msdu_head);
  1047. continue;
  1048. }
  1049. if (ret > 0 &&
  1050. ath10k_unchain_msdu(msdu_head) < 0) {
  1051. ath10k_htt_rx_free_msdu_chain(msdu_head);
  1052. continue;
  1053. }
  1054. if (attention & RX_ATTENTION_FLAGS_FCS_ERR)
  1055. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  1056. else
  1057. rx_status->flag &= ~RX_FLAG_FAILED_FCS_CRC;
  1058. if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR)
  1059. rx_status->flag |= RX_FLAG_MMIC_ERROR;
  1060. else
  1061. rx_status->flag &= ~RX_FLAG_MMIC_ERROR;
  1062. hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
  1063. if (ath10k_htt_rx_hdr_is_amsdu(hdr))
  1064. ath10k_htt_rx_amsdu(htt, rx_status, msdu_head);
  1065. else
  1066. ath10k_htt_rx_msdu(htt, rx_status, msdu_head);
  1067. }
  1068. }
  1069. tasklet_schedule(&htt->rx_replenish_task);
  1070. }
  1071. static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
  1072. struct htt_rx_fragment_indication *frag)
  1073. {
  1074. struct sk_buff *msdu_head, *msdu_tail;
  1075. enum htt_rx_mpdu_encrypt_type enctype;
  1076. struct htt_rx_desc *rxd;
  1077. enum rx_msdu_decap_format fmt;
  1078. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1079. struct ieee80211_hdr *hdr;
  1080. int ret;
  1081. bool tkip_mic_err;
  1082. bool decrypt_err;
  1083. u8 *fw_desc;
  1084. int fw_desc_len, hdrlen, paramlen;
  1085. int trim;
  1086. fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
  1087. fw_desc = (u8 *)frag->fw_msdu_rx_desc;
  1088. msdu_head = NULL;
  1089. msdu_tail = NULL;
  1090. spin_lock_bh(&htt->rx_ring.lock);
  1091. ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
  1092. &msdu_head, &msdu_tail);
  1093. spin_unlock_bh(&htt->rx_ring.lock);
  1094. ath10k_dbg(ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
  1095. if (ret) {
  1096. ath10k_warn("failed to pop amsdu from httr rx ring for fragmented rx %d\n",
  1097. ret);
  1098. ath10k_htt_rx_free_msdu_chain(msdu_head);
  1099. return;
  1100. }
  1101. /* FIXME: implement signal strength */
  1102. rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  1103. hdr = (struct ieee80211_hdr *)msdu_head->data;
  1104. rxd = (void *)msdu_head->data - sizeof(*rxd);
  1105. tkip_mic_err = !!(__le32_to_cpu(rxd->attention.flags) &
  1106. RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  1107. decrypt_err = !!(__le32_to_cpu(rxd->attention.flags) &
  1108. RX_ATTENTION_FLAGS_DECRYPT_ERR);
  1109. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  1110. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1111. if (fmt != RX_MSDU_DECAP_RAW) {
  1112. ath10k_warn("we dont support non-raw fragmented rx yet\n");
  1113. dev_kfree_skb_any(msdu_head);
  1114. goto end;
  1115. }
  1116. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  1117. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  1118. ath10k_htt_rx_h_protected(htt, rx_status, msdu_head, enctype, fmt,
  1119. true);
  1120. msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
  1121. if (tkip_mic_err)
  1122. ath10k_warn("tkip mic error\n");
  1123. if (decrypt_err) {
  1124. ath10k_warn("decryption err in fragmented rx\n");
  1125. dev_kfree_skb_any(msdu_head);
  1126. goto end;
  1127. }
  1128. if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) {
  1129. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  1130. paramlen = ath10k_htt_rx_crypto_param_len(enctype);
  1131. /* It is more efficient to move the header than the payload */
  1132. memmove((void *)msdu_head->data + paramlen,
  1133. (void *)msdu_head->data,
  1134. hdrlen);
  1135. skb_pull(msdu_head, paramlen);
  1136. hdr = (struct ieee80211_hdr *)msdu_head->data;
  1137. }
  1138. /* remove trailing FCS */
  1139. trim = 4;
  1140. /* remove crypto trailer */
  1141. trim += ath10k_htt_rx_crypto_tail_len(enctype);
  1142. /* last fragment of TKIP frags has MIC */
  1143. if (!ieee80211_has_morefrags(hdr->frame_control) &&
  1144. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  1145. trim += 8;
  1146. if (trim > msdu_head->len) {
  1147. ath10k_warn("htt rx fragment: trailer longer than the frame itself? drop\n");
  1148. dev_kfree_skb_any(msdu_head);
  1149. goto end;
  1150. }
  1151. skb_trim(msdu_head, msdu_head->len - trim);
  1152. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
  1153. msdu_head->data, msdu_head->len);
  1154. ath10k_process_rx(htt->ar, rx_status, msdu_head);
  1155. end:
  1156. if (fw_desc_len > 0) {
  1157. ath10k_dbg(ATH10K_DBG_HTT,
  1158. "expecting more fragmented rx in one indication %d\n",
  1159. fw_desc_len);
  1160. }
  1161. }
  1162. static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
  1163. struct sk_buff *skb)
  1164. {
  1165. struct ath10k_htt *htt = &ar->htt;
  1166. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1167. struct htt_tx_done tx_done = {};
  1168. int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
  1169. __le16 msdu_id;
  1170. int i;
  1171. lockdep_assert_held(&htt->tx_lock);
  1172. switch (status) {
  1173. case HTT_DATA_TX_STATUS_NO_ACK:
  1174. tx_done.no_ack = true;
  1175. break;
  1176. case HTT_DATA_TX_STATUS_OK:
  1177. break;
  1178. case HTT_DATA_TX_STATUS_DISCARD:
  1179. case HTT_DATA_TX_STATUS_POSTPONE:
  1180. case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
  1181. tx_done.discard = true;
  1182. break;
  1183. default:
  1184. ath10k_warn("unhandled tx completion status %d\n", status);
  1185. tx_done.discard = true;
  1186. break;
  1187. }
  1188. ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  1189. resp->data_tx_completion.num_msdus);
  1190. for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
  1191. msdu_id = resp->data_tx_completion.msdus[i];
  1192. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  1193. ath10k_txrx_tx_unref(htt, &tx_done);
  1194. }
  1195. }
  1196. void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1197. {
  1198. struct ath10k_htt *htt = &ar->htt;
  1199. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1200. /* confirm alignment */
  1201. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1202. ath10k_warn("unaligned htt message, expect trouble\n");
  1203. ath10k_dbg(ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
  1204. resp->hdr.msg_type);
  1205. switch (resp->hdr.msg_type) {
  1206. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  1207. htt->target_version_major = resp->ver_resp.major;
  1208. htt->target_version_minor = resp->ver_resp.minor;
  1209. complete(&htt->target_version_received);
  1210. break;
  1211. }
  1212. case HTT_T2H_MSG_TYPE_RX_IND:
  1213. spin_lock_bh(&htt->rx_ring.lock);
  1214. __skb_queue_tail(&htt->rx_compl_q, skb);
  1215. spin_unlock_bh(&htt->rx_ring.lock);
  1216. tasklet_schedule(&htt->txrx_compl_task);
  1217. return;
  1218. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  1219. struct htt_peer_map_event ev = {
  1220. .vdev_id = resp->peer_map.vdev_id,
  1221. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  1222. };
  1223. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  1224. ath10k_peer_map_event(htt, &ev);
  1225. break;
  1226. }
  1227. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  1228. struct htt_peer_unmap_event ev = {
  1229. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  1230. };
  1231. ath10k_peer_unmap_event(htt, &ev);
  1232. break;
  1233. }
  1234. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  1235. struct htt_tx_done tx_done = {};
  1236. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  1237. tx_done.msdu_id =
  1238. __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  1239. switch (status) {
  1240. case HTT_MGMT_TX_STATUS_OK:
  1241. break;
  1242. case HTT_MGMT_TX_STATUS_RETRY:
  1243. tx_done.no_ack = true;
  1244. break;
  1245. case HTT_MGMT_TX_STATUS_DROP:
  1246. tx_done.discard = true;
  1247. break;
  1248. }
  1249. spin_lock_bh(&htt->tx_lock);
  1250. ath10k_txrx_tx_unref(htt, &tx_done);
  1251. spin_unlock_bh(&htt->tx_lock);
  1252. break;
  1253. }
  1254. case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
  1255. spin_lock_bh(&htt->tx_lock);
  1256. __skb_queue_tail(&htt->tx_compl_q, skb);
  1257. spin_unlock_bh(&htt->tx_lock);
  1258. tasklet_schedule(&htt->txrx_compl_task);
  1259. return;
  1260. case HTT_T2H_MSG_TYPE_SEC_IND: {
  1261. struct ath10k *ar = htt->ar;
  1262. struct htt_security_indication *ev = &resp->security_indication;
  1263. ath10k_dbg(ATH10K_DBG_HTT,
  1264. "sec ind peer_id %d unicast %d type %d\n",
  1265. __le16_to_cpu(ev->peer_id),
  1266. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  1267. MS(ev->flags, HTT_SECURITY_TYPE));
  1268. complete(&ar->install_key_done);
  1269. break;
  1270. }
  1271. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  1272. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1273. skb->data, skb->len);
  1274. ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
  1275. break;
  1276. }
  1277. case HTT_T2H_MSG_TYPE_TEST:
  1278. /* FIX THIS */
  1279. break;
  1280. case HTT_T2H_MSG_TYPE_STATS_CONF:
  1281. trace_ath10k_htt_stats(skb->data, skb->len);
  1282. break;
  1283. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  1284. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  1285. case HTT_T2H_MSG_TYPE_RX_DELBA:
  1286. case HTT_T2H_MSG_TYPE_RX_FLUSH:
  1287. default:
  1288. ath10k_dbg(ATH10K_DBG_HTT, "htt event (%d) not handled\n",
  1289. resp->hdr.msg_type);
  1290. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1291. skb->data, skb->len);
  1292. break;
  1293. };
  1294. /* Free the indication buffer */
  1295. dev_kfree_skb_any(skb);
  1296. }
  1297. static void ath10k_htt_txrx_compl_task(unsigned long ptr)
  1298. {
  1299. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  1300. struct htt_resp *resp;
  1301. struct sk_buff *skb;
  1302. spin_lock_bh(&htt->tx_lock);
  1303. while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
  1304. ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
  1305. dev_kfree_skb_any(skb);
  1306. }
  1307. spin_unlock_bh(&htt->tx_lock);
  1308. spin_lock_bh(&htt->rx_ring.lock);
  1309. while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
  1310. resp = (struct htt_resp *)skb->data;
  1311. ath10k_htt_rx_handler(htt, &resp->rx_ind);
  1312. dev_kfree_skb_any(skb);
  1313. }
  1314. spin_unlock_bh(&htt->rx_ring.lock);
  1315. }