core.h 11 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef _CORE_H_
  18. #define _CORE_H_
  19. #include <linux/completion.h>
  20. #include <linux/if_ether.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include "htt.h"
  24. #include "htc.h"
  25. #include "hw.h"
  26. #include "targaddrs.h"
  27. #include "wmi.h"
  28. #include "../ath.h"
  29. #include "../regd.h"
  30. #include "../dfs_pattern_detector.h"
  31. #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
  32. #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
  33. #define WO(_f) ((_f##_OFFSET) >> 2)
  34. #define ATH10K_SCAN_ID 0
  35. #define WMI_READY_TIMEOUT (5 * HZ)
  36. #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
  37. #define ATH10K_NUM_CHANS 38
  38. /* Antenna noise floor */
  39. #define ATH10K_DEFAULT_NOISE_FLOOR -95
  40. #define ATH10K_MAX_NUM_MGMT_PENDING 128
  41. /* number of failed packets */
  42. #define ATH10K_KICKOUT_THRESHOLD 50
  43. /*
  44. * Use insanely high numbers to make sure that the firmware implementation
  45. * won't start, we have the same functionality already in hostapd. Unit
  46. * is seconds.
  47. */
  48. #define ATH10K_KEEPALIVE_MIN_IDLE 3747
  49. #define ATH10K_KEEPALIVE_MAX_IDLE 3895
  50. #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
  51. struct ath10k;
  52. struct ath10k_skb_cb {
  53. dma_addr_t paddr;
  54. u8 vdev_id;
  55. struct {
  56. u8 tid;
  57. bool is_offchan;
  58. struct ath10k_htt_txbuf *txbuf;
  59. u32 txbuf_paddr;
  60. } __packed htt;
  61. struct {
  62. bool dtim_zero;
  63. bool deliver_cab;
  64. } bcn;
  65. } __packed;
  66. static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
  67. {
  68. BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
  69. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  70. return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
  71. }
  72. static inline u32 host_interest_item_address(u32 item_offset)
  73. {
  74. return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
  75. }
  76. struct ath10k_bmi {
  77. bool done_sent;
  78. };
  79. #define ATH10K_MAX_MEM_REQS 16
  80. struct ath10k_mem_chunk {
  81. void *vaddr;
  82. dma_addr_t paddr;
  83. u32 len;
  84. u32 req_id;
  85. };
  86. struct ath10k_wmi {
  87. enum ath10k_htc_ep_id eid;
  88. struct completion service_ready;
  89. struct completion unified_ready;
  90. wait_queue_head_t tx_credits_wq;
  91. struct wmi_cmd_map *cmd;
  92. struct wmi_vdev_param_map *vdev_param;
  93. struct wmi_pdev_param_map *pdev_param;
  94. u32 num_mem_chunks;
  95. struct ath10k_mem_chunk mem_chunks[ATH10K_MAX_MEM_REQS];
  96. };
  97. struct ath10k_peer_stat {
  98. u8 peer_macaddr[ETH_ALEN];
  99. u32 peer_rssi;
  100. u32 peer_tx_rate;
  101. u32 peer_rx_rate; /* 10x only */
  102. };
  103. struct ath10k_target_stats {
  104. /* PDEV stats */
  105. s32 ch_noise_floor;
  106. u32 tx_frame_count;
  107. u32 rx_frame_count;
  108. u32 rx_clear_count;
  109. u32 cycle_count;
  110. u32 phy_err_count;
  111. u32 chan_tx_power;
  112. u32 ack_rx_bad;
  113. u32 rts_bad;
  114. u32 rts_good;
  115. u32 fcs_bad;
  116. u32 no_beacons;
  117. u32 mib_int_count;
  118. /* PDEV TX stats */
  119. s32 comp_queued;
  120. s32 comp_delivered;
  121. s32 msdu_enqued;
  122. s32 mpdu_enqued;
  123. s32 wmm_drop;
  124. s32 local_enqued;
  125. s32 local_freed;
  126. s32 hw_queued;
  127. s32 hw_reaped;
  128. s32 underrun;
  129. s32 tx_abort;
  130. s32 mpdus_requed;
  131. u32 tx_ko;
  132. u32 data_rc;
  133. u32 self_triggers;
  134. u32 sw_retry_failure;
  135. u32 illgl_rate_phy_err;
  136. u32 pdev_cont_xretry;
  137. u32 pdev_tx_timeout;
  138. u32 pdev_resets;
  139. u32 phy_underrun;
  140. u32 txop_ovf;
  141. /* PDEV RX stats */
  142. s32 mid_ppdu_route_change;
  143. s32 status_rcvd;
  144. s32 r0_frags;
  145. s32 r1_frags;
  146. s32 r2_frags;
  147. s32 r3_frags;
  148. s32 htt_msdus;
  149. s32 htt_mpdus;
  150. s32 loc_msdus;
  151. s32 loc_mpdus;
  152. s32 oversize_amsdu;
  153. s32 phy_errs;
  154. s32 phy_err_drop;
  155. s32 mpdu_errs;
  156. /* VDEV STATS */
  157. /* PEER STATS */
  158. u8 peers;
  159. struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS];
  160. /* TODO: Beacon filter stats */
  161. };
  162. struct ath10k_dfs_stats {
  163. u32 phy_errors;
  164. u32 pulses_total;
  165. u32 pulses_detected;
  166. u32 pulses_discarded;
  167. u32 radar_detected;
  168. };
  169. #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
  170. struct ath10k_peer {
  171. struct list_head list;
  172. int vdev_id;
  173. u8 addr[ETH_ALEN];
  174. DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
  175. struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
  176. };
  177. struct ath10k_sta {
  178. struct ath10k_vif *arvif;
  179. /* the following are protected by ar->data_lock */
  180. u32 changed; /* IEEE80211_RC_* */
  181. u32 bw;
  182. u32 nss;
  183. u32 smps;
  184. struct work_struct update_wk;
  185. };
  186. #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
  187. struct ath10k_vif {
  188. struct list_head list;
  189. u32 vdev_id;
  190. enum wmi_vdev_type vdev_type;
  191. enum wmi_vdev_subtype vdev_subtype;
  192. u32 beacon_interval;
  193. u32 dtim_period;
  194. struct sk_buff *beacon;
  195. /* protected by data_lock */
  196. bool beacon_sent;
  197. struct ath10k *ar;
  198. struct ieee80211_vif *vif;
  199. bool is_started;
  200. bool is_up;
  201. u32 aid;
  202. u8 bssid[ETH_ALEN];
  203. struct work_struct wep_key_work;
  204. struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
  205. u8 def_wep_key_idx;
  206. u8 def_wep_key_newidx;
  207. u16 tx_seq_no;
  208. union {
  209. struct {
  210. u32 uapsd;
  211. } sta;
  212. struct {
  213. /* 127 stations; wmi limit */
  214. u8 tim_bitmap[16];
  215. u8 tim_len;
  216. u32 ssid_len;
  217. u8 ssid[IEEE80211_MAX_SSID_LEN];
  218. bool hidden_ssid;
  219. /* P2P_IE with NoA attribute for P2P_GO case */
  220. u32 noa_len;
  221. u8 *noa_data;
  222. } ap;
  223. } u;
  224. u8 fixed_rate;
  225. u8 fixed_nss;
  226. u8 force_sgi;
  227. bool use_cts_prot;
  228. int num_legacy_stations;
  229. };
  230. struct ath10k_vif_iter {
  231. u32 vdev_id;
  232. struct ath10k_vif *arvif;
  233. };
  234. struct ath10k_debug {
  235. struct dentry *debugfs_phy;
  236. struct ath10k_target_stats target_stats;
  237. u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
  238. struct completion event_stats_compl;
  239. unsigned long htt_stats_mask;
  240. struct delayed_work htt_stats_dwork;
  241. struct ath10k_dfs_stats dfs_stats;
  242. struct ath_dfs_pool_stats dfs_pool_stats;
  243. u32 fw_dbglog_mask;
  244. };
  245. enum ath10k_state {
  246. ATH10K_STATE_OFF = 0,
  247. ATH10K_STATE_ON,
  248. /* When doing firmware recovery the device is first powered down.
  249. * mac80211 is supposed to call in to start() hook later on. It is
  250. * however possible that driver unloading and firmware crash overlap.
  251. * mac80211 can wait on conf_mutex in stop() while the device is
  252. * stopped in ath10k_core_restart() work holding conf_mutex. The state
  253. * RESTARTED means that the device is up and mac80211 has started hw
  254. * reconfiguration. Once mac80211 is done with the reconfiguration we
  255. * set the state to STATE_ON in restart_complete(). */
  256. ATH10K_STATE_RESTARTING,
  257. ATH10K_STATE_RESTARTED,
  258. /* The device has crashed while restarting hw. This state is like ON
  259. * but commands are blocked in HTC and -ECOMM response is given. This
  260. * prevents completion timeouts and makes the driver more responsive to
  261. * userspace commands. This is also prevents recursive recovery. */
  262. ATH10K_STATE_WEDGED,
  263. };
  264. enum ath10k_fw_features {
  265. /* wmi_mgmt_rx_hdr contains extra RSSI information */
  266. ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
  267. /* firmware from 10X branch */
  268. ATH10K_FW_FEATURE_WMI_10X = 1,
  269. /* firmware support tx frame management over WMI, otherwise it's HTT */
  270. ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
  271. /* Firmware does not support P2P */
  272. ATH10K_FW_FEATURE_NO_P2P = 3,
  273. /* keep last */
  274. ATH10K_FW_FEATURE_COUNT,
  275. };
  276. enum ath10k_dev_flags {
  277. /* Indicates that ath10k device is during CAC phase of DFS */
  278. ATH10K_CAC_RUNNING,
  279. ATH10K_FLAG_FIRST_BOOT_DONE,
  280. ATH10K_FLAG_CORE_REGISTERED,
  281. };
  282. struct ath10k {
  283. struct ath_common ath_common;
  284. struct ieee80211_hw *hw;
  285. struct device *dev;
  286. u8 mac_addr[ETH_ALEN];
  287. u32 chip_id;
  288. u32 target_version;
  289. u8 fw_version_major;
  290. u32 fw_version_minor;
  291. u16 fw_version_release;
  292. u16 fw_version_build;
  293. u32 phy_capability;
  294. u32 hw_min_tx_power;
  295. u32 hw_max_tx_power;
  296. u32 ht_cap_info;
  297. u32 vht_cap_info;
  298. u32 num_rf_chains;
  299. DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
  300. struct targetdef *targetdef;
  301. struct hostdef *hostdef;
  302. bool p2p;
  303. struct {
  304. void *priv;
  305. const struct ath10k_hif_ops *ops;
  306. } hif;
  307. struct completion target_suspend;
  308. struct ath10k_bmi bmi;
  309. struct ath10k_wmi wmi;
  310. struct ath10k_htc htc;
  311. struct ath10k_htt htt;
  312. struct ath10k_hw_params {
  313. u32 id;
  314. const char *name;
  315. u32 patch_load_addr;
  316. struct ath10k_hw_params_fw {
  317. const char *dir;
  318. const char *fw;
  319. const char *otp;
  320. const char *board;
  321. } fw;
  322. } hw_params;
  323. const struct firmware *board;
  324. const void *board_data;
  325. size_t board_len;
  326. const struct firmware *otp;
  327. const void *otp_data;
  328. size_t otp_len;
  329. const struct firmware *firmware;
  330. const void *firmware_data;
  331. size_t firmware_len;
  332. int fw_api;
  333. struct {
  334. struct completion started;
  335. struct completion completed;
  336. struct completion on_channel;
  337. struct timer_list timeout;
  338. bool is_roc;
  339. bool in_progress;
  340. bool aborting;
  341. int vdev_id;
  342. int roc_freq;
  343. } scan;
  344. struct {
  345. struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
  346. } mac;
  347. /* should never be NULL; needed for regular htt rx */
  348. struct ieee80211_channel *rx_channel;
  349. /* valid during scan; needed for mgmt rx during scan */
  350. struct ieee80211_channel *scan_channel;
  351. /* current operating channel definition */
  352. struct cfg80211_chan_def chandef;
  353. int free_vdev_map;
  354. bool promisc;
  355. bool monitor;
  356. int monitor_vdev_id;
  357. bool monitor_started;
  358. unsigned int filter_flags;
  359. unsigned long dev_flags;
  360. u32 dfs_block_radar_events;
  361. /* protected by conf_mutex */
  362. bool radar_enabled;
  363. int num_started_vdevs;
  364. /* Protected by conf-mutex */
  365. u8 supp_tx_chainmask;
  366. u8 supp_rx_chainmask;
  367. u8 cfg_tx_chainmask;
  368. u8 cfg_rx_chainmask;
  369. struct wmi_pdev_set_wmm_params_arg wmm_params;
  370. struct completion install_key_done;
  371. struct completion vdev_setup_done;
  372. struct workqueue_struct *workqueue;
  373. /* prevents concurrent FW reconfiguration */
  374. struct mutex conf_mutex;
  375. /* protects shared structure data */
  376. spinlock_t data_lock;
  377. struct list_head arvifs;
  378. struct list_head peers;
  379. wait_queue_head_t peer_mapping_wq;
  380. /* number of created peers; protected by data_lock */
  381. int num_peers;
  382. struct work_struct offchan_tx_work;
  383. struct sk_buff_head offchan_tx_queue;
  384. struct completion offchan_tx_completed;
  385. struct sk_buff *offchan_tx_skb;
  386. struct work_struct wmi_mgmt_tx_work;
  387. struct sk_buff_head wmi_mgmt_tx_queue;
  388. enum ath10k_state state;
  389. struct work_struct register_work;
  390. struct work_struct restart_work;
  391. /* cycle count is reported twice for each visited channel during scan.
  392. * access protected by data_lock */
  393. u32 survey_last_rx_clear_count;
  394. u32 survey_last_cycle_count;
  395. struct survey_info survey[ATH10K_NUM_CHANS];
  396. struct dfs_pattern_detector *dfs_detector;
  397. #ifdef CONFIG_ATH10K_DEBUGFS
  398. struct ath10k_debug debug;
  399. #endif
  400. };
  401. struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
  402. const struct ath10k_hif_ops *hif_ops);
  403. void ath10k_core_destroy(struct ath10k *ar);
  404. int ath10k_core_start(struct ath10k *ar);
  405. int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
  406. void ath10k_core_stop(struct ath10k *ar);
  407. int ath10k_core_register(struct ath10k *ar, u32 chip_id);
  408. void ath10k_core_unregister(struct ath10k *ar);
  409. #endif /* _CORE_H_ */