core.c 25 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/firmware.h>
  19. #include "core.h"
  20. #include "mac.h"
  21. #include "htc.h"
  22. #include "hif.h"
  23. #include "wmi.h"
  24. #include "bmi.h"
  25. #include "debug.h"
  26. #include "htt.h"
  27. unsigned int ath10k_debug_mask;
  28. static bool uart_print;
  29. static unsigned int ath10k_p2p;
  30. module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  31. module_param(uart_print, bool, 0644);
  32. module_param_named(p2p, ath10k_p2p, uint, 0644);
  33. MODULE_PARM_DESC(debug_mask, "Debugging mask");
  34. MODULE_PARM_DESC(uart_print, "Uart target debugging");
  35. MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
  36. static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  37. {
  38. .id = QCA988X_HW_2_0_VERSION,
  39. .name = "qca988x hw2.0",
  40. .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  41. .fw = {
  42. .dir = QCA988X_HW_2_0_FW_DIR,
  43. .fw = QCA988X_HW_2_0_FW_FILE,
  44. .otp = QCA988X_HW_2_0_OTP_FILE,
  45. .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  46. },
  47. },
  48. };
  49. static void ath10k_send_suspend_complete(struct ath10k *ar)
  50. {
  51. ath10k_dbg(ATH10K_DBG_BOOT, "boot suspend complete\n");
  52. complete(&ar->target_suspend);
  53. }
  54. static int ath10k_init_configure_target(struct ath10k *ar)
  55. {
  56. u32 param_host;
  57. int ret;
  58. /* tell target which HTC version it is used*/
  59. ret = ath10k_bmi_write32(ar, hi_app_host_interest,
  60. HTC_PROTOCOL_VERSION);
  61. if (ret) {
  62. ath10k_err("settings HTC version failed\n");
  63. return ret;
  64. }
  65. /* set the firmware mode to STA/IBSS/AP */
  66. ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
  67. if (ret) {
  68. ath10k_err("setting firmware mode (1/2) failed\n");
  69. return ret;
  70. }
  71. /* TODO following parameters need to be re-visited. */
  72. /* num_device */
  73. param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  74. /* Firmware mode */
  75. /* FIXME: Why FW_MODE_AP ??.*/
  76. param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
  77. /* mac_addr_method */
  78. param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  79. /* firmware_bridge */
  80. param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  81. /* fwsubmode */
  82. param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
  83. ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
  84. if (ret) {
  85. ath10k_err("setting firmware mode (2/2) failed\n");
  86. return ret;
  87. }
  88. /* We do all byte-swapping on the host */
  89. ret = ath10k_bmi_write32(ar, hi_be, 0);
  90. if (ret) {
  91. ath10k_err("setting host CPU BE mode failed\n");
  92. return ret;
  93. }
  94. /* FW descriptor/Data swap flags */
  95. ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
  96. if (ret) {
  97. ath10k_err("setting FW data/desc swap flags failed\n");
  98. return ret;
  99. }
  100. return 0;
  101. }
  102. static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
  103. const char *dir,
  104. const char *file)
  105. {
  106. char filename[100];
  107. const struct firmware *fw;
  108. int ret;
  109. if (file == NULL)
  110. return ERR_PTR(-ENOENT);
  111. if (dir == NULL)
  112. dir = ".";
  113. snprintf(filename, sizeof(filename), "%s/%s", dir, file);
  114. ret = request_firmware(&fw, filename, ar->dev);
  115. if (ret)
  116. return ERR_PTR(ret);
  117. return fw;
  118. }
  119. static int ath10k_push_board_ext_data(struct ath10k *ar)
  120. {
  121. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  122. u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
  123. u32 board_ext_data_addr;
  124. int ret;
  125. ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
  126. if (ret) {
  127. ath10k_err("could not read board ext data addr (%d)\n", ret);
  128. return ret;
  129. }
  130. ath10k_dbg(ATH10K_DBG_BOOT,
  131. "boot push board extended data addr 0x%x\n",
  132. board_ext_data_addr);
  133. if (board_ext_data_addr == 0)
  134. return 0;
  135. if (ar->board_len != (board_data_size + board_ext_data_size)) {
  136. ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n",
  137. ar->board_len, board_data_size, board_ext_data_size);
  138. return -EINVAL;
  139. }
  140. ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
  141. ar->board_data + board_data_size,
  142. board_ext_data_size);
  143. if (ret) {
  144. ath10k_err("could not write board ext data (%d)\n", ret);
  145. return ret;
  146. }
  147. ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
  148. (board_ext_data_size << 16) | 1);
  149. if (ret) {
  150. ath10k_err("could not write board ext data bit (%d)\n", ret);
  151. return ret;
  152. }
  153. return 0;
  154. }
  155. static int ath10k_download_board_data(struct ath10k *ar)
  156. {
  157. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  158. u32 address;
  159. int ret;
  160. ret = ath10k_push_board_ext_data(ar);
  161. if (ret) {
  162. ath10k_err("could not push board ext data (%d)\n", ret);
  163. goto exit;
  164. }
  165. ret = ath10k_bmi_read32(ar, hi_board_data, &address);
  166. if (ret) {
  167. ath10k_err("could not read board data addr (%d)\n", ret);
  168. goto exit;
  169. }
  170. ret = ath10k_bmi_write_memory(ar, address, ar->board_data,
  171. min_t(u32, board_data_size,
  172. ar->board_len));
  173. if (ret) {
  174. ath10k_err("could not write board data (%d)\n", ret);
  175. goto exit;
  176. }
  177. ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
  178. if (ret) {
  179. ath10k_err("could not write board data bit (%d)\n", ret);
  180. goto exit;
  181. }
  182. exit:
  183. return ret;
  184. }
  185. static int ath10k_download_and_run_otp(struct ath10k *ar)
  186. {
  187. u32 result, address = ar->hw_params.patch_load_addr;
  188. int ret;
  189. /* OTP is optional */
  190. if (!ar->otp_data || !ar->otp_len) {
  191. ath10k_warn("Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
  192. ar->otp_data, ar->otp_len);
  193. return 0;
  194. }
  195. ath10k_dbg(ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
  196. address, ar->otp_len);
  197. ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
  198. if (ret) {
  199. ath10k_err("could not write otp (%d)\n", ret);
  200. return ret;
  201. }
  202. ret = ath10k_bmi_execute(ar, address, 0, &result);
  203. if (ret) {
  204. ath10k_err("could not execute otp (%d)\n", ret);
  205. return ret;
  206. }
  207. ath10k_dbg(ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
  208. if (result != 0) {
  209. ath10k_err("otp calibration failed: %d", result);
  210. return -EINVAL;
  211. }
  212. return 0;
  213. }
  214. static int ath10k_download_fw(struct ath10k *ar)
  215. {
  216. u32 address;
  217. int ret;
  218. address = ar->hw_params.patch_load_addr;
  219. ret = ath10k_bmi_fast_download(ar, address, ar->firmware_data,
  220. ar->firmware_len);
  221. if (ret) {
  222. ath10k_err("could not write fw (%d)\n", ret);
  223. goto exit;
  224. }
  225. exit:
  226. return ret;
  227. }
  228. static void ath10k_core_free_firmware_files(struct ath10k *ar)
  229. {
  230. if (ar->board && !IS_ERR(ar->board))
  231. release_firmware(ar->board);
  232. if (ar->otp && !IS_ERR(ar->otp))
  233. release_firmware(ar->otp);
  234. if (ar->firmware && !IS_ERR(ar->firmware))
  235. release_firmware(ar->firmware);
  236. ar->board = NULL;
  237. ar->board_data = NULL;
  238. ar->board_len = 0;
  239. ar->otp = NULL;
  240. ar->otp_data = NULL;
  241. ar->otp_len = 0;
  242. ar->firmware = NULL;
  243. ar->firmware_data = NULL;
  244. ar->firmware_len = 0;
  245. }
  246. static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
  247. {
  248. int ret = 0;
  249. if (ar->hw_params.fw.fw == NULL) {
  250. ath10k_err("firmware file not defined\n");
  251. return -EINVAL;
  252. }
  253. if (ar->hw_params.fw.board == NULL) {
  254. ath10k_err("board data file not defined");
  255. return -EINVAL;
  256. }
  257. ar->board = ath10k_fetch_fw_file(ar,
  258. ar->hw_params.fw.dir,
  259. ar->hw_params.fw.board);
  260. if (IS_ERR(ar->board)) {
  261. ret = PTR_ERR(ar->board);
  262. ath10k_err("could not fetch board data (%d)\n", ret);
  263. goto err;
  264. }
  265. ar->board_data = ar->board->data;
  266. ar->board_len = ar->board->size;
  267. ar->firmware = ath10k_fetch_fw_file(ar,
  268. ar->hw_params.fw.dir,
  269. ar->hw_params.fw.fw);
  270. if (IS_ERR(ar->firmware)) {
  271. ret = PTR_ERR(ar->firmware);
  272. ath10k_err("could not fetch firmware (%d)\n", ret);
  273. goto err;
  274. }
  275. ar->firmware_data = ar->firmware->data;
  276. ar->firmware_len = ar->firmware->size;
  277. /* OTP may be undefined. If so, don't fetch it at all */
  278. if (ar->hw_params.fw.otp == NULL)
  279. return 0;
  280. ar->otp = ath10k_fetch_fw_file(ar,
  281. ar->hw_params.fw.dir,
  282. ar->hw_params.fw.otp);
  283. if (IS_ERR(ar->otp)) {
  284. ret = PTR_ERR(ar->otp);
  285. ath10k_err("could not fetch otp (%d)\n", ret);
  286. goto err;
  287. }
  288. ar->otp_data = ar->otp->data;
  289. ar->otp_len = ar->otp->size;
  290. return 0;
  291. err:
  292. ath10k_core_free_firmware_files(ar);
  293. return ret;
  294. }
  295. static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
  296. {
  297. size_t magic_len, len, ie_len;
  298. int ie_id, i, index, bit, ret;
  299. struct ath10k_fw_ie *hdr;
  300. const u8 *data;
  301. __le32 *timestamp;
  302. /* first fetch the firmware file (firmware-*.bin) */
  303. ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
  304. if (IS_ERR(ar->firmware)) {
  305. ath10k_err("could not fetch firmware file '%s/%s': %ld\n",
  306. ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
  307. return PTR_ERR(ar->firmware);
  308. }
  309. data = ar->firmware->data;
  310. len = ar->firmware->size;
  311. /* magic also includes the null byte, check that as well */
  312. magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
  313. if (len < magic_len) {
  314. ath10k_err("firmware file '%s/%s' too small to contain magic: %zu\n",
  315. ar->hw_params.fw.dir, name, len);
  316. ret = -EINVAL;
  317. goto err;
  318. }
  319. if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
  320. ath10k_err("invalid firmware magic\n");
  321. ret = -EINVAL;
  322. goto err;
  323. }
  324. /* jump over the padding */
  325. magic_len = ALIGN(magic_len, 4);
  326. len -= magic_len;
  327. data += magic_len;
  328. /* loop elements */
  329. while (len > sizeof(struct ath10k_fw_ie)) {
  330. hdr = (struct ath10k_fw_ie *)data;
  331. ie_id = le32_to_cpu(hdr->id);
  332. ie_len = le32_to_cpu(hdr->len);
  333. len -= sizeof(*hdr);
  334. data += sizeof(*hdr);
  335. if (len < ie_len) {
  336. ath10k_err("invalid length for FW IE %d (%zu < %zu)\n",
  337. ie_id, len, ie_len);
  338. ret = -EINVAL;
  339. goto err;
  340. }
  341. switch (ie_id) {
  342. case ATH10K_FW_IE_FW_VERSION:
  343. if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
  344. break;
  345. memcpy(ar->hw->wiphy->fw_version, data, ie_len);
  346. ar->hw->wiphy->fw_version[ie_len] = '\0';
  347. ath10k_dbg(ATH10K_DBG_BOOT,
  348. "found fw version %s\n",
  349. ar->hw->wiphy->fw_version);
  350. break;
  351. case ATH10K_FW_IE_TIMESTAMP:
  352. if (ie_len != sizeof(u32))
  353. break;
  354. timestamp = (__le32 *)data;
  355. ath10k_dbg(ATH10K_DBG_BOOT, "found fw timestamp %d\n",
  356. le32_to_cpup(timestamp));
  357. break;
  358. case ATH10K_FW_IE_FEATURES:
  359. ath10k_dbg(ATH10K_DBG_BOOT,
  360. "found firmware features ie (%zd B)\n",
  361. ie_len);
  362. for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
  363. index = i / 8;
  364. bit = i % 8;
  365. if (index == ie_len)
  366. break;
  367. if (data[index] & (1 << bit)) {
  368. ath10k_dbg(ATH10K_DBG_BOOT,
  369. "Enabling feature bit: %i\n",
  370. i);
  371. __set_bit(i, ar->fw_features);
  372. }
  373. }
  374. ath10k_dbg_dump(ATH10K_DBG_BOOT, "features", "",
  375. ar->fw_features,
  376. sizeof(ar->fw_features));
  377. break;
  378. case ATH10K_FW_IE_FW_IMAGE:
  379. ath10k_dbg(ATH10K_DBG_BOOT,
  380. "found fw image ie (%zd B)\n",
  381. ie_len);
  382. ar->firmware_data = data;
  383. ar->firmware_len = ie_len;
  384. break;
  385. case ATH10K_FW_IE_OTP_IMAGE:
  386. ath10k_dbg(ATH10K_DBG_BOOT,
  387. "found otp image ie (%zd B)\n",
  388. ie_len);
  389. ar->otp_data = data;
  390. ar->otp_len = ie_len;
  391. break;
  392. default:
  393. ath10k_warn("Unknown FW IE: %u\n",
  394. le32_to_cpu(hdr->id));
  395. break;
  396. }
  397. /* jump over the padding */
  398. ie_len = ALIGN(ie_len, 4);
  399. len -= ie_len;
  400. data += ie_len;
  401. }
  402. if (!ar->firmware_data || !ar->firmware_len) {
  403. ath10k_warn("No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
  404. ar->hw_params.fw.dir, name);
  405. ret = -ENOMEDIUM;
  406. goto err;
  407. }
  408. /* now fetch the board file */
  409. if (ar->hw_params.fw.board == NULL) {
  410. ath10k_err("board data file not defined");
  411. ret = -EINVAL;
  412. goto err;
  413. }
  414. ar->board = ath10k_fetch_fw_file(ar,
  415. ar->hw_params.fw.dir,
  416. ar->hw_params.fw.board);
  417. if (IS_ERR(ar->board)) {
  418. ret = PTR_ERR(ar->board);
  419. ath10k_err("could not fetch board data '%s/%s' (%d)\n",
  420. ar->hw_params.fw.dir, ar->hw_params.fw.board,
  421. ret);
  422. goto err;
  423. }
  424. ar->board_data = ar->board->data;
  425. ar->board_len = ar->board->size;
  426. return 0;
  427. err:
  428. ath10k_core_free_firmware_files(ar);
  429. return ret;
  430. }
  431. static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
  432. {
  433. int ret;
  434. ar->fw_api = 2;
  435. ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  436. ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
  437. if (ret == 0)
  438. goto success;
  439. ar->fw_api = 1;
  440. ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  441. ret = ath10k_core_fetch_firmware_api_1(ar);
  442. if (ret)
  443. return ret;
  444. success:
  445. ath10k_dbg(ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
  446. return 0;
  447. }
  448. static int ath10k_init_download_firmware(struct ath10k *ar)
  449. {
  450. int ret;
  451. ret = ath10k_download_board_data(ar);
  452. if (ret) {
  453. ath10k_err("failed to download board data: %d\n", ret);
  454. return ret;
  455. }
  456. ret = ath10k_download_and_run_otp(ar);
  457. if (ret) {
  458. ath10k_err("failed to run otp: %d\n", ret);
  459. return ret;
  460. }
  461. ret = ath10k_download_fw(ar);
  462. if (ret) {
  463. ath10k_err("failed to download firmware: %d\n", ret);
  464. return ret;
  465. }
  466. return ret;
  467. }
  468. static int ath10k_init_uart(struct ath10k *ar)
  469. {
  470. int ret;
  471. /*
  472. * Explicitly setting UART prints to zero as target turns it on
  473. * based on scratch registers.
  474. */
  475. ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
  476. if (ret) {
  477. ath10k_warn("could not disable UART prints (%d)\n", ret);
  478. return ret;
  479. }
  480. if (!uart_print)
  481. return 0;
  482. ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
  483. if (ret) {
  484. ath10k_warn("could not enable UART prints (%d)\n", ret);
  485. return ret;
  486. }
  487. ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
  488. if (ret) {
  489. ath10k_warn("could not enable UART prints (%d)\n", ret);
  490. return ret;
  491. }
  492. /* Set the UART baud rate to 19200. */
  493. ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
  494. if (ret) {
  495. ath10k_warn("could not set the baud rate (%d)\n", ret);
  496. return ret;
  497. }
  498. ath10k_info("UART prints enabled\n");
  499. return 0;
  500. }
  501. static int ath10k_init_hw_params(struct ath10k *ar)
  502. {
  503. const struct ath10k_hw_params *uninitialized_var(hw_params);
  504. int i;
  505. for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
  506. hw_params = &ath10k_hw_params_list[i];
  507. if (hw_params->id == ar->target_version)
  508. break;
  509. }
  510. if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
  511. ath10k_err("Unsupported hardware version: 0x%x\n",
  512. ar->target_version);
  513. return -EINVAL;
  514. }
  515. ar->hw_params = *hw_params;
  516. ath10k_dbg(ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
  517. ar->hw_params.name, ar->target_version);
  518. return 0;
  519. }
  520. static void ath10k_core_restart(struct work_struct *work)
  521. {
  522. struct ath10k *ar = container_of(work, struct ath10k, restart_work);
  523. mutex_lock(&ar->conf_mutex);
  524. switch (ar->state) {
  525. case ATH10K_STATE_ON:
  526. ar->state = ATH10K_STATE_RESTARTING;
  527. del_timer_sync(&ar->scan.timeout);
  528. ath10k_reset_scan((unsigned long)ar);
  529. ieee80211_restart_hw(ar->hw);
  530. break;
  531. case ATH10K_STATE_OFF:
  532. /* this can happen if driver is being unloaded
  533. * or if the crash happens during FW probing */
  534. ath10k_warn("cannot restart a device that hasn't been started\n");
  535. break;
  536. case ATH10K_STATE_RESTARTING:
  537. /* hw restart might be requested from multiple places */
  538. break;
  539. case ATH10K_STATE_RESTARTED:
  540. ar->state = ATH10K_STATE_WEDGED;
  541. /* fall through */
  542. case ATH10K_STATE_WEDGED:
  543. ath10k_warn("device is wedged, will not restart\n");
  544. break;
  545. }
  546. mutex_unlock(&ar->conf_mutex);
  547. }
  548. int ath10k_core_start(struct ath10k *ar)
  549. {
  550. int status;
  551. lockdep_assert_held(&ar->conf_mutex);
  552. ath10k_bmi_start(ar);
  553. if (ath10k_init_configure_target(ar)) {
  554. status = -EINVAL;
  555. goto err;
  556. }
  557. status = ath10k_init_download_firmware(ar);
  558. if (status)
  559. goto err;
  560. status = ath10k_init_uart(ar);
  561. if (status)
  562. goto err;
  563. ar->htc.htc_ops.target_send_suspend_complete =
  564. ath10k_send_suspend_complete;
  565. status = ath10k_htc_init(ar);
  566. if (status) {
  567. ath10k_err("could not init HTC (%d)\n", status);
  568. goto err;
  569. }
  570. status = ath10k_bmi_done(ar);
  571. if (status)
  572. goto err;
  573. status = ath10k_wmi_attach(ar);
  574. if (status) {
  575. ath10k_err("WMI attach failed: %d\n", status);
  576. goto err;
  577. }
  578. status = ath10k_htt_init(ar);
  579. if (status) {
  580. ath10k_err("failed to init htt: %d\n", status);
  581. goto err_wmi_detach;
  582. }
  583. status = ath10k_htt_tx_alloc(&ar->htt);
  584. if (status) {
  585. ath10k_err("failed to alloc htt tx: %d\n", status);
  586. goto err_wmi_detach;
  587. }
  588. status = ath10k_htt_rx_alloc(&ar->htt);
  589. if (status) {
  590. ath10k_err("failed to alloc htt rx: %d\n", status);
  591. goto err_htt_tx_detach;
  592. }
  593. status = ath10k_hif_start(ar);
  594. if (status) {
  595. ath10k_err("could not start HIF: %d\n", status);
  596. goto err_htt_rx_detach;
  597. }
  598. status = ath10k_htc_wait_target(&ar->htc);
  599. if (status) {
  600. ath10k_err("failed to connect to HTC: %d\n", status);
  601. goto err_hif_stop;
  602. }
  603. status = ath10k_htt_connect(&ar->htt);
  604. if (status) {
  605. ath10k_err("failed to connect htt (%d)\n", status);
  606. goto err_hif_stop;
  607. }
  608. status = ath10k_wmi_connect(ar);
  609. if (status) {
  610. ath10k_err("could not connect wmi: %d\n", status);
  611. goto err_hif_stop;
  612. }
  613. status = ath10k_htc_start(&ar->htc);
  614. if (status) {
  615. ath10k_err("failed to start htc: %d\n", status);
  616. goto err_hif_stop;
  617. }
  618. status = ath10k_wmi_wait_for_service_ready(ar);
  619. if (status <= 0) {
  620. ath10k_warn("wmi service ready event not received");
  621. status = -ETIMEDOUT;
  622. goto err_htc_stop;
  623. }
  624. ath10k_dbg(ATH10K_DBG_BOOT, "firmware %s booted\n",
  625. ar->hw->wiphy->fw_version);
  626. status = ath10k_wmi_cmd_init(ar);
  627. if (status) {
  628. ath10k_err("could not send WMI init command (%d)\n", status);
  629. goto err_htc_stop;
  630. }
  631. status = ath10k_wmi_wait_for_unified_ready(ar);
  632. if (status <= 0) {
  633. ath10k_err("wmi unified ready event not received\n");
  634. status = -ETIMEDOUT;
  635. goto err_htc_stop;
  636. }
  637. status = ath10k_htt_setup(&ar->htt);
  638. if (status) {
  639. ath10k_err("failed to setup htt: %d\n", status);
  640. goto err_htc_stop;
  641. }
  642. status = ath10k_debug_start(ar);
  643. if (status)
  644. goto err_htc_stop;
  645. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
  646. ar->free_vdev_map = (1 << TARGET_10X_NUM_VDEVS) - 1;
  647. else
  648. ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1;
  649. INIT_LIST_HEAD(&ar->arvifs);
  650. if (!test_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags))
  651. ath10k_info("%s (0x%08x, 0x%08x) fw %s api %d htt %d.%d\n",
  652. ar->hw_params.name,
  653. ar->target_version,
  654. ar->chip_id,
  655. ar->hw->wiphy->fw_version,
  656. ar->fw_api,
  657. ar->htt.target_version_major,
  658. ar->htt.target_version_minor);
  659. __set_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags);
  660. return 0;
  661. err_htc_stop:
  662. ath10k_htc_stop(&ar->htc);
  663. err_hif_stop:
  664. ath10k_hif_stop(ar);
  665. err_htt_rx_detach:
  666. ath10k_htt_rx_free(&ar->htt);
  667. err_htt_tx_detach:
  668. ath10k_htt_tx_free(&ar->htt);
  669. err_wmi_detach:
  670. ath10k_wmi_detach(ar);
  671. err:
  672. return status;
  673. }
  674. EXPORT_SYMBOL(ath10k_core_start);
  675. int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
  676. {
  677. int ret;
  678. reinit_completion(&ar->target_suspend);
  679. ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
  680. if (ret) {
  681. ath10k_warn("could not suspend target (%d)\n", ret);
  682. return ret;
  683. }
  684. ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
  685. if (ret == 0) {
  686. ath10k_warn("suspend timed out - target pause event never came\n");
  687. return -ETIMEDOUT;
  688. }
  689. return 0;
  690. }
  691. void ath10k_core_stop(struct ath10k *ar)
  692. {
  693. lockdep_assert_held(&ar->conf_mutex);
  694. /* try to suspend target */
  695. if (ar->state != ATH10K_STATE_RESTARTING)
  696. ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
  697. ath10k_debug_stop(ar);
  698. ath10k_htc_stop(&ar->htc);
  699. ath10k_hif_stop(ar);
  700. ath10k_htt_tx_free(&ar->htt);
  701. ath10k_htt_rx_free(&ar->htt);
  702. ath10k_wmi_detach(ar);
  703. }
  704. EXPORT_SYMBOL(ath10k_core_stop);
  705. /* mac80211 manages fw/hw initialization through start/stop hooks. However in
  706. * order to know what hw capabilities should be advertised to mac80211 it is
  707. * necessary to load the firmware (and tear it down immediately since start
  708. * hook will try to init it again) before registering */
  709. static int ath10k_core_probe_fw(struct ath10k *ar)
  710. {
  711. struct bmi_target_info target_info;
  712. int ret = 0;
  713. ret = ath10k_hif_power_up(ar);
  714. if (ret) {
  715. ath10k_err("could not start pci hif (%d)\n", ret);
  716. return ret;
  717. }
  718. memset(&target_info, 0, sizeof(target_info));
  719. ret = ath10k_bmi_get_target_info(ar, &target_info);
  720. if (ret) {
  721. ath10k_err("could not get target info (%d)\n", ret);
  722. ath10k_hif_power_down(ar);
  723. return ret;
  724. }
  725. ar->target_version = target_info.version;
  726. ar->hw->wiphy->hw_version = target_info.version;
  727. ret = ath10k_init_hw_params(ar);
  728. if (ret) {
  729. ath10k_err("could not get hw params (%d)\n", ret);
  730. ath10k_hif_power_down(ar);
  731. return ret;
  732. }
  733. ret = ath10k_core_fetch_firmware_files(ar);
  734. if (ret) {
  735. ath10k_err("could not fetch firmware files (%d)\n", ret);
  736. ath10k_hif_power_down(ar);
  737. return ret;
  738. }
  739. mutex_lock(&ar->conf_mutex);
  740. ret = ath10k_core_start(ar);
  741. if (ret) {
  742. ath10k_err("could not init core (%d)\n", ret);
  743. ath10k_core_free_firmware_files(ar);
  744. ath10k_hif_power_down(ar);
  745. mutex_unlock(&ar->conf_mutex);
  746. return ret;
  747. }
  748. ath10k_core_stop(ar);
  749. mutex_unlock(&ar->conf_mutex);
  750. ath10k_hif_power_down(ar);
  751. return 0;
  752. }
  753. static int ath10k_core_check_chip_id(struct ath10k *ar)
  754. {
  755. u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
  756. ath10k_dbg(ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
  757. ar->chip_id, hw_revision);
  758. /* Check that we are not using hw1.0 (some of them have same pci id
  759. * as hw2.0) before doing anything else as ath10k crashes horribly
  760. * due to missing hw1.0 workarounds. */
  761. switch (hw_revision) {
  762. case QCA988X_HW_1_0_CHIP_ID_REV:
  763. ath10k_err("ERROR: qca988x hw1.0 is not supported\n");
  764. return -EOPNOTSUPP;
  765. case QCA988X_HW_2_0_CHIP_ID_REV:
  766. /* known hardware revision, continue normally */
  767. return 0;
  768. default:
  769. ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n",
  770. ar->chip_id);
  771. return 0;
  772. }
  773. return 0;
  774. }
  775. static void ath10k_core_register_work(struct work_struct *work)
  776. {
  777. struct ath10k *ar = container_of(work, struct ath10k, register_work);
  778. int status;
  779. status = ath10k_core_probe_fw(ar);
  780. if (status) {
  781. ath10k_err("could not probe fw (%d)\n", status);
  782. goto err;
  783. }
  784. status = ath10k_mac_register(ar);
  785. if (status) {
  786. ath10k_err("could not register to mac80211 (%d)\n", status);
  787. goto err_release_fw;
  788. }
  789. status = ath10k_debug_create(ar);
  790. if (status) {
  791. ath10k_err("unable to initialize debugfs\n");
  792. goto err_unregister_mac;
  793. }
  794. set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
  795. return;
  796. err_unregister_mac:
  797. ath10k_mac_unregister(ar);
  798. err_release_fw:
  799. ath10k_core_free_firmware_files(ar);
  800. err:
  801. device_release_driver(ar->dev);
  802. return;
  803. }
  804. int ath10k_core_register(struct ath10k *ar, u32 chip_id)
  805. {
  806. int status;
  807. ar->chip_id = chip_id;
  808. status = ath10k_core_check_chip_id(ar);
  809. if (status) {
  810. ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id);
  811. return status;
  812. }
  813. queue_work(ar->workqueue, &ar->register_work);
  814. return 0;
  815. }
  816. EXPORT_SYMBOL(ath10k_core_register);
  817. void ath10k_core_unregister(struct ath10k *ar)
  818. {
  819. cancel_work_sync(&ar->register_work);
  820. if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
  821. return;
  822. /* We must unregister from mac80211 before we stop HTC and HIF.
  823. * Otherwise we will fail to submit commands to FW and mac80211 will be
  824. * unhappy about callback failures. */
  825. ath10k_mac_unregister(ar);
  826. ath10k_core_free_firmware_files(ar);
  827. ath10k_debug_destroy(ar);
  828. }
  829. EXPORT_SYMBOL(ath10k_core_unregister);
  830. struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
  831. const struct ath10k_hif_ops *hif_ops)
  832. {
  833. struct ath10k *ar;
  834. ar = ath10k_mac_create();
  835. if (!ar)
  836. return NULL;
  837. ar->ath_common.priv = ar;
  838. ar->ath_common.hw = ar->hw;
  839. ar->p2p = !!ath10k_p2p;
  840. ar->dev = dev;
  841. ar->hif.priv = hif_priv;
  842. ar->hif.ops = hif_ops;
  843. init_completion(&ar->scan.started);
  844. init_completion(&ar->scan.completed);
  845. init_completion(&ar->scan.on_channel);
  846. init_completion(&ar->target_suspend);
  847. init_completion(&ar->install_key_done);
  848. init_completion(&ar->vdev_setup_done);
  849. setup_timer(&ar->scan.timeout, ath10k_reset_scan, (unsigned long)ar);
  850. ar->workqueue = create_singlethread_workqueue("ath10k_wq");
  851. if (!ar->workqueue)
  852. goto err_wq;
  853. mutex_init(&ar->conf_mutex);
  854. spin_lock_init(&ar->data_lock);
  855. INIT_LIST_HEAD(&ar->peers);
  856. init_waitqueue_head(&ar->peer_mapping_wq);
  857. init_completion(&ar->offchan_tx_completed);
  858. INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
  859. skb_queue_head_init(&ar->offchan_tx_queue);
  860. INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
  861. skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
  862. INIT_WORK(&ar->register_work, ath10k_core_register_work);
  863. INIT_WORK(&ar->restart_work, ath10k_core_restart);
  864. return ar;
  865. err_wq:
  866. ath10k_mac_destroy(ar);
  867. return NULL;
  868. }
  869. EXPORT_SYMBOL(ath10k_core_create);
  870. void ath10k_core_destroy(struct ath10k *ar)
  871. {
  872. flush_workqueue(ar->workqueue);
  873. destroy_workqueue(ar->workqueue);
  874. ath10k_mac_destroy(ar);
  875. }
  876. EXPORT_SYMBOL(ath10k_core_destroy);
  877. MODULE_AUTHOR("Qualcomm Atheros");
  878. MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
  879. MODULE_LICENSE("Dual BSD/GPL");