sr9800.c 21 KB

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  1. /* CoreChip-sz SR9800 one chip USB 2.0 Ethernet Devices
  2. *
  3. * Author : Liu Junliang <liujunliang_ljl@163.com>
  4. *
  5. * Based on asix_common.c, asix_devices.c
  6. *
  7. * This file is licensed under the terms of the GNU General Public License
  8. * version 2. This program is licensed "as is" without any warranty of any
  9. * kind, whether express or implied.*
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kmod.h>
  13. #include <linux/init.h>
  14. #include <linux/netdevice.h>
  15. #include <linux/etherdevice.h>
  16. #include <linux/ethtool.h>
  17. #include <linux/workqueue.h>
  18. #include <linux/mii.h>
  19. #include <linux/usb.h>
  20. #include <linux/crc32.h>
  21. #include <linux/usb/usbnet.h>
  22. #include <linux/slab.h>
  23. #include <linux/if_vlan.h>
  24. #include "sr9800.h"
  25. static int sr_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
  26. u16 size, void *data)
  27. {
  28. int err;
  29. err = usbnet_read_cmd(dev, cmd, SR_REQ_RD_REG, value, index,
  30. data, size);
  31. if ((err != size) && (err >= 0))
  32. err = -EINVAL;
  33. return err;
  34. }
  35. static int sr_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
  36. u16 size, void *data)
  37. {
  38. int err;
  39. err = usbnet_write_cmd(dev, cmd, SR_REQ_WR_REG, value, index,
  40. data, size);
  41. if ((err != size) && (err >= 0))
  42. err = -EINVAL;
  43. return err;
  44. }
  45. static void
  46. sr_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
  47. u16 size, void *data)
  48. {
  49. usbnet_write_cmd_async(dev, cmd, SR_REQ_WR_REG, value, index, data,
  50. size);
  51. }
  52. static int sr_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
  53. {
  54. int offset = 0;
  55. /* This check is no longer done by usbnet */
  56. if (skb->len < dev->net->hard_header_len)
  57. return 0;
  58. while (offset + sizeof(u32) < skb->len) {
  59. struct sk_buff *sr_skb;
  60. u16 size;
  61. u32 header = get_unaligned_le32(skb->data + offset);
  62. offset += sizeof(u32);
  63. /* get the packet length */
  64. size = (u16) (header & 0x7ff);
  65. if (size != ((~header >> 16) & 0x07ff)) {
  66. netdev_err(dev->net, "%s : Bad Header Length\n",
  67. __func__);
  68. return 0;
  69. }
  70. if ((size > dev->net->mtu + ETH_HLEN + VLAN_HLEN) ||
  71. (size + offset > skb->len)) {
  72. netdev_err(dev->net, "%s : Bad RX Length %d\n",
  73. __func__, size);
  74. return 0;
  75. }
  76. sr_skb = netdev_alloc_skb_ip_align(dev->net, size);
  77. if (!sr_skb)
  78. return 0;
  79. skb_put(sr_skb, size);
  80. memcpy(sr_skb->data, skb->data + offset, size);
  81. usbnet_skb_return(dev, sr_skb);
  82. offset += (size + 1) & 0xfffe;
  83. }
  84. if (skb->len != offset) {
  85. netdev_err(dev->net, "%s : Bad SKB Length %d\n", __func__,
  86. skb->len);
  87. return 0;
  88. }
  89. return 1;
  90. }
  91. static struct sk_buff *sr_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
  92. gfp_t flags)
  93. {
  94. int headroom = skb_headroom(skb);
  95. int tailroom = skb_tailroom(skb);
  96. u32 padbytes = 0xffff0000;
  97. u32 packet_len;
  98. int padlen;
  99. padlen = ((skb->len + 4) % (dev->maxpacket - 1)) ? 0 : 4;
  100. if ((!skb_cloned(skb)) && ((headroom + tailroom) >= (4 + padlen))) {
  101. if ((headroom < 4) || (tailroom < padlen)) {
  102. skb->data = memmove(skb->head + 4, skb->data,
  103. skb->len);
  104. skb_set_tail_pointer(skb, skb->len);
  105. }
  106. } else {
  107. struct sk_buff *skb2;
  108. skb2 = skb_copy_expand(skb, 4, padlen, flags);
  109. dev_kfree_skb_any(skb);
  110. skb = skb2;
  111. if (!skb)
  112. return NULL;
  113. }
  114. skb_push(skb, 4);
  115. packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
  116. cpu_to_le32s(&packet_len);
  117. skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
  118. if (padlen) {
  119. cpu_to_le32s(&padbytes);
  120. memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
  121. skb_put(skb, sizeof(padbytes));
  122. }
  123. return skb;
  124. }
  125. static void sr_status(struct usbnet *dev, struct urb *urb)
  126. {
  127. struct sr9800_int_data *event;
  128. int link;
  129. if (urb->actual_length < 8)
  130. return;
  131. event = urb->transfer_buffer;
  132. link = event->link & 0x01;
  133. if (netif_carrier_ok(dev->net) != link) {
  134. usbnet_link_change(dev, link, 1);
  135. netdev_dbg(dev->net, "Link Status is: %d\n", link);
  136. }
  137. return;
  138. }
  139. static inline int sr_set_sw_mii(struct usbnet *dev)
  140. {
  141. int ret;
  142. ret = sr_write_cmd(dev, SR_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
  143. if (ret < 0)
  144. netdev_err(dev->net, "Failed to enable software MII access\n");
  145. return ret;
  146. }
  147. static inline int sr_set_hw_mii(struct usbnet *dev)
  148. {
  149. int ret;
  150. ret = sr_write_cmd(dev, SR_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
  151. if (ret < 0)
  152. netdev_err(dev->net, "Failed to enable hardware MII access\n");
  153. return ret;
  154. }
  155. static inline int sr_get_phy_addr(struct usbnet *dev)
  156. {
  157. u8 buf[2];
  158. int ret;
  159. ret = sr_read_cmd(dev, SR_CMD_READ_PHY_ID, 0, 0, 2, buf);
  160. if (ret < 0) {
  161. netdev_err(dev->net, "%s : Error reading PHYID register:%02x\n",
  162. __func__, ret);
  163. goto out;
  164. }
  165. netdev_dbg(dev->net, "%s : returning 0x%04x\n", __func__,
  166. *((__le16 *)buf));
  167. ret = buf[1];
  168. out:
  169. return ret;
  170. }
  171. static int sr_sw_reset(struct usbnet *dev, u8 flags)
  172. {
  173. int ret;
  174. ret = sr_write_cmd(dev, SR_CMD_SW_RESET, flags, 0, 0, NULL);
  175. if (ret < 0)
  176. netdev_err(dev->net, "Failed to send software reset:%02x\n",
  177. ret);
  178. return ret;
  179. }
  180. static u16 sr_read_rx_ctl(struct usbnet *dev)
  181. {
  182. __le16 v;
  183. int ret;
  184. ret = sr_read_cmd(dev, SR_CMD_READ_RX_CTL, 0, 0, 2, &v);
  185. if (ret < 0) {
  186. netdev_err(dev->net, "Error reading RX_CTL register:%02x\n",
  187. ret);
  188. goto out;
  189. }
  190. ret = le16_to_cpu(v);
  191. out:
  192. return ret;
  193. }
  194. static int sr_write_rx_ctl(struct usbnet *dev, u16 mode)
  195. {
  196. int ret;
  197. netdev_dbg(dev->net, "%s : mode = 0x%04x\n", __func__, mode);
  198. ret = sr_write_cmd(dev, SR_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
  199. if (ret < 0)
  200. netdev_err(dev->net,
  201. "Failed to write RX_CTL mode to 0x%04x:%02x\n",
  202. mode, ret);
  203. return ret;
  204. }
  205. static u16 sr_read_medium_status(struct usbnet *dev)
  206. {
  207. __le16 v;
  208. int ret;
  209. ret = sr_read_cmd(dev, SR_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
  210. if (ret < 0) {
  211. netdev_err(dev->net,
  212. "Error reading Medium Status register:%02x\n", ret);
  213. return ret; /* TODO: callers not checking for error ret */
  214. }
  215. return le16_to_cpu(v);
  216. }
  217. static int sr_write_medium_mode(struct usbnet *dev, u16 mode)
  218. {
  219. int ret;
  220. netdev_dbg(dev->net, "%s : mode = 0x%04x\n", __func__, mode);
  221. ret = sr_write_cmd(dev, SR_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
  222. if (ret < 0)
  223. netdev_err(dev->net,
  224. "Failed to write Medium Mode mode to 0x%04x:%02x\n",
  225. mode, ret);
  226. return ret;
  227. }
  228. static int sr_write_gpio(struct usbnet *dev, u16 value, int sleep)
  229. {
  230. int ret;
  231. netdev_dbg(dev->net, "%s : value = 0x%04x\n", __func__, value);
  232. ret = sr_write_cmd(dev, SR_CMD_WRITE_GPIOS, value, 0, 0, NULL);
  233. if (ret < 0)
  234. netdev_err(dev->net, "Failed to write GPIO value 0x%04x:%02x\n",
  235. value, ret);
  236. if (sleep)
  237. msleep(sleep);
  238. return ret;
  239. }
  240. /* SR9800 have a 16-bit RX_CTL value */
  241. static void sr_set_multicast(struct net_device *net)
  242. {
  243. struct usbnet *dev = netdev_priv(net);
  244. struct sr_data *data = (struct sr_data *)&dev->data;
  245. u16 rx_ctl = SR_DEFAULT_RX_CTL;
  246. if (net->flags & IFF_PROMISC) {
  247. rx_ctl |= SR_RX_CTL_PRO;
  248. } else if (net->flags & IFF_ALLMULTI ||
  249. netdev_mc_count(net) > SR_MAX_MCAST) {
  250. rx_ctl |= SR_RX_CTL_AMALL;
  251. } else if (netdev_mc_empty(net)) {
  252. /* just broadcast and directed */
  253. } else {
  254. /* We use the 20 byte dev->data
  255. * for our 8 byte filter buffer
  256. * to avoid allocating memory that
  257. * is tricky to free later
  258. */
  259. struct netdev_hw_addr *ha;
  260. u32 crc_bits;
  261. memset(data->multi_filter, 0, SR_MCAST_FILTER_SIZE);
  262. /* Build the multicast hash filter. */
  263. netdev_for_each_mc_addr(ha, net) {
  264. crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
  265. data->multi_filter[crc_bits >> 3] |=
  266. 1 << (crc_bits & 7);
  267. }
  268. sr_write_cmd_async(dev, SR_CMD_WRITE_MULTI_FILTER, 0, 0,
  269. SR_MCAST_FILTER_SIZE, data->multi_filter);
  270. rx_ctl |= SR_RX_CTL_AM;
  271. }
  272. sr_write_cmd_async(dev, SR_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
  273. }
  274. static int sr_mdio_read(struct net_device *net, int phy_id, int loc)
  275. {
  276. struct usbnet *dev = netdev_priv(net);
  277. __le16 res;
  278. mutex_lock(&dev->phy_mutex);
  279. sr_set_sw_mii(dev);
  280. sr_read_cmd(dev, SR_CMD_READ_MII_REG, phy_id, (__u16)loc, 2, &res);
  281. sr_set_hw_mii(dev);
  282. mutex_unlock(&dev->phy_mutex);
  283. netdev_dbg(dev->net,
  284. "%s : phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n", __func__,
  285. phy_id, loc, le16_to_cpu(res));
  286. return le16_to_cpu(res);
  287. }
  288. static void
  289. sr_mdio_write(struct net_device *net, int phy_id, int loc, int val)
  290. {
  291. struct usbnet *dev = netdev_priv(net);
  292. __le16 res = cpu_to_le16(val);
  293. netdev_dbg(dev->net,
  294. "%s : phy_id=0x%02x, loc=0x%02x, val=0x%04x\n", __func__,
  295. phy_id, loc, val);
  296. mutex_lock(&dev->phy_mutex);
  297. sr_set_sw_mii(dev);
  298. sr_write_cmd(dev, SR_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
  299. sr_set_hw_mii(dev);
  300. mutex_unlock(&dev->phy_mutex);
  301. }
  302. /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
  303. static u32 sr_get_phyid(struct usbnet *dev)
  304. {
  305. int phy_reg;
  306. u32 phy_id;
  307. int i;
  308. /* Poll for the rare case the FW or phy isn't ready yet. */
  309. for (i = 0; i < 100; i++) {
  310. phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
  311. if (phy_reg != 0 && phy_reg != 0xFFFF)
  312. break;
  313. mdelay(1);
  314. }
  315. if (phy_reg <= 0 || phy_reg == 0xFFFF)
  316. return 0;
  317. phy_id = (phy_reg & 0xffff) << 16;
  318. phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
  319. if (phy_reg < 0)
  320. return 0;
  321. phy_id |= (phy_reg & 0xffff);
  322. return phy_id;
  323. }
  324. static void
  325. sr_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
  326. {
  327. struct usbnet *dev = netdev_priv(net);
  328. u8 opt;
  329. if (sr_read_cmd(dev, SR_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
  330. wolinfo->supported = 0;
  331. wolinfo->wolopts = 0;
  332. return;
  333. }
  334. wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
  335. wolinfo->wolopts = 0;
  336. if (opt & SR_MONITOR_LINK)
  337. wolinfo->wolopts |= WAKE_PHY;
  338. if (opt & SR_MONITOR_MAGIC)
  339. wolinfo->wolopts |= WAKE_MAGIC;
  340. }
  341. static int
  342. sr_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
  343. {
  344. struct usbnet *dev = netdev_priv(net);
  345. u8 opt = 0;
  346. if (wolinfo->wolopts & WAKE_PHY)
  347. opt |= SR_MONITOR_LINK;
  348. if (wolinfo->wolopts & WAKE_MAGIC)
  349. opt |= SR_MONITOR_MAGIC;
  350. if (sr_write_cmd(dev, SR_CMD_WRITE_MONITOR_MODE,
  351. opt, 0, 0, NULL) < 0)
  352. return -EINVAL;
  353. return 0;
  354. }
  355. static int sr_get_eeprom_len(struct net_device *net)
  356. {
  357. struct usbnet *dev = netdev_priv(net);
  358. struct sr_data *data = (struct sr_data *)&dev->data;
  359. return data->eeprom_len;
  360. }
  361. static int sr_get_eeprom(struct net_device *net,
  362. struct ethtool_eeprom *eeprom, u8 *data)
  363. {
  364. struct usbnet *dev = netdev_priv(net);
  365. __le16 *ebuf = (__le16 *)data;
  366. int ret;
  367. int i;
  368. /* Crude hack to ensure that we don't overwrite memory
  369. * if an odd length is supplied
  370. */
  371. if (eeprom->len % 2)
  372. return -EINVAL;
  373. eeprom->magic = SR_EEPROM_MAGIC;
  374. /* sr9800 returns 2 bytes from eeprom on read */
  375. for (i = 0; i < eeprom->len / 2; i++) {
  376. ret = sr_read_cmd(dev, SR_CMD_READ_EEPROM, eeprom->offset + i,
  377. 0, 2, &ebuf[i]);
  378. if (ret < 0)
  379. return -EINVAL;
  380. }
  381. return 0;
  382. }
  383. static void sr_get_drvinfo(struct net_device *net,
  384. struct ethtool_drvinfo *info)
  385. {
  386. struct usbnet *dev = netdev_priv(net);
  387. struct sr_data *data = (struct sr_data *)&dev->data;
  388. /* Inherit standard device info */
  389. usbnet_get_drvinfo(net, info);
  390. strncpy(info->driver, DRIVER_NAME, sizeof(info->driver));
  391. strncpy(info->version, DRIVER_VERSION, sizeof(info->version));
  392. info->eedump_len = data->eeprom_len;
  393. }
  394. static u32 sr_get_link(struct net_device *net)
  395. {
  396. struct usbnet *dev = netdev_priv(net);
  397. return mii_link_ok(&dev->mii);
  398. }
  399. static int sr_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
  400. {
  401. struct usbnet *dev = netdev_priv(net);
  402. return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
  403. }
  404. static int sr_set_mac_address(struct net_device *net, void *p)
  405. {
  406. struct usbnet *dev = netdev_priv(net);
  407. struct sr_data *data = (struct sr_data *)&dev->data;
  408. struct sockaddr *addr = p;
  409. if (netif_running(net))
  410. return -EBUSY;
  411. if (!is_valid_ether_addr(addr->sa_data))
  412. return -EADDRNOTAVAIL;
  413. memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
  414. /* We use the 20 byte dev->data
  415. * for our 6 byte mac buffer
  416. * to avoid allocating memory that
  417. * is tricky to free later
  418. */
  419. memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
  420. sr_write_cmd_async(dev, SR_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
  421. data->mac_addr);
  422. return 0;
  423. }
  424. static const struct ethtool_ops sr9800_ethtool_ops = {
  425. .get_drvinfo = sr_get_drvinfo,
  426. .get_link = sr_get_link,
  427. .get_msglevel = usbnet_get_msglevel,
  428. .set_msglevel = usbnet_set_msglevel,
  429. .get_wol = sr_get_wol,
  430. .set_wol = sr_set_wol,
  431. .get_eeprom_len = sr_get_eeprom_len,
  432. .get_eeprom = sr_get_eeprom,
  433. .get_settings = usbnet_get_settings,
  434. .set_settings = usbnet_set_settings,
  435. .nway_reset = usbnet_nway_reset,
  436. };
  437. static int sr9800_link_reset(struct usbnet *dev)
  438. {
  439. struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
  440. u16 mode;
  441. mii_check_media(&dev->mii, 1, 1);
  442. mii_ethtool_gset(&dev->mii, &ecmd);
  443. mode = SR9800_MEDIUM_DEFAULT;
  444. if (ethtool_cmd_speed(&ecmd) != SPEED_100)
  445. mode &= ~SR_MEDIUM_PS;
  446. if (ecmd.duplex != DUPLEX_FULL)
  447. mode &= ~SR_MEDIUM_FD;
  448. netdev_dbg(dev->net, "%s : speed: %u duplex: %d mode: 0x%04x\n",
  449. __func__, ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
  450. sr_write_medium_mode(dev, mode);
  451. return 0;
  452. }
  453. static int sr9800_set_default_mode(struct usbnet *dev)
  454. {
  455. u16 rx_ctl;
  456. int ret;
  457. sr_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
  458. sr_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
  459. ADVERTISE_ALL | ADVERTISE_CSMA);
  460. mii_nway_restart(&dev->mii);
  461. ret = sr_write_medium_mode(dev, SR9800_MEDIUM_DEFAULT);
  462. if (ret < 0)
  463. goto out;
  464. ret = sr_write_cmd(dev, SR_CMD_WRITE_IPG012,
  465. SR9800_IPG0_DEFAULT | SR9800_IPG1_DEFAULT,
  466. SR9800_IPG2_DEFAULT, 0, NULL);
  467. if (ret < 0) {
  468. netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
  469. goto out;
  470. }
  471. /* Set RX_CTL to default values with 2k buffer, and enable cactus */
  472. ret = sr_write_rx_ctl(dev, SR_DEFAULT_RX_CTL);
  473. if (ret < 0)
  474. goto out;
  475. rx_ctl = sr_read_rx_ctl(dev);
  476. netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
  477. rx_ctl);
  478. rx_ctl = sr_read_medium_status(dev);
  479. netdev_dbg(dev->net, "Medium Status:0x%04x after all initializations\n",
  480. rx_ctl);
  481. return 0;
  482. out:
  483. return ret;
  484. }
  485. static int sr9800_reset(struct usbnet *dev)
  486. {
  487. struct sr_data *data = (struct sr_data *)&dev->data;
  488. int ret, embd_phy;
  489. u16 rx_ctl;
  490. ret = sr_write_gpio(dev,
  491. SR_GPIO_RSE | SR_GPIO_GPO_2 | SR_GPIO_GPO2EN, 5);
  492. if (ret < 0)
  493. goto out;
  494. embd_phy = ((sr_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
  495. ret = sr_write_cmd(dev, SR_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
  496. if (ret < 0) {
  497. netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
  498. goto out;
  499. }
  500. ret = sr_sw_reset(dev, SR_SWRESET_IPPD | SR_SWRESET_PRL);
  501. if (ret < 0)
  502. goto out;
  503. msleep(150);
  504. ret = sr_sw_reset(dev, SR_SWRESET_CLEAR);
  505. if (ret < 0)
  506. goto out;
  507. msleep(150);
  508. if (embd_phy) {
  509. ret = sr_sw_reset(dev, SR_SWRESET_IPRL);
  510. if (ret < 0)
  511. goto out;
  512. } else {
  513. ret = sr_sw_reset(dev, SR_SWRESET_PRTE);
  514. if (ret < 0)
  515. goto out;
  516. }
  517. msleep(150);
  518. rx_ctl = sr_read_rx_ctl(dev);
  519. netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);
  520. ret = sr_write_rx_ctl(dev, 0x0000);
  521. if (ret < 0)
  522. goto out;
  523. rx_ctl = sr_read_rx_ctl(dev);
  524. netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
  525. ret = sr_sw_reset(dev, SR_SWRESET_PRL);
  526. if (ret < 0)
  527. goto out;
  528. msleep(150);
  529. ret = sr_sw_reset(dev, SR_SWRESET_IPRL | SR_SWRESET_PRL);
  530. if (ret < 0)
  531. goto out;
  532. msleep(150);
  533. ret = sr9800_set_default_mode(dev);
  534. if (ret < 0)
  535. goto out;
  536. /* Rewrite MAC address */
  537. memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
  538. ret = sr_write_cmd(dev, SR_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
  539. data->mac_addr);
  540. if (ret < 0)
  541. goto out;
  542. return 0;
  543. out:
  544. return ret;
  545. }
  546. static const struct net_device_ops sr9800_netdev_ops = {
  547. .ndo_open = usbnet_open,
  548. .ndo_stop = usbnet_stop,
  549. .ndo_start_xmit = usbnet_start_xmit,
  550. .ndo_tx_timeout = usbnet_tx_timeout,
  551. .ndo_change_mtu = usbnet_change_mtu,
  552. .ndo_set_mac_address = sr_set_mac_address,
  553. .ndo_validate_addr = eth_validate_addr,
  554. .ndo_do_ioctl = sr_ioctl,
  555. .ndo_set_rx_mode = sr_set_multicast,
  556. };
  557. static int sr9800_phy_powerup(struct usbnet *dev)
  558. {
  559. int ret;
  560. /* set the embedded Ethernet PHY in power-down state */
  561. ret = sr_sw_reset(dev, SR_SWRESET_IPPD | SR_SWRESET_IPRL);
  562. if (ret < 0) {
  563. netdev_err(dev->net, "Failed to power down PHY : %d\n", ret);
  564. return ret;
  565. }
  566. msleep(20);
  567. /* set the embedded Ethernet PHY in power-up state */
  568. ret = sr_sw_reset(dev, SR_SWRESET_IPRL);
  569. if (ret < 0) {
  570. netdev_err(dev->net, "Failed to reset PHY: %d\n", ret);
  571. return ret;
  572. }
  573. msleep(600);
  574. /* set the embedded Ethernet PHY in reset state */
  575. ret = sr_sw_reset(dev, SR_SWRESET_CLEAR);
  576. if (ret < 0) {
  577. netdev_err(dev->net, "Failed to power up PHY: %d\n", ret);
  578. return ret;
  579. }
  580. msleep(20);
  581. /* set the embedded Ethernet PHY in power-up state */
  582. ret = sr_sw_reset(dev, SR_SWRESET_IPRL);
  583. if (ret < 0) {
  584. netdev_err(dev->net, "Failed to reset PHY: %d\n", ret);
  585. return ret;
  586. }
  587. return 0;
  588. }
  589. static int sr9800_bind(struct usbnet *dev, struct usb_interface *intf)
  590. {
  591. struct sr_data *data = (struct sr_data *)&dev->data;
  592. u16 led01_mux, led23_mux;
  593. int ret, embd_phy;
  594. u32 phyid;
  595. u16 rx_ctl;
  596. data->eeprom_len = SR9800_EEPROM_LEN;
  597. usbnet_get_endpoints(dev, intf);
  598. /* LED Setting Rule :
  599. * AABB:CCDD
  600. * AA : MFA0(LED0)
  601. * BB : MFA1(LED1)
  602. * CC : MFA2(LED2), Reserved for SR9800
  603. * DD : MFA3(LED3), Reserved for SR9800
  604. */
  605. led01_mux = (SR_LED_MUX_LINK_ACTIVE << 8) | SR_LED_MUX_LINK;
  606. led23_mux = (SR_LED_MUX_LINK_ACTIVE << 8) | SR_LED_MUX_TX_ACTIVE;
  607. ret = sr_write_cmd(dev, SR_CMD_LED_MUX, led01_mux, led23_mux, 0, NULL);
  608. if (ret < 0) {
  609. netdev_err(dev->net, "set LINK LED failed : %d\n", ret);
  610. goto out;
  611. }
  612. /* Get the MAC address */
  613. ret = sr_read_cmd(dev, SR_CMD_READ_NODE_ID, 0, 0, ETH_ALEN,
  614. dev->net->dev_addr);
  615. if (ret < 0) {
  616. netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
  617. return ret;
  618. }
  619. netdev_dbg(dev->net, "mac addr : %pM\n", dev->net->dev_addr);
  620. /* Initialize MII structure */
  621. dev->mii.dev = dev->net;
  622. dev->mii.mdio_read = sr_mdio_read;
  623. dev->mii.mdio_write = sr_mdio_write;
  624. dev->mii.phy_id_mask = 0x1f;
  625. dev->mii.reg_num_mask = 0x1f;
  626. dev->mii.phy_id = sr_get_phy_addr(dev);
  627. dev->net->netdev_ops = &sr9800_netdev_ops;
  628. dev->net->ethtool_ops = &sr9800_ethtool_ops;
  629. embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
  630. /* Reset the PHY to normal operation mode */
  631. ret = sr_write_cmd(dev, SR_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
  632. if (ret < 0) {
  633. netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
  634. return ret;
  635. }
  636. /* Init PHY routine */
  637. ret = sr9800_phy_powerup(dev);
  638. if (ret < 0)
  639. goto out;
  640. rx_ctl = sr_read_rx_ctl(dev);
  641. netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);
  642. ret = sr_write_rx_ctl(dev, 0x0000);
  643. if (ret < 0)
  644. goto out;
  645. rx_ctl = sr_read_rx_ctl(dev);
  646. netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
  647. /* Read PHYID register *AFTER* the PHY was reset properly */
  648. phyid = sr_get_phyid(dev);
  649. netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
  650. /* medium mode setting */
  651. ret = sr9800_set_default_mode(dev);
  652. if (ret < 0)
  653. goto out;
  654. if (dev->udev->speed == USB_SPEED_HIGH) {
  655. ret = sr_write_cmd(dev, SR_CMD_BULKIN_SIZE,
  656. SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_4K].byte_cnt,
  657. SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_4K].threshold,
  658. 0, NULL);
  659. if (ret < 0) {
  660. netdev_err(dev->net, "Reset RX_CTL failed: %d\n", ret);
  661. goto out;
  662. }
  663. dev->rx_urb_size =
  664. SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_4K].size;
  665. } else {
  666. ret = sr_write_cmd(dev, SR_CMD_BULKIN_SIZE,
  667. SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_2K].byte_cnt,
  668. SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_2K].threshold,
  669. 0, NULL);
  670. if (ret < 0) {
  671. netdev_err(dev->net, "Reset RX_CTL failed: %d\n", ret);
  672. goto out;
  673. }
  674. dev->rx_urb_size =
  675. SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_2K].size;
  676. }
  677. netdev_dbg(dev->net, "%s : setting rx_urb_size with : %zu\n", __func__,
  678. dev->rx_urb_size);
  679. return 0;
  680. out:
  681. return ret;
  682. }
  683. static const struct driver_info sr9800_driver_info = {
  684. .description = "CoreChip SR9800 USB 2.0 Ethernet",
  685. .bind = sr9800_bind,
  686. .status = sr_status,
  687. .link_reset = sr9800_link_reset,
  688. .reset = sr9800_reset,
  689. .flags = DRIVER_FLAG,
  690. .rx_fixup = sr_rx_fixup,
  691. .tx_fixup = sr_tx_fixup,
  692. };
  693. static const struct usb_device_id products[] = {
  694. {
  695. USB_DEVICE(0x0fe6, 0x9800), /* SR9800 Device */
  696. .driver_info = (unsigned long) &sr9800_driver_info,
  697. },
  698. {}, /* END */
  699. };
  700. MODULE_DEVICE_TABLE(usb, products);
  701. static struct usb_driver sr_driver = {
  702. .name = DRIVER_NAME,
  703. .id_table = products,
  704. .probe = usbnet_probe,
  705. .suspend = usbnet_suspend,
  706. .resume = usbnet_resume,
  707. .disconnect = usbnet_disconnect,
  708. .supports_autosuspend = 1,
  709. };
  710. module_usb_driver(sr_driver);
  711. MODULE_AUTHOR("Liu Junliang <liujunliang_ljl@163.com");
  712. MODULE_VERSION(DRIVER_VERSION);
  713. MODULE_DESCRIPTION("SR9800 USB 2.0 USB2NET Dev : http://www.corechip-sz.com");
  714. MODULE_LICENSE("GPL");