rx.c 28 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare network controllers and boards
  3. * Copyright 2005-2006 Fen Systems Ltd.
  4. * Copyright 2005-2013 Solarflare Communications Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation, incorporated herein by reference.
  9. */
  10. #include <linux/socket.h>
  11. #include <linux/in.h>
  12. #include <linux/slab.h>
  13. #include <linux/ip.h>
  14. #include <linux/ipv6.h>
  15. #include <linux/tcp.h>
  16. #include <linux/udp.h>
  17. #include <linux/prefetch.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/iommu.h>
  20. #include <net/ip.h>
  21. #include <net/checksum.h>
  22. #include "net_driver.h"
  23. #include "efx.h"
  24. #include "filter.h"
  25. #include "nic.h"
  26. #include "selftest.h"
  27. #include "workarounds.h"
  28. /* Preferred number of descriptors to fill at once */
  29. #define EFX_RX_PREFERRED_BATCH 8U
  30. /* Number of RX buffers to recycle pages for. When creating the RX page recycle
  31. * ring, this number is divided by the number of buffers per page to calculate
  32. * the number of pages to store in the RX page recycle ring.
  33. */
  34. #define EFX_RECYCLE_RING_SIZE_IOMMU 4096
  35. #define EFX_RECYCLE_RING_SIZE_NOIOMMU (2 * EFX_RX_PREFERRED_BATCH)
  36. /* Size of buffer allocated for skb header area. */
  37. #define EFX_SKB_HEADERS 128u
  38. /* This is the percentage fill level below which new RX descriptors
  39. * will be added to the RX descriptor ring.
  40. */
  41. static unsigned int rx_refill_threshold;
  42. /* Each packet can consume up to ceil(max_frame_len / buffer_size) buffers */
  43. #define EFX_RX_MAX_FRAGS DIV_ROUND_UP(EFX_MAX_FRAME_LEN(EFX_MAX_MTU), \
  44. EFX_RX_USR_BUF_SIZE)
  45. /*
  46. * RX maximum head room required.
  47. *
  48. * This must be at least 1 to prevent overflow, plus one packet-worth
  49. * to allow pipelined receives.
  50. */
  51. #define EFX_RXD_HEAD_ROOM (1 + EFX_RX_MAX_FRAGS)
  52. static inline u8 *efx_rx_buf_va(struct efx_rx_buffer *buf)
  53. {
  54. return page_address(buf->page) + buf->page_offset;
  55. }
  56. static inline u32 efx_rx_buf_hash(struct efx_nic *efx, const u8 *eh)
  57. {
  58. #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS)
  59. return __le32_to_cpup((const __le32 *)(eh + efx->rx_packet_hash_offset));
  60. #else
  61. const u8 *data = eh + efx->rx_packet_hash_offset;
  62. return (u32)data[0] |
  63. (u32)data[1] << 8 |
  64. (u32)data[2] << 16 |
  65. (u32)data[3] << 24;
  66. #endif
  67. }
  68. static inline struct efx_rx_buffer *
  69. efx_rx_buf_next(struct efx_rx_queue *rx_queue, struct efx_rx_buffer *rx_buf)
  70. {
  71. if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask)))
  72. return efx_rx_buffer(rx_queue, 0);
  73. else
  74. return rx_buf + 1;
  75. }
  76. static inline void efx_sync_rx_buffer(struct efx_nic *efx,
  77. struct efx_rx_buffer *rx_buf,
  78. unsigned int len)
  79. {
  80. dma_sync_single_for_cpu(&efx->pci_dev->dev, rx_buf->dma_addr, len,
  81. DMA_FROM_DEVICE);
  82. }
  83. void efx_rx_config_page_split(struct efx_nic *efx)
  84. {
  85. efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + efx->rx_ip_align,
  86. EFX_RX_BUF_ALIGNMENT);
  87. efx->rx_bufs_per_page = efx->rx_buffer_order ? 1 :
  88. ((PAGE_SIZE - sizeof(struct efx_rx_page_state)) /
  89. efx->rx_page_buf_step);
  90. efx->rx_buffer_truesize = (PAGE_SIZE << efx->rx_buffer_order) /
  91. efx->rx_bufs_per_page;
  92. efx->rx_pages_per_batch = DIV_ROUND_UP(EFX_RX_PREFERRED_BATCH,
  93. efx->rx_bufs_per_page);
  94. }
  95. /* Check the RX page recycle ring for a page that can be reused. */
  96. static struct page *efx_reuse_page(struct efx_rx_queue *rx_queue)
  97. {
  98. struct efx_nic *efx = rx_queue->efx;
  99. struct page *page;
  100. struct efx_rx_page_state *state;
  101. unsigned index;
  102. index = rx_queue->page_remove & rx_queue->page_ptr_mask;
  103. page = rx_queue->page_ring[index];
  104. if (page == NULL)
  105. return NULL;
  106. rx_queue->page_ring[index] = NULL;
  107. /* page_remove cannot exceed page_add. */
  108. if (rx_queue->page_remove != rx_queue->page_add)
  109. ++rx_queue->page_remove;
  110. /* If page_count is 1 then we hold the only reference to this page. */
  111. if (page_count(page) == 1) {
  112. ++rx_queue->page_recycle_count;
  113. return page;
  114. } else {
  115. state = page_address(page);
  116. dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
  117. PAGE_SIZE << efx->rx_buffer_order,
  118. DMA_FROM_DEVICE);
  119. put_page(page);
  120. ++rx_queue->page_recycle_failed;
  121. }
  122. return NULL;
  123. }
  124. /**
  125. * efx_init_rx_buffers - create EFX_RX_BATCH page-based RX buffers
  126. *
  127. * @rx_queue: Efx RX queue
  128. *
  129. * This allocates a batch of pages, maps them for DMA, and populates
  130. * struct efx_rx_buffers for each one. Return a negative error code or
  131. * 0 on success. If a single page can be used for multiple buffers,
  132. * then the page will either be inserted fully, or not at all.
  133. */
  134. static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue, bool atomic)
  135. {
  136. struct efx_nic *efx = rx_queue->efx;
  137. struct efx_rx_buffer *rx_buf;
  138. struct page *page;
  139. unsigned int page_offset;
  140. struct efx_rx_page_state *state;
  141. dma_addr_t dma_addr;
  142. unsigned index, count;
  143. count = 0;
  144. do {
  145. page = efx_reuse_page(rx_queue);
  146. if (page == NULL) {
  147. page = alloc_pages(__GFP_COLD | __GFP_COMP |
  148. (atomic ? GFP_ATOMIC : GFP_KERNEL),
  149. efx->rx_buffer_order);
  150. if (unlikely(page == NULL))
  151. return -ENOMEM;
  152. dma_addr =
  153. dma_map_page(&efx->pci_dev->dev, page, 0,
  154. PAGE_SIZE << efx->rx_buffer_order,
  155. DMA_FROM_DEVICE);
  156. if (unlikely(dma_mapping_error(&efx->pci_dev->dev,
  157. dma_addr))) {
  158. __free_pages(page, efx->rx_buffer_order);
  159. return -EIO;
  160. }
  161. state = page_address(page);
  162. state->dma_addr = dma_addr;
  163. } else {
  164. state = page_address(page);
  165. dma_addr = state->dma_addr;
  166. }
  167. dma_addr += sizeof(struct efx_rx_page_state);
  168. page_offset = sizeof(struct efx_rx_page_state);
  169. do {
  170. index = rx_queue->added_count & rx_queue->ptr_mask;
  171. rx_buf = efx_rx_buffer(rx_queue, index);
  172. rx_buf->dma_addr = dma_addr + efx->rx_ip_align;
  173. rx_buf->page = page;
  174. rx_buf->page_offset = page_offset + efx->rx_ip_align;
  175. rx_buf->len = efx->rx_dma_len;
  176. rx_buf->flags = 0;
  177. ++rx_queue->added_count;
  178. get_page(page);
  179. dma_addr += efx->rx_page_buf_step;
  180. page_offset += efx->rx_page_buf_step;
  181. } while (page_offset + efx->rx_page_buf_step <= PAGE_SIZE);
  182. rx_buf->flags = EFX_RX_BUF_LAST_IN_PAGE;
  183. } while (++count < efx->rx_pages_per_batch);
  184. return 0;
  185. }
  186. /* Unmap a DMA-mapped page. This function is only called for the final RX
  187. * buffer in a page.
  188. */
  189. static void efx_unmap_rx_buffer(struct efx_nic *efx,
  190. struct efx_rx_buffer *rx_buf)
  191. {
  192. struct page *page = rx_buf->page;
  193. if (page) {
  194. struct efx_rx_page_state *state = page_address(page);
  195. dma_unmap_page(&efx->pci_dev->dev,
  196. state->dma_addr,
  197. PAGE_SIZE << efx->rx_buffer_order,
  198. DMA_FROM_DEVICE);
  199. }
  200. }
  201. static void efx_free_rx_buffer(struct efx_rx_buffer *rx_buf)
  202. {
  203. if (rx_buf->page) {
  204. put_page(rx_buf->page);
  205. rx_buf->page = NULL;
  206. }
  207. }
  208. /* Attempt to recycle the page if there is an RX recycle ring; the page can
  209. * only be added if this is the final RX buffer, to prevent pages being used in
  210. * the descriptor ring and appearing in the recycle ring simultaneously.
  211. */
  212. static void efx_recycle_rx_page(struct efx_channel *channel,
  213. struct efx_rx_buffer *rx_buf)
  214. {
  215. struct page *page = rx_buf->page;
  216. struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
  217. struct efx_nic *efx = rx_queue->efx;
  218. unsigned index;
  219. /* Only recycle the page after processing the final buffer. */
  220. if (!(rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE))
  221. return;
  222. index = rx_queue->page_add & rx_queue->page_ptr_mask;
  223. if (rx_queue->page_ring[index] == NULL) {
  224. unsigned read_index = rx_queue->page_remove &
  225. rx_queue->page_ptr_mask;
  226. /* The next slot in the recycle ring is available, but
  227. * increment page_remove if the read pointer currently
  228. * points here.
  229. */
  230. if (read_index == index)
  231. ++rx_queue->page_remove;
  232. rx_queue->page_ring[index] = page;
  233. ++rx_queue->page_add;
  234. return;
  235. }
  236. ++rx_queue->page_recycle_full;
  237. efx_unmap_rx_buffer(efx, rx_buf);
  238. put_page(rx_buf->page);
  239. }
  240. static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
  241. struct efx_rx_buffer *rx_buf)
  242. {
  243. /* Release the page reference we hold for the buffer. */
  244. if (rx_buf->page)
  245. put_page(rx_buf->page);
  246. /* If this is the last buffer in a page, unmap and free it. */
  247. if (rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE) {
  248. efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
  249. efx_free_rx_buffer(rx_buf);
  250. }
  251. rx_buf->page = NULL;
  252. }
  253. /* Recycle the pages that are used by buffers that have just been received. */
  254. static void efx_recycle_rx_pages(struct efx_channel *channel,
  255. struct efx_rx_buffer *rx_buf,
  256. unsigned int n_frags)
  257. {
  258. struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
  259. do {
  260. efx_recycle_rx_page(channel, rx_buf);
  261. rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
  262. } while (--n_frags);
  263. }
  264. static void efx_discard_rx_packet(struct efx_channel *channel,
  265. struct efx_rx_buffer *rx_buf,
  266. unsigned int n_frags)
  267. {
  268. struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
  269. efx_recycle_rx_pages(channel, rx_buf, n_frags);
  270. do {
  271. efx_free_rx_buffer(rx_buf);
  272. rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
  273. } while (--n_frags);
  274. }
  275. /**
  276. * efx_fast_push_rx_descriptors - push new RX descriptors quickly
  277. * @rx_queue: RX descriptor queue
  278. *
  279. * This will aim to fill the RX descriptor queue up to
  280. * @rx_queue->@max_fill. If there is insufficient atomic
  281. * memory to do so, a slow fill will be scheduled.
  282. *
  283. * The caller must provide serialisation (none is used here). In practise,
  284. * this means this function must run from the NAPI handler, or be called
  285. * when NAPI is disabled.
  286. */
  287. void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue, bool atomic)
  288. {
  289. struct efx_nic *efx = rx_queue->efx;
  290. unsigned int fill_level, batch_size;
  291. int space, rc = 0;
  292. if (!rx_queue->refill_enabled)
  293. return;
  294. /* Calculate current fill level, and exit if we don't need to fill */
  295. fill_level = (rx_queue->added_count - rx_queue->removed_count);
  296. EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
  297. if (fill_level >= rx_queue->fast_fill_trigger)
  298. goto out;
  299. /* Record minimum fill level */
  300. if (unlikely(fill_level < rx_queue->min_fill)) {
  301. if (fill_level)
  302. rx_queue->min_fill = fill_level;
  303. }
  304. batch_size = efx->rx_pages_per_batch * efx->rx_bufs_per_page;
  305. space = rx_queue->max_fill - fill_level;
  306. EFX_BUG_ON_PARANOID(space < batch_size);
  307. netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
  308. "RX queue %d fast-filling descriptor ring from"
  309. " level %d to level %d\n",
  310. efx_rx_queue_index(rx_queue), fill_level,
  311. rx_queue->max_fill);
  312. do {
  313. rc = efx_init_rx_buffers(rx_queue, atomic);
  314. if (unlikely(rc)) {
  315. /* Ensure that we don't leave the rx queue empty */
  316. if (rx_queue->added_count == rx_queue->removed_count)
  317. efx_schedule_slow_fill(rx_queue);
  318. goto out;
  319. }
  320. } while ((space -= batch_size) >= batch_size);
  321. netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
  322. "RX queue %d fast-filled descriptor ring "
  323. "to level %d\n", efx_rx_queue_index(rx_queue),
  324. rx_queue->added_count - rx_queue->removed_count);
  325. out:
  326. if (rx_queue->notified_count != rx_queue->added_count)
  327. efx_nic_notify_rx_desc(rx_queue);
  328. }
  329. void efx_rx_slow_fill(unsigned long context)
  330. {
  331. struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
  332. /* Post an event to cause NAPI to run and refill the queue */
  333. efx_nic_generate_fill_event(rx_queue);
  334. ++rx_queue->slow_fill_count;
  335. }
  336. static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
  337. struct efx_rx_buffer *rx_buf,
  338. int len)
  339. {
  340. struct efx_nic *efx = rx_queue->efx;
  341. unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
  342. if (likely(len <= max_len))
  343. return;
  344. /* The packet must be discarded, but this is only a fatal error
  345. * if the caller indicated it was
  346. */
  347. rx_buf->flags |= EFX_RX_PKT_DISCARD;
  348. if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
  349. if (net_ratelimit())
  350. netif_err(efx, rx_err, efx->net_dev,
  351. " RX queue %d seriously overlength "
  352. "RX event (0x%x > 0x%x+0x%x). Leaking\n",
  353. efx_rx_queue_index(rx_queue), len, max_len,
  354. efx->type->rx_buffer_padding);
  355. efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
  356. } else {
  357. if (net_ratelimit())
  358. netif_err(efx, rx_err, efx->net_dev,
  359. " RX queue %d overlength RX event "
  360. "(0x%x > 0x%x)\n",
  361. efx_rx_queue_index(rx_queue), len, max_len);
  362. }
  363. efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
  364. }
  365. /* Pass a received packet up through GRO. GRO can handle pages
  366. * regardless of checksum state and skbs with a good checksum.
  367. */
  368. static void
  369. efx_rx_packet_gro(struct efx_channel *channel, struct efx_rx_buffer *rx_buf,
  370. unsigned int n_frags, u8 *eh)
  371. {
  372. struct napi_struct *napi = &channel->napi_str;
  373. gro_result_t gro_result;
  374. struct efx_nic *efx = channel->efx;
  375. struct sk_buff *skb;
  376. skb = napi_get_frags(napi);
  377. if (unlikely(!skb)) {
  378. while (n_frags--) {
  379. put_page(rx_buf->page);
  380. rx_buf->page = NULL;
  381. rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
  382. }
  383. return;
  384. }
  385. if (efx->net_dev->features & NETIF_F_RXHASH)
  386. skb_set_hash(skb, efx_rx_buf_hash(efx, eh),
  387. PKT_HASH_TYPE_L3);
  388. skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
  389. CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
  390. for (;;) {
  391. skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
  392. rx_buf->page, rx_buf->page_offset,
  393. rx_buf->len);
  394. rx_buf->page = NULL;
  395. skb->len += rx_buf->len;
  396. if (skb_shinfo(skb)->nr_frags == n_frags)
  397. break;
  398. rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
  399. }
  400. skb->data_len = skb->len;
  401. skb->truesize += n_frags * efx->rx_buffer_truesize;
  402. skb_record_rx_queue(skb, channel->rx_queue.core_index);
  403. gro_result = napi_gro_frags(napi);
  404. if (gro_result != GRO_DROP)
  405. channel->irq_mod_score += 2;
  406. }
  407. /* Allocate and construct an SKB around page fragments */
  408. static struct sk_buff *efx_rx_mk_skb(struct efx_channel *channel,
  409. struct efx_rx_buffer *rx_buf,
  410. unsigned int n_frags,
  411. u8 *eh, int hdr_len)
  412. {
  413. struct efx_nic *efx = channel->efx;
  414. struct sk_buff *skb;
  415. /* Allocate an SKB to store the headers */
  416. skb = netdev_alloc_skb(efx->net_dev,
  417. efx->rx_ip_align + efx->rx_prefix_size +
  418. hdr_len);
  419. if (unlikely(skb == NULL))
  420. return NULL;
  421. EFX_BUG_ON_PARANOID(rx_buf->len < hdr_len);
  422. memcpy(skb->data + efx->rx_ip_align, eh - efx->rx_prefix_size,
  423. efx->rx_prefix_size + hdr_len);
  424. skb_reserve(skb, efx->rx_ip_align + efx->rx_prefix_size);
  425. __skb_put(skb, hdr_len);
  426. /* Append the remaining page(s) onto the frag list */
  427. if (rx_buf->len > hdr_len) {
  428. rx_buf->page_offset += hdr_len;
  429. rx_buf->len -= hdr_len;
  430. for (;;) {
  431. skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
  432. rx_buf->page, rx_buf->page_offset,
  433. rx_buf->len);
  434. rx_buf->page = NULL;
  435. skb->len += rx_buf->len;
  436. skb->data_len += rx_buf->len;
  437. if (skb_shinfo(skb)->nr_frags == n_frags)
  438. break;
  439. rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
  440. }
  441. } else {
  442. __free_pages(rx_buf->page, efx->rx_buffer_order);
  443. rx_buf->page = NULL;
  444. n_frags = 0;
  445. }
  446. skb->truesize += n_frags * efx->rx_buffer_truesize;
  447. /* Move past the ethernet header */
  448. skb->protocol = eth_type_trans(skb, efx->net_dev);
  449. return skb;
  450. }
  451. void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
  452. unsigned int n_frags, unsigned int len, u16 flags)
  453. {
  454. struct efx_nic *efx = rx_queue->efx;
  455. struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
  456. struct efx_rx_buffer *rx_buf;
  457. rx_buf = efx_rx_buffer(rx_queue, index);
  458. rx_buf->flags |= flags;
  459. /* Validate the number of fragments and completed length */
  460. if (n_frags == 1) {
  461. if (!(flags & EFX_RX_PKT_PREFIX_LEN))
  462. efx_rx_packet__check_len(rx_queue, rx_buf, len);
  463. } else if (unlikely(n_frags > EFX_RX_MAX_FRAGS) ||
  464. unlikely(len <= (n_frags - 1) * efx->rx_dma_len) ||
  465. unlikely(len > n_frags * efx->rx_dma_len) ||
  466. unlikely(!efx->rx_scatter)) {
  467. /* If this isn't an explicit discard request, either
  468. * the hardware or the driver is broken.
  469. */
  470. WARN_ON(!(len == 0 && rx_buf->flags & EFX_RX_PKT_DISCARD));
  471. rx_buf->flags |= EFX_RX_PKT_DISCARD;
  472. }
  473. netif_vdbg(efx, rx_status, efx->net_dev,
  474. "RX queue %d received ids %x-%x len %d %s%s\n",
  475. efx_rx_queue_index(rx_queue), index,
  476. (index + n_frags - 1) & rx_queue->ptr_mask, len,
  477. (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "",
  478. (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : "");
  479. /* Discard packet, if instructed to do so. Process the
  480. * previous receive first.
  481. */
  482. if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) {
  483. efx_rx_flush_packet(channel);
  484. efx_discard_rx_packet(channel, rx_buf, n_frags);
  485. return;
  486. }
  487. if (n_frags == 1 && !(flags & EFX_RX_PKT_PREFIX_LEN))
  488. rx_buf->len = len;
  489. /* Release and/or sync the DMA mapping - assumes all RX buffers
  490. * consumed in-order per RX queue.
  491. */
  492. efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
  493. /* Prefetch nice and early so data will (hopefully) be in cache by
  494. * the time we look at it.
  495. */
  496. prefetch(efx_rx_buf_va(rx_buf));
  497. rx_buf->page_offset += efx->rx_prefix_size;
  498. rx_buf->len -= efx->rx_prefix_size;
  499. if (n_frags > 1) {
  500. /* Release/sync DMA mapping for additional fragments.
  501. * Fix length for last fragment.
  502. */
  503. unsigned int tail_frags = n_frags - 1;
  504. for (;;) {
  505. rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
  506. if (--tail_frags == 0)
  507. break;
  508. efx_sync_rx_buffer(efx, rx_buf, efx->rx_dma_len);
  509. }
  510. rx_buf->len = len - (n_frags - 1) * efx->rx_dma_len;
  511. efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
  512. }
  513. /* All fragments have been DMA-synced, so recycle pages. */
  514. rx_buf = efx_rx_buffer(rx_queue, index);
  515. efx_recycle_rx_pages(channel, rx_buf, n_frags);
  516. /* Pipeline receives so that we give time for packet headers to be
  517. * prefetched into cache.
  518. */
  519. efx_rx_flush_packet(channel);
  520. channel->rx_pkt_n_frags = n_frags;
  521. channel->rx_pkt_index = index;
  522. }
  523. static void efx_rx_deliver(struct efx_channel *channel, u8 *eh,
  524. struct efx_rx_buffer *rx_buf,
  525. unsigned int n_frags)
  526. {
  527. struct sk_buff *skb;
  528. u16 hdr_len = min_t(u16, rx_buf->len, EFX_SKB_HEADERS);
  529. skb = efx_rx_mk_skb(channel, rx_buf, n_frags, eh, hdr_len);
  530. if (unlikely(skb == NULL)) {
  531. efx_free_rx_buffer(rx_buf);
  532. return;
  533. }
  534. skb_record_rx_queue(skb, channel->rx_queue.core_index);
  535. /* Set the SKB flags */
  536. skb_checksum_none_assert(skb);
  537. if (likely(rx_buf->flags & EFX_RX_PKT_CSUMMED))
  538. skb->ip_summed = CHECKSUM_UNNECESSARY;
  539. efx_rx_skb_attach_timestamp(channel, skb);
  540. if (channel->type->receive_skb)
  541. if (channel->type->receive_skb(channel, skb))
  542. return;
  543. /* Pass the packet up */
  544. netif_receive_skb(skb);
  545. }
  546. /* Handle a received packet. Second half: Touches packet payload. */
  547. void __efx_rx_packet(struct efx_channel *channel)
  548. {
  549. struct efx_nic *efx = channel->efx;
  550. struct efx_rx_buffer *rx_buf =
  551. efx_rx_buffer(&channel->rx_queue, channel->rx_pkt_index);
  552. u8 *eh = efx_rx_buf_va(rx_buf);
  553. /* Read length from the prefix if necessary. This already
  554. * excludes the length of the prefix itself.
  555. */
  556. if (rx_buf->flags & EFX_RX_PKT_PREFIX_LEN)
  557. rx_buf->len = le16_to_cpup((__le16 *)
  558. (eh + efx->rx_packet_len_offset));
  559. /* If we're in loopback test, then pass the packet directly to the
  560. * loopback layer, and free the rx_buf here
  561. */
  562. if (unlikely(efx->loopback_selftest)) {
  563. efx_loopback_rx_packet(efx, eh, rx_buf->len);
  564. efx_free_rx_buffer(rx_buf);
  565. goto out;
  566. }
  567. if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
  568. rx_buf->flags &= ~EFX_RX_PKT_CSUMMED;
  569. if ((rx_buf->flags & EFX_RX_PKT_TCP) && !channel->type->receive_skb)
  570. efx_rx_packet_gro(channel, rx_buf, channel->rx_pkt_n_frags, eh);
  571. else
  572. efx_rx_deliver(channel, eh, rx_buf, channel->rx_pkt_n_frags);
  573. out:
  574. channel->rx_pkt_n_frags = 0;
  575. }
  576. int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
  577. {
  578. struct efx_nic *efx = rx_queue->efx;
  579. unsigned int entries;
  580. int rc;
  581. /* Create the smallest power-of-two aligned ring */
  582. entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
  583. EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
  584. rx_queue->ptr_mask = entries - 1;
  585. netif_dbg(efx, probe, efx->net_dev,
  586. "creating RX queue %d size %#x mask %#x\n",
  587. efx_rx_queue_index(rx_queue), efx->rxq_entries,
  588. rx_queue->ptr_mask);
  589. /* Allocate RX buffers */
  590. rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
  591. GFP_KERNEL);
  592. if (!rx_queue->buffer)
  593. return -ENOMEM;
  594. rc = efx_nic_probe_rx(rx_queue);
  595. if (rc) {
  596. kfree(rx_queue->buffer);
  597. rx_queue->buffer = NULL;
  598. }
  599. return rc;
  600. }
  601. static void efx_init_rx_recycle_ring(struct efx_nic *efx,
  602. struct efx_rx_queue *rx_queue)
  603. {
  604. unsigned int bufs_in_recycle_ring, page_ring_size;
  605. /* Set the RX recycle ring size */
  606. #ifdef CONFIG_PPC64
  607. bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
  608. #else
  609. if (iommu_present(&pci_bus_type))
  610. bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
  611. else
  612. bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_NOIOMMU;
  613. #endif /* CONFIG_PPC64 */
  614. page_ring_size = roundup_pow_of_two(bufs_in_recycle_ring /
  615. efx->rx_bufs_per_page);
  616. rx_queue->page_ring = kcalloc(page_ring_size,
  617. sizeof(*rx_queue->page_ring), GFP_KERNEL);
  618. rx_queue->page_ptr_mask = page_ring_size - 1;
  619. }
  620. void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
  621. {
  622. struct efx_nic *efx = rx_queue->efx;
  623. unsigned int max_fill, trigger, max_trigger;
  624. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  625. "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
  626. /* Initialise ptr fields */
  627. rx_queue->added_count = 0;
  628. rx_queue->notified_count = 0;
  629. rx_queue->removed_count = 0;
  630. rx_queue->min_fill = -1U;
  631. efx_init_rx_recycle_ring(efx, rx_queue);
  632. rx_queue->page_remove = 0;
  633. rx_queue->page_add = rx_queue->page_ptr_mask + 1;
  634. rx_queue->page_recycle_count = 0;
  635. rx_queue->page_recycle_failed = 0;
  636. rx_queue->page_recycle_full = 0;
  637. /* Initialise limit fields */
  638. max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
  639. max_trigger =
  640. max_fill - efx->rx_pages_per_batch * efx->rx_bufs_per_page;
  641. if (rx_refill_threshold != 0) {
  642. trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
  643. if (trigger > max_trigger)
  644. trigger = max_trigger;
  645. } else {
  646. trigger = max_trigger;
  647. }
  648. rx_queue->max_fill = max_fill;
  649. rx_queue->fast_fill_trigger = trigger;
  650. rx_queue->refill_enabled = true;
  651. /* Set up RX descriptor ring */
  652. efx_nic_init_rx(rx_queue);
  653. }
  654. void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
  655. {
  656. int i;
  657. struct efx_nic *efx = rx_queue->efx;
  658. struct efx_rx_buffer *rx_buf;
  659. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  660. "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
  661. del_timer_sync(&rx_queue->slow_fill);
  662. /* Release RX buffers from the current read ptr to the write ptr */
  663. if (rx_queue->buffer) {
  664. for (i = rx_queue->removed_count; i < rx_queue->added_count;
  665. i++) {
  666. unsigned index = i & rx_queue->ptr_mask;
  667. rx_buf = efx_rx_buffer(rx_queue, index);
  668. efx_fini_rx_buffer(rx_queue, rx_buf);
  669. }
  670. }
  671. /* Unmap and release the pages in the recycle ring. Remove the ring. */
  672. for (i = 0; i <= rx_queue->page_ptr_mask; i++) {
  673. struct page *page = rx_queue->page_ring[i];
  674. struct efx_rx_page_state *state;
  675. if (page == NULL)
  676. continue;
  677. state = page_address(page);
  678. dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
  679. PAGE_SIZE << efx->rx_buffer_order,
  680. DMA_FROM_DEVICE);
  681. put_page(page);
  682. }
  683. kfree(rx_queue->page_ring);
  684. rx_queue->page_ring = NULL;
  685. }
  686. void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
  687. {
  688. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  689. "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
  690. efx_nic_remove_rx(rx_queue);
  691. kfree(rx_queue->buffer);
  692. rx_queue->buffer = NULL;
  693. }
  694. module_param(rx_refill_threshold, uint, 0444);
  695. MODULE_PARM_DESC(rx_refill_threshold,
  696. "RX descriptor ring refill threshold (%)");
  697. #ifdef CONFIG_RFS_ACCEL
  698. int efx_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  699. u16 rxq_index, u32 flow_id)
  700. {
  701. struct efx_nic *efx = netdev_priv(net_dev);
  702. struct efx_channel *channel;
  703. struct efx_filter_spec spec;
  704. const __be16 *ports;
  705. __be16 ether_type;
  706. int nhoff;
  707. int rc;
  708. /* The core RPS/RFS code has already parsed and validated
  709. * VLAN, IP and transport headers. We assume they are in the
  710. * header area.
  711. */
  712. if (skb->protocol == htons(ETH_P_8021Q)) {
  713. const struct vlan_hdr *vh =
  714. (const struct vlan_hdr *)skb->data;
  715. /* We can't filter on the IP 5-tuple and the vlan
  716. * together, so just strip the vlan header and filter
  717. * on the IP part.
  718. */
  719. EFX_BUG_ON_PARANOID(skb_headlen(skb) < sizeof(*vh));
  720. ether_type = vh->h_vlan_encapsulated_proto;
  721. nhoff = sizeof(struct vlan_hdr);
  722. } else {
  723. ether_type = skb->protocol;
  724. nhoff = 0;
  725. }
  726. if (ether_type != htons(ETH_P_IP) && ether_type != htons(ETH_P_IPV6))
  727. return -EPROTONOSUPPORT;
  728. efx_filter_init_rx(&spec, EFX_FILTER_PRI_HINT,
  729. efx->rx_scatter ? EFX_FILTER_FLAG_RX_SCATTER : 0,
  730. rxq_index);
  731. spec.match_flags =
  732. EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
  733. EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
  734. EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
  735. spec.ether_type = ether_type;
  736. if (ether_type == htons(ETH_P_IP)) {
  737. const struct iphdr *ip =
  738. (const struct iphdr *)(skb->data + nhoff);
  739. EFX_BUG_ON_PARANOID(skb_headlen(skb) < nhoff + sizeof(*ip));
  740. if (ip_is_fragment(ip))
  741. return -EPROTONOSUPPORT;
  742. spec.ip_proto = ip->protocol;
  743. spec.rem_host[0] = ip->saddr;
  744. spec.loc_host[0] = ip->daddr;
  745. EFX_BUG_ON_PARANOID(skb_headlen(skb) < nhoff + 4 * ip->ihl + 4);
  746. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  747. } else {
  748. const struct ipv6hdr *ip6 =
  749. (const struct ipv6hdr *)(skb->data + nhoff);
  750. EFX_BUG_ON_PARANOID(skb_headlen(skb) <
  751. nhoff + sizeof(*ip6) + 4);
  752. spec.ip_proto = ip6->nexthdr;
  753. memcpy(spec.rem_host, &ip6->saddr, sizeof(ip6->saddr));
  754. memcpy(spec.loc_host, &ip6->daddr, sizeof(ip6->daddr));
  755. ports = (const __be16 *)(ip6 + 1);
  756. }
  757. spec.rem_port = ports[0];
  758. spec.loc_port = ports[1];
  759. rc = efx->type->filter_rfs_insert(efx, &spec);
  760. if (rc < 0)
  761. return rc;
  762. /* Remember this so we can check whether to expire the filter later */
  763. efx->rps_flow_id[rc] = flow_id;
  764. channel = efx_get_channel(efx, skb_get_rx_queue(skb));
  765. ++channel->rfs_filters_added;
  766. if (ether_type == htons(ETH_P_IP))
  767. netif_info(efx, rx_status, efx->net_dev,
  768. "steering %s %pI4:%u:%pI4:%u to queue %u [flow %u filter %d]\n",
  769. (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
  770. spec.rem_host, ntohs(ports[0]), spec.loc_host,
  771. ntohs(ports[1]), rxq_index, flow_id, rc);
  772. else
  773. netif_info(efx, rx_status, efx->net_dev,
  774. "steering %s [%pI6]:%u:[%pI6]:%u to queue %u [flow %u filter %d]\n",
  775. (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
  776. spec.rem_host, ntohs(ports[0]), spec.loc_host,
  777. ntohs(ports[1]), rxq_index, flow_id, rc);
  778. return rc;
  779. }
  780. bool __efx_filter_rfs_expire(struct efx_nic *efx, unsigned int quota)
  781. {
  782. bool (*expire_one)(struct efx_nic *efx, u32 flow_id, unsigned int index);
  783. unsigned int index, size;
  784. u32 flow_id;
  785. if (!spin_trylock_bh(&efx->filter_lock))
  786. return false;
  787. expire_one = efx->type->filter_rfs_expire_one;
  788. index = efx->rps_expire_index;
  789. size = efx->type->max_rx_ip_filters;
  790. while (quota--) {
  791. flow_id = efx->rps_flow_id[index];
  792. if (expire_one(efx, flow_id, index))
  793. netif_info(efx, rx_status, efx->net_dev,
  794. "expired filter %d [flow %u]\n",
  795. index, flow_id);
  796. if (++index == size)
  797. index = 0;
  798. }
  799. efx->rps_expire_index = index;
  800. spin_unlock_bh(&efx->filter_lock);
  801. return true;
  802. }
  803. #endif /* CONFIG_RFS_ACCEL */
  804. /**
  805. * efx_filter_is_mc_recipient - test whether spec is a multicast recipient
  806. * @spec: Specification to test
  807. *
  808. * Return: %true if the specification is a non-drop RX filter that
  809. * matches a local MAC address I/G bit value of 1 or matches a local
  810. * IPv4 or IPv6 address value in the respective multicast address
  811. * range. Otherwise %false.
  812. */
  813. bool efx_filter_is_mc_recipient(const struct efx_filter_spec *spec)
  814. {
  815. if (!(spec->flags & EFX_FILTER_FLAG_RX) ||
  816. spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP)
  817. return false;
  818. if (spec->match_flags &
  819. (EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_LOC_MAC_IG) &&
  820. is_multicast_ether_addr(spec->loc_mac))
  821. return true;
  822. if ((spec->match_flags &
  823. (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) ==
  824. (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) {
  825. if (spec->ether_type == htons(ETH_P_IP) &&
  826. ipv4_is_multicast(spec->loc_host[0]))
  827. return true;
  828. if (spec->ether_type == htons(ETH_P_IPV6) &&
  829. ((const u8 *)spec->loc_host)[0] == 0xff)
  830. return true;
  831. }
  832. return false;
  833. }