i40e_lan_hmc.c 30 KB

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  1. /*******************************************************************************
  2. *
  3. * Intel Ethernet Controller XL710 Family Linux Driver
  4. * Copyright(c) 2013 - 2014 Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along
  16. * with this program. If not, see <http://www.gnu.org/licenses/>.
  17. *
  18. * The full GNU General Public License is included in this distribution in
  19. * the file called "COPYING".
  20. *
  21. * Contact Information:
  22. * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. ******************************************************************************/
  26. #include "i40e_osdep.h"
  27. #include "i40e_register.h"
  28. #include "i40e_type.h"
  29. #include "i40e_hmc.h"
  30. #include "i40e_lan_hmc.h"
  31. #include "i40e_prototype.h"
  32. /* lan specific interface functions */
  33. /**
  34. * i40e_align_l2obj_base - aligns base object pointer to 512 bytes
  35. * @offset: base address offset needing alignment
  36. *
  37. * Aligns the layer 2 function private memory so it's 512-byte aligned.
  38. **/
  39. static u64 i40e_align_l2obj_base(u64 offset)
  40. {
  41. u64 aligned_offset = offset;
  42. if ((offset % I40E_HMC_L2OBJ_BASE_ALIGNMENT) > 0)
  43. aligned_offset += (I40E_HMC_L2OBJ_BASE_ALIGNMENT -
  44. (offset % I40E_HMC_L2OBJ_BASE_ALIGNMENT));
  45. return aligned_offset;
  46. }
  47. /**
  48. * i40e_calculate_l2fpm_size - calculates layer 2 FPM memory size
  49. * @txq_num: number of Tx queues needing backing context
  50. * @rxq_num: number of Rx queues needing backing context
  51. * @fcoe_cntx_num: amount of FCoE statefull contexts needing backing context
  52. * @fcoe_filt_num: number of FCoE filters needing backing context
  53. *
  54. * Calculates the maximum amount of memory for the function required, based
  55. * on the number of resources it must provide context for.
  56. **/
  57. static u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num,
  58. u32 fcoe_cntx_num, u32 fcoe_filt_num)
  59. {
  60. u64 fpm_size = 0;
  61. fpm_size = txq_num * I40E_HMC_OBJ_SIZE_TXQ;
  62. fpm_size = i40e_align_l2obj_base(fpm_size);
  63. fpm_size += (rxq_num * I40E_HMC_OBJ_SIZE_RXQ);
  64. fpm_size = i40e_align_l2obj_base(fpm_size);
  65. fpm_size += (fcoe_cntx_num * I40E_HMC_OBJ_SIZE_FCOE_CNTX);
  66. fpm_size = i40e_align_l2obj_base(fpm_size);
  67. fpm_size += (fcoe_filt_num * I40E_HMC_OBJ_SIZE_FCOE_FILT);
  68. fpm_size = i40e_align_l2obj_base(fpm_size);
  69. return fpm_size;
  70. }
  71. /**
  72. * i40e_init_lan_hmc - initialize i40e_hmc_info struct
  73. * @hw: pointer to the HW structure
  74. * @txq_num: number of Tx queues needing backing context
  75. * @rxq_num: number of Rx queues needing backing context
  76. * @fcoe_cntx_num: amount of FCoE statefull contexts needing backing context
  77. * @fcoe_filt_num: number of FCoE filters needing backing context
  78. *
  79. * This function will be called once per physical function initialization.
  80. * It will fill out the i40e_hmc_obj_info structure for LAN objects based on
  81. * the driver's provided input, as well as information from the HMC itself
  82. * loaded from NVRAM.
  83. *
  84. * Assumptions:
  85. * - HMC Resource Profile has been selected before calling this function.
  86. **/
  87. i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,
  88. u32 rxq_num, u32 fcoe_cntx_num,
  89. u32 fcoe_filt_num)
  90. {
  91. struct i40e_hmc_obj_info *obj, *full_obj;
  92. i40e_status ret_code = 0;
  93. u64 l2fpm_size;
  94. u32 size_exp;
  95. hw->hmc.signature = I40E_HMC_INFO_SIGNATURE;
  96. hw->hmc.hmc_fn_id = hw->pf_id;
  97. /* allocate memory for hmc_obj */
  98. ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem,
  99. sizeof(struct i40e_hmc_obj_info) * I40E_HMC_LAN_MAX);
  100. if (ret_code)
  101. goto init_lan_hmc_out;
  102. hw->hmc.hmc_obj = (struct i40e_hmc_obj_info *)
  103. hw->hmc.hmc_obj_virt_mem.va;
  104. /* The full object will be used to create the LAN HMC SD */
  105. full_obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_FULL];
  106. full_obj->max_cnt = 0;
  107. full_obj->cnt = 0;
  108. full_obj->base = 0;
  109. full_obj->size = 0;
  110. /* Tx queue context information */
  111. obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX];
  112. obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX);
  113. obj->cnt = txq_num;
  114. obj->base = 0;
  115. size_exp = rd32(hw, I40E_GLHMC_LANTXOBJSZ);
  116. obj->size = (u64)1 << size_exp;
  117. /* validate values requested by driver don't exceed HMC capacity */
  118. if (txq_num > obj->max_cnt) {
  119. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  120. hw_dbg(hw, "i40e_init_lan_hmc: Tx context: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
  121. txq_num, obj->max_cnt, ret_code);
  122. goto init_lan_hmc_out;
  123. }
  124. /* aggregate values into the full LAN object for later */
  125. full_obj->max_cnt += obj->max_cnt;
  126. full_obj->cnt += obj->cnt;
  127. /* Rx queue context information */
  128. obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX];
  129. obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX);
  130. obj->cnt = rxq_num;
  131. obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_TX].base +
  132. (hw->hmc.hmc_obj[I40E_HMC_LAN_TX].cnt *
  133. hw->hmc.hmc_obj[I40E_HMC_LAN_TX].size);
  134. obj->base = i40e_align_l2obj_base(obj->base);
  135. size_exp = rd32(hw, I40E_GLHMC_LANRXOBJSZ);
  136. obj->size = (u64)1 << size_exp;
  137. /* validate values requested by driver don't exceed HMC capacity */
  138. if (rxq_num > obj->max_cnt) {
  139. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  140. hw_dbg(hw, "i40e_init_lan_hmc: Rx context: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
  141. rxq_num, obj->max_cnt, ret_code);
  142. goto init_lan_hmc_out;
  143. }
  144. /* aggregate values into the full LAN object for later */
  145. full_obj->max_cnt += obj->max_cnt;
  146. full_obj->cnt += obj->cnt;
  147. /* FCoE context information */
  148. obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX];
  149. obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEMAX);
  150. obj->cnt = fcoe_cntx_num;
  151. obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_RX].base +
  152. (hw->hmc.hmc_obj[I40E_HMC_LAN_RX].cnt *
  153. hw->hmc.hmc_obj[I40E_HMC_LAN_RX].size);
  154. obj->base = i40e_align_l2obj_base(obj->base);
  155. size_exp = rd32(hw, I40E_GLHMC_FCOEDDPOBJSZ);
  156. obj->size = (u64)1 << size_exp;
  157. /* validate values requested by driver don't exceed HMC capacity */
  158. if (fcoe_cntx_num > obj->max_cnt) {
  159. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  160. hw_dbg(hw, "i40e_init_lan_hmc: FCoE context: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
  161. fcoe_cntx_num, obj->max_cnt, ret_code);
  162. goto init_lan_hmc_out;
  163. }
  164. /* aggregate values into the full LAN object for later */
  165. full_obj->max_cnt += obj->max_cnt;
  166. full_obj->cnt += obj->cnt;
  167. /* FCoE filter information */
  168. obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT];
  169. obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEFMAX);
  170. obj->cnt = fcoe_filt_num;
  171. obj->base = hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].base +
  172. (hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].cnt *
  173. hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].size);
  174. obj->base = i40e_align_l2obj_base(obj->base);
  175. size_exp = rd32(hw, I40E_GLHMC_FCOEFOBJSZ);
  176. obj->size = (u64)1 << size_exp;
  177. /* validate values requested by driver don't exceed HMC capacity */
  178. if (fcoe_filt_num > obj->max_cnt) {
  179. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  180. hw_dbg(hw, "i40e_init_lan_hmc: FCoE filter: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
  181. fcoe_filt_num, obj->max_cnt, ret_code);
  182. goto init_lan_hmc_out;
  183. }
  184. /* aggregate values into the full LAN object for later */
  185. full_obj->max_cnt += obj->max_cnt;
  186. full_obj->cnt += obj->cnt;
  187. hw->hmc.first_sd_index = 0;
  188. hw->hmc.sd_table.ref_cnt = 0;
  189. l2fpm_size = i40e_calculate_l2fpm_size(txq_num, rxq_num, fcoe_cntx_num,
  190. fcoe_filt_num);
  191. if (NULL == hw->hmc.sd_table.sd_entry) {
  192. hw->hmc.sd_table.sd_cnt = (u32)
  193. (l2fpm_size + I40E_HMC_DIRECT_BP_SIZE - 1) /
  194. I40E_HMC_DIRECT_BP_SIZE;
  195. /* allocate the sd_entry members in the sd_table */
  196. ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.sd_table.addr,
  197. (sizeof(struct i40e_hmc_sd_entry) *
  198. hw->hmc.sd_table.sd_cnt));
  199. if (ret_code)
  200. goto init_lan_hmc_out;
  201. hw->hmc.sd_table.sd_entry =
  202. (struct i40e_hmc_sd_entry *)hw->hmc.sd_table.addr.va;
  203. }
  204. /* store in the LAN full object for later */
  205. full_obj->size = l2fpm_size;
  206. init_lan_hmc_out:
  207. return ret_code;
  208. }
  209. /**
  210. * i40e_remove_pd_page - Remove a page from the page descriptor table
  211. * @hw: pointer to the HW structure
  212. * @hmc_info: pointer to the HMC configuration information structure
  213. * @idx: segment descriptor index to find the relevant page descriptor
  214. *
  215. * This function:
  216. * 1. Marks the entry in pd table (for paged address mode) invalid
  217. * 2. write to register PMPDINV to invalidate the backing page in FV cache
  218. * 3. Decrement the ref count for pd_entry
  219. * assumptions:
  220. * 1. caller can deallocate the memory used by pd after this function
  221. * returns.
  222. **/
  223. static i40e_status i40e_remove_pd_page(struct i40e_hw *hw,
  224. struct i40e_hmc_info *hmc_info,
  225. u32 idx)
  226. {
  227. i40e_status ret_code = 0;
  228. if (!i40e_prep_remove_pd_page(hmc_info, idx))
  229. ret_code = i40e_remove_pd_page_new(hw, hmc_info, idx, true);
  230. return ret_code;
  231. }
  232. /**
  233. * i40e_remove_sd_bp - remove a backing page from a segment descriptor
  234. * @hw: pointer to our HW structure
  235. * @hmc_info: pointer to the HMC configuration information structure
  236. * @idx: the page index
  237. *
  238. * This function:
  239. * 1. Marks the entry in sd table (for direct address mode) invalid
  240. * 2. write to register PMSDCMD, PMSDDATALOW(PMSDDATALOW.PMSDVALID set
  241. * to 0) and PMSDDATAHIGH to invalidate the sd page
  242. * 3. Decrement the ref count for the sd_entry
  243. * assumptions:
  244. * 1. caller can deallocate the memory used by backing storage after this
  245. * function returns.
  246. **/
  247. static i40e_status i40e_remove_sd_bp(struct i40e_hw *hw,
  248. struct i40e_hmc_info *hmc_info,
  249. u32 idx)
  250. {
  251. i40e_status ret_code = 0;
  252. if (!i40e_prep_remove_sd_bp(hmc_info, idx))
  253. ret_code = i40e_remove_sd_bp_new(hw, hmc_info, idx, true);
  254. return ret_code;
  255. }
  256. /**
  257. * i40e_create_lan_hmc_object - allocate backing store for hmc objects
  258. * @hw: pointer to the HW structure
  259. * @info: pointer to i40e_hmc_create_obj_info struct
  260. *
  261. * This will allocate memory for PDs and backing pages and populate
  262. * the sd and pd entries.
  263. **/
  264. static i40e_status i40e_create_lan_hmc_object(struct i40e_hw *hw,
  265. struct i40e_hmc_lan_create_obj_info *info)
  266. {
  267. i40e_status ret_code = 0;
  268. struct i40e_hmc_sd_entry *sd_entry;
  269. u32 pd_idx1 = 0, pd_lmt1 = 0;
  270. u32 pd_idx = 0, pd_lmt = 0;
  271. bool pd_error = false;
  272. u32 sd_idx, sd_lmt;
  273. u64 sd_size;
  274. u32 i, j;
  275. if (NULL == info) {
  276. ret_code = I40E_ERR_BAD_PTR;
  277. hw_dbg(hw, "i40e_create_lan_hmc_object: bad info ptr\n");
  278. goto exit;
  279. }
  280. if (NULL == info->hmc_info) {
  281. ret_code = I40E_ERR_BAD_PTR;
  282. hw_dbg(hw, "i40e_create_lan_hmc_object: bad hmc_info ptr\n");
  283. goto exit;
  284. }
  285. if (I40E_HMC_INFO_SIGNATURE != info->hmc_info->signature) {
  286. ret_code = I40E_ERR_BAD_PTR;
  287. hw_dbg(hw, "i40e_create_lan_hmc_object: bad signature\n");
  288. goto exit;
  289. }
  290. if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
  291. ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX;
  292. hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n",
  293. ret_code);
  294. goto exit;
  295. }
  296. if ((info->start_idx + info->count) >
  297. info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
  298. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  299. hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n",
  300. ret_code);
  301. goto exit;
  302. }
  303. /* find sd index and limit */
  304. I40E_FIND_SD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
  305. info->start_idx, info->count,
  306. &sd_idx, &sd_lmt);
  307. if (sd_idx >= info->hmc_info->sd_table.sd_cnt ||
  308. sd_lmt > info->hmc_info->sd_table.sd_cnt) {
  309. ret_code = I40E_ERR_INVALID_SD_INDEX;
  310. goto exit;
  311. }
  312. /* find pd index */
  313. I40E_FIND_PD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
  314. info->start_idx, info->count, &pd_idx,
  315. &pd_lmt);
  316. /* This is to cover for cases where you may not want to have an SD with
  317. * the full 2M memory but something smaller. By not filling out any
  318. * size, the function will default the SD size to be 2M.
  319. */
  320. if (info->direct_mode_sz == 0)
  321. sd_size = I40E_HMC_DIRECT_BP_SIZE;
  322. else
  323. sd_size = info->direct_mode_sz;
  324. /* check if all the sds are valid. If not, allocate a page and
  325. * initialize it.
  326. */
  327. for (j = sd_idx; j < sd_lmt; j++) {
  328. /* update the sd table entry */
  329. ret_code = i40e_add_sd_table_entry(hw, info->hmc_info, j,
  330. info->entry_type,
  331. sd_size);
  332. if (ret_code)
  333. goto exit_sd_error;
  334. sd_entry = &info->hmc_info->sd_table.sd_entry[j];
  335. if (I40E_SD_TYPE_PAGED == sd_entry->entry_type) {
  336. /* check if all the pds in this sd are valid. If not,
  337. * allocate a page and initialize it.
  338. */
  339. /* find pd_idx and pd_lmt in this sd */
  340. pd_idx1 = max(pd_idx, (j * I40E_HMC_MAX_BP_COUNT));
  341. pd_lmt1 = min(pd_lmt,
  342. ((j + 1) * I40E_HMC_MAX_BP_COUNT));
  343. for (i = pd_idx1; i < pd_lmt1; i++) {
  344. /* update the pd table entry */
  345. ret_code = i40e_add_pd_table_entry(hw,
  346. info->hmc_info,
  347. i);
  348. if (ret_code) {
  349. pd_error = true;
  350. break;
  351. }
  352. }
  353. if (pd_error) {
  354. /* remove the backing pages from pd_idx1 to i */
  355. while (i && (i > pd_idx1)) {
  356. i40e_remove_pd_bp(hw, info->hmc_info,
  357. (i - 1));
  358. i--;
  359. }
  360. }
  361. }
  362. if (!sd_entry->valid) {
  363. sd_entry->valid = true;
  364. switch (sd_entry->entry_type) {
  365. case I40E_SD_TYPE_PAGED:
  366. I40E_SET_PF_SD_ENTRY(hw,
  367. sd_entry->u.pd_table.pd_page_addr.pa,
  368. j, sd_entry->entry_type);
  369. break;
  370. case I40E_SD_TYPE_DIRECT:
  371. I40E_SET_PF_SD_ENTRY(hw, sd_entry->u.bp.addr.pa,
  372. j, sd_entry->entry_type);
  373. break;
  374. default:
  375. ret_code = I40E_ERR_INVALID_SD_TYPE;
  376. goto exit;
  377. break;
  378. }
  379. }
  380. }
  381. goto exit;
  382. exit_sd_error:
  383. /* cleanup for sd entries from j to sd_idx */
  384. while (j && (j > sd_idx)) {
  385. sd_entry = &info->hmc_info->sd_table.sd_entry[j - 1];
  386. switch (sd_entry->entry_type) {
  387. case I40E_SD_TYPE_PAGED:
  388. pd_idx1 = max(pd_idx,
  389. ((j - 1) * I40E_HMC_MAX_BP_COUNT));
  390. pd_lmt1 = min(pd_lmt, (j * I40E_HMC_MAX_BP_COUNT));
  391. for (i = pd_idx1; i < pd_lmt1; i++) {
  392. i40e_remove_pd_bp(hw, info->hmc_info, i);
  393. }
  394. i40e_remove_pd_page(hw, info->hmc_info, (j - 1));
  395. break;
  396. case I40E_SD_TYPE_DIRECT:
  397. i40e_remove_sd_bp(hw, info->hmc_info, (j - 1));
  398. break;
  399. default:
  400. ret_code = I40E_ERR_INVALID_SD_TYPE;
  401. break;
  402. }
  403. j--;
  404. }
  405. exit:
  406. return ret_code;
  407. }
  408. /**
  409. * i40e_configure_lan_hmc - prepare the HMC backing store
  410. * @hw: pointer to the hw structure
  411. * @model: the model for the layout of the SD/PD tables
  412. *
  413. * - This function will be called once per physical function initialization.
  414. * - This function will be called after i40e_init_lan_hmc() and before
  415. * any LAN/FCoE HMC objects can be created.
  416. **/
  417. i40e_status i40e_configure_lan_hmc(struct i40e_hw *hw,
  418. enum i40e_hmc_model model)
  419. {
  420. struct i40e_hmc_lan_create_obj_info info;
  421. i40e_status ret_code = 0;
  422. u8 hmc_fn_id = hw->hmc.hmc_fn_id;
  423. struct i40e_hmc_obj_info *obj;
  424. /* Initialize part of the create object info struct */
  425. info.hmc_info = &hw->hmc;
  426. info.rsrc_type = I40E_HMC_LAN_FULL;
  427. info.start_idx = 0;
  428. info.direct_mode_sz = hw->hmc.hmc_obj[I40E_HMC_LAN_FULL].size;
  429. /* Build the SD entry for the LAN objects */
  430. switch (model) {
  431. case I40E_HMC_MODEL_DIRECT_PREFERRED:
  432. case I40E_HMC_MODEL_DIRECT_ONLY:
  433. info.entry_type = I40E_SD_TYPE_DIRECT;
  434. /* Make one big object, a single SD */
  435. info.count = 1;
  436. ret_code = i40e_create_lan_hmc_object(hw, &info);
  437. if (ret_code && (model == I40E_HMC_MODEL_DIRECT_PREFERRED))
  438. goto try_type_paged;
  439. else if (ret_code)
  440. goto configure_lan_hmc_out;
  441. /* else clause falls through the break */
  442. break;
  443. case I40E_HMC_MODEL_PAGED_ONLY:
  444. try_type_paged:
  445. info.entry_type = I40E_SD_TYPE_PAGED;
  446. /* Make one big object in the PD table */
  447. info.count = 1;
  448. ret_code = i40e_create_lan_hmc_object(hw, &info);
  449. if (ret_code)
  450. goto configure_lan_hmc_out;
  451. break;
  452. default:
  453. /* unsupported type */
  454. ret_code = I40E_ERR_INVALID_SD_TYPE;
  455. hw_dbg(hw, "i40e_configure_lan_hmc: Unknown SD type: %d\n",
  456. ret_code);
  457. goto configure_lan_hmc_out;
  458. break;
  459. }
  460. /* Configure and program the FPM registers so objects can be created */
  461. /* Tx contexts */
  462. obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX];
  463. wr32(hw, I40E_GLHMC_LANTXBASE(hmc_fn_id),
  464. (u32)((obj->base & I40E_GLHMC_LANTXBASE_FPMLANTXBASE_MASK) / 512));
  465. wr32(hw, I40E_GLHMC_LANTXCNT(hmc_fn_id), obj->cnt);
  466. /* Rx contexts */
  467. obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX];
  468. wr32(hw, I40E_GLHMC_LANRXBASE(hmc_fn_id),
  469. (u32)((obj->base & I40E_GLHMC_LANRXBASE_FPMLANRXBASE_MASK) / 512));
  470. wr32(hw, I40E_GLHMC_LANRXCNT(hmc_fn_id), obj->cnt);
  471. /* FCoE contexts */
  472. obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX];
  473. wr32(hw, I40E_GLHMC_FCOEDDPBASE(hmc_fn_id),
  474. (u32)((obj->base & I40E_GLHMC_FCOEDDPBASE_FPMFCOEDDPBASE_MASK) / 512));
  475. wr32(hw, I40E_GLHMC_FCOEDDPCNT(hmc_fn_id), obj->cnt);
  476. /* FCoE filters */
  477. obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT];
  478. wr32(hw, I40E_GLHMC_FCOEFBASE(hmc_fn_id),
  479. (u32)((obj->base & I40E_GLHMC_FCOEFBASE_FPMFCOEFBASE_MASK) / 512));
  480. wr32(hw, I40E_GLHMC_FCOEFCNT(hmc_fn_id), obj->cnt);
  481. configure_lan_hmc_out:
  482. return ret_code;
  483. }
  484. /**
  485. * i40e_delete_hmc_object - remove hmc objects
  486. * @hw: pointer to the HW structure
  487. * @info: pointer to i40e_hmc_delete_obj_info struct
  488. *
  489. * This will de-populate the SDs and PDs. It frees
  490. * the memory for PDS and backing storage. After this function is returned,
  491. * caller should deallocate memory allocated previously for
  492. * book-keeping information about PDs and backing storage.
  493. **/
  494. static i40e_status i40e_delete_lan_hmc_object(struct i40e_hw *hw,
  495. struct i40e_hmc_lan_delete_obj_info *info)
  496. {
  497. i40e_status ret_code = 0;
  498. struct i40e_hmc_pd_table *pd_table;
  499. u32 pd_idx, pd_lmt, rel_pd_idx;
  500. u32 sd_idx, sd_lmt;
  501. u32 i, j;
  502. if (NULL == info) {
  503. ret_code = I40E_ERR_BAD_PTR;
  504. hw_dbg(hw, "i40e_delete_hmc_object: bad info ptr\n");
  505. goto exit;
  506. }
  507. if (NULL == info->hmc_info) {
  508. ret_code = I40E_ERR_BAD_PTR;
  509. hw_dbg(hw, "i40e_delete_hmc_object: bad info->hmc_info ptr\n");
  510. goto exit;
  511. }
  512. if (I40E_HMC_INFO_SIGNATURE != info->hmc_info->signature) {
  513. ret_code = I40E_ERR_BAD_PTR;
  514. hw_dbg(hw, "i40e_delete_hmc_object: bad hmc_info->signature\n");
  515. goto exit;
  516. }
  517. if (NULL == info->hmc_info->sd_table.sd_entry) {
  518. ret_code = I40E_ERR_BAD_PTR;
  519. hw_dbg(hw, "i40e_delete_hmc_object: bad sd_entry\n");
  520. goto exit;
  521. }
  522. if (NULL == info->hmc_info->hmc_obj) {
  523. ret_code = I40E_ERR_BAD_PTR;
  524. hw_dbg(hw, "i40e_delete_hmc_object: bad hmc_info->hmc_obj\n");
  525. goto exit;
  526. }
  527. if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
  528. ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX;
  529. hw_dbg(hw, "i40e_delete_hmc_object: returns error %d\n",
  530. ret_code);
  531. goto exit;
  532. }
  533. if ((info->start_idx + info->count) >
  534. info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
  535. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  536. hw_dbg(hw, "i40e_delete_hmc_object: returns error %d\n",
  537. ret_code);
  538. goto exit;
  539. }
  540. I40E_FIND_PD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
  541. info->start_idx, info->count, &pd_idx,
  542. &pd_lmt);
  543. for (j = pd_idx; j < pd_lmt; j++) {
  544. sd_idx = j / I40E_HMC_PD_CNT_IN_SD;
  545. if (I40E_SD_TYPE_PAGED !=
  546. info->hmc_info->sd_table.sd_entry[sd_idx].entry_type)
  547. continue;
  548. rel_pd_idx = j % I40E_HMC_PD_CNT_IN_SD;
  549. pd_table =
  550. &info->hmc_info->sd_table.sd_entry[sd_idx].u.pd_table;
  551. if (pd_table->pd_entry[rel_pd_idx].valid) {
  552. ret_code = i40e_remove_pd_bp(hw, info->hmc_info, j);
  553. if (ret_code)
  554. goto exit;
  555. }
  556. }
  557. /* find sd index and limit */
  558. I40E_FIND_SD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
  559. info->start_idx, info->count,
  560. &sd_idx, &sd_lmt);
  561. if (sd_idx >= info->hmc_info->sd_table.sd_cnt ||
  562. sd_lmt > info->hmc_info->sd_table.sd_cnt) {
  563. ret_code = I40E_ERR_INVALID_SD_INDEX;
  564. goto exit;
  565. }
  566. for (i = sd_idx; i < sd_lmt; i++) {
  567. if (!info->hmc_info->sd_table.sd_entry[i].valid)
  568. continue;
  569. switch (info->hmc_info->sd_table.sd_entry[i].entry_type) {
  570. case I40E_SD_TYPE_DIRECT:
  571. ret_code = i40e_remove_sd_bp(hw, info->hmc_info, i);
  572. if (ret_code)
  573. goto exit;
  574. break;
  575. case I40E_SD_TYPE_PAGED:
  576. ret_code = i40e_remove_pd_page(hw, info->hmc_info, i);
  577. if (ret_code)
  578. goto exit;
  579. break;
  580. default:
  581. break;
  582. }
  583. }
  584. exit:
  585. return ret_code;
  586. }
  587. /**
  588. * i40e_shutdown_lan_hmc - Remove HMC backing store, free allocated memory
  589. * @hw: pointer to the hw structure
  590. *
  591. * This must be called by drivers as they are shutting down and being
  592. * removed from the OS.
  593. **/
  594. i40e_status i40e_shutdown_lan_hmc(struct i40e_hw *hw)
  595. {
  596. struct i40e_hmc_lan_delete_obj_info info;
  597. i40e_status ret_code;
  598. info.hmc_info = &hw->hmc;
  599. info.rsrc_type = I40E_HMC_LAN_FULL;
  600. info.start_idx = 0;
  601. info.count = 1;
  602. /* delete the object */
  603. ret_code = i40e_delete_lan_hmc_object(hw, &info);
  604. /* free the SD table entry for LAN */
  605. i40e_free_virt_mem(hw, &hw->hmc.sd_table.addr);
  606. hw->hmc.sd_table.sd_cnt = 0;
  607. hw->hmc.sd_table.sd_entry = NULL;
  608. /* free memory used for hmc_obj */
  609. i40e_free_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem);
  610. hw->hmc.hmc_obj = NULL;
  611. return ret_code;
  612. }
  613. #define I40E_HMC_STORE(_struct, _ele) \
  614. offsetof(struct _struct, _ele), \
  615. FIELD_SIZEOF(struct _struct, _ele)
  616. struct i40e_context_ele {
  617. u16 offset;
  618. u16 size_of;
  619. u16 width;
  620. u16 lsb;
  621. };
  622. /* LAN Tx Queue Context */
  623. static struct i40e_context_ele i40e_hmc_txq_ce_info[] = {
  624. /* Field Width LSB */
  625. {I40E_HMC_STORE(i40e_hmc_obj_txq, head), 13, 0 },
  626. {I40E_HMC_STORE(i40e_hmc_obj_txq, new_context), 1, 30 },
  627. {I40E_HMC_STORE(i40e_hmc_obj_txq, base), 57, 32 },
  628. {I40E_HMC_STORE(i40e_hmc_obj_txq, fc_ena), 1, 89 },
  629. {I40E_HMC_STORE(i40e_hmc_obj_txq, timesync_ena), 1, 90 },
  630. {I40E_HMC_STORE(i40e_hmc_obj_txq, fd_ena), 1, 91 },
  631. {I40E_HMC_STORE(i40e_hmc_obj_txq, alt_vlan_ena), 1, 92 },
  632. {I40E_HMC_STORE(i40e_hmc_obj_txq, cpuid), 8, 96 },
  633. /* line 1 */
  634. {I40E_HMC_STORE(i40e_hmc_obj_txq, thead_wb), 13, 0 + 128 },
  635. {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_ena), 1, 32 + 128 },
  636. {I40E_HMC_STORE(i40e_hmc_obj_txq, qlen), 13, 33 + 128 },
  637. {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrdesc_ena), 1, 46 + 128 },
  638. {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrpacket_ena), 1, 47 + 128 },
  639. {I40E_HMC_STORE(i40e_hmc_obj_txq, tphwdesc_ena), 1, 48 + 128 },
  640. {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_addr), 64, 64 + 128 },
  641. /* line 7 */
  642. {I40E_HMC_STORE(i40e_hmc_obj_txq, crc), 32, 0 + (7 * 128) },
  643. {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist), 10, 84 + (7 * 128) },
  644. {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist_act), 1, 94 + (7 * 128) },
  645. { 0 }
  646. };
  647. /* LAN Rx Queue Context */
  648. static struct i40e_context_ele i40e_hmc_rxq_ce_info[] = {
  649. /* Field Width LSB */
  650. { I40E_HMC_STORE(i40e_hmc_obj_rxq, head), 13, 0 },
  651. { I40E_HMC_STORE(i40e_hmc_obj_rxq, cpuid), 8, 13 },
  652. { I40E_HMC_STORE(i40e_hmc_obj_rxq, base), 57, 32 },
  653. { I40E_HMC_STORE(i40e_hmc_obj_rxq, qlen), 13, 89 },
  654. { I40E_HMC_STORE(i40e_hmc_obj_rxq, dbuff), 7, 102 },
  655. { I40E_HMC_STORE(i40e_hmc_obj_rxq, hbuff), 5, 109 },
  656. { I40E_HMC_STORE(i40e_hmc_obj_rxq, dtype), 2, 114 },
  657. { I40E_HMC_STORE(i40e_hmc_obj_rxq, dsize), 1, 116 },
  658. { I40E_HMC_STORE(i40e_hmc_obj_rxq, crcstrip), 1, 117 },
  659. { I40E_HMC_STORE(i40e_hmc_obj_rxq, fc_ena), 1, 118 },
  660. { I40E_HMC_STORE(i40e_hmc_obj_rxq, l2tsel), 1, 119 },
  661. { I40E_HMC_STORE(i40e_hmc_obj_rxq, hsplit_0), 4, 120 },
  662. { I40E_HMC_STORE(i40e_hmc_obj_rxq, hsplit_1), 2, 124 },
  663. { I40E_HMC_STORE(i40e_hmc_obj_rxq, showiv), 1, 127 },
  664. { I40E_HMC_STORE(i40e_hmc_obj_rxq, rxmax), 14, 174 },
  665. { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphrdesc_ena), 1, 193 },
  666. { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphwdesc_ena), 1, 194 },
  667. { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphdata_ena), 1, 195 },
  668. { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphhead_ena), 1, 196 },
  669. { I40E_HMC_STORE(i40e_hmc_obj_rxq, lrxqthresh), 3, 198 },
  670. { I40E_HMC_STORE(i40e_hmc_obj_rxq, prefena), 1, 201 },
  671. { 0 }
  672. };
  673. /**
  674. * i40e_clear_hmc_context - zero out the HMC context bits
  675. * @hw: the hardware struct
  676. * @context_bytes: pointer to the context bit array (DMA memory)
  677. * @hmc_type: the type of HMC resource
  678. **/
  679. static i40e_status i40e_clear_hmc_context(struct i40e_hw *hw,
  680. u8 *context_bytes,
  681. enum i40e_hmc_lan_rsrc_type hmc_type)
  682. {
  683. /* clean the bit array */
  684. memset(context_bytes, 0, (u32)hw->hmc.hmc_obj[hmc_type].size);
  685. return 0;
  686. }
  687. /**
  688. * i40e_set_hmc_context - replace HMC context bits
  689. * @context_bytes: pointer to the context bit array
  690. * @ce_info: a description of the struct to be filled
  691. * @dest: the struct to be filled
  692. **/
  693. static i40e_status i40e_set_hmc_context(u8 *context_bytes,
  694. struct i40e_context_ele *ce_info,
  695. u8 *dest)
  696. {
  697. u16 shift_width;
  698. u64 bitfield;
  699. u8 hi_byte;
  700. u8 hi_mask;
  701. u64 t_bits;
  702. u64 mask;
  703. u8 *p;
  704. int f;
  705. for (f = 0; ce_info[f].width != 0; f++) {
  706. /* clear out the field */
  707. bitfield = 0;
  708. /* copy from the next struct field */
  709. p = dest + ce_info[f].offset;
  710. switch (ce_info[f].size_of) {
  711. case 1:
  712. bitfield = *p;
  713. break;
  714. case 2:
  715. bitfield = cpu_to_le16(*(u16 *)p);
  716. break;
  717. case 4:
  718. bitfield = cpu_to_le32(*(u32 *)p);
  719. break;
  720. case 8:
  721. bitfield = cpu_to_le64(*(u64 *)p);
  722. break;
  723. }
  724. /* prepare the bits and mask */
  725. shift_width = ce_info[f].lsb % 8;
  726. mask = ((u64)1 << ce_info[f].width) - 1;
  727. /* save upper bytes for special case */
  728. hi_mask = (u8)((mask >> 56) & 0xff);
  729. hi_byte = (u8)((bitfield >> 56) & 0xff);
  730. /* shift to correct alignment */
  731. mask <<= shift_width;
  732. bitfield <<= shift_width;
  733. /* get the current bits from the target bit string */
  734. p = context_bytes + (ce_info[f].lsb / 8);
  735. memcpy(&t_bits, p, sizeof(u64));
  736. t_bits &= ~mask; /* get the bits not changing */
  737. t_bits |= bitfield; /* add in the new bits */
  738. /* put it all back */
  739. memcpy(p, &t_bits, sizeof(u64));
  740. /* deal with the special case if needed
  741. * example: 62 bit field that starts in bit 5 of first byte
  742. * will overlap 3 bits into byte 9
  743. */
  744. if ((shift_width + ce_info[f].width) > 64) {
  745. u8 byte;
  746. hi_mask >>= (8 - shift_width);
  747. hi_byte >>= (8 - shift_width);
  748. byte = p[8] & ~hi_mask; /* get the bits not changing */
  749. byte |= hi_byte; /* add in the new bits */
  750. p[8] = byte; /* put it back */
  751. }
  752. }
  753. return 0;
  754. }
  755. /**
  756. * i40e_hmc_get_object_va - retrieves an object's virtual address
  757. * @hmc_info: pointer to i40e_hmc_info struct
  758. * @object_base: pointer to u64 to get the va
  759. * @rsrc_type: the hmc resource type
  760. * @obj_idx: hmc object index
  761. *
  762. * This function retrieves the object's virtual address from the object
  763. * base pointer. This function is used for LAN Queue contexts.
  764. **/
  765. static
  766. i40e_status i40e_hmc_get_object_va(struct i40e_hmc_info *hmc_info,
  767. u8 **object_base,
  768. enum i40e_hmc_lan_rsrc_type rsrc_type,
  769. u32 obj_idx)
  770. {
  771. u32 obj_offset_in_sd, obj_offset_in_pd;
  772. i40e_status ret_code = 0;
  773. struct i40e_hmc_sd_entry *sd_entry;
  774. struct i40e_hmc_pd_entry *pd_entry;
  775. u32 pd_idx, pd_lmt, rel_pd_idx;
  776. u64 obj_offset_in_fpm;
  777. u32 sd_idx, sd_lmt;
  778. if (NULL == hmc_info) {
  779. ret_code = I40E_ERR_BAD_PTR;
  780. hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info ptr\n");
  781. goto exit;
  782. }
  783. if (NULL == hmc_info->hmc_obj) {
  784. ret_code = I40E_ERR_BAD_PTR;
  785. hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info->hmc_obj ptr\n");
  786. goto exit;
  787. }
  788. if (NULL == object_base) {
  789. ret_code = I40E_ERR_BAD_PTR;
  790. hw_dbg(hw, "i40e_hmc_get_object_va: bad object_base ptr\n");
  791. goto exit;
  792. }
  793. if (I40E_HMC_INFO_SIGNATURE != hmc_info->signature) {
  794. ret_code = I40E_ERR_BAD_PTR;
  795. hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info->signature\n");
  796. goto exit;
  797. }
  798. if (obj_idx >= hmc_info->hmc_obj[rsrc_type].cnt) {
  799. hw_dbg(hw, "i40e_hmc_get_object_va: returns error %d\n",
  800. ret_code);
  801. ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX;
  802. goto exit;
  803. }
  804. /* find sd index and limit */
  805. I40E_FIND_SD_INDEX_LIMIT(hmc_info, rsrc_type, obj_idx, 1,
  806. &sd_idx, &sd_lmt);
  807. sd_entry = &hmc_info->sd_table.sd_entry[sd_idx];
  808. obj_offset_in_fpm = hmc_info->hmc_obj[rsrc_type].base +
  809. hmc_info->hmc_obj[rsrc_type].size * obj_idx;
  810. if (I40E_SD_TYPE_PAGED == sd_entry->entry_type) {
  811. I40E_FIND_PD_INDEX_LIMIT(hmc_info, rsrc_type, obj_idx, 1,
  812. &pd_idx, &pd_lmt);
  813. rel_pd_idx = pd_idx % I40E_HMC_PD_CNT_IN_SD;
  814. pd_entry = &sd_entry->u.pd_table.pd_entry[rel_pd_idx];
  815. obj_offset_in_pd = (u32)(obj_offset_in_fpm %
  816. I40E_HMC_PAGED_BP_SIZE);
  817. *object_base = (u8 *)pd_entry->bp.addr.va + obj_offset_in_pd;
  818. } else {
  819. obj_offset_in_sd = (u32)(obj_offset_in_fpm %
  820. I40E_HMC_DIRECT_BP_SIZE);
  821. *object_base = (u8 *)sd_entry->u.bp.addr.va + obj_offset_in_sd;
  822. }
  823. exit:
  824. return ret_code;
  825. }
  826. /**
  827. * i40e_clear_lan_tx_queue_context - clear the HMC context for the queue
  828. * @hw: the hardware struct
  829. * @queue: the queue we care about
  830. **/
  831. i40e_status i40e_clear_lan_tx_queue_context(struct i40e_hw *hw,
  832. u16 queue)
  833. {
  834. i40e_status err;
  835. u8 *context_bytes;
  836. err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes,
  837. I40E_HMC_LAN_TX, queue);
  838. if (err < 0)
  839. return err;
  840. return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_TX);
  841. }
  842. /**
  843. * i40e_set_lan_tx_queue_context - set the HMC context for the queue
  844. * @hw: the hardware struct
  845. * @queue: the queue we care about
  846. * @s: the struct to be filled
  847. **/
  848. i40e_status i40e_set_lan_tx_queue_context(struct i40e_hw *hw,
  849. u16 queue,
  850. struct i40e_hmc_obj_txq *s)
  851. {
  852. i40e_status err;
  853. u8 *context_bytes;
  854. err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes,
  855. I40E_HMC_LAN_TX, queue);
  856. if (err < 0)
  857. return err;
  858. return i40e_set_hmc_context(context_bytes,
  859. i40e_hmc_txq_ce_info, (u8 *)s);
  860. }
  861. /**
  862. * i40e_clear_lan_rx_queue_context - clear the HMC context for the queue
  863. * @hw: the hardware struct
  864. * @queue: the queue we care about
  865. **/
  866. i40e_status i40e_clear_lan_rx_queue_context(struct i40e_hw *hw,
  867. u16 queue)
  868. {
  869. i40e_status err;
  870. u8 *context_bytes;
  871. err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes,
  872. I40E_HMC_LAN_RX, queue);
  873. if (err < 0)
  874. return err;
  875. return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_RX);
  876. }
  877. /**
  878. * i40e_set_lan_rx_queue_context - set the HMC context for the queue
  879. * @hw: the hardware struct
  880. * @queue: the queue we care about
  881. * @s: the struct to be filled
  882. **/
  883. i40e_status i40e_set_lan_rx_queue_context(struct i40e_hw *hw,
  884. u16 queue,
  885. struct i40e_hmc_obj_rxq *s)
  886. {
  887. i40e_status err;
  888. u8 *context_bytes;
  889. err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes,
  890. I40E_HMC_LAN_RX, queue);
  891. if (err < 0)
  892. return err;
  893. return i40e_set_hmc_context(context_bytes,
  894. i40e_hmc_rxq_ce_info, (u8 *)s);
  895. }