emac_main.c 23 KB

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  1. /*
  2. * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * Driver for the ARC EMAC 10100 (hardware revision 5)
  9. *
  10. * Contributors:
  11. * Amit Bhor
  12. * Sameer Dhavale
  13. * Vineet Gupta
  14. */
  15. #include <linux/crc32.h>
  16. #include <linux/etherdevice.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/io.h>
  19. #include <linux/module.h>
  20. #include <linux/of_address.h>
  21. #include <linux/of_irq.h>
  22. #include <linux/of_mdio.h>
  23. #include <linux/of_net.h>
  24. #include <linux/of_platform.h>
  25. #include "emac.h"
  26. #define DRV_NAME "arc_emac"
  27. #define DRV_VERSION "1.0"
  28. /**
  29. * arc_emac_adjust_link - Adjust the PHY link duplex.
  30. * @ndev: Pointer to the net_device structure.
  31. *
  32. * This function is called to change the duplex setting after auto negotiation
  33. * is done by the PHY.
  34. */
  35. static void arc_emac_adjust_link(struct net_device *ndev)
  36. {
  37. struct arc_emac_priv *priv = netdev_priv(ndev);
  38. struct phy_device *phy_dev = priv->phy_dev;
  39. unsigned int reg, state_changed = 0;
  40. if (priv->link != phy_dev->link) {
  41. priv->link = phy_dev->link;
  42. state_changed = 1;
  43. }
  44. if (priv->speed != phy_dev->speed) {
  45. priv->speed = phy_dev->speed;
  46. state_changed = 1;
  47. }
  48. if (priv->duplex != phy_dev->duplex) {
  49. reg = arc_reg_get(priv, R_CTRL);
  50. if (DUPLEX_FULL == phy_dev->duplex)
  51. reg |= ENFL_MASK;
  52. else
  53. reg &= ~ENFL_MASK;
  54. arc_reg_set(priv, R_CTRL, reg);
  55. priv->duplex = phy_dev->duplex;
  56. state_changed = 1;
  57. }
  58. if (state_changed)
  59. phy_print_status(phy_dev);
  60. }
  61. /**
  62. * arc_emac_get_settings - Get PHY settings.
  63. * @ndev: Pointer to net_device structure.
  64. * @cmd: Pointer to ethtool_cmd structure.
  65. *
  66. * This implements ethtool command for getting PHY settings. If PHY could
  67. * not be found, the function returns -ENODEV. This function calls the
  68. * relevant PHY ethtool API to get the PHY settings.
  69. * Issue "ethtool ethX" under linux prompt to execute this function.
  70. */
  71. static int arc_emac_get_settings(struct net_device *ndev,
  72. struct ethtool_cmd *cmd)
  73. {
  74. struct arc_emac_priv *priv = netdev_priv(ndev);
  75. return phy_ethtool_gset(priv->phy_dev, cmd);
  76. }
  77. /**
  78. * arc_emac_set_settings - Set PHY settings as passed in the argument.
  79. * @ndev: Pointer to net_device structure.
  80. * @cmd: Pointer to ethtool_cmd structure.
  81. *
  82. * This implements ethtool command for setting various PHY settings. If PHY
  83. * could not be found, the function returns -ENODEV. This function calls the
  84. * relevant PHY ethtool API to set the PHY.
  85. * Issue e.g. "ethtool -s ethX speed 1000" under linux prompt to execute this
  86. * function.
  87. */
  88. static int arc_emac_set_settings(struct net_device *ndev,
  89. struct ethtool_cmd *cmd)
  90. {
  91. struct arc_emac_priv *priv = netdev_priv(ndev);
  92. if (!capable(CAP_NET_ADMIN))
  93. return -EPERM;
  94. return phy_ethtool_sset(priv->phy_dev, cmd);
  95. }
  96. /**
  97. * arc_emac_get_drvinfo - Get EMAC driver information.
  98. * @ndev: Pointer to net_device structure.
  99. * @info: Pointer to ethtool_drvinfo structure.
  100. *
  101. * This implements ethtool command for getting the driver information.
  102. * Issue "ethtool -i ethX" under linux prompt to execute this function.
  103. */
  104. static void arc_emac_get_drvinfo(struct net_device *ndev,
  105. struct ethtool_drvinfo *info)
  106. {
  107. strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
  108. strlcpy(info->version, DRV_VERSION, sizeof(info->version));
  109. }
  110. static const struct ethtool_ops arc_emac_ethtool_ops = {
  111. .get_settings = arc_emac_get_settings,
  112. .set_settings = arc_emac_set_settings,
  113. .get_drvinfo = arc_emac_get_drvinfo,
  114. .get_link = ethtool_op_get_link,
  115. };
  116. #define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK)
  117. /**
  118. * arc_emac_tx_clean - clears processed by EMAC Tx BDs.
  119. * @ndev: Pointer to the network device.
  120. */
  121. static void arc_emac_tx_clean(struct net_device *ndev)
  122. {
  123. struct arc_emac_priv *priv = netdev_priv(ndev);
  124. struct net_device_stats *stats = &priv->stats;
  125. unsigned int i;
  126. for (i = 0; i < TX_BD_NUM; i++) {
  127. unsigned int *txbd_dirty = &priv->txbd_dirty;
  128. struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty];
  129. struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty];
  130. struct sk_buff *skb = tx_buff->skb;
  131. unsigned int info = le32_to_cpu(txbd->info);
  132. if ((info & FOR_EMAC) || !txbd->data)
  133. break;
  134. if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) {
  135. stats->tx_errors++;
  136. stats->tx_dropped++;
  137. if (info & DEFR)
  138. stats->tx_carrier_errors++;
  139. if (info & LTCL)
  140. stats->collisions++;
  141. if (info & UFLO)
  142. stats->tx_fifo_errors++;
  143. } else if (likely(info & FIRST_OR_LAST_MASK)) {
  144. stats->tx_packets++;
  145. stats->tx_bytes += skb->len;
  146. }
  147. dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr),
  148. dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);
  149. /* return the sk_buff to system */
  150. dev_kfree_skb_irq(skb);
  151. txbd->data = 0;
  152. txbd->info = 0;
  153. *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM;
  154. if (netif_queue_stopped(ndev))
  155. netif_wake_queue(ndev);
  156. }
  157. }
  158. /**
  159. * arc_emac_rx - processing of Rx packets.
  160. * @ndev: Pointer to the network device.
  161. * @budget: How many BDs to process on 1 call.
  162. *
  163. * returns: Number of processed BDs
  164. *
  165. * Iterate through Rx BDs and deliver received packages to upper layer.
  166. */
  167. static int arc_emac_rx(struct net_device *ndev, int budget)
  168. {
  169. struct arc_emac_priv *priv = netdev_priv(ndev);
  170. unsigned int work_done;
  171. for (work_done = 0; work_done < budget; work_done++) {
  172. unsigned int *last_rx_bd = &priv->last_rx_bd;
  173. struct net_device_stats *stats = &priv->stats;
  174. struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
  175. struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
  176. unsigned int pktlen, info = le32_to_cpu(rxbd->info);
  177. struct sk_buff *skb;
  178. dma_addr_t addr;
  179. if (unlikely((info & OWN_MASK) == FOR_EMAC))
  180. break;
  181. /* Make a note that we saw a packet at this BD.
  182. * So next time, driver starts from this + 1
  183. */
  184. *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
  185. if (unlikely((info & FIRST_OR_LAST_MASK) !=
  186. FIRST_OR_LAST_MASK)) {
  187. /* We pre-allocate buffers of MTU size so incoming
  188. * packets won't be split/chained.
  189. */
  190. if (net_ratelimit())
  191. netdev_err(ndev, "incomplete packet received\n");
  192. /* Return ownership to EMAC */
  193. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  194. stats->rx_errors++;
  195. stats->rx_length_errors++;
  196. continue;
  197. }
  198. pktlen = info & LEN_MASK;
  199. stats->rx_packets++;
  200. stats->rx_bytes += pktlen;
  201. skb = rx_buff->skb;
  202. skb_put(skb, pktlen);
  203. skb->dev = ndev;
  204. skb->protocol = eth_type_trans(skb, ndev);
  205. dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr),
  206. dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);
  207. /* Prepare the BD for next cycle */
  208. rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
  209. EMAC_BUFFER_SIZE);
  210. if (unlikely(!rx_buff->skb)) {
  211. stats->rx_errors++;
  212. /* Because receive_skb is below, increment rx_dropped */
  213. stats->rx_dropped++;
  214. continue;
  215. }
  216. /* receive_skb only if new skb was allocated to avoid holes */
  217. netif_receive_skb(skb);
  218. addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
  219. EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
  220. if (dma_mapping_error(&ndev->dev, addr)) {
  221. if (net_ratelimit())
  222. netdev_err(ndev, "cannot dma map\n");
  223. dev_kfree_skb(rx_buff->skb);
  224. stats->rx_errors++;
  225. continue;
  226. }
  227. dma_unmap_addr_set(rx_buff, addr, addr);
  228. dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
  229. rxbd->data = cpu_to_le32(addr);
  230. /* Make sure pointer to data buffer is set */
  231. wmb();
  232. /* Return ownership to EMAC */
  233. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  234. }
  235. return work_done;
  236. }
  237. /**
  238. * arc_emac_poll - NAPI poll handler.
  239. * @napi: Pointer to napi_struct structure.
  240. * @budget: How many BDs to process on 1 call.
  241. *
  242. * returns: Number of processed BDs
  243. */
  244. static int arc_emac_poll(struct napi_struct *napi, int budget)
  245. {
  246. struct net_device *ndev = napi->dev;
  247. struct arc_emac_priv *priv = netdev_priv(ndev);
  248. unsigned int work_done;
  249. arc_emac_tx_clean(ndev);
  250. work_done = arc_emac_rx(ndev, budget);
  251. if (work_done < budget) {
  252. napi_complete(napi);
  253. arc_reg_or(priv, R_ENABLE, RXINT_MASK);
  254. }
  255. return work_done;
  256. }
  257. /**
  258. * arc_emac_intr - Global interrupt handler for EMAC.
  259. * @irq: irq number.
  260. * @dev_instance: device instance.
  261. *
  262. * returns: IRQ_HANDLED for all cases.
  263. *
  264. * ARC EMAC has only 1 interrupt line, and depending on bits raised in
  265. * STATUS register we may tell what is a reason for interrupt to fire.
  266. */
  267. static irqreturn_t arc_emac_intr(int irq, void *dev_instance)
  268. {
  269. struct net_device *ndev = dev_instance;
  270. struct arc_emac_priv *priv = netdev_priv(ndev);
  271. struct net_device_stats *stats = &priv->stats;
  272. unsigned int status;
  273. status = arc_reg_get(priv, R_STATUS);
  274. status &= ~MDIO_MASK;
  275. /* Reset all flags except "MDIO complete" */
  276. arc_reg_set(priv, R_STATUS, status);
  277. if (status & RXINT_MASK) {
  278. if (likely(napi_schedule_prep(&priv->napi))) {
  279. arc_reg_clr(priv, R_ENABLE, RXINT_MASK);
  280. __napi_schedule(&priv->napi);
  281. }
  282. }
  283. if (status & ERR_MASK) {
  284. /* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding
  285. * 8-bit error counter overrun.
  286. */
  287. if (status & MSER_MASK) {
  288. stats->rx_missed_errors += 0x100;
  289. stats->rx_errors += 0x100;
  290. }
  291. if (status & RXCR_MASK) {
  292. stats->rx_crc_errors += 0x100;
  293. stats->rx_errors += 0x100;
  294. }
  295. if (status & RXFR_MASK) {
  296. stats->rx_frame_errors += 0x100;
  297. stats->rx_errors += 0x100;
  298. }
  299. if (status & RXFL_MASK) {
  300. stats->rx_over_errors += 0x100;
  301. stats->rx_errors += 0x100;
  302. }
  303. }
  304. return IRQ_HANDLED;
  305. }
  306. #ifdef CONFIG_NET_POLL_CONTROLLER
  307. static void arc_emac_poll_controller(struct net_device *dev)
  308. {
  309. disable_irq(dev->irq);
  310. arc_emac_intr(dev->irq, dev);
  311. enable_irq(dev->irq);
  312. }
  313. #endif
  314. /**
  315. * arc_emac_open - Open the network device.
  316. * @ndev: Pointer to the network device.
  317. *
  318. * returns: 0, on success or non-zero error value on failure.
  319. *
  320. * This function sets the MAC address, requests and enables an IRQ
  321. * for the EMAC device and starts the Tx queue.
  322. * It also connects to the phy device.
  323. */
  324. static int arc_emac_open(struct net_device *ndev)
  325. {
  326. struct arc_emac_priv *priv = netdev_priv(ndev);
  327. struct phy_device *phy_dev = priv->phy_dev;
  328. int i;
  329. phy_dev->autoneg = AUTONEG_ENABLE;
  330. phy_dev->speed = 0;
  331. phy_dev->duplex = 0;
  332. phy_dev->advertising &= phy_dev->supported;
  333. priv->last_rx_bd = 0;
  334. /* Allocate and set buffers for Rx BD's */
  335. for (i = 0; i < RX_BD_NUM; i++) {
  336. dma_addr_t addr;
  337. unsigned int *last_rx_bd = &priv->last_rx_bd;
  338. struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
  339. struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
  340. rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
  341. EMAC_BUFFER_SIZE);
  342. if (unlikely(!rx_buff->skb))
  343. return -ENOMEM;
  344. addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
  345. EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
  346. if (dma_mapping_error(&ndev->dev, addr)) {
  347. netdev_err(ndev, "cannot dma map\n");
  348. dev_kfree_skb(rx_buff->skb);
  349. return -ENOMEM;
  350. }
  351. dma_unmap_addr_set(rx_buff, addr, addr);
  352. dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
  353. rxbd->data = cpu_to_le32(addr);
  354. /* Make sure pointer to data buffer is set */
  355. wmb();
  356. /* Return ownership to EMAC */
  357. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  358. *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
  359. }
  360. /* Clean Tx BD's */
  361. memset(priv->txbd, 0, TX_RING_SZ);
  362. /* Initialize logical address filter */
  363. arc_reg_set(priv, R_LAFL, 0);
  364. arc_reg_set(priv, R_LAFH, 0);
  365. /* Set BD ring pointers for device side */
  366. arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma);
  367. arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma);
  368. /* Enable interrupts */
  369. arc_reg_set(priv, R_ENABLE, RXINT_MASK | ERR_MASK);
  370. /* Set CONTROL */
  371. arc_reg_set(priv, R_CTRL,
  372. (RX_BD_NUM << 24) | /* RX BD table length */
  373. (TX_BD_NUM << 16) | /* TX BD table length */
  374. TXRN_MASK | RXRN_MASK);
  375. napi_enable(&priv->napi);
  376. /* Enable EMAC */
  377. arc_reg_or(priv, R_CTRL, EN_MASK);
  378. phy_start_aneg(priv->phy_dev);
  379. netif_start_queue(ndev);
  380. return 0;
  381. }
  382. /**
  383. * arc_emac_set_rx_mode - Change the receive filtering mode.
  384. * @ndev: Pointer to the network device.
  385. *
  386. * This function enables/disables promiscuous or all-multicast mode
  387. * and updates the multicast filtering list of the network device.
  388. */
  389. static void arc_emac_set_rx_mode(struct net_device *ndev)
  390. {
  391. struct arc_emac_priv *priv = netdev_priv(ndev);
  392. if (ndev->flags & IFF_PROMISC) {
  393. arc_reg_or(priv, R_CTRL, PROM_MASK);
  394. } else {
  395. arc_reg_clr(priv, R_CTRL, PROM_MASK);
  396. if (ndev->flags & IFF_ALLMULTI) {
  397. arc_reg_set(priv, R_LAFL, ~0);
  398. arc_reg_set(priv, R_LAFH, ~0);
  399. } else {
  400. struct netdev_hw_addr *ha;
  401. unsigned int filter[2] = { 0, 0 };
  402. int bit;
  403. netdev_for_each_mc_addr(ha, ndev) {
  404. bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26;
  405. filter[bit >> 5] |= 1 << (bit & 31);
  406. }
  407. arc_reg_set(priv, R_LAFL, filter[0]);
  408. arc_reg_set(priv, R_LAFH, filter[1]);
  409. }
  410. }
  411. }
  412. /**
  413. * arc_emac_stop - Close the network device.
  414. * @ndev: Pointer to the network device.
  415. *
  416. * This function stops the Tx queue, disables interrupts and frees the IRQ for
  417. * the EMAC device.
  418. * It also disconnects the PHY device associated with the EMAC device.
  419. */
  420. static int arc_emac_stop(struct net_device *ndev)
  421. {
  422. struct arc_emac_priv *priv = netdev_priv(ndev);
  423. napi_disable(&priv->napi);
  424. netif_stop_queue(ndev);
  425. /* Disable interrupts */
  426. arc_reg_clr(priv, R_ENABLE, RXINT_MASK | ERR_MASK);
  427. /* Disable EMAC */
  428. arc_reg_clr(priv, R_CTRL, EN_MASK);
  429. return 0;
  430. }
  431. /**
  432. * arc_emac_stats - Get system network statistics.
  433. * @ndev: Pointer to net_device structure.
  434. *
  435. * Returns the address of the device statistics structure.
  436. * Statistics are updated in interrupt handler.
  437. */
  438. static struct net_device_stats *arc_emac_stats(struct net_device *ndev)
  439. {
  440. struct arc_emac_priv *priv = netdev_priv(ndev);
  441. struct net_device_stats *stats = &priv->stats;
  442. unsigned long miss, rxerr;
  443. u8 rxcrc, rxfram, rxoflow;
  444. rxerr = arc_reg_get(priv, R_RXERR);
  445. miss = arc_reg_get(priv, R_MISS);
  446. rxcrc = rxerr;
  447. rxfram = rxerr >> 8;
  448. rxoflow = rxerr >> 16;
  449. stats->rx_errors += miss;
  450. stats->rx_errors += rxcrc + rxfram + rxoflow;
  451. stats->rx_over_errors += rxoflow;
  452. stats->rx_frame_errors += rxfram;
  453. stats->rx_crc_errors += rxcrc;
  454. stats->rx_missed_errors += miss;
  455. return stats;
  456. }
  457. /**
  458. * arc_emac_tx - Starts the data transmission.
  459. * @skb: sk_buff pointer that contains data to be Transmitted.
  460. * @ndev: Pointer to net_device structure.
  461. *
  462. * returns: NETDEV_TX_OK, on success
  463. * NETDEV_TX_BUSY, if any of the descriptors are not free.
  464. *
  465. * This function is invoked from upper layers to initiate transmission.
  466. */
  467. static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
  468. {
  469. struct arc_emac_priv *priv = netdev_priv(ndev);
  470. unsigned int len, *txbd_curr = &priv->txbd_curr;
  471. struct net_device_stats *stats = &priv->stats;
  472. __le32 *info = &priv->txbd[*txbd_curr].info;
  473. dma_addr_t addr;
  474. if (skb_padto(skb, ETH_ZLEN))
  475. return NETDEV_TX_OK;
  476. len = max_t(unsigned int, ETH_ZLEN, skb->len);
  477. /* EMAC still holds this buffer in its possession.
  478. * CPU must not modify this buffer descriptor
  479. */
  480. if (unlikely((le32_to_cpu(*info) & OWN_MASK) == FOR_EMAC)) {
  481. netif_stop_queue(ndev);
  482. return NETDEV_TX_BUSY;
  483. }
  484. addr = dma_map_single(&ndev->dev, (void *)skb->data, len,
  485. DMA_TO_DEVICE);
  486. if (unlikely(dma_mapping_error(&ndev->dev, addr))) {
  487. stats->tx_dropped++;
  488. stats->tx_errors++;
  489. dev_kfree_skb(skb);
  490. return NETDEV_TX_OK;
  491. }
  492. dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr);
  493. dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len);
  494. priv->tx_buff[*txbd_curr].skb = skb;
  495. priv->txbd[*txbd_curr].data = cpu_to_le32(addr);
  496. /* Make sure pointer to data buffer is set */
  497. wmb();
  498. skb_tx_timestamp(skb);
  499. *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len);
  500. /* Increment index to point to the next BD */
  501. *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM;
  502. /* Get "info" of the next BD */
  503. info = &priv->txbd[*txbd_curr].info;
  504. /* Check if if Tx BD ring is full - next BD is still owned by EMAC */
  505. if (unlikely((le32_to_cpu(*info) & OWN_MASK) == FOR_EMAC))
  506. netif_stop_queue(ndev);
  507. arc_reg_set(priv, R_STATUS, TXPL_MASK);
  508. return NETDEV_TX_OK;
  509. }
  510. static void arc_emac_set_address_internal(struct net_device *ndev)
  511. {
  512. struct arc_emac_priv *priv = netdev_priv(ndev);
  513. unsigned int addr_low, addr_hi;
  514. addr_low = le32_to_cpu(*(__le32 *) &ndev->dev_addr[0]);
  515. addr_hi = le16_to_cpu(*(__le16 *) &ndev->dev_addr[4]);
  516. arc_reg_set(priv, R_ADDRL, addr_low);
  517. arc_reg_set(priv, R_ADDRH, addr_hi);
  518. }
  519. /**
  520. * arc_emac_set_address - Set the MAC address for this device.
  521. * @ndev: Pointer to net_device structure.
  522. * @p: 6 byte Address to be written as MAC address.
  523. *
  524. * This function copies the HW address from the sockaddr structure to the
  525. * net_device structure and updates the address in HW.
  526. *
  527. * returns: -EBUSY if the net device is busy or 0 if the address is set
  528. * successfully.
  529. */
  530. static int arc_emac_set_address(struct net_device *ndev, void *p)
  531. {
  532. struct sockaddr *addr = p;
  533. if (netif_running(ndev))
  534. return -EBUSY;
  535. if (!is_valid_ether_addr(addr->sa_data))
  536. return -EADDRNOTAVAIL;
  537. memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
  538. arc_emac_set_address_internal(ndev);
  539. return 0;
  540. }
  541. static const struct net_device_ops arc_emac_netdev_ops = {
  542. .ndo_open = arc_emac_open,
  543. .ndo_stop = arc_emac_stop,
  544. .ndo_start_xmit = arc_emac_tx,
  545. .ndo_set_mac_address = arc_emac_set_address,
  546. .ndo_get_stats = arc_emac_stats,
  547. .ndo_set_rx_mode = arc_emac_set_rx_mode,
  548. #ifdef CONFIG_NET_POLL_CONTROLLER
  549. .ndo_poll_controller = arc_emac_poll_controller,
  550. #endif
  551. };
  552. static int arc_emac_probe(struct platform_device *pdev)
  553. {
  554. struct resource res_regs;
  555. struct device_node *phy_node;
  556. struct arc_emac_priv *priv;
  557. struct net_device *ndev;
  558. const char *mac_addr;
  559. unsigned int id, clock_frequency, irq;
  560. int err;
  561. if (!pdev->dev.of_node)
  562. return -ENODEV;
  563. /* Get PHY from device tree */
  564. phy_node = of_parse_phandle(pdev->dev.of_node, "phy", 0);
  565. if (!phy_node) {
  566. dev_err(&pdev->dev, "failed to retrieve phy description from device tree\n");
  567. return -ENODEV;
  568. }
  569. /* Get EMAC registers base address from device tree */
  570. err = of_address_to_resource(pdev->dev.of_node, 0, &res_regs);
  571. if (err) {
  572. dev_err(&pdev->dev, "failed to retrieve registers base from device tree\n");
  573. return -ENODEV;
  574. }
  575. /* Get IRQ from device tree */
  576. irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
  577. if (!irq) {
  578. dev_err(&pdev->dev, "failed to retrieve <irq> value from device tree\n");
  579. return -ENODEV;
  580. }
  581. ndev = alloc_etherdev(sizeof(struct arc_emac_priv));
  582. if (!ndev)
  583. return -ENOMEM;
  584. platform_set_drvdata(pdev, ndev);
  585. SET_NETDEV_DEV(ndev, &pdev->dev);
  586. ndev->netdev_ops = &arc_emac_netdev_ops;
  587. ndev->ethtool_ops = &arc_emac_ethtool_ops;
  588. ndev->watchdog_timeo = TX_TIMEOUT;
  589. /* FIXME :: no multicast support yet */
  590. ndev->flags &= ~IFF_MULTICAST;
  591. priv = netdev_priv(ndev);
  592. priv->dev = &pdev->dev;
  593. priv->ndev = ndev;
  594. priv->regs = devm_ioremap_resource(&pdev->dev, &res_regs);
  595. if (IS_ERR(priv->regs)) {
  596. err = PTR_ERR(priv->regs);
  597. goto out_netdev;
  598. }
  599. dev_dbg(&pdev->dev, "Registers base address is 0x%p\n", priv->regs);
  600. priv->clk = of_clk_get(pdev->dev.of_node, 0);
  601. if (IS_ERR(priv->clk)) {
  602. /* Get CPU clock frequency from device tree */
  603. if (of_property_read_u32(pdev->dev.of_node, "clock-frequency",
  604. &clock_frequency)) {
  605. dev_err(&pdev->dev, "failed to retrieve <clock-frequency> from device tree\n");
  606. err = -EINVAL;
  607. goto out_netdev;
  608. }
  609. } else {
  610. err = clk_prepare_enable(priv->clk);
  611. if (err) {
  612. dev_err(&pdev->dev, "failed to enable clock\n");
  613. goto out_clkget;
  614. }
  615. clock_frequency = clk_get_rate(priv->clk);
  616. }
  617. id = arc_reg_get(priv, R_ID);
  618. /* Check for EMAC revision 5 or 7, magic number */
  619. if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
  620. dev_err(&pdev->dev, "ARC EMAC not detected, id=0x%x\n", id);
  621. err = -ENODEV;
  622. goto out_clken;
  623. }
  624. dev_info(&pdev->dev, "ARC EMAC detected with id: 0x%x\n", id);
  625. /* Set poll rate so that it polls every 1 ms */
  626. arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);
  627. ndev->irq = irq;
  628. dev_info(&pdev->dev, "IRQ is %d\n", ndev->irq);
  629. /* Register interrupt handler for device */
  630. err = devm_request_irq(&pdev->dev, ndev->irq, arc_emac_intr, 0,
  631. ndev->name, ndev);
  632. if (err) {
  633. dev_err(&pdev->dev, "could not allocate IRQ\n");
  634. goto out_clken;
  635. }
  636. /* Get MAC address from device tree */
  637. mac_addr = of_get_mac_address(pdev->dev.of_node);
  638. if (mac_addr)
  639. memcpy(ndev->dev_addr, mac_addr, ETH_ALEN);
  640. else
  641. eth_hw_addr_random(ndev);
  642. arc_emac_set_address_internal(ndev);
  643. dev_info(&pdev->dev, "MAC address is now %pM\n", ndev->dev_addr);
  644. /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */
  645. priv->rxbd = dmam_alloc_coherent(&pdev->dev, RX_RING_SZ + TX_RING_SZ,
  646. &priv->rxbd_dma, GFP_KERNEL);
  647. if (!priv->rxbd) {
  648. dev_err(&pdev->dev, "failed to allocate data buffers\n");
  649. err = -ENOMEM;
  650. goto out_clken;
  651. }
  652. priv->txbd = priv->rxbd + RX_BD_NUM;
  653. priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ;
  654. dev_dbg(&pdev->dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n",
  655. (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma);
  656. err = arc_mdio_probe(pdev, priv);
  657. if (err) {
  658. dev_err(&pdev->dev, "failed to probe MII bus\n");
  659. goto out_clken;
  660. }
  661. priv->phy_dev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0,
  662. PHY_INTERFACE_MODE_MII);
  663. if (!priv->phy_dev) {
  664. dev_err(&pdev->dev, "of_phy_connect() failed\n");
  665. err = -ENODEV;
  666. goto out_mdio;
  667. }
  668. dev_info(&pdev->dev, "connected to %s phy with id 0x%x\n",
  669. priv->phy_dev->drv->name, priv->phy_dev->phy_id);
  670. netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT);
  671. err = register_netdev(ndev);
  672. if (err) {
  673. dev_err(&pdev->dev, "failed to register network device\n");
  674. goto out_netif_api;
  675. }
  676. return 0;
  677. out_netif_api:
  678. netif_napi_del(&priv->napi);
  679. phy_disconnect(priv->phy_dev);
  680. priv->phy_dev = NULL;
  681. out_mdio:
  682. arc_mdio_remove(priv);
  683. out_clken:
  684. if (!IS_ERR(priv->clk))
  685. clk_disable_unprepare(priv->clk);
  686. out_clkget:
  687. if (!IS_ERR(priv->clk))
  688. clk_put(priv->clk);
  689. out_netdev:
  690. free_netdev(ndev);
  691. return err;
  692. }
  693. static int arc_emac_remove(struct platform_device *pdev)
  694. {
  695. struct net_device *ndev = platform_get_drvdata(pdev);
  696. struct arc_emac_priv *priv = netdev_priv(ndev);
  697. phy_disconnect(priv->phy_dev);
  698. priv->phy_dev = NULL;
  699. arc_mdio_remove(priv);
  700. unregister_netdev(ndev);
  701. netif_napi_del(&priv->napi);
  702. if (!IS_ERR(priv->clk)) {
  703. clk_disable_unprepare(priv->clk);
  704. clk_put(priv->clk);
  705. }
  706. free_netdev(ndev);
  707. return 0;
  708. }
  709. static const struct of_device_id arc_emac_dt_ids[] = {
  710. { .compatible = "snps,arc-emac" },
  711. { /* Sentinel */ }
  712. };
  713. MODULE_DEVICE_TABLE(of, arc_emac_dt_ids);
  714. static struct platform_driver arc_emac_driver = {
  715. .probe = arc_emac_probe,
  716. .remove = arc_emac_remove,
  717. .driver = {
  718. .name = DRV_NAME,
  719. .owner = THIS_MODULE,
  720. .of_match_table = arc_emac_dt_ids,
  721. },
  722. };
  723. module_platform_driver(arc_emac_driver);
  724. MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>");
  725. MODULE_DESCRIPTION("ARC EMAC driver");
  726. MODULE_LICENSE("GPL");