janz-ican3.c 46 KB

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  1. /*
  2. * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
  3. *
  4. * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/delay.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/netdevice.h>
  17. #include <linux/can.h>
  18. #include <linux/can/dev.h>
  19. #include <linux/can/skb.h>
  20. #include <linux/can/error.h>
  21. #include <linux/mfd/janz.h>
  22. #include <asm/io.h>
  23. /* the DPM has 64k of memory, organized into 256x 256 byte pages */
  24. #define DPM_NUM_PAGES 256
  25. #define DPM_PAGE_SIZE 256
  26. #define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE)
  27. /* JANZ ICAN3 "old-style" host interface queue page numbers */
  28. #define QUEUE_OLD_CONTROL 0
  29. #define QUEUE_OLD_RB0 1
  30. #define QUEUE_OLD_RB1 2
  31. #define QUEUE_OLD_WB0 3
  32. #define QUEUE_OLD_WB1 4
  33. /* Janz ICAN3 "old-style" host interface control registers */
  34. #define MSYNC_PEER 0x00 /* ICAN only */
  35. #define MSYNC_LOCL 0x01 /* host only */
  36. #define TARGET_RUNNING 0x02
  37. #define MSYNC_RB0 0x01
  38. #define MSYNC_RB1 0x02
  39. #define MSYNC_RBLW 0x04
  40. #define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1)
  41. #define MSYNC_WB0 0x10
  42. #define MSYNC_WB1 0x20
  43. #define MSYNC_WBLW 0x40
  44. #define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1)
  45. /* Janz ICAN3 "new-style" host interface queue page numbers */
  46. #define QUEUE_TOHOST 5
  47. #define QUEUE_FROMHOST_MID 6
  48. #define QUEUE_FROMHOST_HIGH 7
  49. #define QUEUE_FROMHOST_LOW 8
  50. /* The first free page in the DPM is #9 */
  51. #define DPM_FREE_START 9
  52. /* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
  53. #define DESC_VALID 0x80
  54. #define DESC_WRAP 0x40
  55. #define DESC_INTERRUPT 0x20
  56. #define DESC_IVALID 0x10
  57. #define DESC_LEN(len) (len)
  58. /* Janz ICAN3 Firmware Messages */
  59. #define MSG_CONNECTI 0x02
  60. #define MSG_DISCONNECT 0x03
  61. #define MSG_IDVERS 0x04
  62. #define MSG_MSGLOST 0x05
  63. #define MSG_NEWHOSTIF 0x08
  64. #define MSG_INQUIRY 0x0a
  65. #define MSG_SETAFILMASK 0x10
  66. #define MSG_INITFDPMQUEUE 0x11
  67. #define MSG_HWCONF 0x12
  68. #define MSG_FMSGLOST 0x15
  69. #define MSG_CEVTIND 0x37
  70. #define MSG_CBTRREQ 0x41
  71. #define MSG_COFFREQ 0x42
  72. #define MSG_CONREQ 0x43
  73. #define MSG_CCONFREQ 0x47
  74. /*
  75. * Janz ICAN3 CAN Inquiry Message Types
  76. *
  77. * NOTE: there appears to be a firmware bug here. You must send
  78. * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
  79. * NOTE: response. The controller never responds to a message with
  80. * NOTE: the INQUIRY_EXTENDED subspec :(
  81. */
  82. #define INQUIRY_STATUS 0x00
  83. #define INQUIRY_TERMINATION 0x01
  84. #define INQUIRY_EXTENDED 0x04
  85. /* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
  86. #define SETAFILMASK_REJECT 0x00
  87. #define SETAFILMASK_FASTIF 0x02
  88. /* Janz ICAN3 CAN Hardware Configuration Message Types */
  89. #define HWCONF_TERMINATE_ON 0x01
  90. #define HWCONF_TERMINATE_OFF 0x00
  91. /* Janz ICAN3 CAN Event Indication Message Types */
  92. #define CEVTIND_EI 0x01
  93. #define CEVTIND_DOI 0x02
  94. #define CEVTIND_LOST 0x04
  95. #define CEVTIND_FULL 0x08
  96. #define CEVTIND_BEI 0x10
  97. #define CEVTIND_CHIP_SJA1000 0x02
  98. #define ICAN3_BUSERR_QUOTA_MAX 255
  99. /* Janz ICAN3 CAN Frame Conversion */
  100. #define ICAN3_SNGL 0x02
  101. #define ICAN3_ECHO 0x10
  102. #define ICAN3_EFF_RTR 0x40
  103. #define ICAN3_SFF_RTR 0x10
  104. #define ICAN3_EFF 0x80
  105. #define ICAN3_CAN_TYPE_MASK 0x0f
  106. #define ICAN3_CAN_TYPE_SFF 0x00
  107. #define ICAN3_CAN_TYPE_EFF 0x01
  108. #define ICAN3_CAN_DLC_MASK 0x0f
  109. /*
  110. * SJA1000 Status and Error Register Definitions
  111. *
  112. * Copied from drivers/net/can/sja1000/sja1000.h
  113. */
  114. /* status register content */
  115. #define SR_BS 0x80
  116. #define SR_ES 0x40
  117. #define SR_TS 0x20
  118. #define SR_RS 0x10
  119. #define SR_TCS 0x08
  120. #define SR_TBS 0x04
  121. #define SR_DOS 0x02
  122. #define SR_RBS 0x01
  123. #define SR_CRIT (SR_BS|SR_ES)
  124. /* ECC register */
  125. #define ECC_SEG 0x1F
  126. #define ECC_DIR 0x20
  127. #define ECC_ERR 6
  128. #define ECC_BIT 0x00
  129. #define ECC_FORM 0x40
  130. #define ECC_STUFF 0x80
  131. #define ECC_MASK 0xc0
  132. /* Number of buffers for use in the "new-style" host interface */
  133. #define ICAN3_NEW_BUFFERS 16
  134. /* Number of buffers for use in the "fast" host interface */
  135. #define ICAN3_TX_BUFFERS 512
  136. #define ICAN3_RX_BUFFERS 1024
  137. /* SJA1000 Clock Input */
  138. #define ICAN3_CAN_CLOCK 8000000
  139. /* Driver Name */
  140. #define DRV_NAME "janz-ican3"
  141. /* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
  142. struct ican3_dpm_control {
  143. /* window address register */
  144. u8 window_address;
  145. u8 unused1;
  146. /*
  147. * Read access: clear interrupt from microcontroller
  148. * Write access: send interrupt to microcontroller
  149. */
  150. u8 interrupt;
  151. u8 unused2;
  152. /* write-only: reset all hardware on the module */
  153. u8 hwreset;
  154. u8 unused3;
  155. /* write-only: generate an interrupt to the TPU */
  156. u8 tpuinterrupt;
  157. };
  158. struct ican3_dev {
  159. /* must be the first member */
  160. struct can_priv can;
  161. /* CAN network device */
  162. struct net_device *ndev;
  163. struct napi_struct napi;
  164. /* module number */
  165. unsigned int num;
  166. /* base address of registers and IRQ */
  167. struct janz_cmodio_onboard_regs __iomem *ctrl;
  168. struct ican3_dpm_control __iomem *dpmctrl;
  169. void __iomem *dpm;
  170. int irq;
  171. /* CAN bus termination status */
  172. struct completion termination_comp;
  173. bool termination_enabled;
  174. /* CAN bus error status registers */
  175. struct completion buserror_comp;
  176. struct can_berr_counter bec;
  177. /* old and new style host interface */
  178. unsigned int iftype;
  179. /* queue for echo packets */
  180. struct sk_buff_head echoq;
  181. /*
  182. * Any function which changes the current DPM page must hold this
  183. * lock while it is performing data accesses. This ensures that the
  184. * function will not be preempted and end up reading data from a
  185. * different DPM page than it expects.
  186. */
  187. spinlock_t lock;
  188. /* new host interface */
  189. unsigned int rx_int;
  190. unsigned int rx_num;
  191. unsigned int tx_num;
  192. /* fast host interface */
  193. unsigned int fastrx_start;
  194. unsigned int fastrx_num;
  195. unsigned int fasttx_start;
  196. unsigned int fasttx_num;
  197. /* first free DPM page */
  198. unsigned int free_page;
  199. };
  200. struct ican3_msg {
  201. u8 control;
  202. u8 spec;
  203. __le16 len;
  204. u8 data[252];
  205. };
  206. struct ican3_new_desc {
  207. u8 control;
  208. u8 pointer;
  209. };
  210. struct ican3_fast_desc {
  211. u8 control;
  212. u8 command;
  213. u8 data[14];
  214. };
  215. /* write to the window basic address register */
  216. static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
  217. {
  218. BUG_ON(page >= DPM_NUM_PAGES);
  219. iowrite8(page, &mod->dpmctrl->window_address);
  220. }
  221. /*
  222. * ICAN3 "old-style" host interface
  223. */
  224. /*
  225. * Receive a message from the ICAN3 "old-style" firmware interface
  226. *
  227. * LOCKING: must hold mod->lock
  228. *
  229. * returns 0 on success, -ENOMEM when no message exists
  230. */
  231. static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  232. {
  233. unsigned int mbox, mbox_page;
  234. u8 locl, peer, xord;
  235. /* get the MSYNC registers */
  236. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  237. peer = ioread8(mod->dpm + MSYNC_PEER);
  238. locl = ioread8(mod->dpm + MSYNC_LOCL);
  239. xord = locl ^ peer;
  240. if ((xord & MSYNC_RB_MASK) == 0x00) {
  241. netdev_dbg(mod->ndev, "no mbox for reading\n");
  242. return -ENOMEM;
  243. }
  244. /* find the first free mbox to read */
  245. if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
  246. mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
  247. else
  248. mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
  249. /* copy the message */
  250. mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
  251. ican3_set_page(mod, mbox_page);
  252. memcpy_fromio(msg, mod->dpm, sizeof(*msg));
  253. /*
  254. * notify the firmware that the read buffer is available
  255. * for it to fill again
  256. */
  257. locl ^= mbox;
  258. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  259. iowrite8(locl, mod->dpm + MSYNC_LOCL);
  260. return 0;
  261. }
  262. /*
  263. * Send a message through the "old-style" firmware interface
  264. *
  265. * LOCKING: must hold mod->lock
  266. *
  267. * returns 0 on success, -ENOMEM when no free space exists
  268. */
  269. static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  270. {
  271. unsigned int mbox, mbox_page;
  272. u8 locl, peer, xord;
  273. /* get the MSYNC registers */
  274. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  275. peer = ioread8(mod->dpm + MSYNC_PEER);
  276. locl = ioread8(mod->dpm + MSYNC_LOCL);
  277. xord = locl ^ peer;
  278. if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
  279. netdev_err(mod->ndev, "no mbox for writing\n");
  280. return -ENOMEM;
  281. }
  282. /* calculate a free mbox to use */
  283. mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
  284. /* copy the message to the DPM */
  285. mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
  286. ican3_set_page(mod, mbox_page);
  287. memcpy_toio(mod->dpm, msg, sizeof(*msg));
  288. locl ^= mbox;
  289. if (mbox == MSYNC_WB1)
  290. locl |= MSYNC_WBLW;
  291. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  292. iowrite8(locl, mod->dpm + MSYNC_LOCL);
  293. return 0;
  294. }
  295. /*
  296. * ICAN3 "new-style" Host Interface Setup
  297. */
  298. static void ican3_init_new_host_interface(struct ican3_dev *mod)
  299. {
  300. struct ican3_new_desc desc;
  301. unsigned long flags;
  302. void __iomem *dst;
  303. int i;
  304. spin_lock_irqsave(&mod->lock, flags);
  305. /* setup the internal datastructures for RX */
  306. mod->rx_num = 0;
  307. mod->rx_int = 0;
  308. /* tohost queue descriptors are in page 5 */
  309. ican3_set_page(mod, QUEUE_TOHOST);
  310. dst = mod->dpm;
  311. /* initialize the tohost (rx) queue descriptors: pages 9-24 */
  312. for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
  313. desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
  314. desc.pointer = mod->free_page;
  315. /* set wrap flag on last buffer */
  316. if (i == ICAN3_NEW_BUFFERS - 1)
  317. desc.control |= DESC_WRAP;
  318. memcpy_toio(dst, &desc, sizeof(desc));
  319. dst += sizeof(desc);
  320. mod->free_page++;
  321. }
  322. /* fromhost (tx) mid queue descriptors are in page 6 */
  323. ican3_set_page(mod, QUEUE_FROMHOST_MID);
  324. dst = mod->dpm;
  325. /* setup the internal datastructures for TX */
  326. mod->tx_num = 0;
  327. /* initialize the fromhost mid queue descriptors: pages 25-40 */
  328. for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
  329. desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
  330. desc.pointer = mod->free_page;
  331. /* set wrap flag on last buffer */
  332. if (i == ICAN3_NEW_BUFFERS - 1)
  333. desc.control |= DESC_WRAP;
  334. memcpy_toio(dst, &desc, sizeof(desc));
  335. dst += sizeof(desc);
  336. mod->free_page++;
  337. }
  338. /* fromhost hi queue descriptors are in page 7 */
  339. ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
  340. dst = mod->dpm;
  341. /* initialize only a single buffer in the fromhost hi queue (unused) */
  342. desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
  343. desc.pointer = mod->free_page;
  344. memcpy_toio(dst, &desc, sizeof(desc));
  345. mod->free_page++;
  346. /* fromhost low queue descriptors are in page 8 */
  347. ican3_set_page(mod, QUEUE_FROMHOST_LOW);
  348. dst = mod->dpm;
  349. /* initialize only a single buffer in the fromhost low queue (unused) */
  350. desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
  351. desc.pointer = mod->free_page;
  352. memcpy_toio(dst, &desc, sizeof(desc));
  353. mod->free_page++;
  354. spin_unlock_irqrestore(&mod->lock, flags);
  355. }
  356. /*
  357. * ICAN3 Fast Host Interface Setup
  358. */
  359. static void ican3_init_fast_host_interface(struct ican3_dev *mod)
  360. {
  361. struct ican3_fast_desc desc;
  362. unsigned long flags;
  363. unsigned int addr;
  364. void __iomem *dst;
  365. int i;
  366. spin_lock_irqsave(&mod->lock, flags);
  367. /* save the start recv page */
  368. mod->fastrx_start = mod->free_page;
  369. mod->fastrx_num = 0;
  370. /* build a single fast tohost queue descriptor */
  371. memset(&desc, 0, sizeof(desc));
  372. desc.control = 0x00;
  373. desc.command = 1;
  374. /* build the tohost queue descriptor ring in memory */
  375. addr = 0;
  376. for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
  377. /* set the wrap bit on the last buffer */
  378. if (i == ICAN3_RX_BUFFERS - 1)
  379. desc.control |= DESC_WRAP;
  380. /* switch to the correct page */
  381. ican3_set_page(mod, mod->free_page);
  382. /* copy the descriptor to the DPM */
  383. dst = mod->dpm + addr;
  384. memcpy_toio(dst, &desc, sizeof(desc));
  385. addr += sizeof(desc);
  386. /* move to the next page if necessary */
  387. if (addr >= DPM_PAGE_SIZE) {
  388. addr = 0;
  389. mod->free_page++;
  390. }
  391. }
  392. /* make sure we page-align the next queue */
  393. if (addr != 0)
  394. mod->free_page++;
  395. /* save the start xmit page */
  396. mod->fasttx_start = mod->free_page;
  397. mod->fasttx_num = 0;
  398. /* build a single fast fromhost queue descriptor */
  399. memset(&desc, 0, sizeof(desc));
  400. desc.control = DESC_VALID;
  401. desc.command = 1;
  402. /* build the fromhost queue descriptor ring in memory */
  403. addr = 0;
  404. for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
  405. /* set the wrap bit on the last buffer */
  406. if (i == ICAN3_TX_BUFFERS - 1)
  407. desc.control |= DESC_WRAP;
  408. /* switch to the correct page */
  409. ican3_set_page(mod, mod->free_page);
  410. /* copy the descriptor to the DPM */
  411. dst = mod->dpm + addr;
  412. memcpy_toio(dst, &desc, sizeof(desc));
  413. addr += sizeof(desc);
  414. /* move to the next page if necessary */
  415. if (addr >= DPM_PAGE_SIZE) {
  416. addr = 0;
  417. mod->free_page++;
  418. }
  419. }
  420. spin_unlock_irqrestore(&mod->lock, flags);
  421. }
  422. /*
  423. * ICAN3 "new-style" Host Interface Message Helpers
  424. */
  425. /*
  426. * LOCKING: must hold mod->lock
  427. */
  428. static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  429. {
  430. struct ican3_new_desc desc;
  431. void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
  432. /* switch to the fromhost mid queue, and read the buffer descriptor */
  433. ican3_set_page(mod, QUEUE_FROMHOST_MID);
  434. memcpy_fromio(&desc, desc_addr, sizeof(desc));
  435. if (!(desc.control & DESC_VALID)) {
  436. netdev_dbg(mod->ndev, "%s: no free buffers\n", __func__);
  437. return -ENOMEM;
  438. }
  439. /* switch to the data page, copy the data */
  440. ican3_set_page(mod, desc.pointer);
  441. memcpy_toio(mod->dpm, msg, sizeof(*msg));
  442. /* switch back to the descriptor, set the valid bit, write it back */
  443. ican3_set_page(mod, QUEUE_FROMHOST_MID);
  444. desc.control ^= DESC_VALID;
  445. memcpy_toio(desc_addr, &desc, sizeof(desc));
  446. /* update the tx number */
  447. mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
  448. return 0;
  449. }
  450. /*
  451. * LOCKING: must hold mod->lock
  452. */
  453. static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  454. {
  455. struct ican3_new_desc desc;
  456. void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
  457. /* switch to the tohost queue, and read the buffer descriptor */
  458. ican3_set_page(mod, QUEUE_TOHOST);
  459. memcpy_fromio(&desc, desc_addr, sizeof(desc));
  460. if (!(desc.control & DESC_VALID)) {
  461. netdev_dbg(mod->ndev, "%s: no buffers to recv\n", __func__);
  462. return -ENOMEM;
  463. }
  464. /* switch to the data page, copy the data */
  465. ican3_set_page(mod, desc.pointer);
  466. memcpy_fromio(msg, mod->dpm, sizeof(*msg));
  467. /* switch back to the descriptor, toggle the valid bit, write it back */
  468. ican3_set_page(mod, QUEUE_TOHOST);
  469. desc.control ^= DESC_VALID;
  470. memcpy_toio(desc_addr, &desc, sizeof(desc));
  471. /* update the rx number */
  472. mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
  473. return 0;
  474. }
  475. /*
  476. * Message Send / Recv Helpers
  477. */
  478. static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  479. {
  480. unsigned long flags;
  481. int ret;
  482. spin_lock_irqsave(&mod->lock, flags);
  483. if (mod->iftype == 0)
  484. ret = ican3_old_send_msg(mod, msg);
  485. else
  486. ret = ican3_new_send_msg(mod, msg);
  487. spin_unlock_irqrestore(&mod->lock, flags);
  488. return ret;
  489. }
  490. static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  491. {
  492. unsigned long flags;
  493. int ret;
  494. spin_lock_irqsave(&mod->lock, flags);
  495. if (mod->iftype == 0)
  496. ret = ican3_old_recv_msg(mod, msg);
  497. else
  498. ret = ican3_new_recv_msg(mod, msg);
  499. spin_unlock_irqrestore(&mod->lock, flags);
  500. return ret;
  501. }
  502. /*
  503. * Quick Pre-constructed Messages
  504. */
  505. static int ican3_msg_connect(struct ican3_dev *mod)
  506. {
  507. struct ican3_msg msg;
  508. memset(&msg, 0, sizeof(msg));
  509. msg.spec = MSG_CONNECTI;
  510. msg.len = cpu_to_le16(0);
  511. return ican3_send_msg(mod, &msg);
  512. }
  513. static int ican3_msg_disconnect(struct ican3_dev *mod)
  514. {
  515. struct ican3_msg msg;
  516. memset(&msg, 0, sizeof(msg));
  517. msg.spec = MSG_DISCONNECT;
  518. msg.len = cpu_to_le16(0);
  519. return ican3_send_msg(mod, &msg);
  520. }
  521. static int ican3_msg_newhostif(struct ican3_dev *mod)
  522. {
  523. struct ican3_msg msg;
  524. int ret;
  525. memset(&msg, 0, sizeof(msg));
  526. msg.spec = MSG_NEWHOSTIF;
  527. msg.len = cpu_to_le16(0);
  528. /* If we're not using the old interface, switching seems bogus */
  529. WARN_ON(mod->iftype != 0);
  530. ret = ican3_send_msg(mod, &msg);
  531. if (ret)
  532. return ret;
  533. /* mark the module as using the new host interface */
  534. mod->iftype = 1;
  535. return 0;
  536. }
  537. static int ican3_msg_fasthostif(struct ican3_dev *mod)
  538. {
  539. struct ican3_msg msg;
  540. unsigned int addr;
  541. memset(&msg, 0, sizeof(msg));
  542. msg.spec = MSG_INITFDPMQUEUE;
  543. msg.len = cpu_to_le16(8);
  544. /* write the tohost queue start address */
  545. addr = DPM_PAGE_ADDR(mod->fastrx_start);
  546. msg.data[0] = addr & 0xff;
  547. msg.data[1] = (addr >> 8) & 0xff;
  548. msg.data[2] = (addr >> 16) & 0xff;
  549. msg.data[3] = (addr >> 24) & 0xff;
  550. /* write the fromhost queue start address */
  551. addr = DPM_PAGE_ADDR(mod->fasttx_start);
  552. msg.data[4] = addr & 0xff;
  553. msg.data[5] = (addr >> 8) & 0xff;
  554. msg.data[6] = (addr >> 16) & 0xff;
  555. msg.data[7] = (addr >> 24) & 0xff;
  556. /* If we're not using the new interface yet, we cannot do this */
  557. WARN_ON(mod->iftype != 1);
  558. return ican3_send_msg(mod, &msg);
  559. }
  560. /*
  561. * Setup the CAN filter to either accept or reject all
  562. * messages from the CAN bus.
  563. */
  564. static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
  565. {
  566. struct ican3_msg msg;
  567. int ret;
  568. /* Standard Frame Format */
  569. memset(&msg, 0, sizeof(msg));
  570. msg.spec = MSG_SETAFILMASK;
  571. msg.len = cpu_to_le16(5);
  572. msg.data[0] = 0x00; /* IDLo LSB */
  573. msg.data[1] = 0x00; /* IDLo MSB */
  574. msg.data[2] = 0xff; /* IDHi LSB */
  575. msg.data[3] = 0x07; /* IDHi MSB */
  576. /* accept all frames for fast host if, or reject all frames */
  577. msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
  578. ret = ican3_send_msg(mod, &msg);
  579. if (ret)
  580. return ret;
  581. /* Extended Frame Format */
  582. memset(&msg, 0, sizeof(msg));
  583. msg.spec = MSG_SETAFILMASK;
  584. msg.len = cpu_to_le16(13);
  585. msg.data[0] = 0; /* MUX = 0 */
  586. msg.data[1] = 0x00; /* IDLo LSB */
  587. msg.data[2] = 0x00;
  588. msg.data[3] = 0x00;
  589. msg.data[4] = 0x20; /* IDLo MSB */
  590. msg.data[5] = 0xff; /* IDHi LSB */
  591. msg.data[6] = 0xff;
  592. msg.data[7] = 0xff;
  593. msg.data[8] = 0x3f; /* IDHi MSB */
  594. /* accept all frames for fast host if, or reject all frames */
  595. msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
  596. return ican3_send_msg(mod, &msg);
  597. }
  598. /*
  599. * Bring the CAN bus online or offline
  600. */
  601. static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
  602. {
  603. struct ican3_msg msg;
  604. memset(&msg, 0, sizeof(msg));
  605. msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
  606. msg.len = cpu_to_le16(0);
  607. return ican3_send_msg(mod, &msg);
  608. }
  609. static int ican3_set_termination(struct ican3_dev *mod, bool on)
  610. {
  611. struct ican3_msg msg;
  612. memset(&msg, 0, sizeof(msg));
  613. msg.spec = MSG_HWCONF;
  614. msg.len = cpu_to_le16(2);
  615. msg.data[0] = 0x00;
  616. msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
  617. return ican3_send_msg(mod, &msg);
  618. }
  619. static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
  620. {
  621. struct ican3_msg msg;
  622. memset(&msg, 0, sizeof(msg));
  623. msg.spec = MSG_INQUIRY;
  624. msg.len = cpu_to_le16(2);
  625. msg.data[0] = subspec;
  626. msg.data[1] = 0x00;
  627. return ican3_send_msg(mod, &msg);
  628. }
  629. static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
  630. {
  631. struct ican3_msg msg;
  632. memset(&msg, 0, sizeof(msg));
  633. msg.spec = MSG_CCONFREQ;
  634. msg.len = cpu_to_le16(2);
  635. msg.data[0] = 0x00;
  636. msg.data[1] = quota;
  637. return ican3_send_msg(mod, &msg);
  638. }
  639. /*
  640. * ICAN3 to Linux CAN Frame Conversion
  641. */
  642. static void ican3_to_can_frame(struct ican3_dev *mod,
  643. struct ican3_fast_desc *desc,
  644. struct can_frame *cf)
  645. {
  646. if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
  647. if (desc->data[1] & ICAN3_SFF_RTR)
  648. cf->can_id |= CAN_RTR_FLAG;
  649. cf->can_id |= desc->data[0] << 3;
  650. cf->can_id |= (desc->data[1] & 0xe0) >> 5;
  651. cf->can_dlc = get_can_dlc(desc->data[1] & ICAN3_CAN_DLC_MASK);
  652. memcpy(cf->data, &desc->data[2], cf->can_dlc);
  653. } else {
  654. cf->can_dlc = get_can_dlc(desc->data[0] & ICAN3_CAN_DLC_MASK);
  655. if (desc->data[0] & ICAN3_EFF_RTR)
  656. cf->can_id |= CAN_RTR_FLAG;
  657. if (desc->data[0] & ICAN3_EFF) {
  658. cf->can_id |= CAN_EFF_FLAG;
  659. cf->can_id |= desc->data[2] << 21; /* 28-21 */
  660. cf->can_id |= desc->data[3] << 13; /* 20-13 */
  661. cf->can_id |= desc->data[4] << 5; /* 12-5 */
  662. cf->can_id |= (desc->data[5] & 0xf8) >> 3;
  663. } else {
  664. cf->can_id |= desc->data[2] << 3; /* 10-3 */
  665. cf->can_id |= desc->data[3] >> 5; /* 2-0 */
  666. }
  667. memcpy(cf->data, &desc->data[6], cf->can_dlc);
  668. }
  669. }
  670. static void can_frame_to_ican3(struct ican3_dev *mod,
  671. struct can_frame *cf,
  672. struct ican3_fast_desc *desc)
  673. {
  674. /* clear out any stale data in the descriptor */
  675. memset(desc->data, 0, sizeof(desc->data));
  676. /* we always use the extended format, with the ECHO flag set */
  677. desc->command = ICAN3_CAN_TYPE_EFF;
  678. desc->data[0] |= cf->can_dlc;
  679. desc->data[1] |= ICAN3_ECHO;
  680. /* support single transmission (no retries) mode */
  681. if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
  682. desc->data[1] |= ICAN3_SNGL;
  683. if (cf->can_id & CAN_RTR_FLAG)
  684. desc->data[0] |= ICAN3_EFF_RTR;
  685. /* pack the id into the correct places */
  686. if (cf->can_id & CAN_EFF_FLAG) {
  687. desc->data[0] |= ICAN3_EFF;
  688. desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
  689. desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
  690. desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */
  691. desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */
  692. } else {
  693. desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
  694. desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */
  695. }
  696. /* copy the data bits into the descriptor */
  697. memcpy(&desc->data[6], cf->data, cf->can_dlc);
  698. }
  699. /*
  700. * Interrupt Handling
  701. */
  702. /*
  703. * Handle an ID + Version message response from the firmware. We never generate
  704. * this message in production code, but it is very useful when debugging to be
  705. * able to display this message.
  706. */
  707. static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
  708. {
  709. netdev_dbg(mod->ndev, "IDVERS response: %s\n", msg->data);
  710. }
  711. static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
  712. {
  713. struct net_device *dev = mod->ndev;
  714. struct net_device_stats *stats = &dev->stats;
  715. struct can_frame *cf;
  716. struct sk_buff *skb;
  717. /*
  718. * Report that communication messages with the microcontroller firmware
  719. * are being lost. These are never CAN frames, so we do not generate an
  720. * error frame for userspace
  721. */
  722. if (msg->spec == MSG_MSGLOST) {
  723. netdev_err(mod->ndev, "lost %d control messages\n", msg->data[0]);
  724. return;
  725. }
  726. /*
  727. * Oops, this indicates that we have lost messages in the fast queue,
  728. * which are exclusively CAN messages. Our driver isn't reading CAN
  729. * frames fast enough.
  730. *
  731. * We'll pretend that the SJA1000 told us that it ran out of buffer
  732. * space, because there is not a better message for this.
  733. */
  734. skb = alloc_can_err_skb(dev, &cf);
  735. if (skb) {
  736. cf->can_id |= CAN_ERR_CRTL;
  737. cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
  738. stats->rx_over_errors++;
  739. stats->rx_errors++;
  740. netif_rx(skb);
  741. }
  742. }
  743. /*
  744. * Handle CAN Event Indication Messages from the firmware
  745. *
  746. * The ICAN3 firmware provides the values of some SJA1000 registers when it
  747. * generates this message. The code below is largely copied from the
  748. * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
  749. */
  750. static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
  751. {
  752. struct net_device *dev = mod->ndev;
  753. struct net_device_stats *stats = &dev->stats;
  754. enum can_state state = mod->can.state;
  755. u8 isrc, ecc, status, rxerr, txerr;
  756. struct can_frame *cf;
  757. struct sk_buff *skb;
  758. /* we can only handle the SJA1000 part */
  759. if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
  760. netdev_err(mod->ndev, "unable to handle errors on non-SJA1000\n");
  761. return -ENODEV;
  762. }
  763. /* check the message length for sanity */
  764. if (le16_to_cpu(msg->len) < 6) {
  765. netdev_err(mod->ndev, "error message too short\n");
  766. return -EINVAL;
  767. }
  768. isrc = msg->data[0];
  769. ecc = msg->data[2];
  770. status = msg->data[3];
  771. rxerr = msg->data[4];
  772. txerr = msg->data[5];
  773. /*
  774. * This hardware lacks any support other than bus error messages to
  775. * determine if packet transmission has failed.
  776. *
  777. * When TX errors happen, one echo skb needs to be dropped from the
  778. * front of the queue.
  779. *
  780. * A small bit of code is duplicated here and below, to avoid error
  781. * skb allocation when it will just be freed immediately.
  782. */
  783. if (isrc == CEVTIND_BEI) {
  784. int ret;
  785. netdev_dbg(mod->ndev, "bus error interrupt\n");
  786. /* TX error */
  787. if (!(ecc & ECC_DIR)) {
  788. kfree_skb(skb_dequeue(&mod->echoq));
  789. stats->tx_errors++;
  790. } else {
  791. stats->rx_errors++;
  792. }
  793. /*
  794. * The controller automatically disables bus-error interrupts
  795. * and therefore we must re-enable them.
  796. */
  797. ret = ican3_set_buserror(mod, 1);
  798. if (ret) {
  799. netdev_err(mod->ndev, "unable to re-enable bus-error\n");
  800. return ret;
  801. }
  802. /* bus error reporting is off, return immediately */
  803. if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
  804. return 0;
  805. }
  806. skb = alloc_can_err_skb(dev, &cf);
  807. if (skb == NULL)
  808. return -ENOMEM;
  809. /* data overrun interrupt */
  810. if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
  811. netdev_dbg(mod->ndev, "data overrun interrupt\n");
  812. cf->can_id |= CAN_ERR_CRTL;
  813. cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
  814. stats->rx_over_errors++;
  815. stats->rx_errors++;
  816. }
  817. /* error warning + passive interrupt */
  818. if (isrc == CEVTIND_EI) {
  819. netdev_dbg(mod->ndev, "error warning + passive interrupt\n");
  820. if (status & SR_BS) {
  821. state = CAN_STATE_BUS_OFF;
  822. cf->can_id |= CAN_ERR_BUSOFF;
  823. can_bus_off(dev);
  824. } else if (status & SR_ES) {
  825. if (rxerr >= 128 || txerr >= 128)
  826. state = CAN_STATE_ERROR_PASSIVE;
  827. else
  828. state = CAN_STATE_ERROR_WARNING;
  829. } else {
  830. state = CAN_STATE_ERROR_ACTIVE;
  831. }
  832. }
  833. /* bus error interrupt */
  834. if (isrc == CEVTIND_BEI) {
  835. mod->can.can_stats.bus_error++;
  836. cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
  837. switch (ecc & ECC_MASK) {
  838. case ECC_BIT:
  839. cf->data[2] |= CAN_ERR_PROT_BIT;
  840. break;
  841. case ECC_FORM:
  842. cf->data[2] |= CAN_ERR_PROT_FORM;
  843. break;
  844. case ECC_STUFF:
  845. cf->data[2] |= CAN_ERR_PROT_STUFF;
  846. break;
  847. default:
  848. cf->data[2] |= CAN_ERR_PROT_UNSPEC;
  849. cf->data[3] = ecc & ECC_SEG;
  850. break;
  851. }
  852. if (!(ecc & ECC_DIR))
  853. cf->data[2] |= CAN_ERR_PROT_TX;
  854. cf->data[6] = txerr;
  855. cf->data[7] = rxerr;
  856. }
  857. if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
  858. state == CAN_STATE_ERROR_PASSIVE)) {
  859. cf->can_id |= CAN_ERR_CRTL;
  860. if (state == CAN_STATE_ERROR_WARNING) {
  861. mod->can.can_stats.error_warning++;
  862. cf->data[1] = (txerr > rxerr) ?
  863. CAN_ERR_CRTL_TX_WARNING :
  864. CAN_ERR_CRTL_RX_WARNING;
  865. } else {
  866. mod->can.can_stats.error_passive++;
  867. cf->data[1] = (txerr > rxerr) ?
  868. CAN_ERR_CRTL_TX_PASSIVE :
  869. CAN_ERR_CRTL_RX_PASSIVE;
  870. }
  871. cf->data[6] = txerr;
  872. cf->data[7] = rxerr;
  873. }
  874. mod->can.state = state;
  875. netif_rx(skb);
  876. return 0;
  877. }
  878. static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
  879. {
  880. switch (msg->data[0]) {
  881. case INQUIRY_STATUS:
  882. case INQUIRY_EXTENDED:
  883. mod->bec.rxerr = msg->data[5];
  884. mod->bec.txerr = msg->data[6];
  885. complete(&mod->buserror_comp);
  886. break;
  887. case INQUIRY_TERMINATION:
  888. mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
  889. complete(&mod->termination_comp);
  890. break;
  891. default:
  892. netdev_err(mod->ndev, "received an unknown inquiry response\n");
  893. break;
  894. }
  895. }
  896. static void ican3_handle_unknown_message(struct ican3_dev *mod,
  897. struct ican3_msg *msg)
  898. {
  899. netdev_warn(mod->ndev, "received unknown message: spec 0x%.2x length %d\n",
  900. msg->spec, le16_to_cpu(msg->len));
  901. }
  902. /*
  903. * Handle a control message from the firmware
  904. */
  905. static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
  906. {
  907. netdev_dbg(mod->ndev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
  908. mod->num, msg->spec, le16_to_cpu(msg->len));
  909. switch (msg->spec) {
  910. case MSG_IDVERS:
  911. ican3_handle_idvers(mod, msg);
  912. break;
  913. case MSG_MSGLOST:
  914. case MSG_FMSGLOST:
  915. ican3_handle_msglost(mod, msg);
  916. break;
  917. case MSG_CEVTIND:
  918. ican3_handle_cevtind(mod, msg);
  919. break;
  920. case MSG_INQUIRY:
  921. ican3_handle_inquiry(mod, msg);
  922. break;
  923. default:
  924. ican3_handle_unknown_message(mod, msg);
  925. break;
  926. }
  927. }
  928. /*
  929. * The ican3 needs to store all echo skbs, and therefore cannot
  930. * use the generic infrastructure for this.
  931. */
  932. static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
  933. {
  934. skb = can_create_echo_skb(skb);
  935. if (!skb)
  936. return;
  937. /* save this skb for tx interrupt echo handling */
  938. skb_queue_tail(&mod->echoq, skb);
  939. }
  940. static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
  941. {
  942. struct sk_buff *skb = skb_dequeue(&mod->echoq);
  943. struct can_frame *cf;
  944. u8 dlc;
  945. /* this should never trigger unless there is a driver bug */
  946. if (!skb) {
  947. netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
  948. return 0;
  949. }
  950. cf = (struct can_frame *)skb->data;
  951. dlc = cf->can_dlc;
  952. /* check flag whether this packet has to be looped back */
  953. if (skb->pkt_type != PACKET_LOOPBACK) {
  954. kfree_skb(skb);
  955. return dlc;
  956. }
  957. skb->protocol = htons(ETH_P_CAN);
  958. skb->pkt_type = PACKET_BROADCAST;
  959. skb->ip_summed = CHECKSUM_UNNECESSARY;
  960. skb->dev = mod->ndev;
  961. netif_receive_skb(skb);
  962. return dlc;
  963. }
  964. /*
  965. * Compare an skb with an existing echo skb
  966. *
  967. * This function will be used on devices which have a hardware loopback.
  968. * On these devices, this function can be used to compare a received skb
  969. * with the saved echo skbs so that the hardware echo skb can be dropped.
  970. *
  971. * Returns true if the skb's are identical, false otherwise.
  972. */
  973. static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
  974. {
  975. struct can_frame *cf = (struct can_frame *)skb->data;
  976. struct sk_buff *echo_skb = skb_peek(&mod->echoq);
  977. struct can_frame *echo_cf;
  978. if (!echo_skb)
  979. return false;
  980. echo_cf = (struct can_frame *)echo_skb->data;
  981. if (cf->can_id != echo_cf->can_id)
  982. return false;
  983. if (cf->can_dlc != echo_cf->can_dlc)
  984. return false;
  985. return memcmp(cf->data, echo_cf->data, cf->can_dlc) == 0;
  986. }
  987. /*
  988. * Check that there is room in the TX ring to transmit another skb
  989. *
  990. * LOCKING: must hold mod->lock
  991. */
  992. static bool ican3_txok(struct ican3_dev *mod)
  993. {
  994. struct ican3_fast_desc __iomem *desc;
  995. u8 control;
  996. /* check that we have echo queue space */
  997. if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
  998. return false;
  999. /* copy the control bits of the descriptor */
  1000. ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
  1001. desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
  1002. control = ioread8(&desc->control);
  1003. /* if the control bits are not valid, then we have no more space */
  1004. if (!(control & DESC_VALID))
  1005. return false;
  1006. return true;
  1007. }
  1008. /*
  1009. * Receive one CAN frame from the hardware
  1010. *
  1011. * CONTEXT: must be called from user context
  1012. */
  1013. static int ican3_recv_skb(struct ican3_dev *mod)
  1014. {
  1015. struct net_device *ndev = mod->ndev;
  1016. struct net_device_stats *stats = &ndev->stats;
  1017. struct ican3_fast_desc desc;
  1018. void __iomem *desc_addr;
  1019. struct can_frame *cf;
  1020. struct sk_buff *skb;
  1021. unsigned long flags;
  1022. spin_lock_irqsave(&mod->lock, flags);
  1023. /* copy the whole descriptor */
  1024. ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
  1025. desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
  1026. memcpy_fromio(&desc, desc_addr, sizeof(desc));
  1027. spin_unlock_irqrestore(&mod->lock, flags);
  1028. /* check that we actually have a CAN frame */
  1029. if (!(desc.control & DESC_VALID))
  1030. return -ENOBUFS;
  1031. /* allocate an skb */
  1032. skb = alloc_can_skb(ndev, &cf);
  1033. if (unlikely(skb == NULL)) {
  1034. stats->rx_dropped++;
  1035. goto err_noalloc;
  1036. }
  1037. /* convert the ICAN3 frame into Linux CAN format */
  1038. ican3_to_can_frame(mod, &desc, cf);
  1039. /*
  1040. * If this is an ECHO frame received from the hardware loopback
  1041. * feature, use the skb saved in the ECHO stack instead. This allows
  1042. * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly.
  1043. *
  1044. * Since this is a confirmation of a successfully transmitted packet
  1045. * sent from this host, update the transmit statistics.
  1046. *
  1047. * Also, the netdevice queue needs to be allowed to send packets again.
  1048. */
  1049. if (ican3_echo_skb_matches(mod, skb)) {
  1050. stats->tx_packets++;
  1051. stats->tx_bytes += ican3_get_echo_skb(mod);
  1052. kfree_skb(skb);
  1053. goto err_noalloc;
  1054. }
  1055. /* update statistics, receive the skb */
  1056. stats->rx_packets++;
  1057. stats->rx_bytes += cf->can_dlc;
  1058. netif_receive_skb(skb);
  1059. err_noalloc:
  1060. /* toggle the valid bit and return the descriptor to the ring */
  1061. desc.control ^= DESC_VALID;
  1062. spin_lock_irqsave(&mod->lock, flags);
  1063. ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
  1064. memcpy_toio(desc_addr, &desc, 1);
  1065. /* update the next buffer pointer */
  1066. mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
  1067. : (mod->fastrx_num + 1);
  1068. /* there are still more buffers to process */
  1069. spin_unlock_irqrestore(&mod->lock, flags);
  1070. return 0;
  1071. }
  1072. static int ican3_napi(struct napi_struct *napi, int budget)
  1073. {
  1074. struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
  1075. unsigned long flags;
  1076. int received = 0;
  1077. int ret;
  1078. /* process all communication messages */
  1079. while (true) {
  1080. struct ican3_msg uninitialized_var(msg);
  1081. ret = ican3_recv_msg(mod, &msg);
  1082. if (ret)
  1083. break;
  1084. ican3_handle_message(mod, &msg);
  1085. }
  1086. /* process all CAN frames from the fast interface */
  1087. while (received < budget) {
  1088. ret = ican3_recv_skb(mod);
  1089. if (ret)
  1090. break;
  1091. received++;
  1092. }
  1093. /* We have processed all packets that the adapter had, but it
  1094. * was less than our budget, stop polling */
  1095. if (received < budget)
  1096. napi_complete(napi);
  1097. spin_lock_irqsave(&mod->lock, flags);
  1098. /* Wake up the transmit queue if necessary */
  1099. if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
  1100. netif_wake_queue(mod->ndev);
  1101. spin_unlock_irqrestore(&mod->lock, flags);
  1102. /* re-enable interrupt generation */
  1103. iowrite8(1 << mod->num, &mod->ctrl->int_enable);
  1104. return received;
  1105. }
  1106. static irqreturn_t ican3_irq(int irq, void *dev_id)
  1107. {
  1108. struct ican3_dev *mod = dev_id;
  1109. u8 stat;
  1110. /*
  1111. * The interrupt status register on this device reports interrupts
  1112. * as zeroes instead of using ones like most other devices
  1113. */
  1114. stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
  1115. if (stat == (1 << mod->num))
  1116. return IRQ_NONE;
  1117. /* clear the MODULbus interrupt from the microcontroller */
  1118. ioread8(&mod->dpmctrl->interrupt);
  1119. /* disable interrupt generation, schedule the NAPI poller */
  1120. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1121. napi_schedule(&mod->napi);
  1122. return IRQ_HANDLED;
  1123. }
  1124. /*
  1125. * Firmware reset, startup, and shutdown
  1126. */
  1127. /*
  1128. * Reset an ICAN module to its power-on state
  1129. *
  1130. * CONTEXT: no network device registered
  1131. */
  1132. static int ican3_reset_module(struct ican3_dev *mod)
  1133. {
  1134. unsigned long start;
  1135. u8 runold, runnew;
  1136. /* disable interrupts so no more work is scheduled */
  1137. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1138. /* the first unallocated page in the DPM is #9 */
  1139. mod->free_page = DPM_FREE_START;
  1140. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  1141. runold = ioread8(mod->dpm + TARGET_RUNNING);
  1142. /* reset the module */
  1143. iowrite8(0x00, &mod->dpmctrl->hwreset);
  1144. /* wait until the module has finished resetting and is running */
  1145. start = jiffies;
  1146. do {
  1147. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  1148. runnew = ioread8(mod->dpm + TARGET_RUNNING);
  1149. if (runnew == (runold ^ 0xff))
  1150. return 0;
  1151. msleep(10);
  1152. } while (time_before(jiffies, start + HZ / 4));
  1153. netdev_err(mod->ndev, "failed to reset CAN module\n");
  1154. return -ETIMEDOUT;
  1155. }
  1156. static void ican3_shutdown_module(struct ican3_dev *mod)
  1157. {
  1158. ican3_msg_disconnect(mod);
  1159. ican3_reset_module(mod);
  1160. }
  1161. /*
  1162. * Startup an ICAN module, bringing it into fast mode
  1163. */
  1164. static int ican3_startup_module(struct ican3_dev *mod)
  1165. {
  1166. int ret;
  1167. ret = ican3_reset_module(mod);
  1168. if (ret) {
  1169. netdev_err(mod->ndev, "unable to reset module\n");
  1170. return ret;
  1171. }
  1172. /* re-enable interrupts so we can send messages */
  1173. iowrite8(1 << mod->num, &mod->ctrl->int_enable);
  1174. ret = ican3_msg_connect(mod);
  1175. if (ret) {
  1176. netdev_err(mod->ndev, "unable to connect to module\n");
  1177. return ret;
  1178. }
  1179. ican3_init_new_host_interface(mod);
  1180. ret = ican3_msg_newhostif(mod);
  1181. if (ret) {
  1182. netdev_err(mod->ndev, "unable to switch to new-style interface\n");
  1183. return ret;
  1184. }
  1185. /* default to "termination on" */
  1186. ret = ican3_set_termination(mod, true);
  1187. if (ret) {
  1188. netdev_err(mod->ndev, "unable to enable termination\n");
  1189. return ret;
  1190. }
  1191. /* default to "bus errors enabled" */
  1192. ret = ican3_set_buserror(mod, 1);
  1193. if (ret) {
  1194. netdev_err(mod->ndev, "unable to set bus-error\n");
  1195. return ret;
  1196. }
  1197. ican3_init_fast_host_interface(mod);
  1198. ret = ican3_msg_fasthostif(mod);
  1199. if (ret) {
  1200. netdev_err(mod->ndev, "unable to switch to fast host interface\n");
  1201. return ret;
  1202. }
  1203. ret = ican3_set_id_filter(mod, true);
  1204. if (ret) {
  1205. netdev_err(mod->ndev, "unable to set acceptance filter\n");
  1206. return ret;
  1207. }
  1208. return 0;
  1209. }
  1210. /*
  1211. * CAN Network Device
  1212. */
  1213. static int ican3_open(struct net_device *ndev)
  1214. {
  1215. struct ican3_dev *mod = netdev_priv(ndev);
  1216. int ret;
  1217. /* open the CAN layer */
  1218. ret = open_candev(ndev);
  1219. if (ret) {
  1220. netdev_err(mod->ndev, "unable to start CAN layer\n");
  1221. return ret;
  1222. }
  1223. /* bring the bus online */
  1224. ret = ican3_set_bus_state(mod, true);
  1225. if (ret) {
  1226. netdev_err(mod->ndev, "unable to set bus-on\n");
  1227. close_candev(ndev);
  1228. return ret;
  1229. }
  1230. /* start up the network device */
  1231. mod->can.state = CAN_STATE_ERROR_ACTIVE;
  1232. netif_start_queue(ndev);
  1233. return 0;
  1234. }
  1235. static int ican3_stop(struct net_device *ndev)
  1236. {
  1237. struct ican3_dev *mod = netdev_priv(ndev);
  1238. int ret;
  1239. /* stop the network device xmit routine */
  1240. netif_stop_queue(ndev);
  1241. mod->can.state = CAN_STATE_STOPPED;
  1242. /* bring the bus offline, stop receiving packets */
  1243. ret = ican3_set_bus_state(mod, false);
  1244. if (ret) {
  1245. netdev_err(mod->ndev, "unable to set bus-off\n");
  1246. return ret;
  1247. }
  1248. /* drop all outstanding echo skbs */
  1249. skb_queue_purge(&mod->echoq);
  1250. /* close the CAN layer */
  1251. close_candev(ndev);
  1252. return 0;
  1253. }
  1254. static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
  1255. {
  1256. struct ican3_dev *mod = netdev_priv(ndev);
  1257. struct can_frame *cf = (struct can_frame *)skb->data;
  1258. struct ican3_fast_desc desc;
  1259. void __iomem *desc_addr;
  1260. unsigned long flags;
  1261. if (can_dropped_invalid_skb(ndev, skb))
  1262. return NETDEV_TX_OK;
  1263. spin_lock_irqsave(&mod->lock, flags);
  1264. /* check that we can actually transmit */
  1265. if (!ican3_txok(mod)) {
  1266. netdev_err(mod->ndev, "BUG: no free descriptors\n");
  1267. spin_unlock_irqrestore(&mod->lock, flags);
  1268. return NETDEV_TX_BUSY;
  1269. }
  1270. /* copy the control bits of the descriptor */
  1271. ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
  1272. desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
  1273. memset(&desc, 0, sizeof(desc));
  1274. memcpy_fromio(&desc, desc_addr, 1);
  1275. /* convert the Linux CAN frame into ICAN3 format */
  1276. can_frame_to_ican3(mod, cf, &desc);
  1277. /*
  1278. * This hardware doesn't have TX-done notifications, so we'll try and
  1279. * emulate it the best we can using ECHO skbs. Add the skb to the ECHO
  1280. * stack. Upon packet reception, check if the ECHO skb and received
  1281. * skb match, and use that to wake the queue.
  1282. */
  1283. ican3_put_echo_skb(mod, skb);
  1284. /*
  1285. * the programming manual says that you must set the IVALID bit, then
  1286. * interrupt, then set the valid bit. Quite weird, but it seems to be
  1287. * required for this to work
  1288. */
  1289. desc.control |= DESC_IVALID;
  1290. memcpy_toio(desc_addr, &desc, sizeof(desc));
  1291. /* generate a MODULbus interrupt to the microcontroller */
  1292. iowrite8(0x01, &mod->dpmctrl->interrupt);
  1293. desc.control ^= DESC_VALID;
  1294. memcpy_toio(desc_addr, &desc, sizeof(desc));
  1295. /* update the next buffer pointer */
  1296. mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
  1297. : (mod->fasttx_num + 1);
  1298. /* if there is no free descriptor space, stop the transmit queue */
  1299. if (!ican3_txok(mod))
  1300. netif_stop_queue(ndev);
  1301. spin_unlock_irqrestore(&mod->lock, flags);
  1302. return NETDEV_TX_OK;
  1303. }
  1304. static const struct net_device_ops ican3_netdev_ops = {
  1305. .ndo_open = ican3_open,
  1306. .ndo_stop = ican3_stop,
  1307. .ndo_start_xmit = ican3_xmit,
  1308. .ndo_change_mtu = can_change_mtu,
  1309. };
  1310. /*
  1311. * Low-level CAN Device
  1312. */
  1313. /* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
  1314. static const struct can_bittiming_const ican3_bittiming_const = {
  1315. .name = DRV_NAME,
  1316. .tseg1_min = 1,
  1317. .tseg1_max = 16,
  1318. .tseg2_min = 1,
  1319. .tseg2_max = 8,
  1320. .sjw_max = 4,
  1321. .brp_min = 1,
  1322. .brp_max = 64,
  1323. .brp_inc = 1,
  1324. };
  1325. /*
  1326. * This routine was stolen from drivers/net/can/sja1000/sja1000.c
  1327. *
  1328. * The bittiming register command for the ICAN3 just sets the bit timing
  1329. * registers on the SJA1000 chip directly
  1330. */
  1331. static int ican3_set_bittiming(struct net_device *ndev)
  1332. {
  1333. struct ican3_dev *mod = netdev_priv(ndev);
  1334. struct can_bittiming *bt = &mod->can.bittiming;
  1335. struct ican3_msg msg;
  1336. u8 btr0, btr1;
  1337. btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
  1338. btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
  1339. (((bt->phase_seg2 - 1) & 0x7) << 4);
  1340. if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
  1341. btr1 |= 0x80;
  1342. memset(&msg, 0, sizeof(msg));
  1343. msg.spec = MSG_CBTRREQ;
  1344. msg.len = cpu_to_le16(4);
  1345. msg.data[0] = 0x00;
  1346. msg.data[1] = 0x00;
  1347. msg.data[2] = btr0;
  1348. msg.data[3] = btr1;
  1349. return ican3_send_msg(mod, &msg);
  1350. }
  1351. static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
  1352. {
  1353. struct ican3_dev *mod = netdev_priv(ndev);
  1354. int ret;
  1355. if (mode != CAN_MODE_START)
  1356. return -ENOTSUPP;
  1357. /* bring the bus online */
  1358. ret = ican3_set_bus_state(mod, true);
  1359. if (ret) {
  1360. netdev_err(ndev, "unable to set bus-on\n");
  1361. return ret;
  1362. }
  1363. /* start up the network device */
  1364. mod->can.state = CAN_STATE_ERROR_ACTIVE;
  1365. if (netif_queue_stopped(ndev))
  1366. netif_wake_queue(ndev);
  1367. return 0;
  1368. }
  1369. static int ican3_get_berr_counter(const struct net_device *ndev,
  1370. struct can_berr_counter *bec)
  1371. {
  1372. struct ican3_dev *mod = netdev_priv(ndev);
  1373. int ret;
  1374. ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
  1375. if (ret)
  1376. return ret;
  1377. ret = wait_for_completion_timeout(&mod->buserror_comp, HZ);
  1378. if (ret == 0) {
  1379. netdev_info(mod->ndev, "%s timed out\n", __func__);
  1380. return -ETIMEDOUT;
  1381. }
  1382. bec->rxerr = mod->bec.rxerr;
  1383. bec->txerr = mod->bec.txerr;
  1384. return 0;
  1385. }
  1386. /*
  1387. * Sysfs Attributes
  1388. */
  1389. static ssize_t ican3_sysfs_show_term(struct device *dev,
  1390. struct device_attribute *attr,
  1391. char *buf)
  1392. {
  1393. struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
  1394. int ret;
  1395. ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
  1396. if (ret)
  1397. return ret;
  1398. ret = wait_for_completion_timeout(&mod->termination_comp, HZ);
  1399. if (ret == 0) {
  1400. netdev_info(mod->ndev, "%s timed out\n", __func__);
  1401. return -ETIMEDOUT;
  1402. }
  1403. return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled);
  1404. }
  1405. static ssize_t ican3_sysfs_set_term(struct device *dev,
  1406. struct device_attribute *attr,
  1407. const char *buf, size_t count)
  1408. {
  1409. struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
  1410. unsigned long enable;
  1411. int ret;
  1412. if (kstrtoul(buf, 0, &enable))
  1413. return -EINVAL;
  1414. ret = ican3_set_termination(mod, enable);
  1415. if (ret)
  1416. return ret;
  1417. return count;
  1418. }
  1419. static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term,
  1420. ican3_sysfs_set_term);
  1421. static struct attribute *ican3_sysfs_attrs[] = {
  1422. &dev_attr_termination.attr,
  1423. NULL,
  1424. };
  1425. static struct attribute_group ican3_sysfs_attr_group = {
  1426. .attrs = ican3_sysfs_attrs,
  1427. };
  1428. /*
  1429. * PCI Subsystem
  1430. */
  1431. static int ican3_probe(struct platform_device *pdev)
  1432. {
  1433. struct janz_platform_data *pdata;
  1434. struct net_device *ndev;
  1435. struct ican3_dev *mod;
  1436. struct resource *res;
  1437. struct device *dev;
  1438. int ret;
  1439. pdata = dev_get_platdata(&pdev->dev);
  1440. if (!pdata)
  1441. return -ENXIO;
  1442. dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
  1443. /* save the struct device for printing */
  1444. dev = &pdev->dev;
  1445. /* allocate the CAN device and private data */
  1446. ndev = alloc_candev(sizeof(*mod), 0);
  1447. if (!ndev) {
  1448. dev_err(dev, "unable to allocate CANdev\n");
  1449. ret = -ENOMEM;
  1450. goto out_return;
  1451. }
  1452. platform_set_drvdata(pdev, ndev);
  1453. mod = netdev_priv(ndev);
  1454. mod->ndev = ndev;
  1455. mod->num = pdata->modno;
  1456. netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
  1457. skb_queue_head_init(&mod->echoq);
  1458. spin_lock_init(&mod->lock);
  1459. init_completion(&mod->termination_comp);
  1460. init_completion(&mod->buserror_comp);
  1461. /* setup device-specific sysfs attributes */
  1462. ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
  1463. /* the first unallocated page in the DPM is 9 */
  1464. mod->free_page = DPM_FREE_START;
  1465. ndev->netdev_ops = &ican3_netdev_ops;
  1466. ndev->flags |= IFF_ECHO;
  1467. SET_NETDEV_DEV(ndev, &pdev->dev);
  1468. mod->can.clock.freq = ICAN3_CAN_CLOCK;
  1469. mod->can.bittiming_const = &ican3_bittiming_const;
  1470. mod->can.do_set_bittiming = ican3_set_bittiming;
  1471. mod->can.do_set_mode = ican3_set_mode;
  1472. mod->can.do_get_berr_counter = ican3_get_berr_counter;
  1473. mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
  1474. | CAN_CTRLMODE_BERR_REPORTING
  1475. | CAN_CTRLMODE_ONE_SHOT;
  1476. /* find our IRQ number */
  1477. mod->irq = platform_get_irq(pdev, 0);
  1478. if (mod->irq < 0) {
  1479. dev_err(dev, "IRQ line not found\n");
  1480. ret = -ENODEV;
  1481. goto out_free_ndev;
  1482. }
  1483. ndev->irq = mod->irq;
  1484. /* get access to the MODULbus registers for this module */
  1485. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1486. if (!res) {
  1487. dev_err(dev, "MODULbus registers not found\n");
  1488. ret = -ENODEV;
  1489. goto out_free_ndev;
  1490. }
  1491. mod->dpm = ioremap(res->start, resource_size(res));
  1492. if (!mod->dpm) {
  1493. dev_err(dev, "MODULbus registers not ioremap\n");
  1494. ret = -ENOMEM;
  1495. goto out_free_ndev;
  1496. }
  1497. mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
  1498. /* get access to the control registers for this module */
  1499. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  1500. if (!res) {
  1501. dev_err(dev, "CONTROL registers not found\n");
  1502. ret = -ENODEV;
  1503. goto out_iounmap_dpm;
  1504. }
  1505. mod->ctrl = ioremap(res->start, resource_size(res));
  1506. if (!mod->ctrl) {
  1507. dev_err(dev, "CONTROL registers not ioremap\n");
  1508. ret = -ENOMEM;
  1509. goto out_iounmap_dpm;
  1510. }
  1511. /* disable our IRQ, then hookup the IRQ handler */
  1512. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1513. ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
  1514. if (ret) {
  1515. dev_err(dev, "unable to request IRQ\n");
  1516. goto out_iounmap_ctrl;
  1517. }
  1518. /* reset and initialize the CAN controller into fast mode */
  1519. napi_enable(&mod->napi);
  1520. ret = ican3_startup_module(mod);
  1521. if (ret) {
  1522. dev_err(dev, "%s: unable to start CANdev\n", __func__);
  1523. goto out_free_irq;
  1524. }
  1525. /* register with the Linux CAN layer */
  1526. ret = register_candev(ndev);
  1527. if (ret) {
  1528. dev_err(dev, "%s: unable to register CANdev\n", __func__);
  1529. goto out_free_irq;
  1530. }
  1531. dev_info(dev, "module %d: registered CAN device\n", pdata->modno);
  1532. return 0;
  1533. out_free_irq:
  1534. napi_disable(&mod->napi);
  1535. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1536. free_irq(mod->irq, mod);
  1537. out_iounmap_ctrl:
  1538. iounmap(mod->ctrl);
  1539. out_iounmap_dpm:
  1540. iounmap(mod->dpm);
  1541. out_free_ndev:
  1542. free_candev(ndev);
  1543. out_return:
  1544. return ret;
  1545. }
  1546. static int ican3_remove(struct platform_device *pdev)
  1547. {
  1548. struct net_device *ndev = platform_get_drvdata(pdev);
  1549. struct ican3_dev *mod = netdev_priv(ndev);
  1550. /* unregister the netdevice, stop interrupts */
  1551. unregister_netdev(ndev);
  1552. napi_disable(&mod->napi);
  1553. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1554. free_irq(mod->irq, mod);
  1555. /* put the module into reset */
  1556. ican3_shutdown_module(mod);
  1557. /* unmap all registers */
  1558. iounmap(mod->ctrl);
  1559. iounmap(mod->dpm);
  1560. free_candev(ndev);
  1561. return 0;
  1562. }
  1563. static struct platform_driver ican3_driver = {
  1564. .driver = {
  1565. .name = DRV_NAME,
  1566. .owner = THIS_MODULE,
  1567. },
  1568. .probe = ican3_probe,
  1569. .remove = ican3_remove,
  1570. };
  1571. module_platform_driver(ican3_driver);
  1572. MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
  1573. MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
  1574. MODULE_LICENSE("GPL");
  1575. MODULE_ALIAS("platform:janz-ican3");