sdhci-bcm-kona.c 10 KB

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  1. /*
  2. * Copyright (C) 2013 Broadcom Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation version 2.
  7. *
  8. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  9. * kind, whether express or implied; without even the implied warranty
  10. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/delay.h>
  16. #include <linux/highmem.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/mmc/host.h>
  19. #include <linux/io.h>
  20. #include <linux/gpio.h>
  21. #include <linux/clk.h>
  22. #include <linux/regulator/consumer.h>
  23. #include <linux/of.h>
  24. #include <linux/of_device.h>
  25. #include <linux/of_gpio.h>
  26. #include <linux/mmc/slot-gpio.h>
  27. #include "sdhci-pltfm.h"
  28. #include "sdhci.h"
  29. #define SDHCI_SOFT_RESET 0x01000000
  30. #define KONA_SDHOST_CORECTRL 0x8000
  31. #define KONA_SDHOST_CD_PINCTRL 0x00000008
  32. #define KONA_SDHOST_STOP_HCLK 0x00000004
  33. #define KONA_SDHOST_RESET 0x00000002
  34. #define KONA_SDHOST_EN 0x00000001
  35. #define KONA_SDHOST_CORESTAT 0x8004
  36. #define KONA_SDHOST_WP 0x00000002
  37. #define KONA_SDHOST_CD_SW 0x00000001
  38. #define KONA_SDHOST_COREIMR 0x8008
  39. #define KONA_SDHOST_IP 0x00000001
  40. #define KONA_SDHOST_COREISR 0x800C
  41. #define KONA_SDHOST_COREIMSR 0x8010
  42. #define KONA_SDHOST_COREDBG1 0x8014
  43. #define KONA_SDHOST_COREGPO_MASK 0x8018
  44. #define SD_DETECT_GPIO_DEBOUNCE_128MS 128
  45. #define KONA_MMC_AUTOSUSPEND_DELAY (50)
  46. struct sdhci_bcm_kona_dev {
  47. struct mutex write_lock; /* protect back to back writes */
  48. struct clk *external_clk;
  49. };
  50. static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host)
  51. {
  52. unsigned int val;
  53. unsigned long timeout;
  54. /* This timeout should be sufficent for core to reset */
  55. timeout = jiffies + msecs_to_jiffies(100);
  56. /* reset the host using the top level reset */
  57. val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  58. val |= KONA_SDHOST_RESET;
  59. sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  60. while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) {
  61. if (time_is_before_jiffies(timeout)) {
  62. pr_err("Error: sd host is stuck in reset!!!\n");
  63. return -EFAULT;
  64. }
  65. }
  66. /* bring the host out of reset */
  67. val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  68. val &= ~KONA_SDHOST_RESET;
  69. /*
  70. * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
  71. * Back-to-Back writes to same register needs delay when SD bus clock
  72. * is very low w.r.t AHB clock, mainly during boot-time and during card
  73. * insert-removal.
  74. */
  75. usleep_range(1000, 5000);
  76. sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  77. return 0;
  78. }
  79. static void sdhci_bcm_kona_sd_init(struct sdhci_host *host)
  80. {
  81. unsigned int val;
  82. /* enable the interrupt from the IP core */
  83. val = sdhci_readl(host, KONA_SDHOST_COREIMR);
  84. val |= KONA_SDHOST_IP;
  85. sdhci_writel(host, val, KONA_SDHOST_COREIMR);
  86. /* Enable the AHB clock gating module to the host */
  87. val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  88. val |= KONA_SDHOST_EN;
  89. /*
  90. * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
  91. * Back-to-Back writes to same register needs delay when SD bus clock
  92. * is very low w.r.t AHB clock, mainly during boot-time and during card
  93. * insert-removal.
  94. */
  95. usleep_range(1000, 5000);
  96. sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  97. }
  98. /*
  99. * Software emulation of the SD card insertion/removal. Set insert=1 for insert
  100. * and insert=0 for removal. The card detection is done by GPIO. For Broadcom
  101. * IP to function properly the bit 0 of CORESTAT register needs to be set/reset
  102. * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet.
  103. */
  104. static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert)
  105. {
  106. struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
  107. struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
  108. u32 val;
  109. /*
  110. * Back-to-Back register write needs a delay of min 10uS.
  111. * Back-to-Back writes to same register needs delay when SD bus clock
  112. * is very low w.r.t AHB clock, mainly during boot-time and during card
  113. * insert-removal.
  114. * We keep 20uS
  115. */
  116. mutex_lock(&kona_dev->write_lock);
  117. udelay(20);
  118. val = sdhci_readl(host, KONA_SDHOST_CORESTAT);
  119. if (insert) {
  120. int ret;
  121. ret = mmc_gpio_get_ro(host->mmc);
  122. if (ret >= 0)
  123. val = (val & ~KONA_SDHOST_WP) |
  124. ((ret) ? KONA_SDHOST_WP : 0);
  125. val |= KONA_SDHOST_CD_SW;
  126. sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
  127. } else {
  128. val &= ~KONA_SDHOST_CD_SW;
  129. sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
  130. }
  131. mutex_unlock(&kona_dev->write_lock);
  132. return 0;
  133. }
  134. /*
  135. * SD card interrupt event callback
  136. */
  137. static void sdhci_bcm_kona_card_event(struct sdhci_host *host)
  138. {
  139. if (mmc_gpio_get_cd(host->mmc) > 0) {
  140. dev_dbg(mmc_dev(host->mmc),
  141. "card inserted\n");
  142. sdhci_bcm_kona_sd_card_emulate(host, 1);
  143. } else {
  144. dev_dbg(mmc_dev(host->mmc),
  145. "card removed\n");
  146. sdhci_bcm_kona_sd_card_emulate(host, 0);
  147. }
  148. }
  149. /*
  150. * Get the base clock. Use central clock source for now. Not sure if different
  151. * clock speed to each dev is allowed
  152. */
  153. static unsigned int sdhci_bcm_kona_get_max_clk(struct sdhci_host *host)
  154. {
  155. struct sdhci_bcm_kona_dev *kona_dev;
  156. struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
  157. kona_dev = sdhci_pltfm_priv(pltfm_priv);
  158. return host->mmc->f_max;
  159. }
  160. static unsigned int sdhci_bcm_kona_get_timeout_clock(struct sdhci_host *host)
  161. {
  162. return sdhci_bcm_kona_get_max_clk(host);
  163. }
  164. static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host,
  165. u8 power_mode)
  166. {
  167. /*
  168. * JEDEC and SD spec specify supplying 74 continuous clocks to
  169. * device after power up. With minimum bus (100KHz) that
  170. * that translates to 740us
  171. */
  172. if (power_mode != MMC_POWER_OFF)
  173. udelay(740);
  174. }
  175. static struct sdhci_ops sdhci_bcm_kona_ops = {
  176. .set_clock = sdhci_set_clock,
  177. .get_max_clock = sdhci_bcm_kona_get_max_clk,
  178. .get_timeout_clock = sdhci_bcm_kona_get_timeout_clock,
  179. .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
  180. .set_bus_width = sdhci_set_bus_width,
  181. .reset = sdhci_reset,
  182. .set_uhs_signaling = sdhci_set_uhs_signaling,
  183. .card_event = sdhci_bcm_kona_card_event,
  184. };
  185. static struct sdhci_pltfm_data sdhci_pltfm_data_kona = {
  186. .ops = &sdhci_bcm_kona_ops,
  187. .quirks = SDHCI_QUIRK_NO_CARD_NO_RESET |
  188. SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_32BIT_DMA_ADDR |
  189. SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE |
  190. SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
  191. SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
  192. };
  193. static struct __initconst of_device_id sdhci_bcm_kona_of_match[] = {
  194. { .compatible = "brcm,kona-sdhci"},
  195. { .compatible = "bcm,kona-sdhci"}, /* deprecated name */
  196. {}
  197. };
  198. MODULE_DEVICE_TABLE(of, sdhci_bcm_kona_of_match);
  199. static int sdhci_bcm_kona_probe(struct platform_device *pdev)
  200. {
  201. struct sdhci_bcm_kona_dev *kona_dev = NULL;
  202. struct sdhci_pltfm_host *pltfm_priv;
  203. struct device *dev = &pdev->dev;
  204. struct sdhci_host *host;
  205. int ret;
  206. ret = 0;
  207. host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona,
  208. sizeof(*kona_dev));
  209. if (IS_ERR(host))
  210. return PTR_ERR(host);
  211. dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr);
  212. pltfm_priv = sdhci_priv(host);
  213. kona_dev = sdhci_pltfm_priv(pltfm_priv);
  214. mutex_init(&kona_dev->write_lock);
  215. mmc_of_parse(host->mmc);
  216. if (!host->mmc->f_max) {
  217. dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n");
  218. ret = -ENXIO;
  219. goto err_pltfm_free;
  220. }
  221. /* Get and enable the external clock */
  222. kona_dev->external_clk = devm_clk_get(dev, NULL);
  223. if (IS_ERR(kona_dev->external_clk)) {
  224. dev_err(dev, "Failed to get external clock\n");
  225. ret = PTR_ERR(kona_dev->external_clk);
  226. goto err_pltfm_free;
  227. }
  228. if (clk_set_rate(kona_dev->external_clk, host->mmc->f_max) != 0) {
  229. dev_err(dev, "Failed to set rate external clock\n");
  230. goto err_pltfm_free;
  231. }
  232. if (clk_prepare_enable(kona_dev->external_clk) != 0) {
  233. dev_err(dev, "Failed to enable external clock\n");
  234. goto err_pltfm_free;
  235. }
  236. dev_dbg(dev, "non-removable=%c\n",
  237. (host->mmc->caps & MMC_CAP_NONREMOVABLE) ? 'Y' : 'N');
  238. dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n",
  239. (mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N',
  240. (mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N');
  241. if (host->mmc->caps & MMC_CAP_NONREMOVABLE)
  242. host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
  243. dev_dbg(dev, "is_8bit=%c\n",
  244. (host->mmc->caps | MMC_CAP_8_BIT_DATA) ? 'Y' : 'N');
  245. ret = sdhci_bcm_kona_sd_reset(host);
  246. if (ret)
  247. goto err_clk_disable;
  248. sdhci_bcm_kona_sd_init(host);
  249. ret = sdhci_add_host(host);
  250. if (ret) {
  251. dev_err(dev, "Failed sdhci_add_host\n");
  252. goto err_reset;
  253. }
  254. /* if device is eMMC, emulate card insert right here */
  255. if (host->mmc->caps & MMC_CAP_NONREMOVABLE) {
  256. ret = sdhci_bcm_kona_sd_card_emulate(host, 1);
  257. if (ret) {
  258. dev_err(dev,
  259. "unable to emulate card insertion\n");
  260. goto err_remove_host;
  261. }
  262. }
  263. /*
  264. * Since the card detection GPIO interrupt is configured to be
  265. * edge sensitive, check the initial GPIO value here, emulate
  266. * only if the card is present
  267. */
  268. if (mmc_gpio_get_cd(host->mmc) > 0)
  269. sdhci_bcm_kona_sd_card_emulate(host, 1);
  270. dev_dbg(dev, "initialized properly\n");
  271. return 0;
  272. err_remove_host:
  273. sdhci_remove_host(host, 0);
  274. err_reset:
  275. sdhci_bcm_kona_sd_reset(host);
  276. err_clk_disable:
  277. clk_disable_unprepare(kona_dev->external_clk);
  278. err_pltfm_free:
  279. sdhci_pltfm_free(pdev);
  280. dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret);
  281. return ret;
  282. }
  283. static int sdhci_bcm_kona_remove(struct platform_device *pdev)
  284. {
  285. struct sdhci_host *host = platform_get_drvdata(pdev);
  286. struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
  287. struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
  288. int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
  289. sdhci_remove_host(host, dead);
  290. clk_disable_unprepare(kona_dev->external_clk);
  291. sdhci_pltfm_free(pdev);
  292. return 0;
  293. }
  294. static struct platform_driver sdhci_bcm_kona_driver = {
  295. .driver = {
  296. .name = "sdhci-kona",
  297. .owner = THIS_MODULE,
  298. .pm = SDHCI_PLTFM_PMOPS,
  299. .of_match_table = sdhci_bcm_kona_of_match,
  300. },
  301. .probe = sdhci_bcm_kona_probe,
  302. .remove = sdhci_bcm_kona_remove,
  303. };
  304. module_platform_driver(sdhci_bcm_kona_driver);
  305. MODULE_DESCRIPTION("SDHCI driver for Broadcom Kona platform");
  306. MODULE_AUTHOR("Broadcom");
  307. MODULE_LICENSE("GPL v2");