Kconfig 2.1 KB

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  1. #
  2. # Memory devices
  3. #
  4. menuconfig MEMORY
  5. bool "Memory Controller drivers"
  6. if MEMORY
  7. config TI_AEMIF
  8. tristate "Texas Instruments AEMIF driver"
  9. depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
  10. help
  11. This driver is for the AEMIF module available in Texas Instruments
  12. SoCs. AEMIF stands for Asynchronous External Memory Interface and
  13. is intended to provide a glue-less interface to a variety of
  14. asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
  15. of 256M bytes of any of these memories can be accessed at a given
  16. time via four chip selects with 64M byte access per chip select.
  17. config TI_EMIF
  18. tristate "Texas Instruments EMIF driver"
  19. depends on ARCH_OMAP2PLUS
  20. select DDR
  21. help
  22. This driver is for the EMIF module available in Texas Instruments
  23. SoCs. EMIF is an SDRAM controller that, based on its revision,
  24. supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
  25. This driver takes care of only LPDDR2 memories presently. The
  26. functions of the driver includes re-configuring AC timing
  27. parameters and other settings during frequency, voltage and
  28. temperature changes
  29. config MVEBU_DEVBUS
  30. bool "Marvell EBU Device Bus Controller"
  31. default y
  32. depends on PLAT_ORION && OF
  33. help
  34. This driver is for the Device Bus controller available in some
  35. Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
  36. Armada 370 and Armada XP. This controller allows to handle flash
  37. devices such as NOR, NAND, SRAM, and FPGA.
  38. config TEGRA20_MC
  39. bool "Tegra20 Memory Controller(MC) driver"
  40. default y
  41. depends on ARCH_TEGRA_2x_SOC
  42. help
  43. This driver is for the Memory Controller(MC) module available
  44. in Tegra20 SoCs, mainly for a address translation fault
  45. analysis, especially for IOMMU/GART(Graphics Address
  46. Relocation Table) module.
  47. config TEGRA30_MC
  48. bool "Tegra30 Memory Controller(MC) driver"
  49. default y
  50. depends on ARCH_TEGRA_3x_SOC
  51. help
  52. This driver is for the Memory Controller(MC) module available
  53. in Tegra30 SoCs, mainly for a address translation fault
  54. analysis, especially for IOMMU/SMMU(System Memory Management
  55. Unit) module.
  56. config FSL_IFC
  57. bool
  58. depends on FSL_SOC
  59. endif