m88ts2022.c 14 KB

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  1. /*
  2. * Montage M88TS2022 silicon tuner driver
  3. *
  4. * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * Some calculations are taken from existing TS2020 driver.
  17. */
  18. #include "m88ts2022_priv.h"
  19. /* write multiple registers */
  20. static int m88ts2022_wr_regs(struct m88ts2022_priv *priv,
  21. u8 reg, const u8 *val, int len)
  22. {
  23. #define MAX_WR_LEN 3
  24. #define MAX_WR_XFER_LEN (MAX_WR_LEN + 1)
  25. int ret;
  26. u8 buf[MAX_WR_XFER_LEN];
  27. struct i2c_msg msg[1] = {
  28. {
  29. .addr = priv->client->addr,
  30. .flags = 0,
  31. .len = 1 + len,
  32. .buf = buf,
  33. }
  34. };
  35. if (WARN_ON(len > MAX_WR_LEN))
  36. return -EINVAL;
  37. buf[0] = reg;
  38. memcpy(&buf[1], val, len);
  39. ret = i2c_transfer(priv->client->adapter, msg, 1);
  40. if (ret == 1) {
  41. ret = 0;
  42. } else {
  43. dev_warn(&priv->client->dev,
  44. "%s: i2c wr failed=%d reg=%02x len=%d\n",
  45. KBUILD_MODNAME, ret, reg, len);
  46. ret = -EREMOTEIO;
  47. }
  48. return ret;
  49. }
  50. /* read multiple registers */
  51. static int m88ts2022_rd_regs(struct m88ts2022_priv *priv, u8 reg,
  52. u8 *val, int len)
  53. {
  54. #define MAX_RD_LEN 1
  55. #define MAX_RD_XFER_LEN (MAX_RD_LEN)
  56. int ret;
  57. u8 buf[MAX_RD_XFER_LEN];
  58. struct i2c_msg msg[2] = {
  59. {
  60. .addr = priv->client->addr,
  61. .flags = 0,
  62. .len = 1,
  63. .buf = &reg,
  64. }, {
  65. .addr = priv->client->addr,
  66. .flags = I2C_M_RD,
  67. .len = len,
  68. .buf = buf,
  69. }
  70. };
  71. if (WARN_ON(len > MAX_RD_LEN))
  72. return -EINVAL;
  73. ret = i2c_transfer(priv->client->adapter, msg, 2);
  74. if (ret == 2) {
  75. memcpy(val, buf, len);
  76. ret = 0;
  77. } else {
  78. dev_warn(&priv->client->dev,
  79. "%s: i2c rd failed=%d reg=%02x len=%d\n",
  80. KBUILD_MODNAME, ret, reg, len);
  81. ret = -EREMOTEIO;
  82. }
  83. return ret;
  84. }
  85. /* write single register */
  86. static int m88ts2022_wr_reg(struct m88ts2022_priv *priv, u8 reg, u8 val)
  87. {
  88. return m88ts2022_wr_regs(priv, reg, &val, 1);
  89. }
  90. /* read single register */
  91. static int m88ts2022_rd_reg(struct m88ts2022_priv *priv, u8 reg, u8 *val)
  92. {
  93. return m88ts2022_rd_regs(priv, reg, val, 1);
  94. }
  95. /* write single register with mask */
  96. static int m88ts2022_wr_reg_mask(struct m88ts2022_priv *priv,
  97. u8 reg, u8 val, u8 mask)
  98. {
  99. int ret;
  100. u8 u8tmp;
  101. /* no need for read if whole reg is written */
  102. if (mask != 0xff) {
  103. ret = m88ts2022_rd_regs(priv, reg, &u8tmp, 1);
  104. if (ret)
  105. return ret;
  106. val &= mask;
  107. u8tmp &= ~mask;
  108. val |= u8tmp;
  109. }
  110. return m88ts2022_wr_regs(priv, reg, &val, 1);
  111. }
  112. static int m88ts2022_cmd(struct dvb_frontend *fe,
  113. int op, int sleep, u8 reg, u8 mask, u8 val, u8 *reg_val)
  114. {
  115. struct m88ts2022_priv *priv = fe->tuner_priv;
  116. int ret, i;
  117. u8 u8tmp;
  118. struct m88ts2022_reg_val reg_vals[] = {
  119. {0x51, 0x1f - op},
  120. {0x51, 0x1f},
  121. {0x50, 0x00 + op},
  122. {0x50, 0x00},
  123. };
  124. for (i = 0; i < 2; i++) {
  125. dev_dbg(&priv->client->dev,
  126. "%s: i=%d op=%02x reg=%02x mask=%02x val=%02x\n",
  127. __func__, i, op, reg, mask, val);
  128. for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
  129. ret = m88ts2022_wr_reg(priv, reg_vals[i].reg,
  130. reg_vals[i].val);
  131. if (ret)
  132. goto err;
  133. }
  134. usleep_range(sleep * 1000, sleep * 10000);
  135. ret = m88ts2022_rd_reg(priv, reg, &u8tmp);
  136. if (ret)
  137. goto err;
  138. if ((u8tmp & mask) != val)
  139. break;
  140. }
  141. if (reg_val)
  142. *reg_val = u8tmp;
  143. err:
  144. return ret;
  145. }
  146. static int m88ts2022_set_params(struct dvb_frontend *fe)
  147. {
  148. struct m88ts2022_priv *priv = fe->tuner_priv;
  149. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  150. int ret;
  151. unsigned int frequency_khz, frequency_offset_khz, f_3db_hz;
  152. unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n, gdiv28;
  153. u8 buf[3], u8tmp, cap_code, lpf_gm, lpf_mxdiv, div_max, div_min;
  154. u16 u16tmp;
  155. dev_dbg(&priv->client->dev,
  156. "%s: frequency=%d symbol_rate=%d rolloff=%d\n",
  157. __func__, c->frequency, c->symbol_rate, c->rolloff);
  158. /*
  159. * Integer-N PLL synthesizer
  160. * kHz is used for all calculations to keep calculations within 32-bit
  161. */
  162. f_ref_khz = DIV_ROUND_CLOSEST(priv->cfg.clock, 1000);
  163. div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000);
  164. if (c->symbol_rate < 5000000)
  165. frequency_offset_khz = 3000; /* 3 MHz */
  166. else
  167. frequency_offset_khz = 0;
  168. frequency_khz = c->frequency + frequency_offset_khz;
  169. if (frequency_khz < 1103000) {
  170. div_out = 4;
  171. u8tmp = 0x1b;
  172. } else {
  173. div_out = 2;
  174. u8tmp = 0x0b;
  175. }
  176. buf[0] = u8tmp;
  177. buf[1] = 0x40;
  178. ret = m88ts2022_wr_regs(priv, 0x10, buf, 2);
  179. if (ret)
  180. goto err;
  181. f_vco_khz = frequency_khz * div_out;
  182. pll_n = f_vco_khz * div_ref / f_ref_khz;
  183. pll_n += pll_n % 2;
  184. priv->frequency_khz = pll_n * f_ref_khz / div_ref / div_out;
  185. if (pll_n < 4095)
  186. u16tmp = pll_n - 1024;
  187. else if (pll_n < 6143)
  188. u16tmp = pll_n + 1024;
  189. else
  190. u16tmp = pll_n + 3072;
  191. buf[0] = (u16tmp >> 8) & 0x3f;
  192. buf[1] = (u16tmp >> 0) & 0xff;
  193. buf[2] = div_ref - 8;
  194. ret = m88ts2022_wr_regs(priv, 0x01, buf, 3);
  195. if (ret)
  196. goto err;
  197. dev_dbg(&priv->client->dev,
  198. "%s: frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n",
  199. __func__, priv->frequency_khz,
  200. priv->frequency_khz - c->frequency, f_vco_khz, pll_n,
  201. div_ref, div_out);
  202. ret = m88ts2022_cmd(fe, 0x10, 5, 0x15, 0x40, 0x00, NULL);
  203. if (ret)
  204. goto err;
  205. ret = m88ts2022_rd_reg(priv, 0x14, &u8tmp);
  206. if (ret)
  207. goto err;
  208. u8tmp &= 0x7f;
  209. if (u8tmp < 64) {
  210. ret = m88ts2022_wr_reg_mask(priv, 0x10, 0x80, 0x80);
  211. if (ret)
  212. goto err;
  213. ret = m88ts2022_wr_reg(priv, 0x11, 0x6f);
  214. if (ret)
  215. goto err;
  216. ret = m88ts2022_cmd(fe, 0x10, 5, 0x15, 0x40, 0x00, NULL);
  217. if (ret)
  218. goto err;
  219. }
  220. ret = m88ts2022_rd_reg(priv, 0x14, &u8tmp);
  221. if (ret)
  222. goto err;
  223. u8tmp &= 0x1f;
  224. if (u8tmp > 19) {
  225. ret = m88ts2022_wr_reg_mask(priv, 0x10, 0x00, 0x02);
  226. if (ret)
  227. goto err;
  228. }
  229. ret = m88ts2022_cmd(fe, 0x08, 5, 0x3c, 0xff, 0x00, NULL);
  230. if (ret)
  231. goto err;
  232. ret = m88ts2022_wr_reg(priv, 0x25, 0x00);
  233. if (ret)
  234. goto err;
  235. ret = m88ts2022_wr_reg(priv, 0x27, 0x70);
  236. if (ret)
  237. goto err;
  238. ret = m88ts2022_wr_reg(priv, 0x41, 0x09);
  239. if (ret)
  240. goto err;
  241. ret = m88ts2022_wr_reg(priv, 0x08, 0x0b);
  242. if (ret)
  243. goto err;
  244. /* filters */
  245. gdiv28 = DIV_ROUND_CLOSEST(f_ref_khz * 1694U, 1000000U);
  246. ret = m88ts2022_wr_reg(priv, 0x04, gdiv28);
  247. if (ret)
  248. goto err;
  249. ret = m88ts2022_cmd(fe, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
  250. if (ret)
  251. goto err;
  252. cap_code = u8tmp & 0x3f;
  253. ret = m88ts2022_wr_reg(priv, 0x41, 0x0d);
  254. if (ret)
  255. goto err;
  256. ret = m88ts2022_cmd(fe, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
  257. if (ret)
  258. goto err;
  259. u8tmp &= 0x3f;
  260. cap_code = (cap_code + u8tmp) / 2;
  261. gdiv28 = gdiv28 * 207 / (cap_code * 2 + 151);
  262. div_max = gdiv28 * 135 / 100;
  263. div_min = gdiv28 * 78 / 100;
  264. div_max = clamp_val(div_max, 0U, 63U);
  265. f_3db_hz = c->symbol_rate * 135UL / 200UL;
  266. f_3db_hz += 2000000U + (frequency_offset_khz * 1000U);
  267. f_3db_hz = clamp(f_3db_hz, 7000000U, 40000000U);
  268. #define LPF_COEFF 3200U
  269. lpf_gm = DIV_ROUND_CLOSEST(f_3db_hz * gdiv28, LPF_COEFF * f_ref_khz);
  270. lpf_gm = clamp_val(lpf_gm, 1U, 23U);
  271. lpf_mxdiv = DIV_ROUND_CLOSEST(lpf_gm * LPF_COEFF * f_ref_khz, f_3db_hz);
  272. if (lpf_mxdiv < div_min)
  273. lpf_mxdiv = DIV_ROUND_CLOSEST(++lpf_gm * LPF_COEFF * f_ref_khz, f_3db_hz);
  274. lpf_mxdiv = clamp_val(lpf_mxdiv, 0U, div_max);
  275. ret = m88ts2022_wr_reg(priv, 0x04, lpf_mxdiv);
  276. if (ret)
  277. goto err;
  278. ret = m88ts2022_wr_reg(priv, 0x06, lpf_gm);
  279. if (ret)
  280. goto err;
  281. ret = m88ts2022_cmd(fe, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
  282. if (ret)
  283. goto err;
  284. cap_code = u8tmp & 0x3f;
  285. ret = m88ts2022_wr_reg(priv, 0x41, 0x09);
  286. if (ret)
  287. goto err;
  288. ret = m88ts2022_cmd(fe, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
  289. if (ret)
  290. goto err;
  291. u8tmp &= 0x3f;
  292. cap_code = (cap_code + u8tmp) / 2;
  293. u8tmp = cap_code | 0x80;
  294. ret = m88ts2022_wr_reg(priv, 0x25, u8tmp);
  295. if (ret)
  296. goto err;
  297. ret = m88ts2022_wr_reg(priv, 0x27, 0x30);
  298. if (ret)
  299. goto err;
  300. ret = m88ts2022_wr_reg(priv, 0x08, 0x09);
  301. if (ret)
  302. goto err;
  303. ret = m88ts2022_cmd(fe, 0x01, 20, 0x21, 0xff, 0x00, NULL);
  304. if (ret)
  305. goto err;
  306. err:
  307. if (ret)
  308. dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
  309. return ret;
  310. }
  311. static int m88ts2022_init(struct dvb_frontend *fe)
  312. {
  313. struct m88ts2022_priv *priv = fe->tuner_priv;
  314. int ret, i;
  315. u8 u8tmp;
  316. static const struct m88ts2022_reg_val reg_vals[] = {
  317. {0x7d, 0x9d},
  318. {0x7c, 0x9a},
  319. {0x7a, 0x76},
  320. {0x3b, 0x01},
  321. {0x63, 0x88},
  322. {0x61, 0x85},
  323. {0x22, 0x30},
  324. {0x30, 0x40},
  325. {0x20, 0x23},
  326. {0x24, 0x02},
  327. {0x12, 0xa0},
  328. };
  329. dev_dbg(&priv->client->dev, "%s:\n", __func__);
  330. ret = m88ts2022_wr_reg(priv, 0x00, 0x01);
  331. if (ret)
  332. goto err;
  333. ret = m88ts2022_wr_reg(priv, 0x00, 0x03);
  334. if (ret)
  335. goto err;
  336. switch (priv->cfg.clock_out) {
  337. case M88TS2022_CLOCK_OUT_DISABLED:
  338. u8tmp = 0x60;
  339. break;
  340. case M88TS2022_CLOCK_OUT_ENABLED:
  341. u8tmp = 0x70;
  342. ret = m88ts2022_wr_reg(priv, 0x05, priv->cfg.clock_out_div);
  343. if (ret)
  344. goto err;
  345. break;
  346. case M88TS2022_CLOCK_OUT_ENABLED_XTALOUT:
  347. u8tmp = 0x6c;
  348. break;
  349. default:
  350. goto err;
  351. }
  352. ret = m88ts2022_wr_reg(priv, 0x42, u8tmp);
  353. if (ret)
  354. goto err;
  355. if (priv->cfg.loop_through)
  356. u8tmp = 0xec;
  357. else
  358. u8tmp = 0x6c;
  359. ret = m88ts2022_wr_reg(priv, 0x62, u8tmp);
  360. if (ret)
  361. goto err;
  362. for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
  363. ret = m88ts2022_wr_reg(priv, reg_vals[i].reg, reg_vals[i].val);
  364. if (ret)
  365. goto err;
  366. }
  367. err:
  368. if (ret)
  369. dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
  370. return ret;
  371. }
  372. static int m88ts2022_sleep(struct dvb_frontend *fe)
  373. {
  374. struct m88ts2022_priv *priv = fe->tuner_priv;
  375. int ret;
  376. dev_dbg(&priv->client->dev, "%s:\n", __func__);
  377. ret = m88ts2022_wr_reg(priv, 0x00, 0x00);
  378. if (ret)
  379. goto err;
  380. err:
  381. if (ret)
  382. dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
  383. return ret;
  384. }
  385. static int m88ts2022_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  386. {
  387. struct m88ts2022_priv *priv = fe->tuner_priv;
  388. dev_dbg(&priv->client->dev, "%s:\n", __func__);
  389. *frequency = priv->frequency_khz;
  390. return 0;
  391. }
  392. static int m88ts2022_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  393. {
  394. struct m88ts2022_priv *priv = fe->tuner_priv;
  395. dev_dbg(&priv->client->dev, "%s:\n", __func__);
  396. *frequency = 0; /* Zero-IF */
  397. return 0;
  398. }
  399. static int m88ts2022_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
  400. {
  401. struct m88ts2022_priv *priv = fe->tuner_priv;
  402. int ret;
  403. u8 u8tmp;
  404. u16 gain, u16tmp;
  405. unsigned int gain1, gain2, gain3;
  406. ret = m88ts2022_rd_reg(priv, 0x3d, &u8tmp);
  407. if (ret)
  408. goto err;
  409. gain1 = (u8tmp >> 0) & 0x1f;
  410. gain1 = clamp(gain1, 0U, 15U);
  411. ret = m88ts2022_rd_reg(priv, 0x21, &u8tmp);
  412. if (ret)
  413. goto err;
  414. gain2 = (u8tmp >> 0) & 0x1f;
  415. gain2 = clamp(gain2, 2U, 16U);
  416. ret = m88ts2022_rd_reg(priv, 0x66, &u8tmp);
  417. if (ret)
  418. goto err;
  419. gain3 = (u8tmp >> 3) & 0x07;
  420. gain3 = clamp(gain3, 0U, 6U);
  421. gain = gain1 * 265 + gain2 * 338 + gain3 * 285;
  422. /* scale value to 0x0000-0xffff */
  423. u16tmp = (0xffff - gain);
  424. u16tmp = clamp_val(u16tmp, 59000U, 61500U);
  425. *strength = (u16tmp - 59000) * 0xffff / (61500 - 59000);
  426. err:
  427. if (ret)
  428. dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
  429. return ret;
  430. }
  431. static const struct dvb_tuner_ops m88ts2022_tuner_ops = {
  432. .info = {
  433. .name = "Montage M88TS2022",
  434. .frequency_min = 950000,
  435. .frequency_max = 2150000,
  436. },
  437. .init = m88ts2022_init,
  438. .sleep = m88ts2022_sleep,
  439. .set_params = m88ts2022_set_params,
  440. .get_frequency = m88ts2022_get_frequency,
  441. .get_if_frequency = m88ts2022_get_if_frequency,
  442. .get_rf_strength = m88ts2022_get_rf_strength,
  443. };
  444. static int m88ts2022_probe(struct i2c_client *client,
  445. const struct i2c_device_id *id)
  446. {
  447. struct m88ts2022_config *cfg = client->dev.platform_data;
  448. struct dvb_frontend *fe = cfg->fe;
  449. struct m88ts2022_priv *priv;
  450. int ret;
  451. u8 chip_id, u8tmp;
  452. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  453. if (!priv) {
  454. ret = -ENOMEM;
  455. dev_err(&client->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME);
  456. goto err;
  457. }
  458. memcpy(&priv->cfg, cfg, sizeof(struct m88ts2022_config));
  459. priv->client = client;
  460. /* check if the tuner is there */
  461. ret = m88ts2022_rd_reg(priv, 0x00, &u8tmp);
  462. if (ret)
  463. goto err;
  464. if ((u8tmp & 0x03) == 0x00) {
  465. ret = m88ts2022_wr_reg(priv, 0x00, 0x01);
  466. if (ret < 0)
  467. goto err;
  468. usleep_range(2000, 50000);
  469. }
  470. ret = m88ts2022_wr_reg(priv, 0x00, 0x03);
  471. if (ret)
  472. goto err;
  473. usleep_range(2000, 50000);
  474. ret = m88ts2022_rd_reg(priv, 0x00, &chip_id);
  475. if (ret)
  476. goto err;
  477. dev_dbg(&priv->client->dev, "%s: chip_id=%02x\n", __func__, chip_id);
  478. switch (chip_id) {
  479. case 0xc3:
  480. case 0x83:
  481. break;
  482. default:
  483. goto err;
  484. }
  485. switch (priv->cfg.clock_out) {
  486. case M88TS2022_CLOCK_OUT_DISABLED:
  487. u8tmp = 0x60;
  488. break;
  489. case M88TS2022_CLOCK_OUT_ENABLED:
  490. u8tmp = 0x70;
  491. ret = m88ts2022_wr_reg(priv, 0x05, priv->cfg.clock_out_div);
  492. if (ret)
  493. goto err;
  494. break;
  495. case M88TS2022_CLOCK_OUT_ENABLED_XTALOUT:
  496. u8tmp = 0x6c;
  497. break;
  498. default:
  499. goto err;
  500. }
  501. ret = m88ts2022_wr_reg(priv, 0x42, u8tmp);
  502. if (ret)
  503. goto err;
  504. if (priv->cfg.loop_through)
  505. u8tmp = 0xec;
  506. else
  507. u8tmp = 0x6c;
  508. ret = m88ts2022_wr_reg(priv, 0x62, u8tmp);
  509. if (ret)
  510. goto err;
  511. /* sleep */
  512. ret = m88ts2022_wr_reg(priv, 0x00, 0x00);
  513. if (ret)
  514. goto err;
  515. dev_info(&priv->client->dev,
  516. "%s: Montage M88TS2022 successfully identified\n",
  517. KBUILD_MODNAME);
  518. fe->tuner_priv = priv;
  519. memcpy(&fe->ops.tuner_ops, &m88ts2022_tuner_ops,
  520. sizeof(struct dvb_tuner_ops));
  521. i2c_set_clientdata(client, priv);
  522. return 0;
  523. err:
  524. dev_dbg(&client->dev, "%s: failed=%d\n", __func__, ret);
  525. kfree(priv);
  526. return ret;
  527. }
  528. static int m88ts2022_remove(struct i2c_client *client)
  529. {
  530. struct m88ts2022_priv *priv = i2c_get_clientdata(client);
  531. struct dvb_frontend *fe = priv->cfg.fe;
  532. dev_dbg(&client->dev, "%s:\n", __func__);
  533. memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
  534. fe->tuner_priv = NULL;
  535. kfree(priv);
  536. return 0;
  537. }
  538. static const struct i2c_device_id m88ts2022_id[] = {
  539. {"m88ts2022", 0},
  540. {}
  541. };
  542. MODULE_DEVICE_TABLE(i2c, m88ts2022_id);
  543. static struct i2c_driver m88ts2022_driver = {
  544. .driver = {
  545. .owner = THIS_MODULE,
  546. .name = "m88ts2022",
  547. },
  548. .probe = m88ts2022_probe,
  549. .remove = m88ts2022_remove,
  550. .id_table = m88ts2022_id,
  551. };
  552. module_i2c_driver(m88ts2022_driver);
  553. MODULE_DESCRIPTION("Montage M88TS2022 silicon tuner driver");
  554. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  555. MODULE_LICENSE("GPL");