e4000.c 14 KB

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  1. /*
  2. * Elonics E4000 silicon tuner driver
  3. *
  4. * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. */
  20. #include "e4000_priv.h"
  21. #include <linux/math64.h>
  22. static int e4000_init(struct dvb_frontend *fe)
  23. {
  24. struct e4000 *s = fe->tuner_priv;
  25. int ret;
  26. dev_dbg(&s->client->dev, "%s:\n", __func__);
  27. /* dummy I2C to ensure I2C wakes up */
  28. ret = regmap_write(s->regmap, 0x02, 0x40);
  29. /* reset */
  30. ret = regmap_write(s->regmap, 0x00, 0x01);
  31. if (ret)
  32. goto err;
  33. /* disable output clock */
  34. ret = regmap_write(s->regmap, 0x06, 0x00);
  35. if (ret)
  36. goto err;
  37. ret = regmap_write(s->regmap, 0x7a, 0x96);
  38. if (ret)
  39. goto err;
  40. /* configure gains */
  41. ret = regmap_bulk_write(s->regmap, 0x7e, "\x01\xfe", 2);
  42. if (ret)
  43. goto err;
  44. ret = regmap_write(s->regmap, 0x82, 0x00);
  45. if (ret)
  46. goto err;
  47. ret = regmap_write(s->regmap, 0x24, 0x05);
  48. if (ret)
  49. goto err;
  50. ret = regmap_bulk_write(s->regmap, 0x87, "\x20\x01", 2);
  51. if (ret)
  52. goto err;
  53. ret = regmap_bulk_write(s->regmap, 0x9f, "\x7f\x07", 2);
  54. if (ret)
  55. goto err;
  56. /* DC offset control */
  57. ret = regmap_write(s->regmap, 0x2d, 0x1f);
  58. if (ret)
  59. goto err;
  60. ret = regmap_bulk_write(s->regmap, 0x70, "\x01\x01", 2);
  61. if (ret)
  62. goto err;
  63. /* gain control */
  64. ret = regmap_write(s->regmap, 0x1a, 0x17);
  65. if (ret)
  66. goto err;
  67. ret = regmap_write(s->regmap, 0x1f, 0x1a);
  68. if (ret)
  69. goto err;
  70. s->active = true;
  71. err:
  72. if (ret)
  73. dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret);
  74. return ret;
  75. }
  76. static int e4000_sleep(struct dvb_frontend *fe)
  77. {
  78. struct e4000 *s = fe->tuner_priv;
  79. int ret;
  80. dev_dbg(&s->client->dev, "%s:\n", __func__);
  81. s->active = false;
  82. ret = regmap_write(s->regmap, 0x00, 0x00);
  83. if (ret)
  84. goto err;
  85. err:
  86. if (ret)
  87. dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret);
  88. return ret;
  89. }
  90. static int e4000_set_params(struct dvb_frontend *fe)
  91. {
  92. struct e4000 *s = fe->tuner_priv;
  93. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  94. int ret, i, sigma_delta;
  95. unsigned int pll_n, pll_f;
  96. u64 f_vco;
  97. u8 buf[5], i_data[4], q_data[4];
  98. dev_dbg(&s->client->dev,
  99. "%s: delivery_system=%d frequency=%u bandwidth_hz=%u\n",
  100. __func__, c->delivery_system, c->frequency,
  101. c->bandwidth_hz);
  102. /* gain control manual */
  103. ret = regmap_write(s->regmap, 0x1a, 0x00);
  104. if (ret)
  105. goto err;
  106. /* PLL */
  107. for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) {
  108. if (c->frequency <= e4000_pll_lut[i].freq)
  109. break;
  110. }
  111. if (i == ARRAY_SIZE(e4000_pll_lut)) {
  112. ret = -EINVAL;
  113. goto err;
  114. }
  115. f_vco = 1ull * c->frequency * e4000_pll_lut[i].mul;
  116. pll_n = div_u64_rem(f_vco, s->clock, &pll_f);
  117. sigma_delta = div_u64(0x10000ULL * pll_f, s->clock);
  118. buf[0] = pll_n;
  119. buf[1] = (sigma_delta >> 0) & 0xff;
  120. buf[2] = (sigma_delta >> 8) & 0xff;
  121. buf[3] = 0x00;
  122. buf[4] = e4000_pll_lut[i].div;
  123. dev_dbg(&s->client->dev,
  124. "%s: f_vco=%llu pll div=%d sigma_delta=%04x\n",
  125. __func__, f_vco, buf[0], sigma_delta);
  126. ret = regmap_bulk_write(s->regmap, 0x09, buf, 5);
  127. if (ret)
  128. goto err;
  129. /* LNA filter (RF filter) */
  130. for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) {
  131. if (c->frequency <= e400_lna_filter_lut[i].freq)
  132. break;
  133. }
  134. if (i == ARRAY_SIZE(e400_lna_filter_lut)) {
  135. ret = -EINVAL;
  136. goto err;
  137. }
  138. ret = regmap_write(s->regmap, 0x10, e400_lna_filter_lut[i].val);
  139. if (ret)
  140. goto err;
  141. /* IF filters */
  142. for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) {
  143. if (c->bandwidth_hz <= e4000_if_filter_lut[i].freq)
  144. break;
  145. }
  146. if (i == ARRAY_SIZE(e4000_if_filter_lut)) {
  147. ret = -EINVAL;
  148. goto err;
  149. }
  150. buf[0] = e4000_if_filter_lut[i].reg11_val;
  151. buf[1] = e4000_if_filter_lut[i].reg12_val;
  152. ret = regmap_bulk_write(s->regmap, 0x11, buf, 2);
  153. if (ret)
  154. goto err;
  155. /* frequency band */
  156. for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) {
  157. if (c->frequency <= e4000_band_lut[i].freq)
  158. break;
  159. }
  160. if (i == ARRAY_SIZE(e4000_band_lut)) {
  161. ret = -EINVAL;
  162. goto err;
  163. }
  164. ret = regmap_write(s->regmap, 0x07, e4000_band_lut[i].reg07_val);
  165. if (ret)
  166. goto err;
  167. ret = regmap_write(s->regmap, 0x78, e4000_band_lut[i].reg78_val);
  168. if (ret)
  169. goto err;
  170. /* DC offset */
  171. for (i = 0; i < 4; i++) {
  172. if (i == 0)
  173. ret = regmap_bulk_write(s->regmap, 0x15, "\x00\x7e\x24", 3);
  174. else if (i == 1)
  175. ret = regmap_bulk_write(s->regmap, 0x15, "\x00\x7f", 2);
  176. else if (i == 2)
  177. ret = regmap_bulk_write(s->regmap, 0x15, "\x01", 1);
  178. else
  179. ret = regmap_bulk_write(s->regmap, 0x16, "\x7e", 1);
  180. if (ret)
  181. goto err;
  182. ret = regmap_write(s->regmap, 0x29, 0x01);
  183. if (ret)
  184. goto err;
  185. ret = regmap_bulk_read(s->regmap, 0x2a, buf, 3);
  186. if (ret)
  187. goto err;
  188. i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f);
  189. q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f);
  190. }
  191. swap(q_data[2], q_data[3]);
  192. swap(i_data[2], i_data[3]);
  193. ret = regmap_bulk_write(s->regmap, 0x50, q_data, 4);
  194. if (ret)
  195. goto err;
  196. ret = regmap_bulk_write(s->regmap, 0x60, i_data, 4);
  197. if (ret)
  198. goto err;
  199. /* gain control auto */
  200. ret = regmap_write(s->regmap, 0x1a, 0x17);
  201. if (ret)
  202. goto err;
  203. err:
  204. if (ret)
  205. dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret);
  206. return ret;
  207. }
  208. static int e4000_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  209. {
  210. struct e4000 *s = fe->tuner_priv;
  211. dev_dbg(&s->client->dev, "%s:\n", __func__);
  212. *frequency = 0; /* Zero-IF */
  213. return 0;
  214. }
  215. #if IS_ENABLED(CONFIG_VIDEO_V4L2)
  216. static int e4000_set_lna_gain(struct dvb_frontend *fe)
  217. {
  218. struct e4000 *s = fe->tuner_priv;
  219. int ret;
  220. u8 u8tmp;
  221. dev_dbg(&s->client->dev, "%s: lna auto=%d->%d val=%d->%d\n",
  222. __func__, s->lna_gain_auto->cur.val,
  223. s->lna_gain_auto->val, s->lna_gain->cur.val,
  224. s->lna_gain->val);
  225. if (s->lna_gain_auto->val && s->if_gain_auto->cur.val)
  226. u8tmp = 0x17;
  227. else if (s->lna_gain_auto->val)
  228. u8tmp = 0x19;
  229. else if (s->if_gain_auto->cur.val)
  230. u8tmp = 0x16;
  231. else
  232. u8tmp = 0x10;
  233. ret = regmap_write(s->regmap, 0x1a, u8tmp);
  234. if (ret)
  235. goto err;
  236. if (s->lna_gain_auto->val == false) {
  237. ret = regmap_write(s->regmap, 0x14, s->lna_gain->val);
  238. if (ret)
  239. goto err;
  240. }
  241. err:
  242. if (ret)
  243. dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret);
  244. return ret;
  245. }
  246. static int e4000_set_mixer_gain(struct dvb_frontend *fe)
  247. {
  248. struct e4000 *s = fe->tuner_priv;
  249. int ret;
  250. u8 u8tmp;
  251. dev_dbg(&s->client->dev, "%s: mixer auto=%d->%d val=%d->%d\n",
  252. __func__, s->mixer_gain_auto->cur.val,
  253. s->mixer_gain_auto->val, s->mixer_gain->cur.val,
  254. s->mixer_gain->val);
  255. if (s->mixer_gain_auto->val)
  256. u8tmp = 0x15;
  257. else
  258. u8tmp = 0x14;
  259. ret = regmap_write(s->regmap, 0x20, u8tmp);
  260. if (ret)
  261. goto err;
  262. if (s->mixer_gain_auto->val == false) {
  263. ret = regmap_write(s->regmap, 0x15, s->mixer_gain->val);
  264. if (ret)
  265. goto err;
  266. }
  267. err:
  268. if (ret)
  269. dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret);
  270. return ret;
  271. }
  272. static int e4000_set_if_gain(struct dvb_frontend *fe)
  273. {
  274. struct e4000 *s = fe->tuner_priv;
  275. int ret;
  276. u8 buf[2];
  277. u8 u8tmp;
  278. dev_dbg(&s->client->dev, "%s: if auto=%d->%d val=%d->%d\n",
  279. __func__, s->if_gain_auto->cur.val,
  280. s->if_gain_auto->val, s->if_gain->cur.val,
  281. s->if_gain->val);
  282. if (s->if_gain_auto->val && s->lna_gain_auto->cur.val)
  283. u8tmp = 0x17;
  284. else if (s->lna_gain_auto->cur.val)
  285. u8tmp = 0x19;
  286. else if (s->if_gain_auto->val)
  287. u8tmp = 0x16;
  288. else
  289. u8tmp = 0x10;
  290. ret = regmap_write(s->regmap, 0x1a, u8tmp);
  291. if (ret)
  292. goto err;
  293. if (s->if_gain_auto->val == false) {
  294. buf[0] = e4000_if_gain_lut[s->if_gain->val].reg16_val;
  295. buf[1] = e4000_if_gain_lut[s->if_gain->val].reg17_val;
  296. ret = regmap_bulk_write(s->regmap, 0x16, buf, 2);
  297. if (ret)
  298. goto err;
  299. }
  300. err:
  301. if (ret)
  302. dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret);
  303. return ret;
  304. }
  305. static int e4000_pll_lock(struct dvb_frontend *fe)
  306. {
  307. struct e4000 *s = fe->tuner_priv;
  308. int ret;
  309. unsigned int utmp;
  310. ret = regmap_read(s->regmap, 0x07, &utmp);
  311. if (ret)
  312. goto err;
  313. s->pll_lock->val = (utmp & 0x01);
  314. err:
  315. if (ret)
  316. dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret);
  317. return ret;
  318. }
  319. static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
  320. {
  321. struct e4000 *s = container_of(ctrl->handler, struct e4000, hdl);
  322. int ret;
  323. if (s->active == false)
  324. return 0;
  325. switch (ctrl->id) {
  326. case V4L2_CID_RF_TUNER_PLL_LOCK:
  327. ret = e4000_pll_lock(s->fe);
  328. break;
  329. default:
  330. dev_dbg(&s->client->dev, "%s: unknown ctrl: id=%d name=%s\n",
  331. __func__, ctrl->id, ctrl->name);
  332. ret = -EINVAL;
  333. }
  334. return ret;
  335. }
  336. static int e4000_s_ctrl(struct v4l2_ctrl *ctrl)
  337. {
  338. struct e4000 *s = container_of(ctrl->handler, struct e4000, hdl);
  339. struct dvb_frontend *fe = s->fe;
  340. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  341. int ret;
  342. if (s->active == false)
  343. return 0;
  344. switch (ctrl->id) {
  345. case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
  346. case V4L2_CID_RF_TUNER_BANDWIDTH:
  347. c->bandwidth_hz = s->bandwidth->val;
  348. ret = e4000_set_params(s->fe);
  349. break;
  350. case V4L2_CID_RF_TUNER_LNA_GAIN_AUTO:
  351. case V4L2_CID_RF_TUNER_LNA_GAIN:
  352. ret = e4000_set_lna_gain(s->fe);
  353. break;
  354. case V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO:
  355. case V4L2_CID_RF_TUNER_MIXER_GAIN:
  356. ret = e4000_set_mixer_gain(s->fe);
  357. break;
  358. case V4L2_CID_RF_TUNER_IF_GAIN_AUTO:
  359. case V4L2_CID_RF_TUNER_IF_GAIN:
  360. ret = e4000_set_if_gain(s->fe);
  361. break;
  362. default:
  363. dev_dbg(&s->client->dev, "%s: unknown ctrl: id=%d name=%s\n",
  364. __func__, ctrl->id, ctrl->name);
  365. ret = -EINVAL;
  366. }
  367. return ret;
  368. }
  369. static const struct v4l2_ctrl_ops e4000_ctrl_ops = {
  370. .g_volatile_ctrl = e4000_g_volatile_ctrl,
  371. .s_ctrl = e4000_s_ctrl,
  372. };
  373. #endif
  374. static const struct dvb_tuner_ops e4000_tuner_ops = {
  375. .info = {
  376. .name = "Elonics E4000",
  377. .frequency_min = 174000000,
  378. .frequency_max = 862000000,
  379. },
  380. .init = e4000_init,
  381. .sleep = e4000_sleep,
  382. .set_params = e4000_set_params,
  383. .get_if_frequency = e4000_get_if_frequency,
  384. };
  385. /*
  386. * Use V4L2 subdev to carry V4L2 control handler, even we don't implement
  387. * subdev itself, just to avoid reinventing the wheel.
  388. */
  389. static int e4000_probe(struct i2c_client *client,
  390. const struct i2c_device_id *id)
  391. {
  392. struct e4000_config *cfg = client->dev.platform_data;
  393. struct dvb_frontend *fe = cfg->fe;
  394. struct e4000 *s;
  395. int ret;
  396. unsigned int utmp;
  397. static const struct regmap_config regmap_config = {
  398. .reg_bits = 8,
  399. .val_bits = 8,
  400. .max_register = 0xff,
  401. };
  402. s = kzalloc(sizeof(struct e4000), GFP_KERNEL);
  403. if (!s) {
  404. ret = -ENOMEM;
  405. dev_err(&client->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME);
  406. goto err;
  407. }
  408. s->clock = cfg->clock;
  409. s->client = client;
  410. s->fe = cfg->fe;
  411. s->regmap = devm_regmap_init_i2c(client, &regmap_config);
  412. if (IS_ERR(s->regmap)) {
  413. ret = PTR_ERR(s->regmap);
  414. goto err;
  415. }
  416. /* check if the tuner is there */
  417. ret = regmap_read(s->regmap, 0x02, &utmp);
  418. if (ret)
  419. goto err;
  420. dev_dbg(&s->client->dev, "%s: chip id=%02x\n", __func__, utmp);
  421. if (utmp != 0x40) {
  422. ret = -ENODEV;
  423. goto err;
  424. }
  425. /* put sleep as chip seems to be in normal mode by default */
  426. ret = regmap_write(s->regmap, 0x00, 0x00);
  427. if (ret)
  428. goto err;
  429. #if IS_ENABLED(CONFIG_VIDEO_V4L2)
  430. /* Register controls */
  431. v4l2_ctrl_handler_init(&s->hdl, 9);
  432. s->bandwidth_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
  433. V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
  434. s->bandwidth = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
  435. V4L2_CID_RF_TUNER_BANDWIDTH, 4300000, 11000000, 100000, 4300000);
  436. v4l2_ctrl_auto_cluster(2, &s->bandwidth_auto, 0, false);
  437. s->lna_gain_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
  438. V4L2_CID_RF_TUNER_LNA_GAIN_AUTO, 0, 1, 1, 1);
  439. s->lna_gain = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
  440. V4L2_CID_RF_TUNER_LNA_GAIN, 0, 15, 1, 10);
  441. v4l2_ctrl_auto_cluster(2, &s->lna_gain_auto, 0, false);
  442. s->mixer_gain_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
  443. V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO, 0, 1, 1, 1);
  444. s->mixer_gain = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
  445. V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
  446. v4l2_ctrl_auto_cluster(2, &s->mixer_gain_auto, 0, false);
  447. s->if_gain_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
  448. V4L2_CID_RF_TUNER_IF_GAIN_AUTO, 0, 1, 1, 1);
  449. s->if_gain = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
  450. V4L2_CID_RF_TUNER_IF_GAIN, 0, 54, 1, 0);
  451. v4l2_ctrl_auto_cluster(2, &s->if_gain_auto, 0, false);
  452. s->pll_lock = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
  453. V4L2_CID_RF_TUNER_PLL_LOCK, 0, 1, 1, 0);
  454. if (s->hdl.error) {
  455. ret = s->hdl.error;
  456. dev_err(&s->client->dev, "Could not initialize controls\n");
  457. v4l2_ctrl_handler_free(&s->hdl);
  458. goto err;
  459. }
  460. s->sd.ctrl_handler = &s->hdl;
  461. #endif
  462. dev_info(&s->client->dev,
  463. "%s: Elonics E4000 successfully identified\n",
  464. KBUILD_MODNAME);
  465. fe->tuner_priv = s;
  466. memcpy(&fe->ops.tuner_ops, &e4000_tuner_ops,
  467. sizeof(struct dvb_tuner_ops));
  468. v4l2_set_subdevdata(&s->sd, client);
  469. i2c_set_clientdata(client, &s->sd);
  470. return 0;
  471. err:
  472. if (ret) {
  473. dev_dbg(&client->dev, "%s: failed=%d\n", __func__, ret);
  474. kfree(s);
  475. }
  476. return ret;
  477. }
  478. static int e4000_remove(struct i2c_client *client)
  479. {
  480. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  481. struct e4000 *s = container_of(sd, struct e4000, sd);
  482. struct dvb_frontend *fe = s->fe;
  483. dev_dbg(&client->dev, "%s:\n", __func__);
  484. #if IS_ENABLED(CONFIG_VIDEO_V4L2)
  485. v4l2_ctrl_handler_free(&s->hdl);
  486. #endif
  487. memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
  488. fe->tuner_priv = NULL;
  489. kfree(s);
  490. return 0;
  491. }
  492. static const struct i2c_device_id e4000_id[] = {
  493. {"e4000", 0},
  494. {}
  495. };
  496. MODULE_DEVICE_TABLE(i2c, e4000_id);
  497. static struct i2c_driver e4000_driver = {
  498. .driver = {
  499. .owner = THIS_MODULE,
  500. .name = "e4000",
  501. },
  502. .probe = e4000_probe,
  503. .remove = e4000_remove,
  504. .id_table = e4000_id,
  505. };
  506. module_i2c_driver(e4000_driver);
  507. MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver");
  508. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  509. MODULE_LICENSE("GPL");