atmel-isi.c 26 KB

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  1. /*
  2. * Copyright (c) 2011 Atmel Corporation
  3. * Josh Wu, <josh.wu@atmel.com>
  4. *
  5. * Based on previous work by Lars Haring, <lars.haring@atmel.com>
  6. * and Sedji Gaouaou
  7. * Based on the bttv driver for Bt848 with respective copyright holders
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/completion.h>
  15. #include <linux/delay.h>
  16. #include <linux/fs.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/slab.h>
  23. #include <media/atmel-isi.h>
  24. #include <media/soc_camera.h>
  25. #include <media/soc_mediabus.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #define MAX_BUFFER_NUM 32
  28. #define MAX_SUPPORT_WIDTH 2048
  29. #define MAX_SUPPORT_HEIGHT 2048
  30. #define VID_LIMIT_BYTES (16 * 1024 * 1024)
  31. #define MIN_FRAME_RATE 15
  32. #define FRAME_INTERVAL_MILLI_SEC (1000 / MIN_FRAME_RATE)
  33. /* Frame buffer descriptor */
  34. struct fbd {
  35. /* Physical address of the frame buffer */
  36. u32 fb_address;
  37. /* DMA Control Register(only in HISI2) */
  38. u32 dma_ctrl;
  39. /* Physical address of the next fbd */
  40. u32 next_fbd_address;
  41. };
  42. static void set_dma_ctrl(struct fbd *fb_desc, u32 ctrl)
  43. {
  44. fb_desc->dma_ctrl = ctrl;
  45. }
  46. struct isi_dma_desc {
  47. struct list_head list;
  48. struct fbd *p_fbd;
  49. u32 fbd_phys;
  50. };
  51. /* Frame buffer data */
  52. struct frame_buffer {
  53. struct vb2_buffer vb;
  54. struct isi_dma_desc *p_dma_desc;
  55. struct list_head list;
  56. };
  57. struct atmel_isi {
  58. /* Protects the access of variables shared with the ISR */
  59. spinlock_t lock;
  60. void __iomem *regs;
  61. int sequence;
  62. struct vb2_alloc_ctx *alloc_ctx;
  63. /* Allocate descriptors for dma buffer use */
  64. struct fbd *p_fb_descriptors;
  65. u32 fb_descriptors_phys;
  66. struct list_head dma_desc_head;
  67. struct isi_dma_desc dma_desc[MAX_BUFFER_NUM];
  68. struct completion complete;
  69. /* ISI peripherial clock */
  70. struct clk *pclk;
  71. /* ISI_MCK, feed to camera sensor to generate pixel clock */
  72. struct clk *mck;
  73. unsigned int irq;
  74. struct isi_platform_data *pdata;
  75. u16 width_flags; /* max 12 bits */
  76. struct list_head video_buffer_list;
  77. struct frame_buffer *active;
  78. struct soc_camera_host soc_host;
  79. };
  80. static void isi_writel(struct atmel_isi *isi, u32 reg, u32 val)
  81. {
  82. writel(val, isi->regs + reg);
  83. }
  84. static u32 isi_readl(struct atmel_isi *isi, u32 reg)
  85. {
  86. return readl(isi->regs + reg);
  87. }
  88. static int configure_geometry(struct atmel_isi *isi, u32 width,
  89. u32 height, enum v4l2_mbus_pixelcode code)
  90. {
  91. u32 cfg2, cr;
  92. switch (code) {
  93. /* YUV, including grey */
  94. case V4L2_MBUS_FMT_Y8_1X8:
  95. cr = ISI_CFG2_GRAYSCALE;
  96. break;
  97. case V4L2_MBUS_FMT_VYUY8_2X8:
  98. cr = ISI_CFG2_YCC_SWAP_MODE_3;
  99. break;
  100. case V4L2_MBUS_FMT_UYVY8_2X8:
  101. cr = ISI_CFG2_YCC_SWAP_MODE_2;
  102. break;
  103. case V4L2_MBUS_FMT_YVYU8_2X8:
  104. cr = ISI_CFG2_YCC_SWAP_MODE_1;
  105. break;
  106. case V4L2_MBUS_FMT_YUYV8_2X8:
  107. cr = ISI_CFG2_YCC_SWAP_DEFAULT;
  108. break;
  109. /* RGB, TODO */
  110. default:
  111. return -EINVAL;
  112. }
  113. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  114. cfg2 = isi_readl(isi, ISI_CFG2);
  115. /* Set YCC swap mode */
  116. cfg2 &= ~ISI_CFG2_YCC_SWAP_MODE_MASK;
  117. cfg2 |= cr;
  118. /* Set width */
  119. cfg2 &= ~(ISI_CFG2_IM_HSIZE_MASK);
  120. cfg2 |= ((width - 1) << ISI_CFG2_IM_HSIZE_OFFSET) &
  121. ISI_CFG2_IM_HSIZE_MASK;
  122. /* Set height */
  123. cfg2 &= ~(ISI_CFG2_IM_VSIZE_MASK);
  124. cfg2 |= ((height - 1) << ISI_CFG2_IM_VSIZE_OFFSET)
  125. & ISI_CFG2_IM_VSIZE_MASK;
  126. isi_writel(isi, ISI_CFG2, cfg2);
  127. return 0;
  128. }
  129. static irqreturn_t atmel_isi_handle_streaming(struct atmel_isi *isi)
  130. {
  131. if (isi->active) {
  132. struct vb2_buffer *vb = &isi->active->vb;
  133. struct frame_buffer *buf = isi->active;
  134. list_del_init(&buf->list);
  135. v4l2_get_timestamp(&vb->v4l2_buf.timestamp);
  136. vb->v4l2_buf.sequence = isi->sequence++;
  137. vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
  138. }
  139. if (list_empty(&isi->video_buffer_list)) {
  140. isi->active = NULL;
  141. } else {
  142. /* start next dma frame. */
  143. isi->active = list_entry(isi->video_buffer_list.next,
  144. struct frame_buffer, list);
  145. isi_writel(isi, ISI_DMA_C_DSCR,
  146. isi->active->p_dma_desc->fbd_phys);
  147. isi_writel(isi, ISI_DMA_C_CTRL,
  148. ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  149. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);
  150. }
  151. return IRQ_HANDLED;
  152. }
  153. /* ISI interrupt service routine */
  154. static irqreturn_t isi_interrupt(int irq, void *dev_id)
  155. {
  156. struct atmel_isi *isi = dev_id;
  157. u32 status, mask, pending;
  158. irqreturn_t ret = IRQ_NONE;
  159. spin_lock(&isi->lock);
  160. status = isi_readl(isi, ISI_STATUS);
  161. mask = isi_readl(isi, ISI_INTMASK);
  162. pending = status & mask;
  163. if (pending & ISI_CTRL_SRST) {
  164. complete(&isi->complete);
  165. isi_writel(isi, ISI_INTDIS, ISI_CTRL_SRST);
  166. ret = IRQ_HANDLED;
  167. } else if (pending & ISI_CTRL_DIS) {
  168. complete(&isi->complete);
  169. isi_writel(isi, ISI_INTDIS, ISI_CTRL_DIS);
  170. ret = IRQ_HANDLED;
  171. } else {
  172. if (likely(pending & ISI_SR_CXFR_DONE))
  173. ret = atmel_isi_handle_streaming(isi);
  174. }
  175. spin_unlock(&isi->lock);
  176. return ret;
  177. }
  178. #define WAIT_ISI_RESET 1
  179. #define WAIT_ISI_DISABLE 0
  180. static int atmel_isi_wait_status(struct atmel_isi *isi, int wait_reset)
  181. {
  182. unsigned long timeout;
  183. /*
  184. * The reset or disable will only succeed if we have a
  185. * pixel clock from the camera.
  186. */
  187. init_completion(&isi->complete);
  188. if (wait_reset) {
  189. isi_writel(isi, ISI_INTEN, ISI_CTRL_SRST);
  190. isi_writel(isi, ISI_CTRL, ISI_CTRL_SRST);
  191. } else {
  192. isi_writel(isi, ISI_INTEN, ISI_CTRL_DIS);
  193. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  194. }
  195. timeout = wait_for_completion_timeout(&isi->complete,
  196. msecs_to_jiffies(100));
  197. if (timeout == 0)
  198. return -ETIMEDOUT;
  199. return 0;
  200. }
  201. /* ------------------------------------------------------------------
  202. Videobuf operations
  203. ------------------------------------------------------------------*/
  204. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
  205. unsigned int *nbuffers, unsigned int *nplanes,
  206. unsigned int sizes[], void *alloc_ctxs[])
  207. {
  208. struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
  209. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  210. struct atmel_isi *isi = ici->priv;
  211. unsigned long size;
  212. size = icd->sizeimage;
  213. if (!*nbuffers || *nbuffers > MAX_BUFFER_NUM)
  214. *nbuffers = MAX_BUFFER_NUM;
  215. if (size * *nbuffers > VID_LIMIT_BYTES)
  216. *nbuffers = VID_LIMIT_BYTES / size;
  217. *nplanes = 1;
  218. sizes[0] = size;
  219. alloc_ctxs[0] = isi->alloc_ctx;
  220. isi->sequence = 0;
  221. isi->active = NULL;
  222. dev_dbg(icd->parent, "%s, count=%d, size=%ld\n", __func__,
  223. *nbuffers, size);
  224. return 0;
  225. }
  226. static int buffer_init(struct vb2_buffer *vb)
  227. {
  228. struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb);
  229. buf->p_dma_desc = NULL;
  230. INIT_LIST_HEAD(&buf->list);
  231. return 0;
  232. }
  233. static int buffer_prepare(struct vb2_buffer *vb)
  234. {
  235. struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
  236. struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb);
  237. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  238. struct atmel_isi *isi = ici->priv;
  239. unsigned long size;
  240. struct isi_dma_desc *desc;
  241. size = icd->sizeimage;
  242. if (vb2_plane_size(vb, 0) < size) {
  243. dev_err(icd->parent, "%s data will not fit into plane (%lu < %lu)\n",
  244. __func__, vb2_plane_size(vb, 0), size);
  245. return -EINVAL;
  246. }
  247. vb2_set_plane_payload(&buf->vb, 0, size);
  248. if (!buf->p_dma_desc) {
  249. if (list_empty(&isi->dma_desc_head)) {
  250. dev_err(icd->parent, "Not enough dma descriptors.\n");
  251. return -EINVAL;
  252. } else {
  253. /* Get an available descriptor */
  254. desc = list_entry(isi->dma_desc_head.next,
  255. struct isi_dma_desc, list);
  256. /* Delete the descriptor since now it is used */
  257. list_del_init(&desc->list);
  258. /* Initialize the dma descriptor */
  259. desc->p_fbd->fb_address =
  260. vb2_dma_contig_plane_dma_addr(vb, 0);
  261. desc->p_fbd->next_fbd_address = 0;
  262. set_dma_ctrl(desc->p_fbd, ISI_DMA_CTRL_WB);
  263. buf->p_dma_desc = desc;
  264. }
  265. }
  266. return 0;
  267. }
  268. static void buffer_cleanup(struct vb2_buffer *vb)
  269. {
  270. struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
  271. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  272. struct atmel_isi *isi = ici->priv;
  273. struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb);
  274. /* This descriptor is available now and we add to head list */
  275. if (buf->p_dma_desc)
  276. list_add(&buf->p_dma_desc->list, &isi->dma_desc_head);
  277. }
  278. static void start_dma(struct atmel_isi *isi, struct frame_buffer *buffer)
  279. {
  280. u32 ctrl, cfg1;
  281. cfg1 = isi_readl(isi, ISI_CFG1);
  282. /* Enable irq: cxfr for the codec path, pxfr for the preview path */
  283. isi_writel(isi, ISI_INTEN,
  284. ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE);
  285. /* Check if already in a frame */
  286. if (isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) {
  287. dev_err(isi->soc_host.icd->parent, "Already in frame handling.\n");
  288. return;
  289. }
  290. isi_writel(isi, ISI_DMA_C_DSCR, buffer->p_dma_desc->fbd_phys);
  291. isi_writel(isi, ISI_DMA_C_CTRL, ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  292. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);
  293. cfg1 &= ~ISI_CFG1_FRATE_DIV_MASK;
  294. /* Enable linked list */
  295. cfg1 |= isi->pdata->frate | ISI_CFG1_DISCR;
  296. /* Enable codec path and ISI */
  297. ctrl = ISI_CTRL_CDC | ISI_CTRL_EN;
  298. isi_writel(isi, ISI_CTRL, ctrl);
  299. isi_writel(isi, ISI_CFG1, cfg1);
  300. }
  301. static void buffer_queue(struct vb2_buffer *vb)
  302. {
  303. struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
  304. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  305. struct atmel_isi *isi = ici->priv;
  306. struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb);
  307. unsigned long flags = 0;
  308. spin_lock_irqsave(&isi->lock, flags);
  309. list_add_tail(&buf->list, &isi->video_buffer_list);
  310. if (isi->active == NULL) {
  311. isi->active = buf;
  312. if (vb2_is_streaming(vb->vb2_queue))
  313. start_dma(isi, buf);
  314. }
  315. spin_unlock_irqrestore(&isi->lock, flags);
  316. }
  317. static int start_streaming(struct vb2_queue *vq, unsigned int count)
  318. {
  319. struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
  320. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  321. struct atmel_isi *isi = ici->priv;
  322. u32 sr = 0;
  323. int ret;
  324. /* Reset ISI */
  325. ret = atmel_isi_wait_status(isi, WAIT_ISI_RESET);
  326. if (ret < 0) {
  327. dev_err(icd->parent, "Reset ISI timed out\n");
  328. return ret;
  329. }
  330. /* Disable all interrupts */
  331. isi_writel(isi, ISI_INTDIS, ~0UL);
  332. spin_lock_irq(&isi->lock);
  333. /* Clear any pending interrupt */
  334. sr = isi_readl(isi, ISI_STATUS);
  335. if (count)
  336. start_dma(isi, isi->active);
  337. spin_unlock_irq(&isi->lock);
  338. return 0;
  339. }
  340. /* abort streaming and wait for last buffer */
  341. static void stop_streaming(struct vb2_queue *vq)
  342. {
  343. struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
  344. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  345. struct atmel_isi *isi = ici->priv;
  346. struct frame_buffer *buf, *node;
  347. int ret = 0;
  348. unsigned long timeout;
  349. spin_lock_irq(&isi->lock);
  350. isi->active = NULL;
  351. /* Release all active buffers */
  352. list_for_each_entry_safe(buf, node, &isi->video_buffer_list, list) {
  353. list_del_init(&buf->list);
  354. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  355. }
  356. spin_unlock_irq(&isi->lock);
  357. timeout = jiffies + FRAME_INTERVAL_MILLI_SEC * HZ;
  358. /* Wait until the end of the current frame. */
  359. while ((isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) &&
  360. time_before(jiffies, timeout))
  361. msleep(1);
  362. if (time_after(jiffies, timeout)) {
  363. dev_err(icd->parent,
  364. "Timeout waiting for finishing codec request\n");
  365. return;
  366. }
  367. /* Disable interrupts */
  368. isi_writel(isi, ISI_INTDIS,
  369. ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE);
  370. /* Disable ISI and wait for it is done */
  371. ret = atmel_isi_wait_status(isi, WAIT_ISI_DISABLE);
  372. if (ret < 0)
  373. dev_err(icd->parent, "Disable ISI timed out\n");
  374. }
  375. static struct vb2_ops isi_video_qops = {
  376. .queue_setup = queue_setup,
  377. .buf_init = buffer_init,
  378. .buf_prepare = buffer_prepare,
  379. .buf_cleanup = buffer_cleanup,
  380. .buf_queue = buffer_queue,
  381. .start_streaming = start_streaming,
  382. .stop_streaming = stop_streaming,
  383. .wait_prepare = soc_camera_unlock,
  384. .wait_finish = soc_camera_lock,
  385. };
  386. /* ------------------------------------------------------------------
  387. SOC camera operations for the device
  388. ------------------------------------------------------------------*/
  389. static int isi_camera_init_videobuf(struct vb2_queue *q,
  390. struct soc_camera_device *icd)
  391. {
  392. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  393. q->io_modes = VB2_MMAP;
  394. q->drv_priv = icd;
  395. q->buf_struct_size = sizeof(struct frame_buffer);
  396. q->ops = &isi_video_qops;
  397. q->mem_ops = &vb2_dma_contig_memops;
  398. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  399. return vb2_queue_init(q);
  400. }
  401. static int isi_camera_set_fmt(struct soc_camera_device *icd,
  402. struct v4l2_format *f)
  403. {
  404. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  405. struct atmel_isi *isi = ici->priv;
  406. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  407. const struct soc_camera_format_xlate *xlate;
  408. struct v4l2_pix_format *pix = &f->fmt.pix;
  409. struct v4l2_mbus_framefmt mf;
  410. int ret;
  411. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  412. if (!xlate) {
  413. dev_warn(icd->parent, "Format %x not found\n",
  414. pix->pixelformat);
  415. return -EINVAL;
  416. }
  417. dev_dbg(icd->parent, "Plan to set format %dx%d\n",
  418. pix->width, pix->height);
  419. mf.width = pix->width;
  420. mf.height = pix->height;
  421. mf.field = pix->field;
  422. mf.colorspace = pix->colorspace;
  423. mf.code = xlate->code;
  424. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  425. if (ret < 0)
  426. return ret;
  427. if (mf.code != xlate->code)
  428. return -EINVAL;
  429. ret = configure_geometry(isi, pix->width, pix->height, xlate->code);
  430. if (ret < 0)
  431. return ret;
  432. pix->width = mf.width;
  433. pix->height = mf.height;
  434. pix->field = mf.field;
  435. pix->colorspace = mf.colorspace;
  436. icd->current_fmt = xlate;
  437. dev_dbg(icd->parent, "Finally set format %dx%d\n",
  438. pix->width, pix->height);
  439. return ret;
  440. }
  441. static int isi_camera_try_fmt(struct soc_camera_device *icd,
  442. struct v4l2_format *f)
  443. {
  444. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  445. const struct soc_camera_format_xlate *xlate;
  446. struct v4l2_pix_format *pix = &f->fmt.pix;
  447. struct v4l2_mbus_framefmt mf;
  448. u32 pixfmt = pix->pixelformat;
  449. int ret;
  450. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  451. if (pixfmt && !xlate) {
  452. dev_warn(icd->parent, "Format %x not found\n", pixfmt);
  453. return -EINVAL;
  454. }
  455. /* limit to Atmel ISI hardware capabilities */
  456. if (pix->height > MAX_SUPPORT_HEIGHT)
  457. pix->height = MAX_SUPPORT_HEIGHT;
  458. if (pix->width > MAX_SUPPORT_WIDTH)
  459. pix->width = MAX_SUPPORT_WIDTH;
  460. /* limit to sensor capabilities */
  461. mf.width = pix->width;
  462. mf.height = pix->height;
  463. mf.field = pix->field;
  464. mf.colorspace = pix->colorspace;
  465. mf.code = xlate->code;
  466. ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
  467. if (ret < 0)
  468. return ret;
  469. pix->width = mf.width;
  470. pix->height = mf.height;
  471. pix->colorspace = mf.colorspace;
  472. switch (mf.field) {
  473. case V4L2_FIELD_ANY:
  474. pix->field = V4L2_FIELD_NONE;
  475. break;
  476. case V4L2_FIELD_NONE:
  477. break;
  478. default:
  479. dev_err(icd->parent, "Field type %d unsupported.\n",
  480. mf.field);
  481. ret = -EINVAL;
  482. }
  483. return ret;
  484. }
  485. static const struct soc_mbus_pixelfmt isi_camera_formats[] = {
  486. {
  487. .fourcc = V4L2_PIX_FMT_YUYV,
  488. .name = "Packed YUV422 16 bit",
  489. .bits_per_sample = 8,
  490. .packing = SOC_MBUS_PACKING_2X8_PADHI,
  491. .order = SOC_MBUS_ORDER_LE,
  492. .layout = SOC_MBUS_LAYOUT_PACKED,
  493. },
  494. };
  495. /* This will be corrected as we get more formats */
  496. static bool isi_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt)
  497. {
  498. return fmt->packing == SOC_MBUS_PACKING_NONE ||
  499. (fmt->bits_per_sample == 8 &&
  500. fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
  501. (fmt->bits_per_sample > 8 &&
  502. fmt->packing == SOC_MBUS_PACKING_EXTEND16);
  503. }
  504. #define ISI_BUS_PARAM (V4L2_MBUS_MASTER | \
  505. V4L2_MBUS_HSYNC_ACTIVE_HIGH | \
  506. V4L2_MBUS_HSYNC_ACTIVE_LOW | \
  507. V4L2_MBUS_VSYNC_ACTIVE_HIGH | \
  508. V4L2_MBUS_VSYNC_ACTIVE_LOW | \
  509. V4L2_MBUS_PCLK_SAMPLE_RISING | \
  510. V4L2_MBUS_PCLK_SAMPLE_FALLING | \
  511. V4L2_MBUS_DATA_ACTIVE_HIGH)
  512. static int isi_camera_try_bus_param(struct soc_camera_device *icd,
  513. unsigned char buswidth)
  514. {
  515. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  516. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  517. struct atmel_isi *isi = ici->priv;
  518. struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
  519. unsigned long common_flags;
  520. int ret;
  521. ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
  522. if (!ret) {
  523. common_flags = soc_mbus_config_compatible(&cfg,
  524. ISI_BUS_PARAM);
  525. if (!common_flags) {
  526. dev_warn(icd->parent,
  527. "Flags incompatible: camera 0x%x, host 0x%x\n",
  528. cfg.flags, ISI_BUS_PARAM);
  529. return -EINVAL;
  530. }
  531. } else if (ret != -ENOIOCTLCMD) {
  532. return ret;
  533. }
  534. if ((1 << (buswidth - 1)) & isi->width_flags)
  535. return 0;
  536. return -EINVAL;
  537. }
  538. static int isi_camera_get_formats(struct soc_camera_device *icd,
  539. unsigned int idx,
  540. struct soc_camera_format_xlate *xlate)
  541. {
  542. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  543. int formats = 0, ret;
  544. /* sensor format */
  545. enum v4l2_mbus_pixelcode code;
  546. /* soc camera host format */
  547. const struct soc_mbus_pixelfmt *fmt;
  548. ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
  549. if (ret < 0)
  550. /* No more formats */
  551. return 0;
  552. fmt = soc_mbus_get_fmtdesc(code);
  553. if (!fmt) {
  554. dev_err(icd->parent,
  555. "Invalid format code #%u: %d\n", idx, code);
  556. return 0;
  557. }
  558. /* This also checks support for the requested bits-per-sample */
  559. ret = isi_camera_try_bus_param(icd, fmt->bits_per_sample);
  560. if (ret < 0) {
  561. dev_err(icd->parent,
  562. "Fail to try the bus parameters.\n");
  563. return 0;
  564. }
  565. switch (code) {
  566. case V4L2_MBUS_FMT_UYVY8_2X8:
  567. case V4L2_MBUS_FMT_VYUY8_2X8:
  568. case V4L2_MBUS_FMT_YUYV8_2X8:
  569. case V4L2_MBUS_FMT_YVYU8_2X8:
  570. formats++;
  571. if (xlate) {
  572. xlate->host_fmt = &isi_camera_formats[0];
  573. xlate->code = code;
  574. xlate++;
  575. dev_dbg(icd->parent, "Providing format %s using code %d\n",
  576. isi_camera_formats[0].name, code);
  577. }
  578. break;
  579. default:
  580. if (!isi_camera_packing_supported(fmt))
  581. return 0;
  582. if (xlate)
  583. dev_dbg(icd->parent,
  584. "Providing format %s in pass-through mode\n",
  585. fmt->name);
  586. }
  587. /* Generic pass-through */
  588. formats++;
  589. if (xlate) {
  590. xlate->host_fmt = fmt;
  591. xlate->code = code;
  592. xlate++;
  593. }
  594. return formats;
  595. }
  596. static int isi_camera_add_device(struct soc_camera_device *icd)
  597. {
  598. dev_dbg(icd->parent, "Atmel ISI Camera driver attached to camera %d\n",
  599. icd->devnum);
  600. return 0;
  601. }
  602. static void isi_camera_remove_device(struct soc_camera_device *icd)
  603. {
  604. dev_dbg(icd->parent, "Atmel ISI Camera driver detached from camera %d\n",
  605. icd->devnum);
  606. }
  607. /* Called with .host_lock held */
  608. static int isi_camera_clock_start(struct soc_camera_host *ici)
  609. {
  610. struct atmel_isi *isi = ici->priv;
  611. int ret;
  612. ret = clk_prepare_enable(isi->pclk);
  613. if (ret)
  614. return ret;
  615. if (!IS_ERR(isi->mck)) {
  616. ret = clk_prepare_enable(isi->mck);
  617. if (ret) {
  618. clk_disable_unprepare(isi->pclk);
  619. return ret;
  620. }
  621. }
  622. return 0;
  623. }
  624. /* Called with .host_lock held */
  625. static void isi_camera_clock_stop(struct soc_camera_host *ici)
  626. {
  627. struct atmel_isi *isi = ici->priv;
  628. if (!IS_ERR(isi->mck))
  629. clk_disable_unprepare(isi->mck);
  630. clk_disable_unprepare(isi->pclk);
  631. }
  632. static unsigned int isi_camera_poll(struct file *file, poll_table *pt)
  633. {
  634. struct soc_camera_device *icd = file->private_data;
  635. return vb2_poll(&icd->vb2_vidq, file, pt);
  636. }
  637. static int isi_camera_querycap(struct soc_camera_host *ici,
  638. struct v4l2_capability *cap)
  639. {
  640. strcpy(cap->driver, "atmel-isi");
  641. strcpy(cap->card, "Atmel Image Sensor Interface");
  642. cap->capabilities = (V4L2_CAP_VIDEO_CAPTURE |
  643. V4L2_CAP_STREAMING);
  644. return 0;
  645. }
  646. static int isi_camera_set_bus_param(struct soc_camera_device *icd)
  647. {
  648. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  649. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  650. struct atmel_isi *isi = ici->priv;
  651. struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
  652. unsigned long common_flags;
  653. int ret;
  654. u32 cfg1 = 0;
  655. ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
  656. if (!ret) {
  657. common_flags = soc_mbus_config_compatible(&cfg,
  658. ISI_BUS_PARAM);
  659. if (!common_flags) {
  660. dev_warn(icd->parent,
  661. "Flags incompatible: camera 0x%x, host 0x%x\n",
  662. cfg.flags, ISI_BUS_PARAM);
  663. return -EINVAL;
  664. }
  665. } else if (ret != -ENOIOCTLCMD) {
  666. return ret;
  667. } else {
  668. common_flags = ISI_BUS_PARAM;
  669. }
  670. dev_dbg(icd->parent, "Flags cam: 0x%x host: 0x%x common: 0x%lx\n",
  671. cfg.flags, ISI_BUS_PARAM, common_flags);
  672. /* Make choises, based on platform preferences */
  673. if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) &&
  674. (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) {
  675. if (isi->pdata->hsync_act_low)
  676. common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH;
  677. else
  678. common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW;
  679. }
  680. if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
  681. (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
  682. if (isi->pdata->vsync_act_low)
  683. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
  684. else
  685. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
  686. }
  687. if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) &&
  688. (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) {
  689. if (isi->pdata->pclk_act_falling)
  690. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING;
  691. else
  692. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING;
  693. }
  694. cfg.flags = common_flags;
  695. ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
  696. if (ret < 0 && ret != -ENOIOCTLCMD) {
  697. dev_dbg(icd->parent, "camera s_mbus_config(0x%lx) returned %d\n",
  698. common_flags, ret);
  699. return ret;
  700. }
  701. /* set bus param for ISI */
  702. if (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
  703. cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW;
  704. if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
  705. cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW;
  706. if (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
  707. cfg1 |= ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING;
  708. if (isi->pdata->has_emb_sync)
  709. cfg1 |= ISI_CFG1_EMB_SYNC;
  710. if (isi->pdata->full_mode)
  711. cfg1 |= ISI_CFG1_FULL_MODE;
  712. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  713. isi_writel(isi, ISI_CFG1, cfg1);
  714. return 0;
  715. }
  716. static struct soc_camera_host_ops isi_soc_camera_host_ops = {
  717. .owner = THIS_MODULE,
  718. .add = isi_camera_add_device,
  719. .remove = isi_camera_remove_device,
  720. .clock_start = isi_camera_clock_start,
  721. .clock_stop = isi_camera_clock_stop,
  722. .set_fmt = isi_camera_set_fmt,
  723. .try_fmt = isi_camera_try_fmt,
  724. .get_formats = isi_camera_get_formats,
  725. .init_videobuf2 = isi_camera_init_videobuf,
  726. .poll = isi_camera_poll,
  727. .querycap = isi_camera_querycap,
  728. .set_bus_param = isi_camera_set_bus_param,
  729. };
  730. /* -----------------------------------------------------------------------*/
  731. static int atmel_isi_remove(struct platform_device *pdev)
  732. {
  733. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  734. struct atmel_isi *isi = container_of(soc_host,
  735. struct atmel_isi, soc_host);
  736. soc_camera_host_unregister(soc_host);
  737. vb2_dma_contig_cleanup_ctx(isi->alloc_ctx);
  738. dma_free_coherent(&pdev->dev,
  739. sizeof(struct fbd) * MAX_BUFFER_NUM,
  740. isi->p_fb_descriptors,
  741. isi->fb_descriptors_phys);
  742. return 0;
  743. }
  744. static int atmel_isi_probe(struct platform_device *pdev)
  745. {
  746. unsigned int irq;
  747. struct atmel_isi *isi;
  748. struct resource *regs;
  749. int ret, i;
  750. struct device *dev = &pdev->dev;
  751. struct soc_camera_host *soc_host;
  752. struct isi_platform_data *pdata;
  753. pdata = dev->platform_data;
  754. if (!pdata || !pdata->data_width_flags) {
  755. dev_err(&pdev->dev,
  756. "No config available for Atmel ISI\n");
  757. return -EINVAL;
  758. }
  759. isi = devm_kzalloc(&pdev->dev, sizeof(struct atmel_isi), GFP_KERNEL);
  760. if (!isi) {
  761. dev_err(&pdev->dev, "Can't allocate interface!\n");
  762. return -ENOMEM;
  763. }
  764. isi->pclk = devm_clk_get(&pdev->dev, "isi_clk");
  765. if (IS_ERR(isi->pclk))
  766. return PTR_ERR(isi->pclk);
  767. isi->pdata = pdata;
  768. isi->active = NULL;
  769. spin_lock_init(&isi->lock);
  770. INIT_LIST_HEAD(&isi->video_buffer_list);
  771. INIT_LIST_HEAD(&isi->dma_desc_head);
  772. /* ISI_MCK is the sensor master clock. It should be handled by the
  773. * sensor driver directly, as the ISI has no use for that clock. Make
  774. * the clock optional here while platforms transition to the correct
  775. * model.
  776. */
  777. isi->mck = devm_clk_get(dev, "isi_mck");
  778. if (!IS_ERR(isi->mck)) {
  779. /* Set ISI_MCK's frequency, it should be faster than pixel
  780. * clock.
  781. */
  782. ret = clk_set_rate(isi->mck, pdata->mck_hz);
  783. if (ret < 0)
  784. return ret;
  785. }
  786. isi->p_fb_descriptors = dma_alloc_coherent(&pdev->dev,
  787. sizeof(struct fbd) * MAX_BUFFER_NUM,
  788. &isi->fb_descriptors_phys,
  789. GFP_KERNEL);
  790. if (!isi->p_fb_descriptors) {
  791. dev_err(&pdev->dev, "Can't allocate descriptors!\n");
  792. return -ENOMEM;
  793. }
  794. for (i = 0; i < MAX_BUFFER_NUM; i++) {
  795. isi->dma_desc[i].p_fbd = isi->p_fb_descriptors + i;
  796. isi->dma_desc[i].fbd_phys = isi->fb_descriptors_phys +
  797. i * sizeof(struct fbd);
  798. list_add(&isi->dma_desc[i].list, &isi->dma_desc_head);
  799. }
  800. isi->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
  801. if (IS_ERR(isi->alloc_ctx)) {
  802. ret = PTR_ERR(isi->alloc_ctx);
  803. goto err_alloc_ctx;
  804. }
  805. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  806. isi->regs = devm_ioremap_resource(&pdev->dev, regs);
  807. if (IS_ERR(isi->regs)) {
  808. ret = PTR_ERR(isi->regs);
  809. goto err_ioremap;
  810. }
  811. if (pdata->data_width_flags & ISI_DATAWIDTH_8)
  812. isi->width_flags = 1 << 7;
  813. if (pdata->data_width_flags & ISI_DATAWIDTH_10)
  814. isi->width_flags |= 1 << 9;
  815. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  816. irq = platform_get_irq(pdev, 0);
  817. if (IS_ERR_VALUE(irq)) {
  818. ret = irq;
  819. goto err_req_irq;
  820. }
  821. ret = devm_request_irq(&pdev->dev, irq, isi_interrupt, 0, "isi", isi);
  822. if (ret) {
  823. dev_err(&pdev->dev, "Unable to request irq %d\n", irq);
  824. goto err_req_irq;
  825. }
  826. isi->irq = irq;
  827. soc_host = &isi->soc_host;
  828. soc_host->drv_name = "isi-camera";
  829. soc_host->ops = &isi_soc_camera_host_ops;
  830. soc_host->priv = isi;
  831. soc_host->v4l2_dev.dev = &pdev->dev;
  832. soc_host->nr = pdev->id;
  833. ret = soc_camera_host_register(soc_host);
  834. if (ret) {
  835. dev_err(&pdev->dev, "Unable to register soc camera host\n");
  836. goto err_register_soc_camera_host;
  837. }
  838. return 0;
  839. err_register_soc_camera_host:
  840. err_req_irq:
  841. err_ioremap:
  842. vb2_dma_contig_cleanup_ctx(isi->alloc_ctx);
  843. err_alloc_ctx:
  844. dma_free_coherent(&pdev->dev,
  845. sizeof(struct fbd) * MAX_BUFFER_NUM,
  846. isi->p_fb_descriptors,
  847. isi->fb_descriptors_phys);
  848. return ret;
  849. }
  850. static struct platform_driver atmel_isi_driver = {
  851. .remove = atmel_isi_remove,
  852. .driver = {
  853. .name = "atmel_isi",
  854. .owner = THIS_MODULE,
  855. },
  856. };
  857. module_platform_driver_probe(atmel_isi_driver, atmel_isi_probe);
  858. MODULE_AUTHOR("Josh Wu <josh.wu@atmel.com>");
  859. MODULE_DESCRIPTION("The V4L2 driver for Atmel Linux");
  860. MODULE_LICENSE("GPL");
  861. MODULE_SUPPORTED_DEVICE("video");