s5p_mfc_dec.c 34 KB

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  1. /*
  2. * linux/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
  3. *
  4. * Copyright (C) 2011 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com/
  6. * Kamil Debski, <k.debski@samsung.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/sched.h>
  19. #include <linux/slab.h>
  20. #include <linux/version.h>
  21. #include <linux/videodev2.h>
  22. #include <linux/workqueue.h>
  23. #include <media/v4l2-ctrls.h>
  24. #include <media/v4l2-event.h>
  25. #include <media/videobuf2-core.h>
  26. #include "s5p_mfc_common.h"
  27. #include "s5p_mfc_ctrl.h"
  28. #include "s5p_mfc_debug.h"
  29. #include "s5p_mfc_dec.h"
  30. #include "s5p_mfc_intr.h"
  31. #include "s5p_mfc_opr.h"
  32. #include "s5p_mfc_pm.h"
  33. static struct s5p_mfc_fmt formats[] = {
  34. {
  35. .name = "4:2:0 2 Planes 16x16 Tiles",
  36. .fourcc = V4L2_PIX_FMT_NV12MT_16X16,
  37. .codec_mode = S5P_MFC_CODEC_NONE,
  38. .type = MFC_FMT_RAW,
  39. .num_planes = 2,
  40. .versions = MFC_V6_BIT | MFC_V7_BIT,
  41. },
  42. {
  43. .name = "4:2:0 2 Planes 64x32 Tiles",
  44. .fourcc = V4L2_PIX_FMT_NV12MT,
  45. .codec_mode = S5P_MFC_CODEC_NONE,
  46. .type = MFC_FMT_RAW,
  47. .num_planes = 2,
  48. .versions = MFC_V5_BIT,
  49. },
  50. {
  51. .name = "4:2:0 2 Planes Y/CbCr",
  52. .fourcc = V4L2_PIX_FMT_NV12M,
  53. .codec_mode = S5P_MFC_CODEC_NONE,
  54. .type = MFC_FMT_RAW,
  55. .num_planes = 2,
  56. .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
  57. },
  58. {
  59. .name = "4:2:0 2 Planes Y/CrCb",
  60. .fourcc = V4L2_PIX_FMT_NV21M,
  61. .codec_mode = S5P_MFC_CODEC_NONE,
  62. .type = MFC_FMT_RAW,
  63. .num_planes = 2,
  64. .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
  65. },
  66. {
  67. .name = "H264 Encoded Stream",
  68. .fourcc = V4L2_PIX_FMT_H264,
  69. .codec_mode = S5P_MFC_CODEC_H264_DEC,
  70. .type = MFC_FMT_DEC,
  71. .num_planes = 1,
  72. .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
  73. MFC_V8_BIT,
  74. },
  75. {
  76. .name = "H264/MVC Encoded Stream",
  77. .fourcc = V4L2_PIX_FMT_H264_MVC,
  78. .codec_mode = S5P_MFC_CODEC_H264_MVC_DEC,
  79. .type = MFC_FMT_DEC,
  80. .num_planes = 1,
  81. .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
  82. },
  83. {
  84. .name = "H263 Encoded Stream",
  85. .fourcc = V4L2_PIX_FMT_H263,
  86. .codec_mode = S5P_MFC_CODEC_H263_DEC,
  87. .type = MFC_FMT_DEC,
  88. .num_planes = 1,
  89. .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
  90. MFC_V8_BIT,
  91. },
  92. {
  93. .name = "MPEG1 Encoded Stream",
  94. .fourcc = V4L2_PIX_FMT_MPEG1,
  95. .codec_mode = S5P_MFC_CODEC_MPEG2_DEC,
  96. .type = MFC_FMT_DEC,
  97. .num_planes = 1,
  98. .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
  99. MFC_V8_BIT,
  100. },
  101. {
  102. .name = "MPEG2 Encoded Stream",
  103. .fourcc = V4L2_PIX_FMT_MPEG2,
  104. .codec_mode = S5P_MFC_CODEC_MPEG2_DEC,
  105. .type = MFC_FMT_DEC,
  106. .num_planes = 1,
  107. .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
  108. MFC_V8_BIT,
  109. },
  110. {
  111. .name = "MPEG4 Encoded Stream",
  112. .fourcc = V4L2_PIX_FMT_MPEG4,
  113. .codec_mode = S5P_MFC_CODEC_MPEG4_DEC,
  114. .type = MFC_FMT_DEC,
  115. .num_planes = 1,
  116. .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
  117. MFC_V8_BIT,
  118. },
  119. {
  120. .name = "XviD Encoded Stream",
  121. .fourcc = V4L2_PIX_FMT_XVID,
  122. .codec_mode = S5P_MFC_CODEC_MPEG4_DEC,
  123. .type = MFC_FMT_DEC,
  124. .num_planes = 1,
  125. .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
  126. MFC_V8_BIT,
  127. },
  128. {
  129. .name = "VC1 Encoded Stream",
  130. .fourcc = V4L2_PIX_FMT_VC1_ANNEX_G,
  131. .codec_mode = S5P_MFC_CODEC_VC1_DEC,
  132. .type = MFC_FMT_DEC,
  133. .num_planes = 1,
  134. .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
  135. MFC_V8_BIT,
  136. },
  137. {
  138. .name = "VC1 RCV Encoded Stream",
  139. .fourcc = V4L2_PIX_FMT_VC1_ANNEX_L,
  140. .codec_mode = S5P_MFC_CODEC_VC1RCV_DEC,
  141. .type = MFC_FMT_DEC,
  142. .num_planes = 1,
  143. .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
  144. MFC_V8_BIT,
  145. },
  146. {
  147. .name = "VP8 Encoded Stream",
  148. .fourcc = V4L2_PIX_FMT_VP8,
  149. .codec_mode = S5P_MFC_CODEC_VP8_DEC,
  150. .type = MFC_FMT_DEC,
  151. .num_planes = 1,
  152. .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
  153. },
  154. };
  155. #define NUM_FORMATS ARRAY_SIZE(formats)
  156. /* Find selected format description */
  157. static struct s5p_mfc_fmt *find_format(struct v4l2_format *f, unsigned int t)
  158. {
  159. unsigned int i;
  160. for (i = 0; i < NUM_FORMATS; i++) {
  161. if (formats[i].fourcc == f->fmt.pix_mp.pixelformat &&
  162. formats[i].type == t)
  163. return &formats[i];
  164. }
  165. return NULL;
  166. }
  167. static struct mfc_control controls[] = {
  168. {
  169. .id = V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY,
  170. .type = V4L2_CTRL_TYPE_INTEGER,
  171. .name = "H264 Display Delay",
  172. .minimum = 0,
  173. .maximum = 16383,
  174. .step = 1,
  175. .default_value = 0,
  176. },
  177. {
  178. .id = V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE,
  179. .type = V4L2_CTRL_TYPE_BOOLEAN,
  180. .name = "H264 Display Delay Enable",
  181. .minimum = 0,
  182. .maximum = 1,
  183. .step = 1,
  184. .default_value = 0,
  185. },
  186. {
  187. .id = V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER,
  188. .type = V4L2_CTRL_TYPE_BOOLEAN,
  189. .name = "Mpeg4 Loop Filter Enable",
  190. .minimum = 0,
  191. .maximum = 1,
  192. .step = 1,
  193. .default_value = 0,
  194. },
  195. {
  196. .id = V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE,
  197. .type = V4L2_CTRL_TYPE_BOOLEAN,
  198. .name = "Slice Interface Enable",
  199. .minimum = 0,
  200. .maximum = 1,
  201. .step = 1,
  202. .default_value = 0,
  203. },
  204. {
  205. .id = V4L2_CID_MIN_BUFFERS_FOR_CAPTURE,
  206. .type = V4L2_CTRL_TYPE_INTEGER,
  207. .name = "Minimum number of cap bufs",
  208. .minimum = 1,
  209. .maximum = 32,
  210. .step = 1,
  211. .default_value = 1,
  212. .is_volatile = 1,
  213. },
  214. };
  215. #define NUM_CTRLS ARRAY_SIZE(controls)
  216. /* Check whether a context should be run on hardware */
  217. static int s5p_mfc_ctx_ready(struct s5p_mfc_ctx *ctx)
  218. {
  219. /* Context is to parse header */
  220. if (ctx->src_queue_cnt >= 1 && ctx->state == MFCINST_GOT_INST)
  221. return 1;
  222. /* Context is to decode a frame */
  223. if (ctx->src_queue_cnt >= 1 &&
  224. ctx->state == MFCINST_RUNNING &&
  225. ctx->dst_queue_cnt >= ctx->pb_count)
  226. return 1;
  227. /* Context is to return last frame */
  228. if (ctx->state == MFCINST_FINISHING &&
  229. ctx->dst_queue_cnt >= ctx->pb_count)
  230. return 1;
  231. /* Context is to set buffers */
  232. if (ctx->src_queue_cnt >= 1 &&
  233. ctx->state == MFCINST_HEAD_PARSED &&
  234. ctx->capture_state == QUEUE_BUFS_MMAPED)
  235. return 1;
  236. /* Resolution change */
  237. if ((ctx->state == MFCINST_RES_CHANGE_INIT ||
  238. ctx->state == MFCINST_RES_CHANGE_FLUSH) &&
  239. ctx->dst_queue_cnt >= ctx->pb_count)
  240. return 1;
  241. if (ctx->state == MFCINST_RES_CHANGE_END &&
  242. ctx->src_queue_cnt >= 1)
  243. return 1;
  244. mfc_debug(2, "ctx is not ready\n");
  245. return 0;
  246. }
  247. static struct s5p_mfc_codec_ops decoder_codec_ops = {
  248. .pre_seq_start = NULL,
  249. .post_seq_start = NULL,
  250. .pre_frame_start = NULL,
  251. .post_frame_start = NULL,
  252. };
  253. /* Query capabilities of the device */
  254. static int vidioc_querycap(struct file *file, void *priv,
  255. struct v4l2_capability *cap)
  256. {
  257. struct s5p_mfc_dev *dev = video_drvdata(file);
  258. strncpy(cap->driver, dev->plat_dev->name, sizeof(cap->driver) - 1);
  259. strncpy(cap->card, dev->plat_dev->name, sizeof(cap->card) - 1);
  260. cap->bus_info[0] = 0;
  261. cap->version = KERNEL_VERSION(1, 0, 0);
  262. /*
  263. * This is only a mem-to-mem video device. The capture and output
  264. * device capability flags are left only for backward compatibility
  265. * and are scheduled for removal.
  266. */
  267. cap->capabilities = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING |
  268. V4L2_CAP_VIDEO_CAPTURE_MPLANE |
  269. V4L2_CAP_VIDEO_OUTPUT_MPLANE;
  270. return 0;
  271. }
  272. /* Enumerate format */
  273. static int vidioc_enum_fmt(struct file *file, struct v4l2_fmtdesc *f,
  274. bool mplane, bool out)
  275. {
  276. struct s5p_mfc_dev *dev = video_drvdata(file);
  277. struct s5p_mfc_fmt *fmt;
  278. int i, j = 0;
  279. for (i = 0; i < ARRAY_SIZE(formats); ++i) {
  280. if (mplane && formats[i].num_planes == 1)
  281. continue;
  282. else if (!mplane && formats[i].num_planes > 1)
  283. continue;
  284. if (out && formats[i].type != MFC_FMT_DEC)
  285. continue;
  286. else if (!out && formats[i].type != MFC_FMT_RAW)
  287. continue;
  288. else if ((dev->variant->version_bit & formats[i].versions) == 0)
  289. continue;
  290. if (j == f->index)
  291. break;
  292. ++j;
  293. }
  294. if (i == ARRAY_SIZE(formats))
  295. return -EINVAL;
  296. fmt = &formats[i];
  297. strlcpy(f->description, fmt->name, sizeof(f->description));
  298. f->pixelformat = fmt->fourcc;
  299. return 0;
  300. }
  301. static int vidioc_enum_fmt_vid_cap(struct file *file, void *pirv,
  302. struct v4l2_fmtdesc *f)
  303. {
  304. return vidioc_enum_fmt(file, f, false, false);
  305. }
  306. static int vidioc_enum_fmt_vid_cap_mplane(struct file *file, void *pirv,
  307. struct v4l2_fmtdesc *f)
  308. {
  309. return vidioc_enum_fmt(file, f, true, false);
  310. }
  311. static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
  312. struct v4l2_fmtdesc *f)
  313. {
  314. return vidioc_enum_fmt(file, f, false, true);
  315. }
  316. static int vidioc_enum_fmt_vid_out_mplane(struct file *file, void *priv,
  317. struct v4l2_fmtdesc *f)
  318. {
  319. return vidioc_enum_fmt(file, f, true, true);
  320. }
  321. /* Get format */
  322. static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
  323. {
  324. struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
  325. struct v4l2_pix_format_mplane *pix_mp;
  326. mfc_debug_enter();
  327. pix_mp = &f->fmt.pix_mp;
  328. if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE &&
  329. (ctx->state == MFCINST_GOT_INST || ctx->state ==
  330. MFCINST_RES_CHANGE_END)) {
  331. /* If the MFC is parsing the header,
  332. * so wait until it is finished */
  333. s5p_mfc_clean_ctx_int_flags(ctx);
  334. s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_SEQ_DONE_RET,
  335. 0);
  336. }
  337. if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE &&
  338. ctx->state >= MFCINST_HEAD_PARSED &&
  339. ctx->state < MFCINST_ABORT) {
  340. /* This is run on CAPTURE (decode output) */
  341. /* Width and height are set to the dimensions
  342. of the movie, the buffer is bigger and
  343. further processing stages should crop to this
  344. rectangle. */
  345. pix_mp->width = ctx->buf_width;
  346. pix_mp->height = ctx->buf_height;
  347. pix_mp->field = V4L2_FIELD_NONE;
  348. pix_mp->num_planes = 2;
  349. /* Set pixelformat to the format in which MFC
  350. outputs the decoded frame */
  351. pix_mp->pixelformat = ctx->dst_fmt->fourcc;
  352. pix_mp->plane_fmt[0].bytesperline = ctx->buf_width;
  353. pix_mp->plane_fmt[0].sizeimage = ctx->luma_size;
  354. pix_mp->plane_fmt[1].bytesperline = ctx->buf_width;
  355. pix_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
  356. } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
  357. /* This is run on OUTPUT
  358. The buffer contains compressed image
  359. so width and height have no meaning */
  360. pix_mp->width = 0;
  361. pix_mp->height = 0;
  362. pix_mp->field = V4L2_FIELD_NONE;
  363. pix_mp->plane_fmt[0].bytesperline = ctx->dec_src_buf_size;
  364. pix_mp->plane_fmt[0].sizeimage = ctx->dec_src_buf_size;
  365. pix_mp->pixelformat = ctx->src_fmt->fourcc;
  366. pix_mp->num_planes = ctx->src_fmt->num_planes;
  367. } else {
  368. mfc_err("Format could not be read\n");
  369. mfc_debug(2, "%s-- with error\n", __func__);
  370. return -EINVAL;
  371. }
  372. mfc_debug_leave();
  373. return 0;
  374. }
  375. /* Try format */
  376. static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f)
  377. {
  378. struct s5p_mfc_dev *dev = video_drvdata(file);
  379. struct s5p_mfc_fmt *fmt;
  380. mfc_debug(2, "Type is %d\n", f->type);
  381. if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
  382. fmt = find_format(f, MFC_FMT_DEC);
  383. if (!fmt) {
  384. mfc_err("Unsupported format for source.\n");
  385. return -EINVAL;
  386. }
  387. if (fmt->codec_mode == S5P_FIMV_CODEC_NONE) {
  388. mfc_err("Unknown codec\n");
  389. return -EINVAL;
  390. }
  391. if ((dev->variant->version_bit & fmt->versions) == 0) {
  392. mfc_err("Unsupported format by this MFC version.\n");
  393. return -EINVAL;
  394. }
  395. } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
  396. fmt = find_format(f, MFC_FMT_RAW);
  397. if (!fmt) {
  398. mfc_err("Unsupported format for destination.\n");
  399. return -EINVAL;
  400. }
  401. if ((dev->variant->version_bit & fmt->versions) == 0) {
  402. mfc_err("Unsupported format by this MFC version.\n");
  403. return -EINVAL;
  404. }
  405. }
  406. return 0;
  407. }
  408. /* Set format */
  409. static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
  410. {
  411. struct s5p_mfc_dev *dev = video_drvdata(file);
  412. struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
  413. int ret = 0;
  414. struct v4l2_pix_format_mplane *pix_mp;
  415. mfc_debug_enter();
  416. ret = vidioc_try_fmt(file, priv, f);
  417. pix_mp = &f->fmt.pix_mp;
  418. if (ret)
  419. return ret;
  420. if (ctx->vq_src.streaming || ctx->vq_dst.streaming) {
  421. v4l2_err(&dev->v4l2_dev, "%s queue busy\n", __func__);
  422. ret = -EBUSY;
  423. goto out;
  424. }
  425. if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
  426. /* dst_fmt is validated by call to vidioc_try_fmt */
  427. ctx->dst_fmt = find_format(f, MFC_FMT_RAW);
  428. ret = 0;
  429. goto out;
  430. } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
  431. /* src_fmt is validated by call to vidioc_try_fmt */
  432. ctx->src_fmt = find_format(f, MFC_FMT_DEC);
  433. ctx->codec_mode = ctx->src_fmt->codec_mode;
  434. mfc_debug(2, "The codec number is: %d\n", ctx->codec_mode);
  435. pix_mp->height = 0;
  436. pix_mp->width = 0;
  437. if (pix_mp->plane_fmt[0].sizeimage)
  438. ctx->dec_src_buf_size = pix_mp->plane_fmt[0].sizeimage;
  439. else
  440. pix_mp->plane_fmt[0].sizeimage = ctx->dec_src_buf_size =
  441. DEF_CPB_SIZE;
  442. pix_mp->plane_fmt[0].bytesperline = 0;
  443. ctx->state = MFCINST_INIT;
  444. ret = 0;
  445. goto out;
  446. } else {
  447. mfc_err("Wrong type error for S_FMT : %d", f->type);
  448. ret = -EINVAL;
  449. goto out;
  450. }
  451. out:
  452. mfc_debug_leave();
  453. return ret;
  454. }
  455. static int reqbufs_output(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx,
  456. struct v4l2_requestbuffers *reqbufs)
  457. {
  458. int ret = 0;
  459. s5p_mfc_clock_on();
  460. if (reqbufs->count == 0) {
  461. mfc_debug(2, "Freeing buffers\n");
  462. ret = vb2_reqbufs(&ctx->vq_src, reqbufs);
  463. if (ret)
  464. goto out;
  465. s5p_mfc_close_mfc_inst(dev, ctx);
  466. ctx->src_bufs_cnt = 0;
  467. ctx->output_state = QUEUE_FREE;
  468. } else if (ctx->output_state == QUEUE_FREE) {
  469. /* Can only request buffers when we have a valid format set. */
  470. WARN_ON(ctx->src_bufs_cnt != 0);
  471. if (ctx->state != MFCINST_INIT) {
  472. mfc_err("Reqbufs called in an invalid state\n");
  473. ret = -EINVAL;
  474. goto out;
  475. }
  476. mfc_debug(2, "Allocating %d buffers for OUTPUT queue\n",
  477. reqbufs->count);
  478. ret = vb2_reqbufs(&ctx->vq_src, reqbufs);
  479. if (ret)
  480. goto out;
  481. ret = s5p_mfc_open_mfc_inst(dev, ctx);
  482. if (ret) {
  483. reqbufs->count = 0;
  484. vb2_reqbufs(&ctx->vq_src, reqbufs);
  485. goto out;
  486. }
  487. ctx->output_state = QUEUE_BUFS_REQUESTED;
  488. } else {
  489. mfc_err("Buffers have already been requested\n");
  490. ret = -EINVAL;
  491. }
  492. out:
  493. s5p_mfc_clock_off();
  494. if (ret)
  495. mfc_err("Failed allocating buffers for OUTPUT queue\n");
  496. return ret;
  497. }
  498. static int reqbufs_capture(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx,
  499. struct v4l2_requestbuffers *reqbufs)
  500. {
  501. int ret = 0;
  502. s5p_mfc_clock_on();
  503. if (reqbufs->count == 0) {
  504. mfc_debug(2, "Freeing buffers\n");
  505. ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
  506. if (ret)
  507. goto out;
  508. s5p_mfc_hw_call(dev->mfc_ops, release_codec_buffers, ctx);
  509. ctx->dst_bufs_cnt = 0;
  510. } else if (ctx->capture_state == QUEUE_FREE) {
  511. WARN_ON(ctx->dst_bufs_cnt != 0);
  512. mfc_debug(2, "Allocating %d buffers for CAPTURE queue\n",
  513. reqbufs->count);
  514. ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
  515. if (ret)
  516. goto out;
  517. ctx->capture_state = QUEUE_BUFS_REQUESTED;
  518. ctx->total_dpb_count = reqbufs->count;
  519. ret = s5p_mfc_hw_call(dev->mfc_ops, alloc_codec_buffers, ctx);
  520. if (ret) {
  521. mfc_err("Failed to allocate decoding buffers\n");
  522. reqbufs->count = 0;
  523. vb2_reqbufs(&ctx->vq_dst, reqbufs);
  524. ret = -ENOMEM;
  525. ctx->capture_state = QUEUE_FREE;
  526. goto out;
  527. }
  528. WARN_ON(ctx->dst_bufs_cnt != ctx->total_dpb_count);
  529. ctx->capture_state = QUEUE_BUFS_MMAPED;
  530. if (s5p_mfc_ctx_ready(ctx))
  531. set_work_bit_irqsave(ctx);
  532. s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
  533. s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_INIT_BUFFERS_RET,
  534. 0);
  535. } else {
  536. mfc_err("Buffers have already been requested\n");
  537. ret = -EINVAL;
  538. }
  539. out:
  540. s5p_mfc_clock_off();
  541. if (ret)
  542. mfc_err("Failed allocating buffers for CAPTURE queue\n");
  543. return ret;
  544. }
  545. /* Reqeust buffers */
  546. static int vidioc_reqbufs(struct file *file, void *priv,
  547. struct v4l2_requestbuffers *reqbufs)
  548. {
  549. struct s5p_mfc_dev *dev = video_drvdata(file);
  550. struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
  551. if (reqbufs->memory != V4L2_MEMORY_MMAP) {
  552. mfc_err("Only V4L2_MEMORY_MAP is supported\n");
  553. return -EINVAL;
  554. }
  555. if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
  556. return reqbufs_output(dev, ctx, reqbufs);
  557. } else if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
  558. return reqbufs_capture(dev, ctx, reqbufs);
  559. } else {
  560. mfc_err("Invalid type requested\n");
  561. return -EINVAL;
  562. }
  563. }
  564. /* Query buffer */
  565. static int vidioc_querybuf(struct file *file, void *priv,
  566. struct v4l2_buffer *buf)
  567. {
  568. struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
  569. int ret;
  570. int i;
  571. if (buf->memory != V4L2_MEMORY_MMAP) {
  572. mfc_err("Only mmaped buffers can be used\n");
  573. return -EINVAL;
  574. }
  575. mfc_debug(2, "State: %d, buf->type: %d\n", ctx->state, buf->type);
  576. if (ctx->state == MFCINST_GOT_INST &&
  577. buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
  578. ret = vb2_querybuf(&ctx->vq_src, buf);
  579. } else if (ctx->state == MFCINST_RUNNING &&
  580. buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
  581. ret = vb2_querybuf(&ctx->vq_dst, buf);
  582. for (i = 0; i < buf->length; i++)
  583. buf->m.planes[i].m.mem_offset += DST_QUEUE_OFF_BASE;
  584. } else {
  585. mfc_err("vidioc_querybuf called in an inappropriate state\n");
  586. ret = -EINVAL;
  587. }
  588. mfc_debug_leave();
  589. return ret;
  590. }
  591. /* Queue a buffer */
  592. static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
  593. {
  594. struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
  595. if (ctx->state == MFCINST_ERROR) {
  596. mfc_err("Call on QBUF after unrecoverable error\n");
  597. return -EIO;
  598. }
  599. if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
  600. return vb2_qbuf(&ctx->vq_src, buf);
  601. else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  602. return vb2_qbuf(&ctx->vq_dst, buf);
  603. return -EINVAL;
  604. }
  605. /* Dequeue a buffer */
  606. static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
  607. {
  608. const struct v4l2_event ev = {
  609. .type = V4L2_EVENT_EOS
  610. };
  611. struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
  612. int ret;
  613. if (ctx->state == MFCINST_ERROR) {
  614. mfc_err("Call on DQBUF after unrecoverable error\n");
  615. return -EIO;
  616. }
  617. if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
  618. ret = vb2_dqbuf(&ctx->vq_src, buf, file->f_flags & O_NONBLOCK);
  619. else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
  620. ret = vb2_dqbuf(&ctx->vq_dst, buf, file->f_flags & O_NONBLOCK);
  621. if (ret == 0 && ctx->state == MFCINST_FINISHED &&
  622. list_empty(&ctx->vq_dst.done_list))
  623. v4l2_event_queue_fh(&ctx->fh, &ev);
  624. } else {
  625. ret = -EINVAL;
  626. }
  627. return ret;
  628. }
  629. /* Export DMA buffer */
  630. static int vidioc_expbuf(struct file *file, void *priv,
  631. struct v4l2_exportbuffer *eb)
  632. {
  633. struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
  634. if (eb->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
  635. return vb2_expbuf(&ctx->vq_src, eb);
  636. if (eb->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  637. return vb2_expbuf(&ctx->vq_dst, eb);
  638. return -EINVAL;
  639. }
  640. /* Stream on */
  641. static int vidioc_streamon(struct file *file, void *priv,
  642. enum v4l2_buf_type type)
  643. {
  644. struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
  645. int ret = -EINVAL;
  646. mfc_debug_enter();
  647. if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
  648. ret = vb2_streamon(&ctx->vq_src, type);
  649. else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  650. ret = vb2_streamon(&ctx->vq_dst, type);
  651. mfc_debug_leave();
  652. return ret;
  653. }
  654. /* Stream off, which equals to a pause */
  655. static int vidioc_streamoff(struct file *file, void *priv,
  656. enum v4l2_buf_type type)
  657. {
  658. struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
  659. if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
  660. return vb2_streamoff(&ctx->vq_src, type);
  661. else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  662. return vb2_streamoff(&ctx->vq_dst, type);
  663. return -EINVAL;
  664. }
  665. /* Set controls - v4l2 control framework */
  666. static int s5p_mfc_dec_s_ctrl(struct v4l2_ctrl *ctrl)
  667. {
  668. struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl);
  669. switch (ctrl->id) {
  670. case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY:
  671. ctx->display_delay = ctrl->val;
  672. break;
  673. case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE:
  674. ctx->display_delay_enable = ctrl->val;
  675. break;
  676. case V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER:
  677. ctx->loop_filter_mpeg4 = ctrl->val;
  678. break;
  679. case V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE:
  680. ctx->slice_interface = ctrl->val;
  681. break;
  682. default:
  683. mfc_err("Invalid control 0x%08x\n", ctrl->id);
  684. return -EINVAL;
  685. }
  686. return 0;
  687. }
  688. static int s5p_mfc_dec_g_v_ctrl(struct v4l2_ctrl *ctrl)
  689. {
  690. struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl);
  691. struct s5p_mfc_dev *dev = ctx->dev;
  692. switch (ctrl->id) {
  693. case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE:
  694. if (ctx->state >= MFCINST_HEAD_PARSED &&
  695. ctx->state < MFCINST_ABORT) {
  696. ctrl->val = ctx->pb_count;
  697. break;
  698. } else if (ctx->state != MFCINST_INIT) {
  699. v4l2_err(&dev->v4l2_dev, "Decoding not initialised\n");
  700. return -EINVAL;
  701. }
  702. /* Should wait for the header to be parsed */
  703. s5p_mfc_clean_ctx_int_flags(ctx);
  704. s5p_mfc_wait_for_done_ctx(ctx,
  705. S5P_MFC_R2H_CMD_SEQ_DONE_RET, 0);
  706. if (ctx->state >= MFCINST_HEAD_PARSED &&
  707. ctx->state < MFCINST_ABORT) {
  708. ctrl->val = ctx->pb_count;
  709. } else {
  710. v4l2_err(&dev->v4l2_dev, "Decoding not initialised\n");
  711. return -EINVAL;
  712. }
  713. break;
  714. }
  715. return 0;
  716. }
  717. static const struct v4l2_ctrl_ops s5p_mfc_dec_ctrl_ops = {
  718. .s_ctrl = s5p_mfc_dec_s_ctrl,
  719. .g_volatile_ctrl = s5p_mfc_dec_g_v_ctrl,
  720. };
  721. /* Get cropping information */
  722. static int vidioc_g_crop(struct file *file, void *priv,
  723. struct v4l2_crop *cr)
  724. {
  725. struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
  726. struct s5p_mfc_dev *dev = ctx->dev;
  727. u32 left, right, top, bottom;
  728. if (ctx->state != MFCINST_HEAD_PARSED &&
  729. ctx->state != MFCINST_RUNNING && ctx->state != MFCINST_FINISHING
  730. && ctx->state != MFCINST_FINISHED) {
  731. mfc_err("Cannont set crop\n");
  732. return -EINVAL;
  733. }
  734. if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_H264) {
  735. left = s5p_mfc_hw_call(dev->mfc_ops, get_crop_info_h, ctx);
  736. right = left >> S5P_FIMV_SHARED_CROP_RIGHT_SHIFT;
  737. left = left & S5P_FIMV_SHARED_CROP_LEFT_MASK;
  738. top = s5p_mfc_hw_call(dev->mfc_ops, get_crop_info_v, ctx);
  739. bottom = top >> S5P_FIMV_SHARED_CROP_BOTTOM_SHIFT;
  740. top = top & S5P_FIMV_SHARED_CROP_TOP_MASK;
  741. cr->c.left = left;
  742. cr->c.top = top;
  743. cr->c.width = ctx->img_width - left - right;
  744. cr->c.height = ctx->img_height - top - bottom;
  745. mfc_debug(2, "Cropping info [h264]: l=%d t=%d "
  746. "w=%d h=%d (r=%d b=%d fw=%d fh=%d\n", left, top,
  747. cr->c.width, cr->c.height, right, bottom,
  748. ctx->buf_width, ctx->buf_height);
  749. } else {
  750. cr->c.left = 0;
  751. cr->c.top = 0;
  752. cr->c.width = ctx->img_width;
  753. cr->c.height = ctx->img_height;
  754. mfc_debug(2, "Cropping info: w=%d h=%d fw=%d "
  755. "fh=%d\n", cr->c.width, cr->c.height, ctx->buf_width,
  756. ctx->buf_height);
  757. }
  758. return 0;
  759. }
  760. int vidioc_decoder_cmd(struct file *file, void *priv,
  761. struct v4l2_decoder_cmd *cmd)
  762. {
  763. struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
  764. struct s5p_mfc_dev *dev = ctx->dev;
  765. struct s5p_mfc_buf *buf;
  766. unsigned long flags;
  767. switch (cmd->cmd) {
  768. case V4L2_ENC_CMD_STOP:
  769. if (cmd->flags != 0)
  770. return -EINVAL;
  771. if (!ctx->vq_src.streaming)
  772. return -EINVAL;
  773. spin_lock_irqsave(&dev->irqlock, flags);
  774. if (list_empty(&ctx->src_queue)) {
  775. mfc_err("EOS: empty src queue, entering finishing state");
  776. ctx->state = MFCINST_FINISHING;
  777. if (s5p_mfc_ctx_ready(ctx))
  778. set_work_bit_irqsave(ctx);
  779. spin_unlock_irqrestore(&dev->irqlock, flags);
  780. s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
  781. } else {
  782. mfc_err("EOS: marking last buffer of stream");
  783. buf = list_entry(ctx->src_queue.prev,
  784. struct s5p_mfc_buf, list);
  785. if (buf->flags & MFC_BUF_FLAG_USED)
  786. ctx->state = MFCINST_FINISHING;
  787. else
  788. buf->flags |= MFC_BUF_FLAG_EOS;
  789. spin_unlock_irqrestore(&dev->irqlock, flags);
  790. }
  791. break;
  792. default:
  793. return -EINVAL;
  794. }
  795. return 0;
  796. }
  797. static int vidioc_subscribe_event(struct v4l2_fh *fh,
  798. const struct v4l2_event_subscription *sub)
  799. {
  800. switch (sub->type) {
  801. case V4L2_EVENT_EOS:
  802. return v4l2_event_subscribe(fh, sub, 2, NULL);
  803. case V4L2_EVENT_SOURCE_CHANGE:
  804. return v4l2_src_change_event_subscribe(fh, sub);
  805. default:
  806. return -EINVAL;
  807. }
  808. }
  809. /* v4l2_ioctl_ops */
  810. static const struct v4l2_ioctl_ops s5p_mfc_dec_ioctl_ops = {
  811. .vidioc_querycap = vidioc_querycap,
  812. .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
  813. .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap_mplane,
  814. .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
  815. .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out_mplane,
  816. .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt,
  817. .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt,
  818. .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt,
  819. .vidioc_try_fmt_vid_out_mplane = vidioc_try_fmt,
  820. .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt,
  821. .vidioc_s_fmt_vid_out_mplane = vidioc_s_fmt,
  822. .vidioc_reqbufs = vidioc_reqbufs,
  823. .vidioc_querybuf = vidioc_querybuf,
  824. .vidioc_qbuf = vidioc_qbuf,
  825. .vidioc_dqbuf = vidioc_dqbuf,
  826. .vidioc_expbuf = vidioc_expbuf,
  827. .vidioc_streamon = vidioc_streamon,
  828. .vidioc_streamoff = vidioc_streamoff,
  829. .vidioc_g_crop = vidioc_g_crop,
  830. .vidioc_decoder_cmd = vidioc_decoder_cmd,
  831. .vidioc_subscribe_event = vidioc_subscribe_event,
  832. .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
  833. };
  834. static int s5p_mfc_queue_setup(struct vb2_queue *vq,
  835. const struct v4l2_format *fmt, unsigned int *buf_count,
  836. unsigned int *plane_count, unsigned int psize[],
  837. void *allocators[])
  838. {
  839. struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
  840. struct s5p_mfc_dev *dev = ctx->dev;
  841. /* Video output for decoding (source)
  842. * this can be set after getting an instance */
  843. if (ctx->state == MFCINST_INIT &&
  844. vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
  845. /* A single plane is required for input */
  846. *plane_count = 1;
  847. if (*buf_count < 1)
  848. *buf_count = 1;
  849. if (*buf_count > MFC_MAX_BUFFERS)
  850. *buf_count = MFC_MAX_BUFFERS;
  851. /* Video capture for decoding (destination)
  852. * this can be set after the header was parsed */
  853. } else if (ctx->state == MFCINST_HEAD_PARSED &&
  854. vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
  855. /* Output plane count is 2 - one for Y and one for CbCr */
  856. *plane_count = 2;
  857. /* Setup buffer count */
  858. if (*buf_count < ctx->pb_count)
  859. *buf_count = ctx->pb_count;
  860. if (*buf_count > ctx->pb_count + MFC_MAX_EXTRA_DPB)
  861. *buf_count = ctx->pb_count + MFC_MAX_EXTRA_DPB;
  862. if (*buf_count > MFC_MAX_BUFFERS)
  863. *buf_count = MFC_MAX_BUFFERS;
  864. } else {
  865. mfc_err("State seems invalid. State = %d, vq->type = %d\n",
  866. ctx->state, vq->type);
  867. return -EINVAL;
  868. }
  869. mfc_debug(2, "Buffer count=%d, plane count=%d\n",
  870. *buf_count, *plane_count);
  871. if (ctx->state == MFCINST_HEAD_PARSED &&
  872. vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
  873. psize[0] = ctx->luma_size;
  874. psize[1] = ctx->chroma_size;
  875. if (IS_MFCV6_PLUS(dev))
  876. allocators[0] =
  877. ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX];
  878. else
  879. allocators[0] =
  880. ctx->dev->alloc_ctx[MFC_BANK2_ALLOC_CTX];
  881. allocators[1] = ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX];
  882. } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE &&
  883. ctx->state == MFCINST_INIT) {
  884. psize[0] = ctx->dec_src_buf_size;
  885. allocators[0] = ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX];
  886. } else {
  887. mfc_err("This video node is dedicated to decoding. Decoding not initialized\n");
  888. return -EINVAL;
  889. }
  890. return 0;
  891. }
  892. static void s5p_mfc_unlock(struct vb2_queue *q)
  893. {
  894. struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
  895. struct s5p_mfc_dev *dev = ctx->dev;
  896. mutex_unlock(&dev->mfc_mutex);
  897. }
  898. static void s5p_mfc_lock(struct vb2_queue *q)
  899. {
  900. struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
  901. struct s5p_mfc_dev *dev = ctx->dev;
  902. mutex_lock(&dev->mfc_mutex);
  903. }
  904. static int s5p_mfc_buf_init(struct vb2_buffer *vb)
  905. {
  906. struct vb2_queue *vq = vb->vb2_queue;
  907. struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
  908. unsigned int i;
  909. if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
  910. if (ctx->capture_state == QUEUE_BUFS_MMAPED)
  911. return 0;
  912. for (i = 0; i <= ctx->src_fmt->num_planes ; i++) {
  913. if (IS_ERR_OR_NULL(ERR_PTR(
  914. vb2_dma_contig_plane_dma_addr(vb, i)))) {
  915. mfc_err("Plane mem not allocated\n");
  916. return -EINVAL;
  917. }
  918. }
  919. if (vb2_plane_size(vb, 0) < ctx->luma_size ||
  920. vb2_plane_size(vb, 1) < ctx->chroma_size) {
  921. mfc_err("Plane buffer (CAPTURE) is too small\n");
  922. return -EINVAL;
  923. }
  924. i = vb->v4l2_buf.index;
  925. ctx->dst_bufs[i].b = vb;
  926. ctx->dst_bufs[i].cookie.raw.luma =
  927. vb2_dma_contig_plane_dma_addr(vb, 0);
  928. ctx->dst_bufs[i].cookie.raw.chroma =
  929. vb2_dma_contig_plane_dma_addr(vb, 1);
  930. ctx->dst_bufs_cnt++;
  931. } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
  932. if (IS_ERR_OR_NULL(ERR_PTR(
  933. vb2_dma_contig_plane_dma_addr(vb, 0)))) {
  934. mfc_err("Plane memory not allocated\n");
  935. return -EINVAL;
  936. }
  937. if (vb2_plane_size(vb, 0) < ctx->dec_src_buf_size) {
  938. mfc_err("Plane buffer (OUTPUT) is too small\n");
  939. return -EINVAL;
  940. }
  941. i = vb->v4l2_buf.index;
  942. ctx->src_bufs[i].b = vb;
  943. ctx->src_bufs[i].cookie.stream =
  944. vb2_dma_contig_plane_dma_addr(vb, 0);
  945. ctx->src_bufs_cnt++;
  946. } else {
  947. mfc_err("s5p_mfc_buf_init: unknown queue type\n");
  948. return -EINVAL;
  949. }
  950. return 0;
  951. }
  952. static int s5p_mfc_start_streaming(struct vb2_queue *q, unsigned int count)
  953. {
  954. struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
  955. struct s5p_mfc_dev *dev = ctx->dev;
  956. v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
  957. if (ctx->state == MFCINST_FINISHING ||
  958. ctx->state == MFCINST_FINISHED)
  959. ctx->state = MFCINST_RUNNING;
  960. /* If context is ready then dev = work->data;schedule it to run */
  961. if (s5p_mfc_ctx_ready(ctx))
  962. set_work_bit_irqsave(ctx);
  963. s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
  964. return 0;
  965. }
  966. static void s5p_mfc_stop_streaming(struct vb2_queue *q)
  967. {
  968. unsigned long flags;
  969. struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
  970. struct s5p_mfc_dev *dev = ctx->dev;
  971. int aborted = 0;
  972. if ((ctx->state == MFCINST_FINISHING ||
  973. ctx->state == MFCINST_RUNNING) &&
  974. dev->curr_ctx == ctx->num && dev->hw_lock) {
  975. ctx->state = MFCINST_ABORT;
  976. s5p_mfc_wait_for_done_ctx(ctx,
  977. S5P_MFC_R2H_CMD_FRAME_DONE_RET, 0);
  978. aborted = 1;
  979. }
  980. if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
  981. spin_lock_irqsave(&dev->irqlock, flags);
  982. s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->dst_queue,
  983. &ctx->vq_dst);
  984. INIT_LIST_HEAD(&ctx->dst_queue);
  985. ctx->dst_queue_cnt = 0;
  986. ctx->dpb_flush_flag = 1;
  987. ctx->dec_dst_flag = 0;
  988. spin_unlock_irqrestore(&dev->irqlock, flags);
  989. if (IS_MFCV6_PLUS(dev) && (ctx->state == MFCINST_RUNNING)) {
  990. ctx->state = MFCINST_FLUSH;
  991. set_work_bit_irqsave(ctx);
  992. s5p_mfc_clean_ctx_int_flags(ctx);
  993. s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
  994. if (s5p_mfc_wait_for_done_ctx(ctx,
  995. S5P_MFC_R2H_CMD_DPB_FLUSH_RET, 0))
  996. mfc_err("Err flushing buffers\n");
  997. }
  998. }
  999. if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
  1000. spin_lock_irqsave(&dev->irqlock, flags);
  1001. s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->src_queue,
  1002. &ctx->vq_src);
  1003. INIT_LIST_HEAD(&ctx->src_queue);
  1004. ctx->src_queue_cnt = 0;
  1005. spin_unlock_irqrestore(&dev->irqlock, flags);
  1006. }
  1007. if (aborted)
  1008. ctx->state = MFCINST_RUNNING;
  1009. }
  1010. static void s5p_mfc_buf_queue(struct vb2_buffer *vb)
  1011. {
  1012. struct vb2_queue *vq = vb->vb2_queue;
  1013. struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
  1014. struct s5p_mfc_dev *dev = ctx->dev;
  1015. unsigned long flags;
  1016. struct s5p_mfc_buf *mfc_buf;
  1017. if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
  1018. mfc_buf = &ctx->src_bufs[vb->v4l2_buf.index];
  1019. mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
  1020. spin_lock_irqsave(&dev->irqlock, flags);
  1021. list_add_tail(&mfc_buf->list, &ctx->src_queue);
  1022. ctx->src_queue_cnt++;
  1023. spin_unlock_irqrestore(&dev->irqlock, flags);
  1024. } else if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
  1025. mfc_buf = &ctx->dst_bufs[vb->v4l2_buf.index];
  1026. mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
  1027. /* Mark destination as available for use by MFC */
  1028. spin_lock_irqsave(&dev->irqlock, flags);
  1029. set_bit(vb->v4l2_buf.index, &ctx->dec_dst_flag);
  1030. list_add_tail(&mfc_buf->list, &ctx->dst_queue);
  1031. ctx->dst_queue_cnt++;
  1032. spin_unlock_irqrestore(&dev->irqlock, flags);
  1033. } else {
  1034. mfc_err("Unsupported buffer type (%d)\n", vq->type);
  1035. }
  1036. if (s5p_mfc_ctx_ready(ctx))
  1037. set_work_bit_irqsave(ctx);
  1038. s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
  1039. }
  1040. static struct vb2_ops s5p_mfc_dec_qops = {
  1041. .queue_setup = s5p_mfc_queue_setup,
  1042. .wait_prepare = s5p_mfc_unlock,
  1043. .wait_finish = s5p_mfc_lock,
  1044. .buf_init = s5p_mfc_buf_init,
  1045. .start_streaming = s5p_mfc_start_streaming,
  1046. .stop_streaming = s5p_mfc_stop_streaming,
  1047. .buf_queue = s5p_mfc_buf_queue,
  1048. };
  1049. struct s5p_mfc_codec_ops *get_dec_codec_ops(void)
  1050. {
  1051. return &decoder_codec_ops;
  1052. }
  1053. struct vb2_ops *get_dec_queue_ops(void)
  1054. {
  1055. return &s5p_mfc_dec_qops;
  1056. }
  1057. const struct v4l2_ioctl_ops *get_dec_v4l2_ioctl_ops(void)
  1058. {
  1059. return &s5p_mfc_dec_ioctl_ops;
  1060. }
  1061. #define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2CLASS(x) == V4L2_CTRL_CLASS_MPEG) \
  1062. && V4L2_CTRL_DRIVER_PRIV(x))
  1063. int s5p_mfc_dec_ctrls_setup(struct s5p_mfc_ctx *ctx)
  1064. {
  1065. struct v4l2_ctrl_config cfg;
  1066. int i;
  1067. v4l2_ctrl_handler_init(&ctx->ctrl_handler, NUM_CTRLS);
  1068. if (ctx->ctrl_handler.error) {
  1069. mfc_err("v4l2_ctrl_handler_init failed\n");
  1070. return ctx->ctrl_handler.error;
  1071. }
  1072. for (i = 0; i < NUM_CTRLS; i++) {
  1073. if (IS_MFC51_PRIV(controls[i].id)) {
  1074. memset(&cfg, 0, sizeof(struct v4l2_ctrl_config));
  1075. cfg.ops = &s5p_mfc_dec_ctrl_ops;
  1076. cfg.id = controls[i].id;
  1077. cfg.min = controls[i].minimum;
  1078. cfg.max = controls[i].maximum;
  1079. cfg.def = controls[i].default_value;
  1080. cfg.name = controls[i].name;
  1081. cfg.type = controls[i].type;
  1082. cfg.step = controls[i].step;
  1083. cfg.menu_skip_mask = 0;
  1084. ctx->ctrls[i] = v4l2_ctrl_new_custom(&ctx->ctrl_handler,
  1085. &cfg, NULL);
  1086. } else {
  1087. ctx->ctrls[i] = v4l2_ctrl_new_std(&ctx->ctrl_handler,
  1088. &s5p_mfc_dec_ctrl_ops,
  1089. controls[i].id, controls[i].minimum,
  1090. controls[i].maximum, controls[i].step,
  1091. controls[i].default_value);
  1092. }
  1093. if (ctx->ctrl_handler.error) {
  1094. mfc_err("Adding control (%d) failed\n", i);
  1095. return ctx->ctrl_handler.error;
  1096. }
  1097. if (controls[i].is_volatile && ctx->ctrls[i])
  1098. ctx->ctrls[i]->flags |= V4L2_CTRL_FLAG_VOLATILE;
  1099. }
  1100. return 0;
  1101. }
  1102. void s5p_mfc_dec_ctrls_delete(struct s5p_mfc_ctx *ctx)
  1103. {
  1104. int i;
  1105. v4l2_ctrl_handler_free(&ctx->ctrl_handler);
  1106. for (i = 0; i < NUM_CTRLS; i++)
  1107. ctx->ctrls[i] = NULL;
  1108. }
  1109. void s5p_mfc_dec_init(struct s5p_mfc_ctx *ctx)
  1110. {
  1111. struct v4l2_format f;
  1112. f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264;
  1113. ctx->src_fmt = find_format(&f, MFC_FMT_DEC);
  1114. if (IS_MFCV8(ctx->dev))
  1115. f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12M;
  1116. else if (IS_MFCV6_PLUS(ctx->dev))
  1117. f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT_16X16;
  1118. else
  1119. f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT;
  1120. ctx->dst_fmt = find_format(&f, MFC_FMT_RAW);
  1121. mfc_debug(2, "Default src_fmt is %x, dest_fmt is %x\n",
  1122. (unsigned int)ctx->src_fmt, (unsigned int)ctx->dst_fmt);
  1123. }