ispccdc.c 71 KB

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  1. /*
  2. * ispccdc.c
  3. *
  4. * TI OMAP3 ISP - CCDC module
  5. *
  6. * Copyright (C) 2009-2010 Nokia Corporation
  7. * Copyright (C) 2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  24. * 02110-1301 USA
  25. */
  26. #include <linux/module.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/delay.h>
  29. #include <linux/device.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/mm.h>
  32. #include <linux/sched.h>
  33. #include <linux/slab.h>
  34. #include <media/v4l2-event.h>
  35. #include "isp.h"
  36. #include "ispreg.h"
  37. #include "ispccdc.h"
  38. #define CCDC_MIN_WIDTH 32
  39. #define CCDC_MIN_HEIGHT 32
  40. static struct v4l2_mbus_framefmt *
  41. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  42. unsigned int pad, enum v4l2_subdev_format_whence which);
  43. static const unsigned int ccdc_fmts[] = {
  44. V4L2_MBUS_FMT_Y8_1X8,
  45. V4L2_MBUS_FMT_Y10_1X10,
  46. V4L2_MBUS_FMT_Y12_1X12,
  47. V4L2_MBUS_FMT_SGRBG8_1X8,
  48. V4L2_MBUS_FMT_SRGGB8_1X8,
  49. V4L2_MBUS_FMT_SBGGR8_1X8,
  50. V4L2_MBUS_FMT_SGBRG8_1X8,
  51. V4L2_MBUS_FMT_SGRBG10_1X10,
  52. V4L2_MBUS_FMT_SRGGB10_1X10,
  53. V4L2_MBUS_FMT_SBGGR10_1X10,
  54. V4L2_MBUS_FMT_SGBRG10_1X10,
  55. V4L2_MBUS_FMT_SGRBG12_1X12,
  56. V4L2_MBUS_FMT_SRGGB12_1X12,
  57. V4L2_MBUS_FMT_SBGGR12_1X12,
  58. V4L2_MBUS_FMT_SGBRG12_1X12,
  59. V4L2_MBUS_FMT_YUYV8_2X8,
  60. V4L2_MBUS_FMT_UYVY8_2X8,
  61. };
  62. /*
  63. * ccdc_print_status - Print current CCDC Module register values.
  64. * @ccdc: Pointer to ISP CCDC device.
  65. *
  66. * Also prints other debug information stored in the CCDC module.
  67. */
  68. #define CCDC_PRINT_REGISTER(isp, name)\
  69. dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
  70. isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
  71. static void ccdc_print_status(struct isp_ccdc_device *ccdc)
  72. {
  73. struct isp_device *isp = to_isp_device(ccdc);
  74. dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
  75. CCDC_PRINT_REGISTER(isp, PCR);
  76. CCDC_PRINT_REGISTER(isp, SYN_MODE);
  77. CCDC_PRINT_REGISTER(isp, HD_VD_WID);
  78. CCDC_PRINT_REGISTER(isp, PIX_LINES);
  79. CCDC_PRINT_REGISTER(isp, HORZ_INFO);
  80. CCDC_PRINT_REGISTER(isp, VERT_START);
  81. CCDC_PRINT_REGISTER(isp, VERT_LINES);
  82. CCDC_PRINT_REGISTER(isp, CULLING);
  83. CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
  84. CCDC_PRINT_REGISTER(isp, SDOFST);
  85. CCDC_PRINT_REGISTER(isp, SDR_ADDR);
  86. CCDC_PRINT_REGISTER(isp, CLAMP);
  87. CCDC_PRINT_REGISTER(isp, DCSUB);
  88. CCDC_PRINT_REGISTER(isp, COLPTN);
  89. CCDC_PRINT_REGISTER(isp, BLKCMP);
  90. CCDC_PRINT_REGISTER(isp, FPC);
  91. CCDC_PRINT_REGISTER(isp, FPC_ADDR);
  92. CCDC_PRINT_REGISTER(isp, VDINT);
  93. CCDC_PRINT_REGISTER(isp, ALAW);
  94. CCDC_PRINT_REGISTER(isp, REC656IF);
  95. CCDC_PRINT_REGISTER(isp, CFG);
  96. CCDC_PRINT_REGISTER(isp, FMTCFG);
  97. CCDC_PRINT_REGISTER(isp, FMT_HORZ);
  98. CCDC_PRINT_REGISTER(isp, FMT_VERT);
  99. CCDC_PRINT_REGISTER(isp, PRGEVEN0);
  100. CCDC_PRINT_REGISTER(isp, PRGEVEN1);
  101. CCDC_PRINT_REGISTER(isp, PRGODD0);
  102. CCDC_PRINT_REGISTER(isp, PRGODD1);
  103. CCDC_PRINT_REGISTER(isp, VP_OUT);
  104. CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
  105. CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
  106. CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
  107. CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
  108. dev_dbg(isp->dev, "--------------------------------------------\n");
  109. }
  110. /*
  111. * omap3isp_ccdc_busy - Get busy state of the CCDC.
  112. * @ccdc: Pointer to ISP CCDC device.
  113. */
  114. int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
  115. {
  116. struct isp_device *isp = to_isp_device(ccdc);
  117. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
  118. ISPCCDC_PCR_BUSY;
  119. }
  120. /* -----------------------------------------------------------------------------
  121. * Lens Shading Compensation
  122. */
  123. /*
  124. * ccdc_lsc_validate_config - Check that LSC configuration is valid.
  125. * @ccdc: Pointer to ISP CCDC device.
  126. * @lsc_cfg: the LSC configuration to check.
  127. *
  128. * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
  129. */
  130. static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
  131. struct omap3isp_ccdc_lsc_config *lsc_cfg)
  132. {
  133. struct isp_device *isp = to_isp_device(ccdc);
  134. struct v4l2_mbus_framefmt *format;
  135. unsigned int paxel_width, paxel_height;
  136. unsigned int paxel_shift_x, paxel_shift_y;
  137. unsigned int min_width, min_height, min_size;
  138. unsigned int input_width, input_height;
  139. paxel_shift_x = lsc_cfg->gain_mode_m;
  140. paxel_shift_y = lsc_cfg->gain_mode_n;
  141. if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
  142. (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
  143. dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
  144. return -EINVAL;
  145. }
  146. if (lsc_cfg->offset & 3) {
  147. dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
  148. "4\n");
  149. return -EINVAL;
  150. }
  151. if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
  152. dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
  153. return -EINVAL;
  154. }
  155. format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  156. V4L2_SUBDEV_FORMAT_ACTIVE);
  157. input_width = format->width;
  158. input_height = format->height;
  159. /* Calculate minimum bytesize for validation */
  160. paxel_width = 1 << paxel_shift_x;
  161. min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
  162. >> paxel_shift_x) + 1;
  163. paxel_height = 1 << paxel_shift_y;
  164. min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
  165. >> paxel_shift_y) + 1;
  166. min_size = 4 * min_width * min_height;
  167. if (min_size > lsc_cfg->size) {
  168. dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
  169. return -EINVAL;
  170. }
  171. if (lsc_cfg->offset < (min_width * 4)) {
  172. dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
  173. return -EINVAL;
  174. }
  175. if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
  176. dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
  177. return -EINVAL;
  178. }
  179. return 0;
  180. }
  181. /*
  182. * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
  183. * @ccdc: Pointer to ISP CCDC device.
  184. */
  185. static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc,
  186. dma_addr_t addr)
  187. {
  188. isp_reg_writel(to_isp_device(ccdc), addr,
  189. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
  190. }
  191. /*
  192. * ccdc_lsc_setup_regs - Configures the lens shading compensation module
  193. * @ccdc: Pointer to ISP CCDC device.
  194. */
  195. static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
  196. struct omap3isp_ccdc_lsc_config *cfg)
  197. {
  198. struct isp_device *isp = to_isp_device(ccdc);
  199. int reg;
  200. isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
  201. ISPCCDC_LSC_TABLE_OFFSET);
  202. reg = 0;
  203. reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
  204. reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
  205. reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
  206. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
  207. reg = 0;
  208. reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
  209. reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
  210. reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
  211. reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
  212. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
  213. ISPCCDC_LSC_INITIAL);
  214. }
  215. static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
  216. {
  217. struct isp_device *isp = to_isp_device(ccdc);
  218. unsigned int wait;
  219. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  220. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  221. /* timeout 1 ms */
  222. for (wait = 0; wait < 1000; wait++) {
  223. if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
  224. IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
  225. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  226. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  227. return 0;
  228. }
  229. rmb();
  230. udelay(1);
  231. }
  232. return -ETIMEDOUT;
  233. }
  234. /*
  235. * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
  236. * @ccdc: Pointer to ISP CCDC device.
  237. * @enable: 0 Disables LSC, 1 Enables LSC.
  238. */
  239. static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
  240. {
  241. struct isp_device *isp = to_isp_device(ccdc);
  242. const struct v4l2_mbus_framefmt *format =
  243. __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  244. V4L2_SUBDEV_FORMAT_ACTIVE);
  245. if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
  246. (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
  247. (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
  248. (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
  249. return -EINVAL;
  250. if (enable)
  251. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
  252. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  253. ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
  254. if (enable) {
  255. if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
  256. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
  257. ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
  258. ccdc->lsc.state = LSC_STATE_STOPPED;
  259. dev_warn(to_device(ccdc), "LSC prefetch timeout\n");
  260. return -ETIMEDOUT;
  261. }
  262. ccdc->lsc.state = LSC_STATE_RUNNING;
  263. } else {
  264. ccdc->lsc.state = LSC_STATE_STOPPING;
  265. }
  266. return 0;
  267. }
  268. static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
  269. {
  270. struct isp_device *isp = to_isp_device(ccdc);
  271. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
  272. ISPCCDC_LSC_BUSY;
  273. }
  274. /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
  275. * @ccdc: Pointer to ISP CCDC device
  276. * @req: New configuration request
  277. *
  278. * context: in_interrupt()
  279. */
  280. static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
  281. struct ispccdc_lsc_config_req *req)
  282. {
  283. if (!req->enable)
  284. return -EINVAL;
  285. if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
  286. dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
  287. return -EINVAL;
  288. }
  289. if (ccdc_lsc_busy(ccdc))
  290. return -EBUSY;
  291. ccdc_lsc_setup_regs(ccdc, &req->config);
  292. ccdc_lsc_program_table(ccdc, req->table.dma);
  293. return 0;
  294. }
  295. /*
  296. * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
  297. * @ccdc: Pointer to ISP CCDC device.
  298. *
  299. * Disables LSC, and defers enablement to shadow registers update time.
  300. */
  301. static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
  302. {
  303. struct isp_device *isp = to_isp_device(ccdc);
  304. /*
  305. * From OMAP3 TRM: When this event is pending, the module
  306. * goes into transparent mode (output =input). Normal
  307. * operation can be resumed at the start of the next frame
  308. * after:
  309. * 1) Clearing this event
  310. * 2) Disabling the LSC module
  311. * 3) Enabling it
  312. */
  313. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  314. ISPCCDC_LSC_ENABLE);
  315. ccdc->lsc.state = LSC_STATE_STOPPED;
  316. }
  317. static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
  318. struct ispccdc_lsc_config_req *req)
  319. {
  320. struct isp_device *isp = to_isp_device(ccdc);
  321. if (req == NULL)
  322. return;
  323. if (req->table.addr) {
  324. sg_free_table(&req->table.sgt);
  325. dma_free_coherent(isp->dev, req->config.size, req->table.addr,
  326. req->table.dma);
  327. }
  328. kfree(req);
  329. }
  330. static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
  331. struct list_head *queue)
  332. {
  333. struct ispccdc_lsc_config_req *req, *n;
  334. unsigned long flags;
  335. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  336. list_for_each_entry_safe(req, n, queue, list) {
  337. list_del(&req->list);
  338. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  339. ccdc_lsc_free_request(ccdc, req);
  340. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  341. }
  342. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  343. }
  344. static void ccdc_lsc_free_table_work(struct work_struct *work)
  345. {
  346. struct isp_ccdc_device *ccdc;
  347. struct ispccdc_lsc *lsc;
  348. lsc = container_of(work, struct ispccdc_lsc, table_work);
  349. ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
  350. ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
  351. }
  352. /*
  353. * ccdc_lsc_config - Configure the LSC module from a userspace request
  354. *
  355. * Store the request LSC configuration in the LSC engine request pointer. The
  356. * configuration will be applied to the hardware when the CCDC will be enabled,
  357. * or at the next LSC interrupt if the CCDC is already running.
  358. */
  359. static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
  360. struct omap3isp_ccdc_update_config *config)
  361. {
  362. struct isp_device *isp = to_isp_device(ccdc);
  363. struct ispccdc_lsc_config_req *req;
  364. unsigned long flags;
  365. u16 update;
  366. int ret;
  367. update = config->update &
  368. (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
  369. if (!update)
  370. return 0;
  371. if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
  372. dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
  373. "need to be supplied\n", __func__);
  374. return -EINVAL;
  375. }
  376. req = kzalloc(sizeof(*req), GFP_KERNEL);
  377. if (req == NULL)
  378. return -ENOMEM;
  379. if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
  380. if (copy_from_user(&req->config, config->lsc_cfg,
  381. sizeof(req->config))) {
  382. ret = -EFAULT;
  383. goto done;
  384. }
  385. req->enable = 1;
  386. req->table.addr = dma_alloc_coherent(isp->dev, req->config.size,
  387. &req->table.dma,
  388. GFP_KERNEL);
  389. if (req->table.addr == NULL) {
  390. ret = -ENOMEM;
  391. goto done;
  392. }
  393. ret = dma_get_sgtable(isp->dev, &req->table.sgt,
  394. req->table.addr, req->table.dma,
  395. req->config.size);
  396. if (ret < 0)
  397. goto done;
  398. dma_sync_sg_for_cpu(isp->dev, req->table.sgt.sgl,
  399. req->table.sgt.nents, DMA_TO_DEVICE);
  400. if (copy_from_user(req->table.addr, config->lsc,
  401. req->config.size)) {
  402. ret = -EFAULT;
  403. goto done;
  404. }
  405. dma_sync_sg_for_device(isp->dev, req->table.sgt.sgl,
  406. req->table.sgt.nents, DMA_TO_DEVICE);
  407. }
  408. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  409. if (ccdc->lsc.request) {
  410. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  411. schedule_work(&ccdc->lsc.table_work);
  412. }
  413. ccdc->lsc.request = req;
  414. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  415. ret = 0;
  416. done:
  417. if (ret < 0)
  418. ccdc_lsc_free_request(ccdc, req);
  419. return ret;
  420. }
  421. static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
  422. {
  423. unsigned long flags;
  424. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  425. if (ccdc->lsc.active) {
  426. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  427. return 1;
  428. }
  429. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  430. return 0;
  431. }
  432. static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
  433. {
  434. struct ispccdc_lsc *lsc = &ccdc->lsc;
  435. if (lsc->state != LSC_STATE_STOPPED)
  436. return -EINVAL;
  437. if (lsc->active) {
  438. list_add_tail(&lsc->active->list, &lsc->free_queue);
  439. lsc->active = NULL;
  440. }
  441. if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
  442. omap3isp_sbl_disable(to_isp_device(ccdc),
  443. OMAP3_ISP_SBL_CCDC_LSC_READ);
  444. list_add_tail(&lsc->request->list, &lsc->free_queue);
  445. lsc->request = NULL;
  446. goto done;
  447. }
  448. lsc->active = lsc->request;
  449. lsc->request = NULL;
  450. __ccdc_lsc_enable(ccdc, 1);
  451. done:
  452. if (!list_empty(&lsc->free_queue))
  453. schedule_work(&lsc->table_work);
  454. return 0;
  455. }
  456. /* -----------------------------------------------------------------------------
  457. * Parameters configuration
  458. */
  459. /*
  460. * ccdc_configure_clamp - Configure optical-black or digital clamping
  461. * @ccdc: Pointer to ISP CCDC device.
  462. *
  463. * The CCDC performs either optical-black or digital clamp. Configure and enable
  464. * the selected clamp method.
  465. */
  466. static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
  467. {
  468. struct isp_device *isp = to_isp_device(ccdc);
  469. u32 clamp;
  470. if (ccdc->obclamp) {
  471. clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
  472. clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
  473. clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
  474. clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
  475. isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
  476. } else {
  477. isp_reg_writel(isp, ccdc->clamp.dcsubval,
  478. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
  479. }
  480. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
  481. ISPCCDC_CLAMP_CLAMPEN,
  482. ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
  483. }
  484. /*
  485. * ccdc_configure_fpc - Configure Faulty Pixel Correction
  486. * @ccdc: Pointer to ISP CCDC device.
  487. */
  488. static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
  489. {
  490. struct isp_device *isp = to_isp_device(ccdc);
  491. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
  492. if (!ccdc->fpc_en)
  493. return;
  494. isp_reg_writel(isp, ccdc->fpc.dma, OMAP3_ISP_IOMEM_CCDC,
  495. ISPCCDC_FPC_ADDR);
  496. /* The FPNUM field must be set before enabling FPC. */
  497. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
  498. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  499. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
  500. ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  501. }
  502. /*
  503. * ccdc_configure_black_comp - Configure Black Level Compensation.
  504. * @ccdc: Pointer to ISP CCDC device.
  505. */
  506. static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
  507. {
  508. struct isp_device *isp = to_isp_device(ccdc);
  509. u32 blcomp;
  510. blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
  511. blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
  512. blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
  513. blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
  514. isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
  515. }
  516. /*
  517. * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
  518. * @ccdc: Pointer to ISP CCDC device.
  519. */
  520. static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
  521. {
  522. struct isp_device *isp = to_isp_device(ccdc);
  523. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
  524. ISPCCDC_SYN_MODE_LPF,
  525. ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
  526. }
  527. /*
  528. * ccdc_configure_alaw - Configure A-law compression.
  529. * @ccdc: Pointer to ISP CCDC device.
  530. */
  531. static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
  532. {
  533. struct isp_device *isp = to_isp_device(ccdc);
  534. const struct isp_format_info *info;
  535. u32 alaw = 0;
  536. info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
  537. switch (info->width) {
  538. case 8:
  539. return;
  540. case 10:
  541. alaw = ISPCCDC_ALAW_GWDI_9_0;
  542. break;
  543. case 11:
  544. alaw = ISPCCDC_ALAW_GWDI_10_1;
  545. break;
  546. case 12:
  547. alaw = ISPCCDC_ALAW_GWDI_11_2;
  548. break;
  549. case 13:
  550. alaw = ISPCCDC_ALAW_GWDI_12_3;
  551. break;
  552. }
  553. if (ccdc->alaw)
  554. alaw |= ISPCCDC_ALAW_CCDTBL;
  555. isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
  556. }
  557. /*
  558. * ccdc_config_imgattr - Configure sensor image specific attributes.
  559. * @ccdc: Pointer to ISP CCDC device.
  560. * @colptn: Color pattern of the sensor.
  561. */
  562. static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
  563. {
  564. struct isp_device *isp = to_isp_device(ccdc);
  565. isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
  566. }
  567. /*
  568. * ccdc_config - Set CCDC configuration from userspace
  569. * @ccdc: Pointer to ISP CCDC device.
  570. * @ccdc_struct: Structure containing CCDC configuration sent from userspace.
  571. *
  572. * Returns 0 if successful, -EINVAL if the pointer to the configuration
  573. * structure is null, or the copy_from_user function fails to copy user space
  574. * memory to kernel space memory.
  575. */
  576. static int ccdc_config(struct isp_ccdc_device *ccdc,
  577. struct omap3isp_ccdc_update_config *ccdc_struct)
  578. {
  579. struct isp_device *isp = to_isp_device(ccdc);
  580. unsigned long flags;
  581. spin_lock_irqsave(&ccdc->lock, flags);
  582. ccdc->shadow_update = 1;
  583. spin_unlock_irqrestore(&ccdc->lock, flags);
  584. if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
  585. ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
  586. ccdc->update |= OMAP3ISP_CCDC_ALAW;
  587. }
  588. if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
  589. ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
  590. ccdc->update |= OMAP3ISP_CCDC_LPF;
  591. }
  592. if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
  593. if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
  594. sizeof(ccdc->clamp))) {
  595. ccdc->shadow_update = 0;
  596. return -EFAULT;
  597. }
  598. ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
  599. ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
  600. }
  601. if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
  602. if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
  603. sizeof(ccdc->blcomp))) {
  604. ccdc->shadow_update = 0;
  605. return -EFAULT;
  606. }
  607. ccdc->update |= OMAP3ISP_CCDC_BCOMP;
  608. }
  609. ccdc->shadow_update = 0;
  610. if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
  611. struct omap3isp_ccdc_fpc fpc;
  612. struct ispccdc_fpc fpc_old = { .addr = NULL, };
  613. struct ispccdc_fpc fpc_new;
  614. u32 size;
  615. if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
  616. return -EBUSY;
  617. ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
  618. if (ccdc->fpc_en) {
  619. if (copy_from_user(&fpc, ccdc_struct->fpc, sizeof(fpc)))
  620. return -EFAULT;
  621. size = fpc.fpnum * 4;
  622. /*
  623. * The table address must be 64-bytes aligned, which is
  624. * guaranteed by dma_alloc_coherent().
  625. */
  626. fpc_new.fpnum = fpc.fpnum;
  627. fpc_new.addr = dma_alloc_coherent(isp->dev, size,
  628. &fpc_new.dma,
  629. GFP_KERNEL);
  630. if (fpc_new.addr == NULL)
  631. return -ENOMEM;
  632. if (copy_from_user(fpc_new.addr,
  633. (__force void __user *)fpc.fpcaddr,
  634. size)) {
  635. dma_free_coherent(isp->dev, size, fpc_new.addr,
  636. fpc_new.dma);
  637. return -EFAULT;
  638. }
  639. fpc_old = ccdc->fpc;
  640. ccdc->fpc = fpc_new;
  641. }
  642. ccdc_configure_fpc(ccdc);
  643. if (fpc_old.addr != NULL)
  644. dma_free_coherent(isp->dev, fpc_old.fpnum * 4,
  645. fpc_old.addr, fpc_old.dma);
  646. }
  647. return ccdc_lsc_config(ccdc, ccdc_struct);
  648. }
  649. static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
  650. {
  651. if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
  652. ccdc_configure_alaw(ccdc);
  653. ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
  654. }
  655. if (ccdc->update & OMAP3ISP_CCDC_LPF) {
  656. ccdc_configure_lpf(ccdc);
  657. ccdc->update &= ~OMAP3ISP_CCDC_LPF;
  658. }
  659. if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
  660. ccdc_configure_clamp(ccdc);
  661. ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
  662. }
  663. if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
  664. ccdc_configure_black_comp(ccdc);
  665. ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
  666. }
  667. }
  668. /*
  669. * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
  670. * @isp: Pointer to ISP device
  671. */
  672. void omap3isp_ccdc_restore_context(struct isp_device *isp)
  673. {
  674. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  675. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
  676. ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
  677. | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
  678. ccdc_apply_controls(ccdc);
  679. ccdc_configure_fpc(ccdc);
  680. }
  681. /* -----------------------------------------------------------------------------
  682. * Format- and pipeline-related configuration helpers
  683. */
  684. /*
  685. * ccdc_config_vp - Configure the Video Port.
  686. * @ccdc: Pointer to ISP CCDC device.
  687. */
  688. static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
  689. {
  690. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  691. struct isp_device *isp = to_isp_device(ccdc);
  692. const struct isp_format_info *info;
  693. unsigned long l3_ick = pipe->l3_ick;
  694. unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
  695. unsigned int div = 0;
  696. u32 fmtcfg_vp;
  697. fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
  698. & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
  699. info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
  700. switch (info->width) {
  701. case 8:
  702. case 10:
  703. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
  704. break;
  705. case 11:
  706. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
  707. break;
  708. case 12:
  709. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
  710. break;
  711. case 13:
  712. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
  713. break;
  714. }
  715. if (pipe->input)
  716. div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
  717. else if (pipe->external_rate)
  718. div = l3_ick / pipe->external_rate;
  719. div = clamp(div, 2U, max_div);
  720. fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
  721. isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
  722. }
  723. /*
  724. * ccdc_enable_vp - Enable Video Port.
  725. * @ccdc: Pointer to ISP CCDC device.
  726. * @enable: 0 Disables VP, 1 Enables VP
  727. *
  728. * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
  729. */
  730. static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
  731. {
  732. struct isp_device *isp = to_isp_device(ccdc);
  733. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
  734. ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
  735. }
  736. /*
  737. * ccdc_config_outlineoffset - Configure memory saving output line offset
  738. * @ccdc: Pointer to ISP CCDC device.
  739. * @offset: Address offset to start a new line. Must be twice the
  740. * Output width and aligned on 32 byte boundary
  741. * @oddeven: Specifies the odd/even line pattern to be chosen to store the
  742. * output.
  743. * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
  744. *
  745. * - Configures the output line offset when stored in memory
  746. * - Sets the odd/even line pattern to store the output
  747. * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
  748. * - Configures the number of even and odd line fields in case of rearranging
  749. * the lines.
  750. */
  751. static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
  752. u32 offset, u8 oddeven, u8 numlines)
  753. {
  754. struct isp_device *isp = to_isp_device(ccdc);
  755. isp_reg_writel(isp, offset & 0xffff,
  756. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
  757. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  758. ISPCCDC_SDOFST_FINV);
  759. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  760. ISPCCDC_SDOFST_FOFST_4L);
  761. switch (oddeven) {
  762. case EVENEVEN:
  763. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  764. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
  765. break;
  766. case ODDEVEN:
  767. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  768. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
  769. break;
  770. case EVENODD:
  771. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  772. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
  773. break;
  774. case ODDODD:
  775. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  776. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
  777. break;
  778. default:
  779. break;
  780. }
  781. }
  782. /*
  783. * ccdc_set_outaddr - Set memory address to save output image
  784. * @ccdc: Pointer to ISP CCDC device.
  785. * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
  786. *
  787. * Sets the memory address where the output will be saved.
  788. */
  789. static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
  790. {
  791. struct isp_device *isp = to_isp_device(ccdc);
  792. isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
  793. }
  794. /*
  795. * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
  796. * @ccdc: Pointer to ISP CCDC device.
  797. * @max_rate: Maximum calculated data rate.
  798. *
  799. * Returns in *max_rate less value between calculated and passed
  800. */
  801. void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
  802. unsigned int *max_rate)
  803. {
  804. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  805. unsigned int rate;
  806. if (pipe == NULL)
  807. return;
  808. /*
  809. * TRM says that for parallel sensors the maximum data rate
  810. * should be 90% form L3/2 clock, otherwise just L3/2.
  811. */
  812. if (ccdc->input == CCDC_INPUT_PARALLEL)
  813. rate = pipe->l3_ick / 2 * 9 / 10;
  814. else
  815. rate = pipe->l3_ick / 2;
  816. *max_rate = min(*max_rate, rate);
  817. }
  818. /*
  819. * ccdc_config_sync_if - Set CCDC sync interface configuration
  820. * @ccdc: Pointer to ISP CCDC device.
  821. * @pdata: Parallel interface platform data (may be NULL)
  822. * @data_size: Data size
  823. */
  824. static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
  825. struct isp_parallel_platform_data *pdata,
  826. unsigned int data_size)
  827. {
  828. struct isp_device *isp = to_isp_device(ccdc);
  829. const struct v4l2_mbus_framefmt *format;
  830. u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
  831. format = &ccdc->formats[CCDC_PAD_SINK];
  832. if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  833. format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
  834. /* The bridge is enabled for YUV8 formats. Configure the input
  835. * mode accordingly.
  836. */
  837. syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
  838. }
  839. switch (data_size) {
  840. case 8:
  841. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
  842. break;
  843. case 10:
  844. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
  845. break;
  846. case 11:
  847. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
  848. break;
  849. case 12:
  850. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
  851. break;
  852. }
  853. if (pdata && pdata->data_pol)
  854. syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
  855. if (pdata && pdata->hs_pol)
  856. syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
  857. if (pdata && pdata->vs_pol)
  858. syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
  859. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  860. /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
  861. * hardware seems to ignore it in all other input modes.
  862. */
  863. if (format->code == V4L2_MBUS_FMT_UYVY8_2X8)
  864. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  865. ISPCCDC_CFG_Y8POS);
  866. else
  867. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  868. ISPCCDC_CFG_Y8POS);
  869. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
  870. ISPCCDC_REC656IF_R656ON);
  871. }
  872. /* CCDC formats descriptions */
  873. static const u32 ccdc_sgrbg_pattern =
  874. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  875. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  876. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  877. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  878. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  879. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  880. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  881. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  882. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  883. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  884. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  885. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  886. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  887. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  888. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  889. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  890. static const u32 ccdc_srggb_pattern =
  891. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  892. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  893. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  894. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  895. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  896. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  897. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  898. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  899. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  900. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  901. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  902. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  903. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  904. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  905. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  906. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  907. static const u32 ccdc_sbggr_pattern =
  908. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  909. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  910. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  911. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  912. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  913. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  914. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  915. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  916. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  917. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  918. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  919. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  920. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  921. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  922. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  923. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  924. static const u32 ccdc_sgbrg_pattern =
  925. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  926. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  927. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  928. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  929. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  930. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  931. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  932. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  933. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  934. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  935. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  936. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  937. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  938. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  939. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  940. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  941. static void ccdc_configure(struct isp_ccdc_device *ccdc)
  942. {
  943. struct isp_device *isp = to_isp_device(ccdc);
  944. struct isp_parallel_platform_data *pdata = NULL;
  945. struct v4l2_subdev *sensor;
  946. struct v4l2_mbus_framefmt *format;
  947. const struct v4l2_rect *crop;
  948. const struct isp_format_info *fmt_info;
  949. struct v4l2_subdev_format fmt_src;
  950. unsigned int depth_out;
  951. unsigned int depth_in = 0;
  952. struct media_pad *pad;
  953. unsigned long flags;
  954. unsigned int bridge;
  955. unsigned int shift;
  956. u32 syn_mode;
  957. u32 ccdc_pattern;
  958. pad = media_entity_remote_pad(&ccdc->pads[CCDC_PAD_SINK]);
  959. sensor = media_entity_to_v4l2_subdev(pad->entity);
  960. if (ccdc->input == CCDC_INPUT_PARALLEL)
  961. pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
  962. ->bus.parallel;
  963. /* Compute the lane shifter shift value and enable the bridge when the
  964. * input format is YUV.
  965. */
  966. fmt_src.pad = pad->index;
  967. fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  968. if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
  969. fmt_info = omap3isp_video_format_info(fmt_src.format.code);
  970. depth_in = fmt_info->width;
  971. }
  972. fmt_info = omap3isp_video_format_info
  973. (isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
  974. depth_out = fmt_info->width;
  975. shift = depth_in - depth_out;
  976. if (fmt_info->code == V4L2_MBUS_FMT_YUYV8_2X8)
  977. bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
  978. else if (fmt_info->code == V4L2_MBUS_FMT_UYVY8_2X8)
  979. bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
  980. else
  981. bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
  982. omap3isp_configure_bridge(isp, ccdc->input, pdata, shift, bridge);
  983. ccdc_config_sync_if(ccdc, pdata, depth_out);
  984. syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  985. /* Use the raw, unprocessed data when writing to memory. The H3A and
  986. * histogram modules are still fed with lens shading corrected data.
  987. */
  988. syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
  989. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  990. syn_mode |= ISPCCDC_SYN_MODE_WEN;
  991. else
  992. syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
  993. if (ccdc->output & CCDC_OUTPUT_RESIZER)
  994. syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
  995. else
  996. syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
  997. /* CCDC_PAD_SINK */
  998. format = &ccdc->formats[CCDC_PAD_SINK];
  999. /* Mosaic filter */
  1000. switch (format->code) {
  1001. case V4L2_MBUS_FMT_SRGGB10_1X10:
  1002. case V4L2_MBUS_FMT_SRGGB12_1X12:
  1003. ccdc_pattern = ccdc_srggb_pattern;
  1004. break;
  1005. case V4L2_MBUS_FMT_SBGGR10_1X10:
  1006. case V4L2_MBUS_FMT_SBGGR12_1X12:
  1007. ccdc_pattern = ccdc_sbggr_pattern;
  1008. break;
  1009. case V4L2_MBUS_FMT_SGBRG10_1X10:
  1010. case V4L2_MBUS_FMT_SGBRG12_1X12:
  1011. ccdc_pattern = ccdc_sgbrg_pattern;
  1012. break;
  1013. default:
  1014. /* Use GRBG */
  1015. ccdc_pattern = ccdc_sgrbg_pattern;
  1016. break;
  1017. }
  1018. ccdc_config_imgattr(ccdc, ccdc_pattern);
  1019. /* Generate VD0 on the last line of the image and VD1 on the
  1020. * 2/3 height line.
  1021. */
  1022. isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
  1023. ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
  1024. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
  1025. /* CCDC_PAD_SOURCE_OF */
  1026. format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
  1027. crop = &ccdc->crop;
  1028. isp_reg_writel(isp, (crop->left << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
  1029. ((crop->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
  1030. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
  1031. isp_reg_writel(isp, crop->top << ISPCCDC_VERT_START_SLV0_SHIFT,
  1032. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
  1033. isp_reg_writel(isp, (crop->height - 1)
  1034. << ISPCCDC_VERT_LINES_NLV_SHIFT,
  1035. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
  1036. ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
  1037. /* The CCDC outputs data in UYVY order by default. Swap bytes to get
  1038. * YUYV.
  1039. */
  1040. if (format->code == V4L2_MBUS_FMT_YUYV8_1X16)
  1041. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1042. ISPCCDC_CFG_BSWD);
  1043. else
  1044. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1045. ISPCCDC_CFG_BSWD);
  1046. /* Use PACK8 mode for 1byte per pixel formats. */
  1047. if (omap3isp_video_format_info(format->code)->width <= 8)
  1048. syn_mode |= ISPCCDC_SYN_MODE_PACK8;
  1049. else
  1050. syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
  1051. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  1052. /* CCDC_PAD_SOURCE_VP */
  1053. format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
  1054. isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
  1055. (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
  1056. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
  1057. isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
  1058. ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
  1059. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
  1060. isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
  1061. (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
  1062. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
  1063. /* Lens shading correction. */
  1064. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1065. if (ccdc->lsc.request == NULL)
  1066. goto unlock;
  1067. WARN_ON(ccdc->lsc.active);
  1068. /* Get last good LSC configuration. If it is not supported for
  1069. * the current active resolution discard it.
  1070. */
  1071. if (ccdc->lsc.active == NULL &&
  1072. __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
  1073. ccdc->lsc.active = ccdc->lsc.request;
  1074. } else {
  1075. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  1076. schedule_work(&ccdc->lsc.table_work);
  1077. }
  1078. ccdc->lsc.request = NULL;
  1079. unlock:
  1080. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1081. ccdc_apply_controls(ccdc);
  1082. }
  1083. static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
  1084. {
  1085. struct isp_device *isp = to_isp_device(ccdc);
  1086. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
  1087. ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
  1088. }
  1089. static int ccdc_disable(struct isp_ccdc_device *ccdc)
  1090. {
  1091. unsigned long flags;
  1092. int ret = 0;
  1093. spin_lock_irqsave(&ccdc->lock, flags);
  1094. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
  1095. ccdc->stopping = CCDC_STOP_REQUEST;
  1096. spin_unlock_irqrestore(&ccdc->lock, flags);
  1097. ret = wait_event_timeout(ccdc->wait,
  1098. ccdc->stopping == CCDC_STOP_FINISHED,
  1099. msecs_to_jiffies(2000));
  1100. if (ret == 0) {
  1101. ret = -ETIMEDOUT;
  1102. dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
  1103. }
  1104. omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
  1105. mutex_lock(&ccdc->ioctl_lock);
  1106. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  1107. ccdc->lsc.request = ccdc->lsc.active;
  1108. ccdc->lsc.active = NULL;
  1109. cancel_work_sync(&ccdc->lsc.table_work);
  1110. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  1111. mutex_unlock(&ccdc->ioctl_lock);
  1112. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  1113. return ret > 0 ? 0 : ret;
  1114. }
  1115. static void ccdc_enable(struct isp_ccdc_device *ccdc)
  1116. {
  1117. if (ccdc_lsc_is_configured(ccdc))
  1118. __ccdc_lsc_enable(ccdc, 1);
  1119. __ccdc_enable(ccdc, 1);
  1120. }
  1121. /* -----------------------------------------------------------------------------
  1122. * Interrupt handling
  1123. */
  1124. /*
  1125. * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
  1126. * @ccdc: Pointer to ISP CCDC device.
  1127. *
  1128. * Returns zero if the CCDC is idle and the image has been written to
  1129. * memory, too.
  1130. */
  1131. static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
  1132. {
  1133. struct isp_device *isp = to_isp_device(ccdc);
  1134. return omap3isp_ccdc_busy(ccdc)
  1135. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
  1136. ISPSBL_CCDC_WR_0_DATA_READY)
  1137. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
  1138. ISPSBL_CCDC_WR_0_DATA_READY)
  1139. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
  1140. ISPSBL_CCDC_WR_0_DATA_READY)
  1141. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
  1142. ISPSBL_CCDC_WR_0_DATA_READY);
  1143. }
  1144. /*
  1145. * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
  1146. * @ccdc: Pointer to ISP CCDC device.
  1147. * @max_wait: Max retry count in us for wait for idle/busy transition.
  1148. */
  1149. static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
  1150. unsigned int max_wait)
  1151. {
  1152. unsigned int wait = 0;
  1153. if (max_wait == 0)
  1154. max_wait = 10000; /* 10 ms */
  1155. for (wait = 0; wait <= max_wait; wait++) {
  1156. if (!ccdc_sbl_busy(ccdc))
  1157. return 0;
  1158. rmb();
  1159. udelay(1);
  1160. }
  1161. return -EBUSY;
  1162. }
  1163. /* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
  1164. * @ccdc: Pointer to ISP CCDC device.
  1165. * @event: Pointing which event trigger handler
  1166. *
  1167. * Return 1 when the event and stopping request combination is satisfied,
  1168. * zero otherwise.
  1169. */
  1170. static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
  1171. {
  1172. int rval = 0;
  1173. switch ((ccdc->stopping & 3) | event) {
  1174. case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
  1175. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1176. __ccdc_lsc_enable(ccdc, 0);
  1177. __ccdc_enable(ccdc, 0);
  1178. ccdc->stopping = CCDC_STOP_EXECUTED;
  1179. return 1;
  1180. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
  1181. ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
  1182. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1183. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1184. rval = 1;
  1185. break;
  1186. case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
  1187. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1188. rval = 1;
  1189. break;
  1190. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
  1191. return 1;
  1192. }
  1193. if (ccdc->stopping == CCDC_STOP_FINISHED) {
  1194. wake_up(&ccdc->wait);
  1195. rval = 1;
  1196. }
  1197. return rval;
  1198. }
  1199. static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
  1200. {
  1201. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  1202. struct video_device *vdev = ccdc->subdev.devnode;
  1203. struct v4l2_event event;
  1204. /* Frame number propagation */
  1205. atomic_inc(&pipe->frame_number);
  1206. memset(&event, 0, sizeof(event));
  1207. event.type = V4L2_EVENT_FRAME_SYNC;
  1208. event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
  1209. v4l2_event_queue(vdev, &event);
  1210. }
  1211. /*
  1212. * ccdc_lsc_isr - Handle LSC events
  1213. * @ccdc: Pointer to ISP CCDC device.
  1214. * @events: LSC events
  1215. */
  1216. static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1217. {
  1218. unsigned long flags;
  1219. if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
  1220. struct isp_pipeline *pipe =
  1221. to_isp_pipeline(&ccdc->subdev.entity);
  1222. ccdc_lsc_error_handler(ccdc);
  1223. pipe->error = true;
  1224. dev_dbg(to_device(ccdc), "lsc prefetch error\n");
  1225. }
  1226. if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
  1227. return;
  1228. /* LSC_DONE interrupt occur, there are two cases
  1229. * 1. stopping for reconfiguration
  1230. * 2. stopping because of STREAM OFF command
  1231. */
  1232. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1233. if (ccdc->lsc.state == LSC_STATE_STOPPING)
  1234. ccdc->lsc.state = LSC_STATE_STOPPED;
  1235. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
  1236. goto done;
  1237. if (ccdc->lsc.state != LSC_STATE_RECONFIG)
  1238. goto done;
  1239. /* LSC is in STOPPING state, change to the new state */
  1240. ccdc->lsc.state = LSC_STATE_STOPPED;
  1241. /* This is an exception. Start of frame and LSC_DONE interrupt
  1242. * have been received on the same time. Skip this event and wait
  1243. * for better times.
  1244. */
  1245. if (events & IRQ0STATUS_HS_VS_IRQ)
  1246. goto done;
  1247. /* The LSC engine is stopped at this point. Enable it if there's a
  1248. * pending request.
  1249. */
  1250. if (ccdc->lsc.request == NULL)
  1251. goto done;
  1252. ccdc_lsc_enable(ccdc);
  1253. done:
  1254. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1255. }
  1256. static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
  1257. {
  1258. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  1259. struct isp_device *isp = to_isp_device(ccdc);
  1260. struct isp_buffer *buffer;
  1261. int restart = 0;
  1262. /* The CCDC generates VD0 interrupts even when disabled (the datasheet
  1263. * doesn't explicitly state if that's supposed to happen or not, so it
  1264. * can be considered as a hardware bug or as a feature, but we have to
  1265. * deal with it anyway). Disabling the CCDC when no buffer is available
  1266. * would thus not be enough, we need to handle the situation explicitly.
  1267. */
  1268. if (list_empty(&ccdc->video_out.dmaqueue))
  1269. goto done;
  1270. /* We're in continuous mode, and memory writes were disabled due to a
  1271. * buffer underrun. Reenable them now that we have a buffer. The buffer
  1272. * address has been set in ccdc_video_queue.
  1273. */
  1274. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
  1275. restart = 1;
  1276. ccdc->underrun = 0;
  1277. goto done;
  1278. }
  1279. if (ccdc_sbl_wait_idle(ccdc, 1000)) {
  1280. dev_info(isp->dev, "CCDC won't become idle!\n");
  1281. isp->crashed |= 1U << ccdc->subdev.entity.id;
  1282. omap3isp_pipeline_cancel_stream(pipe);
  1283. goto done;
  1284. }
  1285. buffer = omap3isp_video_buffer_next(&ccdc->video_out);
  1286. if (buffer != NULL) {
  1287. ccdc_set_outaddr(ccdc, buffer->dma);
  1288. restart = 1;
  1289. }
  1290. pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
  1291. if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1292. isp_pipeline_ready(pipe))
  1293. omap3isp_pipeline_set_stream(pipe,
  1294. ISP_PIPELINE_STREAM_SINGLESHOT);
  1295. done:
  1296. return restart;
  1297. }
  1298. /*
  1299. * ccdc_vd0_isr - Handle VD0 event
  1300. * @ccdc: Pointer to ISP CCDC device.
  1301. *
  1302. * Executes LSC deferred enablement before next frame starts.
  1303. */
  1304. static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
  1305. {
  1306. unsigned long flags;
  1307. int restart = 0;
  1308. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1309. restart = ccdc_isr_buffer(ccdc);
  1310. spin_lock_irqsave(&ccdc->lock, flags);
  1311. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
  1312. spin_unlock_irqrestore(&ccdc->lock, flags);
  1313. return;
  1314. }
  1315. if (!ccdc->shadow_update)
  1316. ccdc_apply_controls(ccdc);
  1317. spin_unlock_irqrestore(&ccdc->lock, flags);
  1318. if (restart)
  1319. ccdc_enable(ccdc);
  1320. }
  1321. /*
  1322. * ccdc_vd1_isr - Handle VD1 event
  1323. * @ccdc: Pointer to ISP CCDC device.
  1324. */
  1325. static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
  1326. {
  1327. unsigned long flags;
  1328. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1329. /*
  1330. * Depending on the CCDC pipeline state, CCDC stopping should be
  1331. * handled differently. In SINGLESHOT we emulate an internal CCDC
  1332. * stopping because the CCDC hw works only in continuous mode.
  1333. * When CONTINUOUS pipeline state is used and the CCDC writes it's
  1334. * data to memory the CCDC and LSC are stopped immediately but
  1335. * without change the CCDC stopping state machine. The CCDC
  1336. * stopping state machine should be used only when user request
  1337. * for stopping is received (SINGLESHOT is an exeption).
  1338. */
  1339. switch (ccdc->state) {
  1340. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1341. ccdc->stopping = CCDC_STOP_REQUEST;
  1342. break;
  1343. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1344. if (ccdc->output & CCDC_OUTPUT_MEMORY) {
  1345. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1346. __ccdc_lsc_enable(ccdc, 0);
  1347. __ccdc_enable(ccdc, 0);
  1348. }
  1349. break;
  1350. case ISP_PIPELINE_STREAM_STOPPED:
  1351. break;
  1352. }
  1353. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
  1354. goto done;
  1355. if (ccdc->lsc.request == NULL)
  1356. goto done;
  1357. /*
  1358. * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
  1359. * do the appropriate changes in registers
  1360. */
  1361. if (ccdc->lsc.state == LSC_STATE_RUNNING) {
  1362. __ccdc_lsc_enable(ccdc, 0);
  1363. ccdc->lsc.state = LSC_STATE_RECONFIG;
  1364. goto done;
  1365. }
  1366. /* LSC has been in STOPPED state, enable it */
  1367. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1368. ccdc_lsc_enable(ccdc);
  1369. done:
  1370. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1371. }
  1372. /*
  1373. * omap3isp_ccdc_isr - Configure CCDC during interframe time.
  1374. * @ccdc: Pointer to ISP CCDC device.
  1375. * @events: CCDC events
  1376. */
  1377. int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1378. {
  1379. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
  1380. return 0;
  1381. if (events & IRQ0STATUS_CCDC_VD1_IRQ)
  1382. ccdc_vd1_isr(ccdc);
  1383. ccdc_lsc_isr(ccdc, events);
  1384. if (events & IRQ0STATUS_CCDC_VD0_IRQ)
  1385. ccdc_vd0_isr(ccdc);
  1386. if (events & IRQ0STATUS_HS_VS_IRQ)
  1387. ccdc_hs_vs_isr(ccdc);
  1388. return 0;
  1389. }
  1390. /* -----------------------------------------------------------------------------
  1391. * ISP video operations
  1392. */
  1393. static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
  1394. {
  1395. struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
  1396. if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
  1397. return -ENODEV;
  1398. ccdc_set_outaddr(ccdc, buffer->dma);
  1399. /* We now have a buffer queued on the output, restart the pipeline
  1400. * on the next CCDC interrupt if running in continuous mode (or when
  1401. * starting the stream).
  1402. */
  1403. ccdc->underrun = 1;
  1404. return 0;
  1405. }
  1406. static const struct isp_video_operations ccdc_video_ops = {
  1407. .queue = ccdc_video_queue,
  1408. };
  1409. /* -----------------------------------------------------------------------------
  1410. * V4L2 subdev operations
  1411. */
  1412. /*
  1413. * ccdc_ioctl - CCDC module private ioctl's
  1414. * @sd: ISP CCDC V4L2 subdevice
  1415. * @cmd: ioctl command
  1416. * @arg: ioctl argument
  1417. *
  1418. * Return 0 on success or a negative error code otherwise.
  1419. */
  1420. static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
  1421. {
  1422. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1423. int ret;
  1424. switch (cmd) {
  1425. case VIDIOC_OMAP3ISP_CCDC_CFG:
  1426. mutex_lock(&ccdc->ioctl_lock);
  1427. ret = ccdc_config(ccdc, arg);
  1428. mutex_unlock(&ccdc->ioctl_lock);
  1429. break;
  1430. default:
  1431. return -ENOIOCTLCMD;
  1432. }
  1433. return ret;
  1434. }
  1435. static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1436. struct v4l2_event_subscription *sub)
  1437. {
  1438. if (sub->type != V4L2_EVENT_FRAME_SYNC)
  1439. return -EINVAL;
  1440. /* line number is zero at frame start */
  1441. if (sub->id != 0)
  1442. return -EINVAL;
  1443. return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
  1444. }
  1445. static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1446. struct v4l2_event_subscription *sub)
  1447. {
  1448. return v4l2_event_unsubscribe(fh, sub);
  1449. }
  1450. /*
  1451. * ccdc_set_stream - Enable/Disable streaming on the CCDC module
  1452. * @sd: ISP CCDC V4L2 subdevice
  1453. * @enable: Enable/disable stream
  1454. *
  1455. * When writing to memory, the CCDC hardware can't be enabled without a memory
  1456. * buffer to write to. As the s_stream operation is called in response to a
  1457. * STREAMON call without any buffer queued yet, just update the enabled field
  1458. * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
  1459. *
  1460. * When not writing to memory enable the CCDC immediately.
  1461. */
  1462. static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
  1463. {
  1464. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1465. struct isp_device *isp = to_isp_device(ccdc);
  1466. int ret = 0;
  1467. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
  1468. if (enable == ISP_PIPELINE_STREAM_STOPPED)
  1469. return 0;
  1470. omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1471. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1472. ISPCCDC_CFG_VDLC);
  1473. ccdc_configure(ccdc);
  1474. /* TODO: Don't configure the video port if all of its output
  1475. * links are inactive.
  1476. */
  1477. ccdc_config_vp(ccdc);
  1478. ccdc_enable_vp(ccdc, 1);
  1479. ccdc_print_status(ccdc);
  1480. }
  1481. switch (enable) {
  1482. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1483. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1484. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1485. if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
  1486. ccdc_enable(ccdc);
  1487. ccdc->underrun = 0;
  1488. break;
  1489. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1490. if (ccdc->output & CCDC_OUTPUT_MEMORY &&
  1491. ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
  1492. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1493. ccdc_enable(ccdc);
  1494. break;
  1495. case ISP_PIPELINE_STREAM_STOPPED:
  1496. ret = ccdc_disable(ccdc);
  1497. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1498. omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1499. omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1500. ccdc->underrun = 0;
  1501. break;
  1502. }
  1503. ccdc->state = enable;
  1504. return ret;
  1505. }
  1506. static struct v4l2_mbus_framefmt *
  1507. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1508. unsigned int pad, enum v4l2_subdev_format_whence which)
  1509. {
  1510. if (which == V4L2_SUBDEV_FORMAT_TRY)
  1511. return v4l2_subdev_get_try_format(fh, pad);
  1512. else
  1513. return &ccdc->formats[pad];
  1514. }
  1515. static struct v4l2_rect *
  1516. __ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1517. enum v4l2_subdev_format_whence which)
  1518. {
  1519. if (which == V4L2_SUBDEV_FORMAT_TRY)
  1520. return v4l2_subdev_get_try_crop(fh, CCDC_PAD_SOURCE_OF);
  1521. else
  1522. return &ccdc->crop;
  1523. }
  1524. /*
  1525. * ccdc_try_format - Try video format on a pad
  1526. * @ccdc: ISP CCDC device
  1527. * @fh : V4L2 subdev file handle
  1528. * @pad: Pad number
  1529. * @fmt: Format
  1530. */
  1531. static void
  1532. ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1533. unsigned int pad, struct v4l2_mbus_framefmt *fmt,
  1534. enum v4l2_subdev_format_whence which)
  1535. {
  1536. const struct isp_format_info *info;
  1537. enum v4l2_mbus_pixelcode pixelcode;
  1538. unsigned int width = fmt->width;
  1539. unsigned int height = fmt->height;
  1540. struct v4l2_rect *crop;
  1541. unsigned int i;
  1542. switch (pad) {
  1543. case CCDC_PAD_SINK:
  1544. for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
  1545. if (fmt->code == ccdc_fmts[i])
  1546. break;
  1547. }
  1548. /* If not found, use SGRBG10 as default */
  1549. if (i >= ARRAY_SIZE(ccdc_fmts))
  1550. fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1551. /* Clamp the input size. */
  1552. fmt->width = clamp_t(u32, width, 32, 4096);
  1553. fmt->height = clamp_t(u32, height, 32, 4096);
  1554. break;
  1555. case CCDC_PAD_SOURCE_OF:
  1556. pixelcode = fmt->code;
  1557. *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1558. /* YUV formats are converted from 2X8 to 1X16 by the bridge and
  1559. * can be byte-swapped.
  1560. */
  1561. if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1562. fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) {
  1563. /* Use the user requested format if YUV. */
  1564. if (pixelcode == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1565. pixelcode == V4L2_MBUS_FMT_UYVY8_2X8 ||
  1566. pixelcode == V4L2_MBUS_FMT_YUYV8_1X16 ||
  1567. pixelcode == V4L2_MBUS_FMT_UYVY8_1X16)
  1568. fmt->code = pixelcode;
  1569. if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8)
  1570. fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
  1571. else if (fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
  1572. fmt->code = V4L2_MBUS_FMT_UYVY8_1X16;
  1573. }
  1574. /* Hardcode the output size to the crop rectangle size. */
  1575. crop = __ccdc_get_crop(ccdc, fh, which);
  1576. fmt->width = crop->width;
  1577. fmt->height = crop->height;
  1578. break;
  1579. case CCDC_PAD_SOURCE_VP:
  1580. *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1581. /* The video port interface truncates the data to 10 bits. */
  1582. info = omap3isp_video_format_info(fmt->code);
  1583. fmt->code = info->truncated;
  1584. /* YUV formats are not supported by the video port. */
  1585. if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1586. fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
  1587. fmt->code = 0;
  1588. /* The number of lines that can be clocked out from the video
  1589. * port output must be at least one line less than the number
  1590. * of input lines.
  1591. */
  1592. fmt->width = clamp_t(u32, width, 32, fmt->width);
  1593. fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
  1594. break;
  1595. }
  1596. /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
  1597. * stored on 2 bytes.
  1598. */
  1599. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  1600. fmt->field = V4L2_FIELD_NONE;
  1601. }
  1602. /*
  1603. * ccdc_try_crop - Validate a crop rectangle
  1604. * @ccdc: ISP CCDC device
  1605. * @sink: format on the sink pad
  1606. * @crop: crop rectangle to be validated
  1607. */
  1608. static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
  1609. const struct v4l2_mbus_framefmt *sink,
  1610. struct v4l2_rect *crop)
  1611. {
  1612. const struct isp_format_info *info;
  1613. unsigned int max_width;
  1614. /* For Bayer formats, restrict left/top and width/height to even values
  1615. * to keep the Bayer pattern.
  1616. */
  1617. info = omap3isp_video_format_info(sink->code);
  1618. if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
  1619. crop->left &= ~1;
  1620. crop->top &= ~1;
  1621. }
  1622. crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
  1623. crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
  1624. /* The data formatter truncates the number of horizontal output pixels
  1625. * to a multiple of 16. To avoid clipping data, allow callers to request
  1626. * an output size bigger than the input size up to the nearest multiple
  1627. * of 16.
  1628. */
  1629. max_width = (sink->width - crop->left + 15) & ~15;
  1630. crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
  1631. & ~15;
  1632. crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
  1633. sink->height - crop->top);
  1634. /* Odd width/height values don't make sense for Bayer formats. */
  1635. if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
  1636. crop->width &= ~1;
  1637. crop->height &= ~1;
  1638. }
  1639. }
  1640. /*
  1641. * ccdc_enum_mbus_code - Handle pixel format enumeration
  1642. * @sd : pointer to v4l2 subdev structure
  1643. * @fh : V4L2 subdev file handle
  1644. * @code : pointer to v4l2_subdev_mbus_code_enum structure
  1645. * return -EINVAL or zero on success
  1646. */
  1647. static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
  1648. struct v4l2_subdev_fh *fh,
  1649. struct v4l2_subdev_mbus_code_enum *code)
  1650. {
  1651. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1652. struct v4l2_mbus_framefmt *format;
  1653. switch (code->pad) {
  1654. case CCDC_PAD_SINK:
  1655. if (code->index >= ARRAY_SIZE(ccdc_fmts))
  1656. return -EINVAL;
  1657. code->code = ccdc_fmts[code->index];
  1658. break;
  1659. case CCDC_PAD_SOURCE_OF:
  1660. format = __ccdc_get_format(ccdc, fh, code->pad,
  1661. V4L2_SUBDEV_FORMAT_TRY);
  1662. if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1663. format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
  1664. /* In YUV mode the CCDC can swap bytes. */
  1665. if (code->index == 0)
  1666. code->code = V4L2_MBUS_FMT_YUYV8_1X16;
  1667. else if (code->index == 1)
  1668. code->code = V4L2_MBUS_FMT_UYVY8_1X16;
  1669. else
  1670. return -EINVAL;
  1671. } else {
  1672. /* In raw mode, no configurable format confversion is
  1673. * available.
  1674. */
  1675. if (code->index == 0)
  1676. code->code = format->code;
  1677. else
  1678. return -EINVAL;
  1679. }
  1680. break;
  1681. case CCDC_PAD_SOURCE_VP:
  1682. /* The CCDC supports no configurable format conversion
  1683. * compatible with the video port. Enumerate a single output
  1684. * format code.
  1685. */
  1686. if (code->index != 0)
  1687. return -EINVAL;
  1688. format = __ccdc_get_format(ccdc, fh, code->pad,
  1689. V4L2_SUBDEV_FORMAT_TRY);
  1690. /* A pixel code equal to 0 means that the video port doesn't
  1691. * support the input format. Don't enumerate any pixel code.
  1692. */
  1693. if (format->code == 0)
  1694. return -EINVAL;
  1695. code->code = format->code;
  1696. break;
  1697. default:
  1698. return -EINVAL;
  1699. }
  1700. return 0;
  1701. }
  1702. static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
  1703. struct v4l2_subdev_fh *fh,
  1704. struct v4l2_subdev_frame_size_enum *fse)
  1705. {
  1706. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1707. struct v4l2_mbus_framefmt format;
  1708. if (fse->index != 0)
  1709. return -EINVAL;
  1710. format.code = fse->code;
  1711. format.width = 1;
  1712. format.height = 1;
  1713. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1714. fse->min_width = format.width;
  1715. fse->min_height = format.height;
  1716. if (format.code != fse->code)
  1717. return -EINVAL;
  1718. format.code = fse->code;
  1719. format.width = -1;
  1720. format.height = -1;
  1721. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1722. fse->max_width = format.width;
  1723. fse->max_height = format.height;
  1724. return 0;
  1725. }
  1726. /*
  1727. * ccdc_get_selection - Retrieve a selection rectangle on a pad
  1728. * @sd: ISP CCDC V4L2 subdevice
  1729. * @fh: V4L2 subdev file handle
  1730. * @sel: Selection rectangle
  1731. *
  1732. * The only supported rectangles are the crop rectangles on the output formatter
  1733. * source pad.
  1734. *
  1735. * Return 0 on success or a negative error code otherwise.
  1736. */
  1737. static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1738. struct v4l2_subdev_selection *sel)
  1739. {
  1740. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1741. struct v4l2_mbus_framefmt *format;
  1742. if (sel->pad != CCDC_PAD_SOURCE_OF)
  1743. return -EINVAL;
  1744. switch (sel->target) {
  1745. case V4L2_SEL_TGT_CROP_BOUNDS:
  1746. sel->r.left = 0;
  1747. sel->r.top = 0;
  1748. sel->r.width = INT_MAX;
  1749. sel->r.height = INT_MAX;
  1750. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
  1751. ccdc_try_crop(ccdc, format, &sel->r);
  1752. break;
  1753. case V4L2_SEL_TGT_CROP:
  1754. sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
  1755. break;
  1756. default:
  1757. return -EINVAL;
  1758. }
  1759. return 0;
  1760. }
  1761. /*
  1762. * ccdc_set_selection - Set a selection rectangle on a pad
  1763. * @sd: ISP CCDC V4L2 subdevice
  1764. * @fh: V4L2 subdev file handle
  1765. * @sel: Selection rectangle
  1766. *
  1767. * The only supported rectangle is the actual crop rectangle on the output
  1768. * formatter source pad.
  1769. *
  1770. * Return 0 on success or a negative error code otherwise.
  1771. */
  1772. static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1773. struct v4l2_subdev_selection *sel)
  1774. {
  1775. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1776. struct v4l2_mbus_framefmt *format;
  1777. if (sel->target != V4L2_SEL_TGT_CROP ||
  1778. sel->pad != CCDC_PAD_SOURCE_OF)
  1779. return -EINVAL;
  1780. /* The crop rectangle can't be changed while streaming. */
  1781. if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
  1782. return -EBUSY;
  1783. /* Modifying the crop rectangle always changes the format on the source
  1784. * pad. If the KEEP_CONFIG flag is set, just return the current crop
  1785. * rectangle.
  1786. */
  1787. if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
  1788. sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
  1789. return 0;
  1790. }
  1791. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
  1792. ccdc_try_crop(ccdc, format, &sel->r);
  1793. *__ccdc_get_crop(ccdc, fh, sel->which) = sel->r;
  1794. /* Update the source format. */
  1795. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF, sel->which);
  1796. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format, sel->which);
  1797. return 0;
  1798. }
  1799. /*
  1800. * ccdc_get_format - Retrieve the video format on a pad
  1801. * @sd : ISP CCDC V4L2 subdevice
  1802. * @fh : V4L2 subdev file handle
  1803. * @fmt: Format
  1804. *
  1805. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1806. * to the format type.
  1807. */
  1808. static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1809. struct v4l2_subdev_format *fmt)
  1810. {
  1811. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1812. struct v4l2_mbus_framefmt *format;
  1813. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1814. if (format == NULL)
  1815. return -EINVAL;
  1816. fmt->format = *format;
  1817. return 0;
  1818. }
  1819. /*
  1820. * ccdc_set_format - Set the video format on a pad
  1821. * @sd : ISP CCDC V4L2 subdevice
  1822. * @fh : V4L2 subdev file handle
  1823. * @fmt: Format
  1824. *
  1825. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1826. * to the format type.
  1827. */
  1828. static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1829. struct v4l2_subdev_format *fmt)
  1830. {
  1831. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1832. struct v4l2_mbus_framefmt *format;
  1833. struct v4l2_rect *crop;
  1834. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1835. if (format == NULL)
  1836. return -EINVAL;
  1837. ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
  1838. *format = fmt->format;
  1839. /* Propagate the format from sink to source */
  1840. if (fmt->pad == CCDC_PAD_SINK) {
  1841. /* Reset the crop rectangle. */
  1842. crop = __ccdc_get_crop(ccdc, fh, fmt->which);
  1843. crop->left = 0;
  1844. crop->top = 0;
  1845. crop->width = fmt->format.width;
  1846. crop->height = fmt->format.height;
  1847. ccdc_try_crop(ccdc, &fmt->format, crop);
  1848. /* Update the source formats. */
  1849. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
  1850. fmt->which);
  1851. *format = fmt->format;
  1852. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
  1853. fmt->which);
  1854. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
  1855. fmt->which);
  1856. *format = fmt->format;
  1857. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
  1858. fmt->which);
  1859. }
  1860. return 0;
  1861. }
  1862. /*
  1863. * Decide whether desired output pixel code can be obtained with
  1864. * the lane shifter by shifting the input pixel code.
  1865. * @in: input pixelcode to shifter
  1866. * @out: output pixelcode from shifter
  1867. * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
  1868. *
  1869. * return true if the combination is possible
  1870. * return false otherwise
  1871. */
  1872. static bool ccdc_is_shiftable(enum v4l2_mbus_pixelcode in,
  1873. enum v4l2_mbus_pixelcode out,
  1874. unsigned int additional_shift)
  1875. {
  1876. const struct isp_format_info *in_info, *out_info;
  1877. if (in == out)
  1878. return true;
  1879. in_info = omap3isp_video_format_info(in);
  1880. out_info = omap3isp_video_format_info(out);
  1881. if ((in_info->flavor == 0) || (out_info->flavor == 0))
  1882. return false;
  1883. if (in_info->flavor != out_info->flavor)
  1884. return false;
  1885. return in_info->width - out_info->width + additional_shift <= 6;
  1886. }
  1887. static int ccdc_link_validate(struct v4l2_subdev *sd,
  1888. struct media_link *link,
  1889. struct v4l2_subdev_format *source_fmt,
  1890. struct v4l2_subdev_format *sink_fmt)
  1891. {
  1892. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1893. unsigned long parallel_shift;
  1894. /* Check if the two ends match */
  1895. if (source_fmt->format.width != sink_fmt->format.width ||
  1896. source_fmt->format.height != sink_fmt->format.height)
  1897. return -EPIPE;
  1898. /* We've got a parallel sensor here. */
  1899. if (ccdc->input == CCDC_INPUT_PARALLEL) {
  1900. struct isp_parallel_platform_data *pdata =
  1901. &((struct isp_v4l2_subdevs_group *)
  1902. media_entity_to_v4l2_subdev(link->source->entity)
  1903. ->host_priv)->bus.parallel;
  1904. parallel_shift = pdata->data_lane_shift * 2;
  1905. } else {
  1906. parallel_shift = 0;
  1907. }
  1908. /* Lane shifter may be used to drop bits on CCDC sink pad */
  1909. if (!ccdc_is_shiftable(source_fmt->format.code,
  1910. sink_fmt->format.code, parallel_shift))
  1911. return -EPIPE;
  1912. return 0;
  1913. }
  1914. /*
  1915. * ccdc_init_formats - Initialize formats on all pads
  1916. * @sd: ISP CCDC V4L2 subdevice
  1917. * @fh: V4L2 subdev file handle
  1918. *
  1919. * Initialize all pad formats with default values. If fh is not NULL, try
  1920. * formats are initialized on the file handle. Otherwise active formats are
  1921. * initialized on the device.
  1922. */
  1923. static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
  1924. {
  1925. struct v4l2_subdev_format format;
  1926. memset(&format, 0, sizeof(format));
  1927. format.pad = CCDC_PAD_SINK;
  1928. format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
  1929. format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1930. format.format.width = 4096;
  1931. format.format.height = 4096;
  1932. ccdc_set_format(sd, fh, &format);
  1933. return 0;
  1934. }
  1935. /* V4L2 subdev core operations */
  1936. static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
  1937. .ioctl = ccdc_ioctl,
  1938. .subscribe_event = ccdc_subscribe_event,
  1939. .unsubscribe_event = ccdc_unsubscribe_event,
  1940. };
  1941. /* V4L2 subdev video operations */
  1942. static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
  1943. .s_stream = ccdc_set_stream,
  1944. };
  1945. /* V4L2 subdev pad operations */
  1946. static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
  1947. .enum_mbus_code = ccdc_enum_mbus_code,
  1948. .enum_frame_size = ccdc_enum_frame_size,
  1949. .get_fmt = ccdc_get_format,
  1950. .set_fmt = ccdc_set_format,
  1951. .get_selection = ccdc_get_selection,
  1952. .set_selection = ccdc_set_selection,
  1953. .link_validate = ccdc_link_validate,
  1954. };
  1955. /* V4L2 subdev operations */
  1956. static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
  1957. .core = &ccdc_v4l2_core_ops,
  1958. .video = &ccdc_v4l2_video_ops,
  1959. .pad = &ccdc_v4l2_pad_ops,
  1960. };
  1961. /* V4L2 subdev internal operations */
  1962. static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
  1963. .open = ccdc_init_formats,
  1964. };
  1965. /* -----------------------------------------------------------------------------
  1966. * Media entity operations
  1967. */
  1968. /*
  1969. * ccdc_link_setup - Setup CCDC connections
  1970. * @entity: CCDC media entity
  1971. * @local: Pad at the local end of the link
  1972. * @remote: Pad at the remote end of the link
  1973. * @flags: Link flags
  1974. *
  1975. * return -EINVAL or zero on success
  1976. */
  1977. static int ccdc_link_setup(struct media_entity *entity,
  1978. const struct media_pad *local,
  1979. const struct media_pad *remote, u32 flags)
  1980. {
  1981. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1982. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1983. struct isp_device *isp = to_isp_device(ccdc);
  1984. switch (local->index | media_entity_type(remote->entity)) {
  1985. case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
  1986. /* Read from the sensor (parallel interface), CCP2, CSI2a or
  1987. * CSI2c.
  1988. */
  1989. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1990. ccdc->input = CCDC_INPUT_NONE;
  1991. break;
  1992. }
  1993. if (ccdc->input != CCDC_INPUT_NONE)
  1994. return -EBUSY;
  1995. if (remote->entity == &isp->isp_ccp2.subdev.entity)
  1996. ccdc->input = CCDC_INPUT_CCP2B;
  1997. else if (remote->entity == &isp->isp_csi2a.subdev.entity)
  1998. ccdc->input = CCDC_INPUT_CSI2A;
  1999. else if (remote->entity == &isp->isp_csi2c.subdev.entity)
  2000. ccdc->input = CCDC_INPUT_CSI2C;
  2001. else
  2002. ccdc->input = CCDC_INPUT_PARALLEL;
  2003. break;
  2004. /*
  2005. * The ISP core doesn't support pipelines with multiple video outputs.
  2006. * Revisit this when it will be implemented, and return -EBUSY for now.
  2007. */
  2008. case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
  2009. /* Write to preview engine, histogram and H3A. When none of
  2010. * those links are active, the video port can be disabled.
  2011. */
  2012. if (flags & MEDIA_LNK_FL_ENABLED) {
  2013. if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
  2014. return -EBUSY;
  2015. ccdc->output |= CCDC_OUTPUT_PREVIEW;
  2016. } else {
  2017. ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
  2018. }
  2019. break;
  2020. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
  2021. /* Write to memory */
  2022. if (flags & MEDIA_LNK_FL_ENABLED) {
  2023. if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
  2024. return -EBUSY;
  2025. ccdc->output |= CCDC_OUTPUT_MEMORY;
  2026. } else {
  2027. ccdc->output &= ~CCDC_OUTPUT_MEMORY;
  2028. }
  2029. break;
  2030. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
  2031. /* Write to resizer */
  2032. if (flags & MEDIA_LNK_FL_ENABLED) {
  2033. if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
  2034. return -EBUSY;
  2035. ccdc->output |= CCDC_OUTPUT_RESIZER;
  2036. } else {
  2037. ccdc->output &= ~CCDC_OUTPUT_RESIZER;
  2038. }
  2039. break;
  2040. default:
  2041. return -EINVAL;
  2042. }
  2043. return 0;
  2044. }
  2045. /* media operations */
  2046. static const struct media_entity_operations ccdc_media_ops = {
  2047. .link_setup = ccdc_link_setup,
  2048. .link_validate = v4l2_subdev_link_validate,
  2049. };
  2050. void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
  2051. {
  2052. v4l2_device_unregister_subdev(&ccdc->subdev);
  2053. omap3isp_video_unregister(&ccdc->video_out);
  2054. }
  2055. int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
  2056. struct v4l2_device *vdev)
  2057. {
  2058. int ret;
  2059. /* Register the subdev and video node. */
  2060. ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
  2061. if (ret < 0)
  2062. goto error;
  2063. ret = omap3isp_video_register(&ccdc->video_out, vdev);
  2064. if (ret < 0)
  2065. goto error;
  2066. return 0;
  2067. error:
  2068. omap3isp_ccdc_unregister_entities(ccdc);
  2069. return ret;
  2070. }
  2071. /* -----------------------------------------------------------------------------
  2072. * ISP CCDC initialisation and cleanup
  2073. */
  2074. /*
  2075. * ccdc_init_entities - Initialize V4L2 subdev and media entity
  2076. * @ccdc: ISP CCDC module
  2077. *
  2078. * Return 0 on success and a negative error code on failure.
  2079. */
  2080. static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
  2081. {
  2082. struct v4l2_subdev *sd = &ccdc->subdev;
  2083. struct media_pad *pads = ccdc->pads;
  2084. struct media_entity *me = &sd->entity;
  2085. int ret;
  2086. ccdc->input = CCDC_INPUT_NONE;
  2087. v4l2_subdev_init(sd, &ccdc_v4l2_ops);
  2088. sd->internal_ops = &ccdc_v4l2_internal_ops;
  2089. strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
  2090. sd->grp_id = 1 << 16; /* group ID for isp subdevs */
  2091. v4l2_set_subdevdata(sd, ccdc);
  2092. sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
  2093. pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK
  2094. | MEDIA_PAD_FL_MUST_CONNECT;
  2095. pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
  2096. pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
  2097. me->ops = &ccdc_media_ops;
  2098. ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
  2099. if (ret < 0)
  2100. return ret;
  2101. ccdc_init_formats(sd, NULL);
  2102. ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  2103. ccdc->video_out.ops = &ccdc_video_ops;
  2104. ccdc->video_out.isp = to_isp_device(ccdc);
  2105. ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
  2106. ccdc->video_out.bpl_alignment = 32;
  2107. ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
  2108. if (ret < 0)
  2109. goto error_video;
  2110. /* Connect the CCDC subdev to the video node. */
  2111. ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
  2112. &ccdc->video_out.video.entity, 0, 0);
  2113. if (ret < 0)
  2114. goto error_link;
  2115. return 0;
  2116. error_link:
  2117. omap3isp_video_cleanup(&ccdc->video_out);
  2118. error_video:
  2119. media_entity_cleanup(me);
  2120. return ret;
  2121. }
  2122. /*
  2123. * omap3isp_ccdc_init - CCDC module initialization.
  2124. * @isp: Device pointer specific to the OMAP3 ISP.
  2125. *
  2126. * TODO: Get the initialisation values from platform data.
  2127. *
  2128. * Return 0 on success or a negative error code otherwise.
  2129. */
  2130. int omap3isp_ccdc_init(struct isp_device *isp)
  2131. {
  2132. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  2133. int ret;
  2134. spin_lock_init(&ccdc->lock);
  2135. init_waitqueue_head(&ccdc->wait);
  2136. mutex_init(&ccdc->ioctl_lock);
  2137. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  2138. INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
  2139. ccdc->lsc.state = LSC_STATE_STOPPED;
  2140. INIT_LIST_HEAD(&ccdc->lsc.free_queue);
  2141. spin_lock_init(&ccdc->lsc.req_lock);
  2142. ccdc->clamp.oblen = 0;
  2143. ccdc->clamp.dcsubval = 0;
  2144. ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
  2145. ccdc_apply_controls(ccdc);
  2146. ret = ccdc_init_entities(ccdc);
  2147. if (ret < 0) {
  2148. mutex_destroy(&ccdc->ioctl_lock);
  2149. return ret;
  2150. }
  2151. return 0;
  2152. }
  2153. /*
  2154. * omap3isp_ccdc_cleanup - CCDC module cleanup.
  2155. * @isp: Device pointer specific to the OMAP3 ISP.
  2156. */
  2157. void omap3isp_ccdc_cleanup(struct isp_device *isp)
  2158. {
  2159. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  2160. omap3isp_video_cleanup(&ccdc->video_out);
  2161. media_entity_cleanup(&ccdc->subdev.entity);
  2162. /* Free LSC requests. As the CCDC is stopped there's no active request,
  2163. * so only the pending request and the free queue need to be handled.
  2164. */
  2165. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  2166. cancel_work_sync(&ccdc->lsc.table_work);
  2167. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  2168. if (ccdc->fpc.addr != NULL)
  2169. dma_free_coherent(isp->dev, ccdc->fpc.fpnum * 4, ccdc->fpc.addr,
  2170. ccdc->fpc.dma);
  2171. mutex_destroy(&ccdc->ioctl_lock);
  2172. }