mx2_emmaprp.c 26 KB

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  1. /*
  2. * Support eMMa-PrP through mem2mem framework.
  3. *
  4. * eMMa-PrP is a piece of HW that allows fetching buffers
  5. * from one memory location and do several operations on
  6. * them such as scaling or format conversion giving, as a result
  7. * a new processed buffer in another memory location.
  8. *
  9. * Based on mem2mem_testdev.c by Pawel Osciak.
  10. *
  11. * Copyright (c) 2011 Vista Silicon S.L.
  12. * Javier Martin <javier.martin@vista-silicon.com>
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by the
  16. * Free Software Foundation; either version 2 of the
  17. * License, or (at your option) any later version
  18. */
  19. #include <linux/module.h>
  20. #include <linux/clk.h>
  21. #include <linux/slab.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/platform_device.h>
  25. #include <media/v4l2-mem2mem.h>
  26. #include <media/v4l2-device.h>
  27. #include <media/v4l2-ioctl.h>
  28. #include <media/videobuf2-dma-contig.h>
  29. #include <asm/sizes.h>
  30. #define EMMAPRP_MODULE_NAME "mem2mem-emmaprp"
  31. MODULE_DESCRIPTION("Mem-to-mem device which supports eMMa-PrP present in mx2 SoCs");
  32. MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com");
  33. MODULE_LICENSE("GPL");
  34. MODULE_VERSION("0.0.1");
  35. static bool debug;
  36. module_param(debug, bool, 0644);
  37. #define MIN_W 32
  38. #define MIN_H 32
  39. #define MAX_W 2040
  40. #define MAX_H 2046
  41. #define S_ALIGN 1 /* multiple of 2 */
  42. #define W_ALIGN_YUV420 3 /* multiple of 8 */
  43. #define W_ALIGN_OTHERS 2 /* multiple of 4 */
  44. #define H_ALIGN 1 /* multiple of 2 */
  45. /* Flags that indicate a format can be used for capture/output */
  46. #define MEM2MEM_CAPTURE (1 << 0)
  47. #define MEM2MEM_OUTPUT (1 << 1)
  48. #define MEM2MEM_NAME "m2m-emmaprp"
  49. /* In bytes, per queue */
  50. #define MEM2MEM_VID_MEM_LIMIT SZ_16M
  51. #define dprintk(dev, fmt, arg...) \
  52. v4l2_dbg(1, debug, &dev->v4l2_dev, "%s: " fmt, __func__, ## arg)
  53. /* EMMA PrP */
  54. #define PRP_CNTL 0x00
  55. #define PRP_INTR_CNTL 0x04
  56. #define PRP_INTRSTATUS 0x08
  57. #define PRP_SOURCE_Y_PTR 0x0c
  58. #define PRP_SOURCE_CB_PTR 0x10
  59. #define PRP_SOURCE_CR_PTR 0x14
  60. #define PRP_DEST_RGB1_PTR 0x18
  61. #define PRP_DEST_RGB2_PTR 0x1c
  62. #define PRP_DEST_Y_PTR 0x20
  63. #define PRP_DEST_CB_PTR 0x24
  64. #define PRP_DEST_CR_PTR 0x28
  65. #define PRP_SRC_FRAME_SIZE 0x2c
  66. #define PRP_DEST_CH1_LINE_STRIDE 0x30
  67. #define PRP_SRC_PIXEL_FORMAT_CNTL 0x34
  68. #define PRP_CH1_PIXEL_FORMAT_CNTL 0x38
  69. #define PRP_CH1_OUT_IMAGE_SIZE 0x3c
  70. #define PRP_CH2_OUT_IMAGE_SIZE 0x40
  71. #define PRP_SRC_LINE_STRIDE 0x44
  72. #define PRP_CSC_COEF_012 0x48
  73. #define PRP_CSC_COEF_345 0x4c
  74. #define PRP_CSC_COEF_678 0x50
  75. #define PRP_CH1_RZ_HORI_COEF1 0x54
  76. #define PRP_CH1_RZ_HORI_COEF2 0x58
  77. #define PRP_CH1_RZ_HORI_VALID 0x5c
  78. #define PRP_CH1_RZ_VERT_COEF1 0x60
  79. #define PRP_CH1_RZ_VERT_COEF2 0x64
  80. #define PRP_CH1_RZ_VERT_VALID 0x68
  81. #define PRP_CH2_RZ_HORI_COEF1 0x6c
  82. #define PRP_CH2_RZ_HORI_COEF2 0x70
  83. #define PRP_CH2_RZ_HORI_VALID 0x74
  84. #define PRP_CH2_RZ_VERT_COEF1 0x78
  85. #define PRP_CH2_RZ_VERT_COEF2 0x7c
  86. #define PRP_CH2_RZ_VERT_VALID 0x80
  87. #define PRP_CNTL_CH1EN (1 << 0)
  88. #define PRP_CNTL_CH2EN (1 << 1)
  89. #define PRP_CNTL_CSIEN (1 << 2)
  90. #define PRP_CNTL_DATA_IN_YUV420 (0 << 3)
  91. #define PRP_CNTL_DATA_IN_YUV422 (1 << 3)
  92. #define PRP_CNTL_DATA_IN_RGB16 (2 << 3)
  93. #define PRP_CNTL_DATA_IN_RGB32 (3 << 3)
  94. #define PRP_CNTL_CH1_OUT_RGB8 (0 << 5)
  95. #define PRP_CNTL_CH1_OUT_RGB16 (1 << 5)
  96. #define PRP_CNTL_CH1_OUT_RGB32 (2 << 5)
  97. #define PRP_CNTL_CH1_OUT_YUV422 (3 << 5)
  98. #define PRP_CNTL_CH2_OUT_YUV420 (0 << 7)
  99. #define PRP_CNTL_CH2_OUT_YUV422 (1 << 7)
  100. #define PRP_CNTL_CH2_OUT_YUV444 (2 << 7)
  101. #define PRP_CNTL_CH1_LEN (1 << 9)
  102. #define PRP_CNTL_CH2_LEN (1 << 10)
  103. #define PRP_CNTL_SKIP_FRAME (1 << 11)
  104. #define PRP_CNTL_SWRST (1 << 12)
  105. #define PRP_CNTL_CLKEN (1 << 13)
  106. #define PRP_CNTL_WEN (1 << 14)
  107. #define PRP_CNTL_CH1BYP (1 << 15)
  108. #define PRP_CNTL_IN_TSKIP(x) ((x) << 16)
  109. #define PRP_CNTL_CH1_TSKIP(x) ((x) << 19)
  110. #define PRP_CNTL_CH2_TSKIP(x) ((x) << 22)
  111. #define PRP_CNTL_INPUT_FIFO_LEVEL(x) ((x) << 25)
  112. #define PRP_CNTL_RZ_FIFO_LEVEL(x) ((x) << 27)
  113. #define PRP_CNTL_CH2B1EN (1 << 29)
  114. #define PRP_CNTL_CH2B2EN (1 << 30)
  115. #define PRP_CNTL_CH2FEN (1 << 31)
  116. #define PRP_SIZE_HEIGHT(x) (x)
  117. #define PRP_SIZE_WIDTH(x) ((x) << 16)
  118. /* IRQ Enable and status register */
  119. #define PRP_INTR_RDERR (1 << 0)
  120. #define PRP_INTR_CH1WERR (1 << 1)
  121. #define PRP_INTR_CH2WERR (1 << 2)
  122. #define PRP_INTR_CH1FC (1 << 3)
  123. #define PRP_INTR_CH2FC (1 << 5)
  124. #define PRP_INTR_LBOVF (1 << 7)
  125. #define PRP_INTR_CH2OVF (1 << 8)
  126. #define PRP_INTR_ST_RDERR (1 << 0)
  127. #define PRP_INTR_ST_CH1WERR (1 << 1)
  128. #define PRP_INTR_ST_CH2WERR (1 << 2)
  129. #define PRP_INTR_ST_CH2B2CI (1 << 3)
  130. #define PRP_INTR_ST_CH2B1CI (1 << 4)
  131. #define PRP_INTR_ST_CH1B2CI (1 << 5)
  132. #define PRP_INTR_ST_CH1B1CI (1 << 6)
  133. #define PRP_INTR_ST_LBOVF (1 << 7)
  134. #define PRP_INTR_ST_CH2OVF (1 << 8)
  135. struct emmaprp_fmt {
  136. char *name;
  137. u32 fourcc;
  138. /* Types the format can be used for */
  139. u32 types;
  140. };
  141. static struct emmaprp_fmt formats[] = {
  142. {
  143. .name = "YUV 4:2:0 Planar",
  144. .fourcc = V4L2_PIX_FMT_YUV420,
  145. .types = MEM2MEM_CAPTURE,
  146. },
  147. {
  148. .name = "4:2:2, packed, YUYV",
  149. .fourcc = V4L2_PIX_FMT_YUYV,
  150. .types = MEM2MEM_OUTPUT,
  151. },
  152. };
  153. /* Per-queue, driver-specific private data */
  154. struct emmaprp_q_data {
  155. unsigned int width;
  156. unsigned int height;
  157. unsigned int sizeimage;
  158. struct emmaprp_fmt *fmt;
  159. };
  160. enum {
  161. V4L2_M2M_SRC = 0,
  162. V4L2_M2M_DST = 1,
  163. };
  164. #define NUM_FORMATS ARRAY_SIZE(formats)
  165. static struct emmaprp_fmt *find_format(struct v4l2_format *f)
  166. {
  167. struct emmaprp_fmt *fmt;
  168. unsigned int k;
  169. for (k = 0; k < NUM_FORMATS; k++) {
  170. fmt = &formats[k];
  171. if (fmt->fourcc == f->fmt.pix.pixelformat)
  172. break;
  173. }
  174. if (k == NUM_FORMATS)
  175. return NULL;
  176. return &formats[k];
  177. }
  178. struct emmaprp_dev {
  179. struct v4l2_device v4l2_dev;
  180. struct video_device *vfd;
  181. struct mutex dev_mutex;
  182. spinlock_t irqlock;
  183. void __iomem *base_emma;
  184. struct clk *clk_emma_ahb, *clk_emma_ipg;
  185. struct v4l2_m2m_dev *m2m_dev;
  186. struct vb2_alloc_ctx *alloc_ctx;
  187. };
  188. struct emmaprp_ctx {
  189. struct emmaprp_dev *dev;
  190. /* Abort requested by m2m */
  191. int aborting;
  192. struct emmaprp_q_data q_data[2];
  193. struct v4l2_m2m_ctx *m2m_ctx;
  194. };
  195. static struct emmaprp_q_data *get_q_data(struct emmaprp_ctx *ctx,
  196. enum v4l2_buf_type type)
  197. {
  198. switch (type) {
  199. case V4L2_BUF_TYPE_VIDEO_OUTPUT:
  200. return &(ctx->q_data[V4L2_M2M_SRC]);
  201. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  202. return &(ctx->q_data[V4L2_M2M_DST]);
  203. default:
  204. BUG();
  205. }
  206. return NULL;
  207. }
  208. /*
  209. * mem2mem callbacks
  210. */
  211. static void emmaprp_job_abort(void *priv)
  212. {
  213. struct emmaprp_ctx *ctx = priv;
  214. struct emmaprp_dev *pcdev = ctx->dev;
  215. ctx->aborting = 1;
  216. dprintk(pcdev, "Aborting task\n");
  217. v4l2_m2m_job_finish(pcdev->m2m_dev, ctx->m2m_ctx);
  218. }
  219. static void emmaprp_lock(void *priv)
  220. {
  221. struct emmaprp_ctx *ctx = priv;
  222. struct emmaprp_dev *pcdev = ctx->dev;
  223. mutex_lock(&pcdev->dev_mutex);
  224. }
  225. static void emmaprp_unlock(void *priv)
  226. {
  227. struct emmaprp_ctx *ctx = priv;
  228. struct emmaprp_dev *pcdev = ctx->dev;
  229. mutex_unlock(&pcdev->dev_mutex);
  230. }
  231. static inline void emmaprp_dump_regs(struct emmaprp_dev *pcdev)
  232. {
  233. dprintk(pcdev,
  234. "eMMa-PrP Registers:\n"
  235. " SOURCE_Y_PTR = 0x%08X\n"
  236. " SRC_FRAME_SIZE = 0x%08X\n"
  237. " DEST_Y_PTR = 0x%08X\n"
  238. " DEST_CR_PTR = 0x%08X\n"
  239. " DEST_CB_PTR = 0x%08X\n"
  240. " CH2_OUT_IMAGE_SIZE = 0x%08X\n"
  241. " CNTL = 0x%08X\n",
  242. readl(pcdev->base_emma + PRP_SOURCE_Y_PTR),
  243. readl(pcdev->base_emma + PRP_SRC_FRAME_SIZE),
  244. readl(pcdev->base_emma + PRP_DEST_Y_PTR),
  245. readl(pcdev->base_emma + PRP_DEST_CR_PTR),
  246. readl(pcdev->base_emma + PRP_DEST_CB_PTR),
  247. readl(pcdev->base_emma + PRP_CH2_OUT_IMAGE_SIZE),
  248. readl(pcdev->base_emma + PRP_CNTL));
  249. }
  250. static void emmaprp_device_run(void *priv)
  251. {
  252. struct emmaprp_ctx *ctx = priv;
  253. struct emmaprp_q_data *s_q_data, *d_q_data;
  254. struct vb2_buffer *src_buf, *dst_buf;
  255. struct emmaprp_dev *pcdev = ctx->dev;
  256. unsigned int s_width, s_height;
  257. unsigned int d_width, d_height;
  258. unsigned int d_size;
  259. dma_addr_t p_in, p_out;
  260. u32 tmp;
  261. src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
  262. dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  263. s_q_data = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  264. s_width = s_q_data->width;
  265. s_height = s_q_data->height;
  266. d_q_data = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  267. d_width = d_q_data->width;
  268. d_height = d_q_data->height;
  269. d_size = d_width * d_height;
  270. p_in = vb2_dma_contig_plane_dma_addr(src_buf, 0);
  271. p_out = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
  272. if (!p_in || !p_out) {
  273. v4l2_err(&pcdev->v4l2_dev,
  274. "Acquiring kernel pointers to buffers failed\n");
  275. return;
  276. }
  277. /* Input frame parameters */
  278. writel(p_in, pcdev->base_emma + PRP_SOURCE_Y_PTR);
  279. writel(PRP_SIZE_WIDTH(s_width) | PRP_SIZE_HEIGHT(s_height),
  280. pcdev->base_emma + PRP_SRC_FRAME_SIZE);
  281. /* Output frame parameters */
  282. writel(p_out, pcdev->base_emma + PRP_DEST_Y_PTR);
  283. writel(p_out + d_size, pcdev->base_emma + PRP_DEST_CB_PTR);
  284. writel(p_out + d_size + (d_size >> 2),
  285. pcdev->base_emma + PRP_DEST_CR_PTR);
  286. writel(PRP_SIZE_WIDTH(d_width) | PRP_SIZE_HEIGHT(d_height),
  287. pcdev->base_emma + PRP_CH2_OUT_IMAGE_SIZE);
  288. /* IRQ configuration */
  289. tmp = readl(pcdev->base_emma + PRP_INTR_CNTL);
  290. writel(tmp | PRP_INTR_RDERR |
  291. PRP_INTR_CH2WERR |
  292. PRP_INTR_CH2FC,
  293. pcdev->base_emma + PRP_INTR_CNTL);
  294. emmaprp_dump_regs(pcdev);
  295. /* Enable transfer */
  296. tmp = readl(pcdev->base_emma + PRP_CNTL);
  297. writel(tmp | PRP_CNTL_CH2_OUT_YUV420 |
  298. PRP_CNTL_DATA_IN_YUV422 |
  299. PRP_CNTL_CH2EN,
  300. pcdev->base_emma + PRP_CNTL);
  301. }
  302. static irqreturn_t emmaprp_irq(int irq_emma, void *data)
  303. {
  304. struct emmaprp_dev *pcdev = data;
  305. struct emmaprp_ctx *curr_ctx;
  306. struct vb2_buffer *src_vb, *dst_vb;
  307. unsigned long flags;
  308. u32 irqst;
  309. /* Check irq flags and clear irq */
  310. irqst = readl(pcdev->base_emma + PRP_INTRSTATUS);
  311. writel(irqst, pcdev->base_emma + PRP_INTRSTATUS);
  312. dprintk(pcdev, "irqst = 0x%08x\n", irqst);
  313. curr_ctx = v4l2_m2m_get_curr_priv(pcdev->m2m_dev);
  314. if (curr_ctx == NULL) {
  315. pr_err("Instance released before the end of transaction\n");
  316. return IRQ_HANDLED;
  317. }
  318. if (!curr_ctx->aborting) {
  319. if ((irqst & PRP_INTR_ST_RDERR) ||
  320. (irqst & PRP_INTR_ST_CH2WERR)) {
  321. pr_err("PrP bus error occurred, this transfer is probably corrupted\n");
  322. writel(PRP_CNTL_SWRST, pcdev->base_emma + PRP_CNTL);
  323. } else if (irqst & PRP_INTR_ST_CH2B1CI) { /* buffer ready */
  324. src_vb = v4l2_m2m_src_buf_remove(curr_ctx->m2m_ctx);
  325. dst_vb = v4l2_m2m_dst_buf_remove(curr_ctx->m2m_ctx);
  326. dst_vb->v4l2_buf.timestamp = src_vb->v4l2_buf.timestamp;
  327. dst_vb->v4l2_buf.flags &=
  328. ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
  329. dst_vb->v4l2_buf.flags |=
  330. src_vb->v4l2_buf.flags
  331. & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
  332. dst_vb->v4l2_buf.timecode = src_vb->v4l2_buf.timecode;
  333. spin_lock_irqsave(&pcdev->irqlock, flags);
  334. v4l2_m2m_buf_done(src_vb, VB2_BUF_STATE_DONE);
  335. v4l2_m2m_buf_done(dst_vb, VB2_BUF_STATE_DONE);
  336. spin_unlock_irqrestore(&pcdev->irqlock, flags);
  337. }
  338. }
  339. v4l2_m2m_job_finish(pcdev->m2m_dev, curr_ctx->m2m_ctx);
  340. return IRQ_HANDLED;
  341. }
  342. /*
  343. * video ioctls
  344. */
  345. static int vidioc_querycap(struct file *file, void *priv,
  346. struct v4l2_capability *cap)
  347. {
  348. strncpy(cap->driver, MEM2MEM_NAME, sizeof(cap->driver) - 1);
  349. strncpy(cap->card, MEM2MEM_NAME, sizeof(cap->card) - 1);
  350. /*
  351. * This is only a mem-to-mem video device. The capture and output
  352. * device capability flags are left only for backward compatibility
  353. * and are scheduled for removal.
  354. */
  355. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
  356. V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
  357. return 0;
  358. }
  359. static int enum_fmt(struct v4l2_fmtdesc *f, u32 type)
  360. {
  361. int i, num;
  362. struct emmaprp_fmt *fmt;
  363. num = 0;
  364. for (i = 0; i < NUM_FORMATS; ++i) {
  365. if (formats[i].types & type) {
  366. /* index-th format of type type found ? */
  367. if (num == f->index)
  368. break;
  369. /* Correct type but haven't reached our index yet,
  370. * just increment per-type index */
  371. ++num;
  372. }
  373. }
  374. if (i < NUM_FORMATS) {
  375. /* Format found */
  376. fmt = &formats[i];
  377. strlcpy(f->description, fmt->name, sizeof(f->description) - 1);
  378. f->pixelformat = fmt->fourcc;
  379. return 0;
  380. }
  381. /* Format not found */
  382. return -EINVAL;
  383. }
  384. static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
  385. struct v4l2_fmtdesc *f)
  386. {
  387. return enum_fmt(f, MEM2MEM_CAPTURE);
  388. }
  389. static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
  390. struct v4l2_fmtdesc *f)
  391. {
  392. return enum_fmt(f, MEM2MEM_OUTPUT);
  393. }
  394. static int vidioc_g_fmt(struct emmaprp_ctx *ctx, struct v4l2_format *f)
  395. {
  396. struct vb2_queue *vq;
  397. struct emmaprp_q_data *q_data;
  398. vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
  399. if (!vq)
  400. return -EINVAL;
  401. q_data = get_q_data(ctx, f->type);
  402. f->fmt.pix.width = q_data->width;
  403. f->fmt.pix.height = q_data->height;
  404. f->fmt.pix.field = V4L2_FIELD_NONE;
  405. f->fmt.pix.pixelformat = q_data->fmt->fourcc;
  406. if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
  407. f->fmt.pix.bytesperline = q_data->width * 3 / 2;
  408. else /* YUYV */
  409. f->fmt.pix.bytesperline = q_data->width * 2;
  410. f->fmt.pix.sizeimage = q_data->sizeimage;
  411. return 0;
  412. }
  413. static int vidioc_g_fmt_vid_out(struct file *file, void *priv,
  414. struct v4l2_format *f)
  415. {
  416. return vidioc_g_fmt(priv, f);
  417. }
  418. static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
  419. struct v4l2_format *f)
  420. {
  421. return vidioc_g_fmt(priv, f);
  422. }
  423. static int vidioc_try_fmt(struct v4l2_format *f)
  424. {
  425. enum v4l2_field field;
  426. if (!find_format(f))
  427. return -EINVAL;
  428. field = f->fmt.pix.field;
  429. if (field == V4L2_FIELD_ANY)
  430. field = V4L2_FIELD_NONE;
  431. else if (V4L2_FIELD_NONE != field)
  432. return -EINVAL;
  433. /* V4L2 specification suggests the driver corrects the format struct
  434. * if any of the dimensions is unsupported */
  435. f->fmt.pix.field = field;
  436. if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
  437. v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
  438. W_ALIGN_YUV420, &f->fmt.pix.height,
  439. MIN_H, MAX_H, H_ALIGN, S_ALIGN);
  440. f->fmt.pix.bytesperline = f->fmt.pix.width * 3 / 2;
  441. } else {
  442. v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
  443. W_ALIGN_OTHERS, &f->fmt.pix.height,
  444. MIN_H, MAX_H, H_ALIGN, S_ALIGN);
  445. f->fmt.pix.bytesperline = f->fmt.pix.width * 2;
  446. }
  447. f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
  448. return 0;
  449. }
  450. static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
  451. struct v4l2_format *f)
  452. {
  453. struct emmaprp_fmt *fmt;
  454. struct emmaprp_ctx *ctx = priv;
  455. fmt = find_format(f);
  456. if (!fmt || !(fmt->types & MEM2MEM_CAPTURE)) {
  457. v4l2_err(&ctx->dev->v4l2_dev,
  458. "Fourcc format (0x%08x) invalid.\n",
  459. f->fmt.pix.pixelformat);
  460. return -EINVAL;
  461. }
  462. return vidioc_try_fmt(f);
  463. }
  464. static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
  465. struct v4l2_format *f)
  466. {
  467. struct emmaprp_fmt *fmt;
  468. struct emmaprp_ctx *ctx = priv;
  469. fmt = find_format(f);
  470. if (!fmt || !(fmt->types & MEM2MEM_OUTPUT)) {
  471. v4l2_err(&ctx->dev->v4l2_dev,
  472. "Fourcc format (0x%08x) invalid.\n",
  473. f->fmt.pix.pixelformat);
  474. return -EINVAL;
  475. }
  476. return vidioc_try_fmt(f);
  477. }
  478. static int vidioc_s_fmt(struct emmaprp_ctx *ctx, struct v4l2_format *f)
  479. {
  480. struct emmaprp_q_data *q_data;
  481. struct vb2_queue *vq;
  482. int ret;
  483. vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
  484. if (!vq)
  485. return -EINVAL;
  486. q_data = get_q_data(ctx, f->type);
  487. if (!q_data)
  488. return -EINVAL;
  489. if (vb2_is_busy(vq)) {
  490. v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
  491. return -EBUSY;
  492. }
  493. ret = vidioc_try_fmt(f);
  494. if (ret)
  495. return ret;
  496. q_data->fmt = find_format(f);
  497. q_data->width = f->fmt.pix.width;
  498. q_data->height = f->fmt.pix.height;
  499. if (q_data->fmt->fourcc == V4L2_PIX_FMT_YUV420)
  500. q_data->sizeimage = q_data->width * q_data->height * 3 / 2;
  501. else /* YUYV */
  502. q_data->sizeimage = q_data->width * q_data->height * 2;
  503. dprintk(ctx->dev,
  504. "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
  505. f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
  506. return 0;
  507. }
  508. static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
  509. struct v4l2_format *f)
  510. {
  511. int ret;
  512. ret = vidioc_try_fmt_vid_cap(file, priv, f);
  513. if (ret)
  514. return ret;
  515. return vidioc_s_fmt(priv, f);
  516. }
  517. static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
  518. struct v4l2_format *f)
  519. {
  520. int ret;
  521. ret = vidioc_try_fmt_vid_out(file, priv, f);
  522. if (ret)
  523. return ret;
  524. return vidioc_s_fmt(priv, f);
  525. }
  526. static int vidioc_reqbufs(struct file *file, void *priv,
  527. struct v4l2_requestbuffers *reqbufs)
  528. {
  529. struct emmaprp_ctx *ctx = priv;
  530. return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
  531. }
  532. static int vidioc_querybuf(struct file *file, void *priv,
  533. struct v4l2_buffer *buf)
  534. {
  535. struct emmaprp_ctx *ctx = priv;
  536. return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
  537. }
  538. static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
  539. {
  540. struct emmaprp_ctx *ctx = priv;
  541. return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
  542. }
  543. static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
  544. {
  545. struct emmaprp_ctx *ctx = priv;
  546. return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
  547. }
  548. static int vidioc_streamon(struct file *file, void *priv,
  549. enum v4l2_buf_type type)
  550. {
  551. struct emmaprp_ctx *ctx = priv;
  552. return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
  553. }
  554. static int vidioc_streamoff(struct file *file, void *priv,
  555. enum v4l2_buf_type type)
  556. {
  557. struct emmaprp_ctx *ctx = priv;
  558. return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
  559. }
  560. static const struct v4l2_ioctl_ops emmaprp_ioctl_ops = {
  561. .vidioc_querycap = vidioc_querycap,
  562. .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
  563. .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
  564. .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
  565. .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
  566. .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
  567. .vidioc_g_fmt_vid_out = vidioc_g_fmt_vid_out,
  568. .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
  569. .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out,
  570. .vidioc_reqbufs = vidioc_reqbufs,
  571. .vidioc_querybuf = vidioc_querybuf,
  572. .vidioc_qbuf = vidioc_qbuf,
  573. .vidioc_dqbuf = vidioc_dqbuf,
  574. .vidioc_streamon = vidioc_streamon,
  575. .vidioc_streamoff = vidioc_streamoff,
  576. };
  577. /*
  578. * Queue operations
  579. */
  580. static int emmaprp_queue_setup(struct vb2_queue *vq,
  581. const struct v4l2_format *fmt,
  582. unsigned int *nbuffers, unsigned int *nplanes,
  583. unsigned int sizes[], void *alloc_ctxs[])
  584. {
  585. struct emmaprp_ctx *ctx = vb2_get_drv_priv(vq);
  586. struct emmaprp_q_data *q_data;
  587. unsigned int size, count = *nbuffers;
  588. q_data = get_q_data(ctx, vq->type);
  589. if (q_data->fmt->fourcc == V4L2_PIX_FMT_YUV420)
  590. size = q_data->width * q_data->height * 3 / 2;
  591. else
  592. size = q_data->width * q_data->height * 2;
  593. while (size * count > MEM2MEM_VID_MEM_LIMIT)
  594. (count)--;
  595. *nplanes = 1;
  596. *nbuffers = count;
  597. sizes[0] = size;
  598. alloc_ctxs[0] = ctx->dev->alloc_ctx;
  599. dprintk(ctx->dev, "get %d buffer(s) of size %d each.\n", count, size);
  600. return 0;
  601. }
  602. static int emmaprp_buf_prepare(struct vb2_buffer *vb)
  603. {
  604. struct emmaprp_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  605. struct emmaprp_q_data *q_data;
  606. dprintk(ctx->dev, "type: %d\n", vb->vb2_queue->type);
  607. q_data = get_q_data(ctx, vb->vb2_queue->type);
  608. if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
  609. dprintk(ctx->dev, "%s data will not fit into plane"
  610. "(%lu < %lu)\n", __func__,
  611. vb2_plane_size(vb, 0),
  612. (long)q_data->sizeimage);
  613. return -EINVAL;
  614. }
  615. vb2_set_plane_payload(vb, 0, q_data->sizeimage);
  616. return 0;
  617. }
  618. static void emmaprp_buf_queue(struct vb2_buffer *vb)
  619. {
  620. struct emmaprp_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  621. v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
  622. }
  623. static struct vb2_ops emmaprp_qops = {
  624. .queue_setup = emmaprp_queue_setup,
  625. .buf_prepare = emmaprp_buf_prepare,
  626. .buf_queue = emmaprp_buf_queue,
  627. };
  628. static int queue_init(void *priv, struct vb2_queue *src_vq,
  629. struct vb2_queue *dst_vq)
  630. {
  631. struct emmaprp_ctx *ctx = priv;
  632. int ret;
  633. src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
  634. src_vq->io_modes = VB2_MMAP | VB2_USERPTR;
  635. src_vq->drv_priv = ctx;
  636. src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  637. src_vq->ops = &emmaprp_qops;
  638. src_vq->mem_ops = &vb2_dma_contig_memops;
  639. src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  640. ret = vb2_queue_init(src_vq);
  641. if (ret)
  642. return ret;
  643. dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  644. dst_vq->io_modes = VB2_MMAP | VB2_USERPTR;
  645. dst_vq->drv_priv = ctx;
  646. dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  647. dst_vq->ops = &emmaprp_qops;
  648. dst_vq->mem_ops = &vb2_dma_contig_memops;
  649. dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  650. return vb2_queue_init(dst_vq);
  651. }
  652. /*
  653. * File operations
  654. */
  655. static int emmaprp_open(struct file *file)
  656. {
  657. struct emmaprp_dev *pcdev = video_drvdata(file);
  658. struct emmaprp_ctx *ctx;
  659. ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
  660. if (!ctx)
  661. return -ENOMEM;
  662. file->private_data = ctx;
  663. ctx->dev = pcdev;
  664. if (mutex_lock_interruptible(&pcdev->dev_mutex)) {
  665. kfree(ctx);
  666. return -ERESTARTSYS;
  667. }
  668. ctx->m2m_ctx = v4l2_m2m_ctx_init(pcdev->m2m_dev, ctx, &queue_init);
  669. if (IS_ERR(ctx->m2m_ctx)) {
  670. int ret = PTR_ERR(ctx->m2m_ctx);
  671. mutex_unlock(&pcdev->dev_mutex);
  672. kfree(ctx);
  673. return ret;
  674. }
  675. clk_prepare_enable(pcdev->clk_emma_ipg);
  676. clk_prepare_enable(pcdev->clk_emma_ahb);
  677. ctx->q_data[V4L2_M2M_SRC].fmt = &formats[1];
  678. ctx->q_data[V4L2_M2M_DST].fmt = &formats[0];
  679. mutex_unlock(&pcdev->dev_mutex);
  680. dprintk(pcdev, "Created instance %p, m2m_ctx: %p\n", ctx, ctx->m2m_ctx);
  681. return 0;
  682. }
  683. static int emmaprp_release(struct file *file)
  684. {
  685. struct emmaprp_dev *pcdev = video_drvdata(file);
  686. struct emmaprp_ctx *ctx = file->private_data;
  687. dprintk(pcdev, "Releasing instance %p\n", ctx);
  688. mutex_lock(&pcdev->dev_mutex);
  689. clk_disable_unprepare(pcdev->clk_emma_ahb);
  690. clk_disable_unprepare(pcdev->clk_emma_ipg);
  691. v4l2_m2m_ctx_release(ctx->m2m_ctx);
  692. mutex_unlock(&pcdev->dev_mutex);
  693. kfree(ctx);
  694. return 0;
  695. }
  696. static unsigned int emmaprp_poll(struct file *file,
  697. struct poll_table_struct *wait)
  698. {
  699. struct emmaprp_dev *pcdev = video_drvdata(file);
  700. struct emmaprp_ctx *ctx = file->private_data;
  701. unsigned int res;
  702. mutex_lock(&pcdev->dev_mutex);
  703. res = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
  704. mutex_unlock(&pcdev->dev_mutex);
  705. return res;
  706. }
  707. static int emmaprp_mmap(struct file *file, struct vm_area_struct *vma)
  708. {
  709. struct emmaprp_dev *pcdev = video_drvdata(file);
  710. struct emmaprp_ctx *ctx = file->private_data;
  711. int ret;
  712. if (mutex_lock_interruptible(&pcdev->dev_mutex))
  713. return -ERESTARTSYS;
  714. ret = v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
  715. mutex_unlock(&pcdev->dev_mutex);
  716. return ret;
  717. }
  718. static const struct v4l2_file_operations emmaprp_fops = {
  719. .owner = THIS_MODULE,
  720. .open = emmaprp_open,
  721. .release = emmaprp_release,
  722. .poll = emmaprp_poll,
  723. .unlocked_ioctl = video_ioctl2,
  724. .mmap = emmaprp_mmap,
  725. };
  726. static struct video_device emmaprp_videodev = {
  727. .name = MEM2MEM_NAME,
  728. .fops = &emmaprp_fops,
  729. .ioctl_ops = &emmaprp_ioctl_ops,
  730. .minor = -1,
  731. .release = video_device_release,
  732. .vfl_dir = VFL_DIR_M2M,
  733. };
  734. static struct v4l2_m2m_ops m2m_ops = {
  735. .device_run = emmaprp_device_run,
  736. .job_abort = emmaprp_job_abort,
  737. .lock = emmaprp_lock,
  738. .unlock = emmaprp_unlock,
  739. };
  740. static int emmaprp_probe(struct platform_device *pdev)
  741. {
  742. struct emmaprp_dev *pcdev;
  743. struct video_device *vfd;
  744. struct resource *res;
  745. int irq, ret;
  746. pcdev = devm_kzalloc(&pdev->dev, sizeof(*pcdev), GFP_KERNEL);
  747. if (!pcdev)
  748. return -ENOMEM;
  749. spin_lock_init(&pcdev->irqlock);
  750. pcdev->clk_emma_ipg = devm_clk_get(&pdev->dev, "ipg");
  751. if (IS_ERR(pcdev->clk_emma_ipg)) {
  752. return PTR_ERR(pcdev->clk_emma_ipg);
  753. }
  754. pcdev->clk_emma_ahb = devm_clk_get(&pdev->dev, "ahb");
  755. if (IS_ERR(pcdev->clk_emma_ahb))
  756. return PTR_ERR(pcdev->clk_emma_ahb);
  757. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  758. pcdev->base_emma = devm_ioremap_resource(&pdev->dev, res);
  759. if (IS_ERR(pcdev->base_emma))
  760. return PTR_ERR(pcdev->base_emma);
  761. ret = v4l2_device_register(&pdev->dev, &pcdev->v4l2_dev);
  762. if (ret)
  763. return ret;
  764. mutex_init(&pcdev->dev_mutex);
  765. vfd = video_device_alloc();
  766. if (!vfd) {
  767. v4l2_err(&pcdev->v4l2_dev, "Failed to allocate video device\n");
  768. ret = -ENOMEM;
  769. goto unreg_dev;
  770. }
  771. *vfd = emmaprp_videodev;
  772. vfd->lock = &pcdev->dev_mutex;
  773. vfd->v4l2_dev = &pcdev->v4l2_dev;
  774. video_set_drvdata(vfd, pcdev);
  775. snprintf(vfd->name, sizeof(vfd->name), "%s", emmaprp_videodev.name);
  776. pcdev->vfd = vfd;
  777. v4l2_info(&pcdev->v4l2_dev, EMMAPRP_MODULE_NAME
  778. " Device registered as /dev/video%d\n", vfd->num);
  779. platform_set_drvdata(pdev, pcdev);
  780. irq = platform_get_irq(pdev, 0);
  781. ret = devm_request_irq(&pdev->dev, irq, emmaprp_irq, 0,
  782. dev_name(&pdev->dev), pcdev);
  783. if (ret)
  784. goto rel_vdev;
  785. pcdev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
  786. if (IS_ERR(pcdev->alloc_ctx)) {
  787. v4l2_err(&pcdev->v4l2_dev, "Failed to alloc vb2 context\n");
  788. ret = PTR_ERR(pcdev->alloc_ctx);
  789. goto rel_vdev;
  790. }
  791. pcdev->m2m_dev = v4l2_m2m_init(&m2m_ops);
  792. if (IS_ERR(pcdev->m2m_dev)) {
  793. v4l2_err(&pcdev->v4l2_dev, "Failed to init mem2mem device\n");
  794. ret = PTR_ERR(pcdev->m2m_dev);
  795. goto rel_ctx;
  796. }
  797. ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0);
  798. if (ret) {
  799. v4l2_err(&pcdev->v4l2_dev, "Failed to register video device\n");
  800. goto rel_m2m;
  801. }
  802. return 0;
  803. rel_m2m:
  804. v4l2_m2m_release(pcdev->m2m_dev);
  805. rel_ctx:
  806. vb2_dma_contig_cleanup_ctx(pcdev->alloc_ctx);
  807. rel_vdev:
  808. video_device_release(vfd);
  809. unreg_dev:
  810. v4l2_device_unregister(&pcdev->v4l2_dev);
  811. mutex_destroy(&pcdev->dev_mutex);
  812. return ret;
  813. }
  814. static int emmaprp_remove(struct platform_device *pdev)
  815. {
  816. struct emmaprp_dev *pcdev = platform_get_drvdata(pdev);
  817. v4l2_info(&pcdev->v4l2_dev, "Removing " EMMAPRP_MODULE_NAME);
  818. video_unregister_device(pcdev->vfd);
  819. v4l2_m2m_release(pcdev->m2m_dev);
  820. vb2_dma_contig_cleanup_ctx(pcdev->alloc_ctx);
  821. v4l2_device_unregister(&pcdev->v4l2_dev);
  822. mutex_destroy(&pcdev->dev_mutex);
  823. return 0;
  824. }
  825. static struct platform_driver emmaprp_pdrv = {
  826. .probe = emmaprp_probe,
  827. .remove = emmaprp_remove,
  828. .driver = {
  829. .name = MEM2MEM_NAME,
  830. .owner = THIS_MODULE,
  831. },
  832. };
  833. module_platform_driver(emmaprp_pdrv);