cxd2820r_core.c 18 KB

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  1. /*
  2. * Sony CXD2820R demodulator driver
  3. *
  4. * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. */
  20. #include "cxd2820r_priv.h"
  21. /* Max transfer size done by I2C transfer functions */
  22. #define MAX_XFER_SIZE 64
  23. /* write multiple registers */
  24. static int cxd2820r_wr_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
  25. u8 *val, int len)
  26. {
  27. int ret;
  28. u8 buf[MAX_XFER_SIZE];
  29. struct i2c_msg msg[1] = {
  30. {
  31. .addr = i2c,
  32. .flags = 0,
  33. .len = len + 1,
  34. .buf = buf,
  35. }
  36. };
  37. if (1 + len > sizeof(buf)) {
  38. dev_warn(&priv->i2c->dev,
  39. "%s: i2c wr reg=%04x: len=%d is too big!\n",
  40. KBUILD_MODNAME, reg, len);
  41. return -EINVAL;
  42. }
  43. buf[0] = reg;
  44. memcpy(&buf[1], val, len);
  45. ret = i2c_transfer(priv->i2c, msg, 1);
  46. if (ret == 1) {
  47. ret = 0;
  48. } else {
  49. dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
  50. "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  51. ret = -EREMOTEIO;
  52. }
  53. return ret;
  54. }
  55. /* read multiple registers */
  56. static int cxd2820r_rd_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
  57. u8 *val, int len)
  58. {
  59. int ret;
  60. u8 buf[MAX_XFER_SIZE];
  61. struct i2c_msg msg[2] = {
  62. {
  63. .addr = i2c,
  64. .flags = 0,
  65. .len = 1,
  66. .buf = &reg,
  67. }, {
  68. .addr = i2c,
  69. .flags = I2C_M_RD,
  70. .len = len,
  71. .buf = buf,
  72. }
  73. };
  74. if (len > sizeof(buf)) {
  75. dev_warn(&priv->i2c->dev,
  76. "%s: i2c wr reg=%04x: len=%d is too big!\n",
  77. KBUILD_MODNAME, reg, len);
  78. return -EINVAL;
  79. }
  80. ret = i2c_transfer(priv->i2c, msg, 2);
  81. if (ret == 2) {
  82. memcpy(val, buf, len);
  83. ret = 0;
  84. } else {
  85. dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
  86. "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  87. ret = -EREMOTEIO;
  88. }
  89. return ret;
  90. }
  91. /* write multiple registers */
  92. int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
  93. int len)
  94. {
  95. int ret;
  96. u8 i2c_addr;
  97. u8 reg = (reginfo >> 0) & 0xff;
  98. u8 bank = (reginfo >> 8) & 0xff;
  99. u8 i2c = (reginfo >> 16) & 0x01;
  100. /* select I2C */
  101. if (i2c)
  102. i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
  103. else
  104. i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
  105. /* switch bank if needed */
  106. if (bank != priv->bank[i2c]) {
  107. ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
  108. if (ret)
  109. return ret;
  110. priv->bank[i2c] = bank;
  111. }
  112. return cxd2820r_wr_regs_i2c(priv, i2c_addr, reg, val, len);
  113. }
  114. /* read multiple registers */
  115. int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
  116. int len)
  117. {
  118. int ret;
  119. u8 i2c_addr;
  120. u8 reg = (reginfo >> 0) & 0xff;
  121. u8 bank = (reginfo >> 8) & 0xff;
  122. u8 i2c = (reginfo >> 16) & 0x01;
  123. /* select I2C */
  124. if (i2c)
  125. i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
  126. else
  127. i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
  128. /* switch bank if needed */
  129. if (bank != priv->bank[i2c]) {
  130. ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
  131. if (ret)
  132. return ret;
  133. priv->bank[i2c] = bank;
  134. }
  135. return cxd2820r_rd_regs_i2c(priv, i2c_addr, reg, val, len);
  136. }
  137. /* write single register */
  138. int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val)
  139. {
  140. return cxd2820r_wr_regs(priv, reg, &val, 1);
  141. }
  142. /* read single register */
  143. int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val)
  144. {
  145. return cxd2820r_rd_regs(priv, reg, val, 1);
  146. }
  147. /* write single register with mask */
  148. int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
  149. u8 mask)
  150. {
  151. int ret;
  152. u8 tmp;
  153. /* no need for read if whole reg is written */
  154. if (mask != 0xff) {
  155. ret = cxd2820r_rd_reg(priv, reg, &tmp);
  156. if (ret)
  157. return ret;
  158. val &= mask;
  159. tmp &= ~mask;
  160. val |= tmp;
  161. }
  162. return cxd2820r_wr_reg(priv, reg, val);
  163. }
  164. int cxd2820r_gpio(struct dvb_frontend *fe, u8 *gpio)
  165. {
  166. struct cxd2820r_priv *priv = fe->demodulator_priv;
  167. int ret, i;
  168. u8 tmp0, tmp1;
  169. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  170. fe->dtv_property_cache.delivery_system);
  171. /* update GPIOs only when needed */
  172. if (!memcmp(gpio, priv->gpio, sizeof(priv->gpio)))
  173. return 0;
  174. tmp0 = 0x00;
  175. tmp1 = 0x00;
  176. for (i = 0; i < sizeof(priv->gpio); i++) {
  177. /* enable / disable */
  178. if (gpio[i] & CXD2820R_GPIO_E)
  179. tmp0 |= (2 << 6) >> (2 * i);
  180. else
  181. tmp0 |= (1 << 6) >> (2 * i);
  182. /* input / output */
  183. if (gpio[i] & CXD2820R_GPIO_I)
  184. tmp1 |= (1 << (3 + i));
  185. else
  186. tmp1 |= (0 << (3 + i));
  187. /* high / low */
  188. if (gpio[i] & CXD2820R_GPIO_H)
  189. tmp1 |= (1 << (0 + i));
  190. else
  191. tmp1 |= (0 << (0 + i));
  192. dev_dbg(&priv->i2c->dev, "%s: gpio i=%d %02x %02x\n", __func__,
  193. i, tmp0, tmp1);
  194. }
  195. dev_dbg(&priv->i2c->dev, "%s: wr gpio=%02x %02x\n", __func__, tmp0,
  196. tmp1);
  197. /* write bits [7:2] */
  198. ret = cxd2820r_wr_reg_mask(priv, 0x00089, tmp0, 0xfc);
  199. if (ret)
  200. goto error;
  201. /* write bits [5:0] */
  202. ret = cxd2820r_wr_reg_mask(priv, 0x0008e, tmp1, 0x3f);
  203. if (ret)
  204. goto error;
  205. memcpy(priv->gpio, gpio, sizeof(priv->gpio));
  206. return ret;
  207. error:
  208. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  209. return ret;
  210. }
  211. /* 64 bit div with round closest, like DIV_ROUND_CLOSEST but 64 bit */
  212. u32 cxd2820r_div_u64_round_closest(u64 dividend, u32 divisor)
  213. {
  214. return div_u64(dividend + (divisor / 2), divisor);
  215. }
  216. static int cxd2820r_set_frontend(struct dvb_frontend *fe)
  217. {
  218. struct cxd2820r_priv *priv = fe->demodulator_priv;
  219. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  220. int ret;
  221. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  222. fe->dtv_property_cache.delivery_system);
  223. switch (c->delivery_system) {
  224. case SYS_DVBT:
  225. ret = cxd2820r_init_t(fe);
  226. if (ret < 0)
  227. goto err;
  228. ret = cxd2820r_set_frontend_t(fe);
  229. if (ret < 0)
  230. goto err;
  231. break;
  232. case SYS_DVBT2:
  233. ret = cxd2820r_init_t(fe);
  234. if (ret < 0)
  235. goto err;
  236. ret = cxd2820r_set_frontend_t2(fe);
  237. if (ret < 0)
  238. goto err;
  239. break;
  240. case SYS_DVBC_ANNEX_A:
  241. ret = cxd2820r_init_c(fe);
  242. if (ret < 0)
  243. goto err;
  244. ret = cxd2820r_set_frontend_c(fe);
  245. if (ret < 0)
  246. goto err;
  247. break;
  248. default:
  249. dev_dbg(&priv->i2c->dev, "%s: error state=%d\n", __func__,
  250. fe->dtv_property_cache.delivery_system);
  251. ret = -EINVAL;
  252. break;
  253. }
  254. err:
  255. return ret;
  256. }
  257. static int cxd2820r_read_status(struct dvb_frontend *fe, fe_status_t *status)
  258. {
  259. struct cxd2820r_priv *priv = fe->demodulator_priv;
  260. int ret;
  261. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  262. fe->dtv_property_cache.delivery_system);
  263. switch (fe->dtv_property_cache.delivery_system) {
  264. case SYS_DVBT:
  265. ret = cxd2820r_read_status_t(fe, status);
  266. break;
  267. case SYS_DVBT2:
  268. ret = cxd2820r_read_status_t2(fe, status);
  269. break;
  270. case SYS_DVBC_ANNEX_A:
  271. ret = cxd2820r_read_status_c(fe, status);
  272. break;
  273. default:
  274. ret = -EINVAL;
  275. break;
  276. }
  277. return ret;
  278. }
  279. static int cxd2820r_get_frontend(struct dvb_frontend *fe)
  280. {
  281. struct cxd2820r_priv *priv = fe->demodulator_priv;
  282. int ret;
  283. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  284. fe->dtv_property_cache.delivery_system);
  285. if (priv->delivery_system == SYS_UNDEFINED)
  286. return 0;
  287. switch (fe->dtv_property_cache.delivery_system) {
  288. case SYS_DVBT:
  289. ret = cxd2820r_get_frontend_t(fe);
  290. break;
  291. case SYS_DVBT2:
  292. ret = cxd2820r_get_frontend_t2(fe);
  293. break;
  294. case SYS_DVBC_ANNEX_A:
  295. ret = cxd2820r_get_frontend_c(fe);
  296. break;
  297. default:
  298. ret = -EINVAL;
  299. break;
  300. }
  301. return ret;
  302. }
  303. static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
  304. {
  305. struct cxd2820r_priv *priv = fe->demodulator_priv;
  306. int ret;
  307. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  308. fe->dtv_property_cache.delivery_system);
  309. switch (fe->dtv_property_cache.delivery_system) {
  310. case SYS_DVBT:
  311. ret = cxd2820r_read_ber_t(fe, ber);
  312. break;
  313. case SYS_DVBT2:
  314. ret = cxd2820r_read_ber_t2(fe, ber);
  315. break;
  316. case SYS_DVBC_ANNEX_A:
  317. ret = cxd2820r_read_ber_c(fe, ber);
  318. break;
  319. default:
  320. ret = -EINVAL;
  321. break;
  322. }
  323. return ret;
  324. }
  325. static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
  326. {
  327. struct cxd2820r_priv *priv = fe->demodulator_priv;
  328. int ret;
  329. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  330. fe->dtv_property_cache.delivery_system);
  331. switch (fe->dtv_property_cache.delivery_system) {
  332. case SYS_DVBT:
  333. ret = cxd2820r_read_signal_strength_t(fe, strength);
  334. break;
  335. case SYS_DVBT2:
  336. ret = cxd2820r_read_signal_strength_t2(fe, strength);
  337. break;
  338. case SYS_DVBC_ANNEX_A:
  339. ret = cxd2820r_read_signal_strength_c(fe, strength);
  340. break;
  341. default:
  342. ret = -EINVAL;
  343. break;
  344. }
  345. return ret;
  346. }
  347. static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
  348. {
  349. struct cxd2820r_priv *priv = fe->demodulator_priv;
  350. int ret;
  351. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  352. fe->dtv_property_cache.delivery_system);
  353. switch (fe->dtv_property_cache.delivery_system) {
  354. case SYS_DVBT:
  355. ret = cxd2820r_read_snr_t(fe, snr);
  356. break;
  357. case SYS_DVBT2:
  358. ret = cxd2820r_read_snr_t2(fe, snr);
  359. break;
  360. case SYS_DVBC_ANNEX_A:
  361. ret = cxd2820r_read_snr_c(fe, snr);
  362. break;
  363. default:
  364. ret = -EINVAL;
  365. break;
  366. }
  367. return ret;
  368. }
  369. static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  370. {
  371. struct cxd2820r_priv *priv = fe->demodulator_priv;
  372. int ret;
  373. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  374. fe->dtv_property_cache.delivery_system);
  375. switch (fe->dtv_property_cache.delivery_system) {
  376. case SYS_DVBT:
  377. ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
  378. break;
  379. case SYS_DVBT2:
  380. ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
  381. break;
  382. case SYS_DVBC_ANNEX_A:
  383. ret = cxd2820r_read_ucblocks_c(fe, ucblocks);
  384. break;
  385. default:
  386. ret = -EINVAL;
  387. break;
  388. }
  389. return ret;
  390. }
  391. static int cxd2820r_init(struct dvb_frontend *fe)
  392. {
  393. return 0;
  394. }
  395. static int cxd2820r_sleep(struct dvb_frontend *fe)
  396. {
  397. struct cxd2820r_priv *priv = fe->demodulator_priv;
  398. int ret;
  399. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  400. fe->dtv_property_cache.delivery_system);
  401. switch (fe->dtv_property_cache.delivery_system) {
  402. case SYS_DVBT:
  403. ret = cxd2820r_sleep_t(fe);
  404. break;
  405. case SYS_DVBT2:
  406. ret = cxd2820r_sleep_t2(fe);
  407. break;
  408. case SYS_DVBC_ANNEX_A:
  409. ret = cxd2820r_sleep_c(fe);
  410. break;
  411. default:
  412. ret = -EINVAL;
  413. break;
  414. }
  415. return ret;
  416. }
  417. static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
  418. struct dvb_frontend_tune_settings *s)
  419. {
  420. struct cxd2820r_priv *priv = fe->demodulator_priv;
  421. int ret;
  422. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  423. fe->dtv_property_cache.delivery_system);
  424. switch (fe->dtv_property_cache.delivery_system) {
  425. case SYS_DVBT:
  426. ret = cxd2820r_get_tune_settings_t(fe, s);
  427. break;
  428. case SYS_DVBT2:
  429. ret = cxd2820r_get_tune_settings_t2(fe, s);
  430. break;
  431. case SYS_DVBC_ANNEX_A:
  432. ret = cxd2820r_get_tune_settings_c(fe, s);
  433. break;
  434. default:
  435. ret = -EINVAL;
  436. break;
  437. }
  438. return ret;
  439. }
  440. static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe)
  441. {
  442. struct cxd2820r_priv *priv = fe->demodulator_priv;
  443. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  444. int ret, i;
  445. fe_status_t status = 0;
  446. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  447. fe->dtv_property_cache.delivery_system);
  448. /* switch between DVB-T and DVB-T2 when tune fails */
  449. if (priv->last_tune_failed) {
  450. if (priv->delivery_system == SYS_DVBT) {
  451. ret = cxd2820r_sleep_t(fe);
  452. if (ret)
  453. goto error;
  454. c->delivery_system = SYS_DVBT2;
  455. } else if (priv->delivery_system == SYS_DVBT2) {
  456. ret = cxd2820r_sleep_t2(fe);
  457. if (ret)
  458. goto error;
  459. c->delivery_system = SYS_DVBT;
  460. }
  461. }
  462. /* set frontend */
  463. ret = cxd2820r_set_frontend(fe);
  464. if (ret)
  465. goto error;
  466. /* frontend lock wait loop count */
  467. switch (priv->delivery_system) {
  468. case SYS_DVBT:
  469. case SYS_DVBC_ANNEX_A:
  470. i = 20;
  471. break;
  472. case SYS_DVBT2:
  473. i = 40;
  474. break;
  475. case SYS_UNDEFINED:
  476. default:
  477. i = 0;
  478. break;
  479. }
  480. /* wait frontend lock */
  481. for (; i > 0; i--) {
  482. dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i);
  483. msleep(50);
  484. ret = cxd2820r_read_status(fe, &status);
  485. if (ret)
  486. goto error;
  487. if (status & FE_HAS_LOCK)
  488. break;
  489. }
  490. /* check if we have a valid signal */
  491. if (status & FE_HAS_LOCK) {
  492. priv->last_tune_failed = 0;
  493. return DVBFE_ALGO_SEARCH_SUCCESS;
  494. } else {
  495. priv->last_tune_failed = 1;
  496. return DVBFE_ALGO_SEARCH_AGAIN;
  497. }
  498. error:
  499. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  500. return DVBFE_ALGO_SEARCH_ERROR;
  501. }
  502. static int cxd2820r_get_frontend_algo(struct dvb_frontend *fe)
  503. {
  504. return DVBFE_ALGO_CUSTOM;
  505. }
  506. static void cxd2820r_release(struct dvb_frontend *fe)
  507. {
  508. struct cxd2820r_priv *priv = fe->demodulator_priv;
  509. int uninitialized_var(ret); /* silence compiler warning */
  510. dev_dbg(&priv->i2c->dev, "%s\n", __func__);
  511. #ifdef CONFIG_GPIOLIB
  512. /* remove GPIOs */
  513. if (priv->gpio_chip.label) {
  514. ret = gpiochip_remove(&priv->gpio_chip);
  515. if (ret)
  516. dev_err(&priv->i2c->dev, "%s: gpiochip_remove() " \
  517. "failed=%d\n", KBUILD_MODNAME, ret);
  518. }
  519. #endif
  520. kfree(priv);
  521. return;
  522. }
  523. static int cxd2820r_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
  524. {
  525. struct cxd2820r_priv *priv = fe->demodulator_priv;
  526. dev_dbg(&priv->i2c->dev, "%s: %d\n", __func__, enable);
  527. /* Bit 0 of reg 0xdb in bank 0x00 controls I2C repeater */
  528. return cxd2820r_wr_reg_mask(priv, 0xdb, enable ? 1 : 0, 0x1);
  529. }
  530. #ifdef CONFIG_GPIOLIB
  531. static int cxd2820r_gpio_direction_output(struct gpio_chip *chip, unsigned nr,
  532. int val)
  533. {
  534. struct cxd2820r_priv *priv =
  535. container_of(chip, struct cxd2820r_priv, gpio_chip);
  536. u8 gpio[GPIO_COUNT];
  537. dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
  538. memcpy(gpio, priv->gpio, sizeof(gpio));
  539. gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
  540. return cxd2820r_gpio(&priv->fe, gpio);
  541. }
  542. static void cxd2820r_gpio_set(struct gpio_chip *chip, unsigned nr, int val)
  543. {
  544. struct cxd2820r_priv *priv =
  545. container_of(chip, struct cxd2820r_priv, gpio_chip);
  546. u8 gpio[GPIO_COUNT];
  547. dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
  548. memcpy(gpio, priv->gpio, sizeof(gpio));
  549. gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
  550. (void) cxd2820r_gpio(&priv->fe, gpio);
  551. return;
  552. }
  553. static int cxd2820r_gpio_get(struct gpio_chip *chip, unsigned nr)
  554. {
  555. struct cxd2820r_priv *priv =
  556. container_of(chip, struct cxd2820r_priv, gpio_chip);
  557. dev_dbg(&priv->i2c->dev, "%s: nr=%d\n", __func__, nr);
  558. return (priv->gpio[nr] >> 2) & 0x01;
  559. }
  560. #endif
  561. static const struct dvb_frontend_ops cxd2820r_ops = {
  562. .delsys = { SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A },
  563. /* default: DVB-T/T2 */
  564. .info = {
  565. .name = "Sony CXD2820R",
  566. .caps = FE_CAN_FEC_1_2 |
  567. FE_CAN_FEC_2_3 |
  568. FE_CAN_FEC_3_4 |
  569. FE_CAN_FEC_5_6 |
  570. FE_CAN_FEC_7_8 |
  571. FE_CAN_FEC_AUTO |
  572. FE_CAN_QPSK |
  573. FE_CAN_QAM_16 |
  574. FE_CAN_QAM_32 |
  575. FE_CAN_QAM_64 |
  576. FE_CAN_QAM_128 |
  577. FE_CAN_QAM_256 |
  578. FE_CAN_QAM_AUTO |
  579. FE_CAN_TRANSMISSION_MODE_AUTO |
  580. FE_CAN_GUARD_INTERVAL_AUTO |
  581. FE_CAN_HIERARCHY_AUTO |
  582. FE_CAN_MUTE_TS |
  583. FE_CAN_2G_MODULATION |
  584. FE_CAN_MULTISTREAM
  585. },
  586. .release = cxd2820r_release,
  587. .init = cxd2820r_init,
  588. .sleep = cxd2820r_sleep,
  589. .get_tune_settings = cxd2820r_get_tune_settings,
  590. .i2c_gate_ctrl = cxd2820r_i2c_gate_ctrl,
  591. .get_frontend = cxd2820r_get_frontend,
  592. .get_frontend_algo = cxd2820r_get_frontend_algo,
  593. .search = cxd2820r_search,
  594. .read_status = cxd2820r_read_status,
  595. .read_snr = cxd2820r_read_snr,
  596. .read_ber = cxd2820r_read_ber,
  597. .read_ucblocks = cxd2820r_read_ucblocks,
  598. .read_signal_strength = cxd2820r_read_signal_strength,
  599. };
  600. struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
  601. struct i2c_adapter *i2c, int *gpio_chip_base
  602. )
  603. {
  604. struct cxd2820r_priv *priv;
  605. int ret;
  606. u8 tmp;
  607. priv = kzalloc(sizeof(struct cxd2820r_priv), GFP_KERNEL);
  608. if (!priv) {
  609. ret = -ENOMEM;
  610. dev_err(&i2c->dev, "%s: kzalloc() failed\n",
  611. KBUILD_MODNAME);
  612. goto error;
  613. }
  614. priv->i2c = i2c;
  615. memcpy(&priv->cfg, cfg, sizeof(struct cxd2820r_config));
  616. memcpy(&priv->fe.ops, &cxd2820r_ops, sizeof(struct dvb_frontend_ops));
  617. priv->fe.demodulator_priv = priv;
  618. priv->bank[0] = priv->bank[1] = 0xff;
  619. ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp);
  620. dev_dbg(&priv->i2c->dev, "%s: chip id=%02x\n", __func__, tmp);
  621. if (ret || tmp != 0xe1)
  622. goto error;
  623. if (gpio_chip_base) {
  624. #ifdef CONFIG_GPIOLIB
  625. /* add GPIOs */
  626. priv->gpio_chip.label = KBUILD_MODNAME;
  627. priv->gpio_chip.dev = &priv->i2c->dev;
  628. priv->gpio_chip.owner = THIS_MODULE;
  629. priv->gpio_chip.direction_output =
  630. cxd2820r_gpio_direction_output;
  631. priv->gpio_chip.set = cxd2820r_gpio_set;
  632. priv->gpio_chip.get = cxd2820r_gpio_get;
  633. priv->gpio_chip.base = -1; /* dynamic allocation */
  634. priv->gpio_chip.ngpio = GPIO_COUNT;
  635. priv->gpio_chip.can_sleep = 1;
  636. ret = gpiochip_add(&priv->gpio_chip);
  637. if (ret)
  638. goto error;
  639. dev_dbg(&priv->i2c->dev, "%s: gpio_chip.base=%d\n", __func__,
  640. priv->gpio_chip.base);
  641. *gpio_chip_base = priv->gpio_chip.base;
  642. #else
  643. /*
  644. * Use static GPIO configuration if GPIOLIB is undefined.
  645. * This is fallback condition.
  646. */
  647. u8 gpio[GPIO_COUNT];
  648. gpio[0] = (*gpio_chip_base >> 0) & 0x07;
  649. gpio[1] = (*gpio_chip_base >> 3) & 0x07;
  650. gpio[2] = 0;
  651. ret = cxd2820r_gpio(&priv->fe, gpio);
  652. if (ret)
  653. goto error;
  654. #endif
  655. }
  656. return &priv->fe;
  657. error:
  658. dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
  659. kfree(priv);
  660. return NULL;
  661. }
  662. EXPORT_SYMBOL(cxd2820r_attach);
  663. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  664. MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
  665. MODULE_LICENSE("GPL");