mlx4_ib.h 22 KB

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  1. /*
  2. * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #ifndef MLX4_IB_H
  34. #define MLX4_IB_H
  35. #include <linux/compiler.h>
  36. #include <linux/list.h>
  37. #include <linux/mutex.h>
  38. #include <linux/idr.h>
  39. #include <rdma/ib_verbs.h>
  40. #include <rdma/ib_umem.h>
  41. #include <rdma/ib_mad.h>
  42. #include <rdma/ib_sa.h>
  43. #include <linux/mlx4/device.h>
  44. #include <linux/mlx4/doorbell.h>
  45. #define MLX4_IB_DRV_NAME "mlx4_ib"
  46. #ifdef pr_fmt
  47. #undef pr_fmt
  48. #endif
  49. #define pr_fmt(fmt) "<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__
  50. #define mlx4_ib_warn(ibdev, format, arg...) \
  51. dev_warn((ibdev)->dma_device, MLX4_IB_DRV_NAME ": " format, ## arg)
  52. enum {
  53. MLX4_IB_SQ_MIN_WQE_SHIFT = 6,
  54. MLX4_IB_MAX_HEADROOM = 2048
  55. };
  56. #define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)
  57. #define MLX4_IB_SQ_MAX_SPARE (MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))
  58. /*module param to indicate if SM assigns the alias_GUID*/
  59. extern int mlx4_ib_sm_guid_assign;
  60. #define MLX4_IB_UC_STEER_QPN_ALIGN 1
  61. #define MLX4_IB_UC_MAX_NUM_QPS 256
  62. struct mlx4_ib_ucontext {
  63. struct ib_ucontext ibucontext;
  64. struct mlx4_uar uar;
  65. struct list_head db_page_list;
  66. struct mutex db_page_mutex;
  67. };
  68. struct mlx4_ib_pd {
  69. struct ib_pd ibpd;
  70. u32 pdn;
  71. };
  72. struct mlx4_ib_xrcd {
  73. struct ib_xrcd ibxrcd;
  74. u32 xrcdn;
  75. struct ib_pd *pd;
  76. struct ib_cq *cq;
  77. };
  78. struct mlx4_ib_cq_buf {
  79. struct mlx4_buf buf;
  80. struct mlx4_mtt mtt;
  81. int entry_size;
  82. };
  83. struct mlx4_ib_cq_resize {
  84. struct mlx4_ib_cq_buf buf;
  85. int cqe;
  86. };
  87. struct mlx4_ib_cq {
  88. struct ib_cq ibcq;
  89. struct mlx4_cq mcq;
  90. struct mlx4_ib_cq_buf buf;
  91. struct mlx4_ib_cq_resize *resize_buf;
  92. struct mlx4_db db;
  93. spinlock_t lock;
  94. struct mutex resize_mutex;
  95. struct ib_umem *umem;
  96. struct ib_umem *resize_umem;
  97. };
  98. struct mlx4_ib_mr {
  99. struct ib_mr ibmr;
  100. struct mlx4_mr mmr;
  101. struct ib_umem *umem;
  102. };
  103. struct mlx4_ib_mw {
  104. struct ib_mw ibmw;
  105. struct mlx4_mw mmw;
  106. };
  107. struct mlx4_ib_fast_reg_page_list {
  108. struct ib_fast_reg_page_list ibfrpl;
  109. __be64 *mapped_page_list;
  110. dma_addr_t map;
  111. };
  112. struct mlx4_ib_fmr {
  113. struct ib_fmr ibfmr;
  114. struct mlx4_fmr mfmr;
  115. };
  116. struct mlx4_ib_flow {
  117. struct ib_flow ibflow;
  118. /* translating DMFS verbs sniffer rule to FW API requires two reg IDs */
  119. u64 reg_id[2];
  120. };
  121. struct mlx4_ib_wq {
  122. u64 *wrid;
  123. spinlock_t lock;
  124. int wqe_cnt;
  125. int max_post;
  126. int max_gs;
  127. int offset;
  128. int wqe_shift;
  129. unsigned head;
  130. unsigned tail;
  131. };
  132. enum mlx4_ib_qp_flags {
  133. MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO,
  134. MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
  135. MLX4_IB_QP_NETIF = IB_QP_CREATE_NETIF_QP,
  136. MLX4_IB_QP_CREATE_USE_GFP_NOIO = IB_QP_CREATE_USE_GFP_NOIO,
  137. MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30,
  138. MLX4_IB_SRIOV_SQP = 1 << 31,
  139. };
  140. struct mlx4_ib_gid_entry {
  141. struct list_head list;
  142. union ib_gid gid;
  143. int added;
  144. u8 port;
  145. };
  146. enum mlx4_ib_qp_type {
  147. /*
  148. * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
  149. * here (and in that order) since the MAD layer uses them as
  150. * indices into a 2-entry table.
  151. */
  152. MLX4_IB_QPT_SMI = IB_QPT_SMI,
  153. MLX4_IB_QPT_GSI = IB_QPT_GSI,
  154. MLX4_IB_QPT_RC = IB_QPT_RC,
  155. MLX4_IB_QPT_UC = IB_QPT_UC,
  156. MLX4_IB_QPT_UD = IB_QPT_UD,
  157. MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6,
  158. MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE,
  159. MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET,
  160. MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI,
  161. MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT,
  162. MLX4_IB_QPT_PROXY_SMI_OWNER = 1 << 16,
  163. MLX4_IB_QPT_PROXY_SMI = 1 << 17,
  164. MLX4_IB_QPT_PROXY_GSI = 1 << 18,
  165. MLX4_IB_QPT_TUN_SMI_OWNER = 1 << 19,
  166. MLX4_IB_QPT_TUN_SMI = 1 << 20,
  167. MLX4_IB_QPT_TUN_GSI = 1 << 21,
  168. };
  169. #define MLX4_IB_QPT_ANY_SRIOV (MLX4_IB_QPT_PROXY_SMI_OWNER | \
  170. MLX4_IB_QPT_PROXY_SMI | MLX4_IB_QPT_PROXY_GSI | MLX4_IB_QPT_TUN_SMI_OWNER | \
  171. MLX4_IB_QPT_TUN_SMI | MLX4_IB_QPT_TUN_GSI)
  172. enum mlx4_ib_mad_ifc_flags {
  173. MLX4_MAD_IFC_IGNORE_MKEY = 1,
  174. MLX4_MAD_IFC_IGNORE_BKEY = 2,
  175. MLX4_MAD_IFC_IGNORE_KEYS = (MLX4_MAD_IFC_IGNORE_MKEY |
  176. MLX4_MAD_IFC_IGNORE_BKEY),
  177. MLX4_MAD_IFC_NET_VIEW = 4,
  178. };
  179. enum {
  180. MLX4_NUM_TUNNEL_BUFS = 256,
  181. };
  182. struct mlx4_ib_tunnel_header {
  183. struct mlx4_av av;
  184. __be32 remote_qpn;
  185. __be32 qkey;
  186. __be16 vlan;
  187. u8 mac[6];
  188. __be16 pkey_index;
  189. u8 reserved[6];
  190. };
  191. struct mlx4_ib_buf {
  192. void *addr;
  193. dma_addr_t map;
  194. };
  195. struct mlx4_rcv_tunnel_hdr {
  196. __be32 flags_src_qp; /* flags[6:5] is defined for VLANs:
  197. * 0x0 - no vlan was in the packet
  198. * 0x01 - C-VLAN was in the packet */
  199. u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */
  200. u8 reserved;
  201. __be16 pkey_index;
  202. __be16 sl_vid;
  203. __be16 slid_mac_47_32;
  204. __be32 mac_31_0;
  205. };
  206. struct mlx4_ib_proxy_sqp_hdr {
  207. struct ib_grh grh;
  208. struct mlx4_rcv_tunnel_hdr tun;
  209. } __packed;
  210. struct mlx4_roce_smac_vlan_info {
  211. u64 smac;
  212. int smac_index;
  213. int smac_port;
  214. u64 candidate_smac;
  215. int candidate_smac_index;
  216. int candidate_smac_port;
  217. u16 vid;
  218. int vlan_index;
  219. int vlan_port;
  220. u16 candidate_vid;
  221. int candidate_vlan_index;
  222. int candidate_vlan_port;
  223. int update_vid;
  224. };
  225. struct mlx4_ib_qp {
  226. struct ib_qp ibqp;
  227. struct mlx4_qp mqp;
  228. struct mlx4_buf buf;
  229. struct mlx4_db db;
  230. struct mlx4_ib_wq rq;
  231. u32 doorbell_qpn;
  232. __be32 sq_signal_bits;
  233. unsigned sq_next_wqe;
  234. int sq_max_wqes_per_wr;
  235. int sq_spare_wqes;
  236. struct mlx4_ib_wq sq;
  237. enum mlx4_ib_qp_type mlx4_ib_qp_type;
  238. struct ib_umem *umem;
  239. struct mlx4_mtt mtt;
  240. int buf_size;
  241. struct mutex mutex;
  242. u16 xrcdn;
  243. u32 flags;
  244. u8 port;
  245. u8 alt_port;
  246. u8 atomic_rd_en;
  247. u8 resp_depth;
  248. u8 sq_no_prefetch;
  249. u8 state;
  250. int mlx_type;
  251. struct list_head gid_list;
  252. struct list_head steering_rules;
  253. struct mlx4_ib_buf *sqp_proxy_rcv;
  254. struct mlx4_roce_smac_vlan_info pri;
  255. struct mlx4_roce_smac_vlan_info alt;
  256. u64 reg_id;
  257. };
  258. struct mlx4_ib_srq {
  259. struct ib_srq ibsrq;
  260. struct mlx4_srq msrq;
  261. struct mlx4_buf buf;
  262. struct mlx4_db db;
  263. u64 *wrid;
  264. spinlock_t lock;
  265. int head;
  266. int tail;
  267. u16 wqe_ctr;
  268. struct ib_umem *umem;
  269. struct mlx4_mtt mtt;
  270. struct mutex mutex;
  271. };
  272. struct mlx4_ib_ah {
  273. struct ib_ah ibah;
  274. union mlx4_ext_av av;
  275. };
  276. /****************************************/
  277. /* alias guid support */
  278. /****************************************/
  279. #define NUM_PORT_ALIAS_GUID 2
  280. #define NUM_ALIAS_GUID_IN_REC 8
  281. #define NUM_ALIAS_GUID_REC_IN_PORT 16
  282. #define GUID_REC_SIZE 8
  283. #define NUM_ALIAS_GUID_PER_PORT 128
  284. #define MLX4_NOT_SET_GUID (0x00LL)
  285. #define MLX4_GUID_FOR_DELETE_VAL (~(0x00LL))
  286. enum mlx4_guid_alias_rec_status {
  287. MLX4_GUID_INFO_STATUS_IDLE,
  288. MLX4_GUID_INFO_STATUS_SET,
  289. MLX4_GUID_INFO_STATUS_PENDING,
  290. };
  291. enum mlx4_guid_alias_rec_ownership {
  292. MLX4_GUID_DRIVER_ASSIGN,
  293. MLX4_GUID_SYSADMIN_ASSIGN,
  294. MLX4_GUID_NONE_ASSIGN, /*init state of each record*/
  295. };
  296. enum mlx4_guid_alias_rec_method {
  297. MLX4_GUID_INFO_RECORD_SET = IB_MGMT_METHOD_SET,
  298. MLX4_GUID_INFO_RECORD_DELETE = IB_SA_METHOD_DELETE,
  299. };
  300. struct mlx4_sriov_alias_guid_info_rec_det {
  301. u8 all_recs[GUID_REC_SIZE * NUM_ALIAS_GUID_IN_REC];
  302. ib_sa_comp_mask guid_indexes; /*indicates what from the 8 records are valid*/
  303. enum mlx4_guid_alias_rec_status status; /*indicates the administraively status of the record.*/
  304. u8 method; /*set or delete*/
  305. enum mlx4_guid_alias_rec_ownership ownership; /*indicates who assign that alias_guid record*/
  306. };
  307. struct mlx4_sriov_alias_guid_port_rec_det {
  308. struct mlx4_sriov_alias_guid_info_rec_det all_rec_per_port[NUM_ALIAS_GUID_REC_IN_PORT];
  309. struct workqueue_struct *wq;
  310. struct delayed_work alias_guid_work;
  311. u8 port;
  312. struct mlx4_sriov_alias_guid *parent;
  313. struct list_head cb_list;
  314. };
  315. struct mlx4_sriov_alias_guid {
  316. struct mlx4_sriov_alias_guid_port_rec_det ports_guid[MLX4_MAX_PORTS];
  317. spinlock_t ag_work_lock;
  318. struct ib_sa_client *sa_client;
  319. };
  320. struct mlx4_ib_demux_work {
  321. struct work_struct work;
  322. struct mlx4_ib_dev *dev;
  323. int slave;
  324. int do_init;
  325. u8 port;
  326. };
  327. struct mlx4_ib_tun_tx_buf {
  328. struct mlx4_ib_buf buf;
  329. struct ib_ah *ah;
  330. };
  331. struct mlx4_ib_demux_pv_qp {
  332. struct ib_qp *qp;
  333. enum ib_qp_type proxy_qpt;
  334. struct mlx4_ib_buf *ring;
  335. struct mlx4_ib_tun_tx_buf *tx_ring;
  336. spinlock_t tx_lock;
  337. unsigned tx_ix_head;
  338. unsigned tx_ix_tail;
  339. };
  340. enum mlx4_ib_demux_pv_state {
  341. DEMUX_PV_STATE_DOWN,
  342. DEMUX_PV_STATE_STARTING,
  343. DEMUX_PV_STATE_ACTIVE,
  344. DEMUX_PV_STATE_DOWNING,
  345. };
  346. struct mlx4_ib_demux_pv_ctx {
  347. int port;
  348. int slave;
  349. enum mlx4_ib_demux_pv_state state;
  350. int has_smi;
  351. struct ib_device *ib_dev;
  352. struct ib_cq *cq;
  353. struct ib_pd *pd;
  354. struct ib_mr *mr;
  355. struct work_struct work;
  356. struct workqueue_struct *wq;
  357. struct mlx4_ib_demux_pv_qp qp[2];
  358. };
  359. struct mlx4_ib_demux_ctx {
  360. struct ib_device *ib_dev;
  361. int port;
  362. struct workqueue_struct *wq;
  363. struct workqueue_struct *ud_wq;
  364. spinlock_t ud_lock;
  365. __be64 subnet_prefix;
  366. __be64 guid_cache[128];
  367. struct mlx4_ib_dev *dev;
  368. /* the following lock protects both mcg_table and mcg_mgid0_list */
  369. struct mutex mcg_table_lock;
  370. struct rb_root mcg_table;
  371. struct list_head mcg_mgid0_list;
  372. struct workqueue_struct *mcg_wq;
  373. struct mlx4_ib_demux_pv_ctx **tun;
  374. atomic_t tid;
  375. int flushing; /* flushing the work queue */
  376. };
  377. struct mlx4_ib_sriov {
  378. struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];
  379. struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];
  380. /* when using this spinlock you should use "irq" because
  381. * it may be called from interrupt context.*/
  382. spinlock_t going_down_lock;
  383. int is_going_down;
  384. struct mlx4_sriov_alias_guid alias_guid;
  385. /* CM paravirtualization fields */
  386. struct list_head cm_list;
  387. spinlock_t id_map_lock;
  388. struct rb_root sl_id_map;
  389. struct idr pv_id_table;
  390. };
  391. struct mlx4_ib_iboe {
  392. spinlock_t lock;
  393. struct net_device *netdevs[MLX4_MAX_PORTS];
  394. struct net_device *masters[MLX4_MAX_PORTS];
  395. struct notifier_block nb;
  396. struct notifier_block nb_inet;
  397. struct notifier_block nb_inet6;
  398. union ib_gid gid_table[MLX4_MAX_PORTS][128];
  399. };
  400. struct pkey_mgt {
  401. u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
  402. u16 phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
  403. struct list_head pkey_port_list[MLX4_MFUNC_MAX];
  404. struct kobject *device_parent[MLX4_MFUNC_MAX];
  405. };
  406. struct mlx4_ib_iov_sysfs_attr {
  407. void *ctx;
  408. struct kobject *kobj;
  409. unsigned long data;
  410. u32 entry_num;
  411. char name[15];
  412. struct device_attribute dentry;
  413. struct device *dev;
  414. };
  415. struct mlx4_ib_iov_sysfs_attr_ar {
  416. struct mlx4_ib_iov_sysfs_attr dentries[3 * NUM_ALIAS_GUID_PER_PORT + 1];
  417. };
  418. struct mlx4_ib_iov_port {
  419. char name[100];
  420. u8 num;
  421. struct mlx4_ib_dev *dev;
  422. struct list_head list;
  423. struct mlx4_ib_iov_sysfs_attr_ar *dentr_ar;
  424. struct ib_port_attr attr;
  425. struct kobject *cur_port;
  426. struct kobject *admin_alias_parent;
  427. struct kobject *gids_parent;
  428. struct kobject *pkeys_parent;
  429. struct kobject *mcgs_parent;
  430. struct mlx4_ib_iov_sysfs_attr mcg_dentry;
  431. };
  432. struct mlx4_ib_dev {
  433. struct ib_device ib_dev;
  434. struct mlx4_dev *dev;
  435. int num_ports;
  436. void __iomem *uar_map;
  437. struct mlx4_uar priv_uar;
  438. u32 priv_pdn;
  439. MLX4_DECLARE_DOORBELL_LOCK(uar_lock);
  440. struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];
  441. struct ib_ah *sm_ah[MLX4_MAX_PORTS];
  442. spinlock_t sm_lock;
  443. struct mlx4_ib_sriov sriov;
  444. struct mutex cap_mask_mutex;
  445. bool ib_active;
  446. struct mlx4_ib_iboe iboe;
  447. int counters[MLX4_MAX_PORTS];
  448. int *eq_table;
  449. int eq_added;
  450. struct kobject *iov_parent;
  451. struct kobject *ports_parent;
  452. struct kobject *dev_ports_parent[MLX4_MFUNC_MAX];
  453. struct mlx4_ib_iov_port iov_ports[MLX4_MAX_PORTS];
  454. struct pkey_mgt pkeys;
  455. unsigned long *ib_uc_qpns_bitmap;
  456. int steer_qpn_count;
  457. int steer_qpn_base;
  458. int steering_support;
  459. struct mlx4_ib_qp *qp1_proxy[MLX4_MAX_PORTS];
  460. /* lock when destroying qp1_proxy and getting netdev events */
  461. struct mutex qp1_proxy_lock[MLX4_MAX_PORTS];
  462. };
  463. struct ib_event_work {
  464. struct work_struct work;
  465. struct mlx4_ib_dev *ib_dev;
  466. struct mlx4_eqe ib_eqe;
  467. };
  468. struct mlx4_ib_qp_tunnel_init_attr {
  469. struct ib_qp_init_attr init_attr;
  470. int slave;
  471. enum ib_qp_type proxy_qp_type;
  472. u8 port;
  473. };
  474. static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)
  475. {
  476. return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
  477. }
  478. static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
  479. {
  480. return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
  481. }
  482. static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd)
  483. {
  484. return container_of(ibpd, struct mlx4_ib_pd, ibpd);
  485. }
  486. static inline struct mlx4_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd)
  487. {
  488. return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd);
  489. }
  490. static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
  491. {
  492. return container_of(ibcq, struct mlx4_ib_cq, ibcq);
  493. }
  494. static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq)
  495. {
  496. return container_of(mcq, struct mlx4_ib_cq, mcq);
  497. }
  498. static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr)
  499. {
  500. return container_of(ibmr, struct mlx4_ib_mr, ibmr);
  501. }
  502. static inline struct mlx4_ib_mw *to_mmw(struct ib_mw *ibmw)
  503. {
  504. return container_of(ibmw, struct mlx4_ib_mw, ibmw);
  505. }
  506. static inline struct mlx4_ib_fast_reg_page_list *to_mfrpl(struct ib_fast_reg_page_list *ibfrpl)
  507. {
  508. return container_of(ibfrpl, struct mlx4_ib_fast_reg_page_list, ibfrpl);
  509. }
  510. static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
  511. {
  512. return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
  513. }
  514. static inline struct mlx4_ib_flow *to_mflow(struct ib_flow *ibflow)
  515. {
  516. return container_of(ibflow, struct mlx4_ib_flow, ibflow);
  517. }
  518. static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
  519. {
  520. return container_of(ibqp, struct mlx4_ib_qp, ibqp);
  521. }
  522. static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp)
  523. {
  524. return container_of(mqp, struct mlx4_ib_qp, mqp);
  525. }
  526. static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq)
  527. {
  528. return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
  529. }
  530. static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq)
  531. {
  532. return container_of(msrq, struct mlx4_ib_srq, msrq);
  533. }
  534. static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah)
  535. {
  536. return container_of(ibah, struct mlx4_ib_ah, ibah);
  537. }
  538. int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev);
  539. void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev);
  540. int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
  541. struct mlx4_db *db);
  542. void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_db *db);
  543. struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc);
  544. int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
  545. struct ib_umem *umem);
  546. struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  547. u64 virt_addr, int access_flags,
  548. struct ib_udata *udata);
  549. int mlx4_ib_dereg_mr(struct ib_mr *mr);
  550. struct ib_mw *mlx4_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type);
  551. int mlx4_ib_bind_mw(struct ib_qp *qp, struct ib_mw *mw,
  552. struct ib_mw_bind *mw_bind);
  553. int mlx4_ib_dealloc_mw(struct ib_mw *mw);
  554. struct ib_mr *mlx4_ib_alloc_fast_reg_mr(struct ib_pd *pd,
  555. int max_page_list_len);
  556. struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
  557. int page_list_len);
  558. void mlx4_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);
  559. int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
  560. int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata);
  561. struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev, int entries, int vector,
  562. struct ib_ucontext *context,
  563. struct ib_udata *udata);
  564. int mlx4_ib_destroy_cq(struct ib_cq *cq);
  565. int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
  566. int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
  567. void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
  568. void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
  569. struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
  570. int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr);
  571. int mlx4_ib_destroy_ah(struct ib_ah *ah);
  572. struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
  573. struct ib_srq_init_attr *init_attr,
  574. struct ib_udata *udata);
  575. int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
  576. enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
  577. int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
  578. int mlx4_ib_destroy_srq(struct ib_srq *srq);
  579. void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
  580. int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
  581. struct ib_recv_wr **bad_wr);
  582. struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,
  583. struct ib_qp_init_attr *init_attr,
  584. struct ib_udata *udata);
  585. int mlx4_ib_destroy_qp(struct ib_qp *qp);
  586. int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  587. int attr_mask, struct ib_udata *udata);
  588. int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
  589. struct ib_qp_init_attr *qp_init_attr);
  590. int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
  591. struct ib_send_wr **bad_wr);
  592. int mlx4_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
  593. struct ib_recv_wr **bad_wr);
  594. int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
  595. int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
  596. void *in_mad, void *response_mad);
  597. int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
  598. struct ib_wc *in_wc, struct ib_grh *in_grh,
  599. struct ib_mad *in_mad, struct ib_mad *out_mad);
  600. int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
  601. void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);
  602. struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int mr_access_flags,
  603. struct ib_fmr_attr *fmr_attr);
  604. int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages,
  605. u64 iova);
  606. int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
  607. int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
  608. int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  609. struct ib_port_attr *props, int netw_view);
  610. int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
  611. u16 *pkey, int netw_view);
  612. int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  613. union ib_gid *gid, int netw_view);
  614. static inline bool mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
  615. {
  616. u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3;
  617. if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET)
  618. return true;
  619. return !!(ah->av.ib.g_slid & 0x80);
  620. }
  621. int mlx4_ib_mcg_port_init(struct mlx4_ib_demux_ctx *ctx);
  622. void mlx4_ib_mcg_port_cleanup(struct mlx4_ib_demux_ctx *ctx, int destroy_wq);
  623. void clean_vf_mcast(struct mlx4_ib_demux_ctx *ctx, int slave);
  624. int mlx4_ib_mcg_init(void);
  625. void mlx4_ib_mcg_destroy(void);
  626. int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid);
  627. int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, int slave,
  628. struct ib_sa_mad *sa_mad);
  629. int mlx4_ib_mcg_demux_handler(struct ib_device *ibdev, int port, int slave,
  630. struct ib_sa_mad *mad);
  631. int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  632. union ib_gid *gid);
  633. void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
  634. enum ib_event_type type);
  635. void mlx4_ib_tunnels_update_work(struct work_struct *work);
  636. int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
  637. enum ib_qp_type qpt, struct ib_wc *wc,
  638. struct ib_grh *grh, struct ib_mad *mad);
  639. int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
  640. enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn,
  641. u32 qkey, struct ib_ah_attr *attr, u8 *s_mac,
  642. struct ib_mad *mad);
  643. __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx);
  644. int mlx4_ib_demux_cm_handler(struct ib_device *ibdev, int port, int *slave,
  645. struct ib_mad *mad);
  646. int mlx4_ib_multiplex_cm_handler(struct ib_device *ibdev, int port, int slave_id,
  647. struct ib_mad *mad);
  648. void mlx4_ib_cm_paravirt_init(struct mlx4_ib_dev *dev);
  649. void mlx4_ib_cm_paravirt_clean(struct mlx4_ib_dev *dev, int slave_id);
  650. /* alias guid support */
  651. void mlx4_ib_init_alias_guid_work(struct mlx4_ib_dev *dev, int port);
  652. int mlx4_ib_init_alias_guid_service(struct mlx4_ib_dev *dev);
  653. void mlx4_ib_destroy_alias_guid_service(struct mlx4_ib_dev *dev);
  654. void mlx4_ib_invalidate_all_guid_record(struct mlx4_ib_dev *dev, int port);
  655. void mlx4_ib_notify_slaves_on_guid_change(struct mlx4_ib_dev *dev,
  656. int block_num,
  657. u8 port_num, u8 *p_data);
  658. void mlx4_ib_update_cache_on_guid_change(struct mlx4_ib_dev *dev,
  659. int block_num, u8 port_num,
  660. u8 *p_data);
  661. int add_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
  662. struct attribute *attr);
  663. void del_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
  664. struct attribute *attr);
  665. ib_sa_comp_mask mlx4_ib_get_aguid_comp_mask_from_ix(int index);
  666. int mlx4_ib_device_register_sysfs(struct mlx4_ib_dev *device) ;
  667. void mlx4_ib_device_unregister_sysfs(struct mlx4_ib_dev *device);
  668. __be64 mlx4_ib_gen_node_guid(void);
  669. int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn);
  670. void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count);
  671. int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  672. int is_attach);
  673. #endif /* MLX4_IB_H */