main.c 68 KB

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  1. /*
  2. * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/module.h>
  34. #include <linux/init.h>
  35. #include <linux/slab.h>
  36. #include <linux/errno.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/inetdevice.h>
  39. #include <linux/rtnetlink.h>
  40. #include <linux/if_vlan.h>
  41. #include <net/ipv6.h>
  42. #include <net/addrconf.h>
  43. #include <rdma/ib_smi.h>
  44. #include <rdma/ib_user_verbs.h>
  45. #include <rdma/ib_addr.h>
  46. #include <linux/mlx4/driver.h>
  47. #include <linux/mlx4/cmd.h>
  48. #include <linux/mlx4/qp.h>
  49. #include "mlx4_ib.h"
  50. #include "user.h"
  51. #define DRV_NAME MLX4_IB_DRV_NAME
  52. #define DRV_VERSION "2.2-1"
  53. #define DRV_RELDATE "Feb 2014"
  54. #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
  55. #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
  56. MODULE_AUTHOR("Roland Dreier");
  57. MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
  58. MODULE_LICENSE("Dual BSD/GPL");
  59. MODULE_VERSION(DRV_VERSION);
  60. int mlx4_ib_sm_guid_assign = 1;
  61. module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
  62. MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 1)");
  63. static const char mlx4_ib_version[] =
  64. DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
  65. DRV_VERSION " (" DRV_RELDATE ")\n";
  66. struct update_gid_work {
  67. struct work_struct work;
  68. union ib_gid gids[128];
  69. struct mlx4_ib_dev *dev;
  70. int port;
  71. };
  72. static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
  73. static struct workqueue_struct *wq;
  74. static void init_query_mad(struct ib_smp *mad)
  75. {
  76. mad->base_version = 1;
  77. mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  78. mad->class_version = 1;
  79. mad->method = IB_MGMT_METHOD_GET;
  80. }
  81. static union ib_gid zgid;
  82. static int check_flow_steering_support(struct mlx4_dev *dev)
  83. {
  84. int eth_num_ports = 0;
  85. int ib_num_ports = 0;
  86. int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
  87. if (dmfs) {
  88. int i;
  89. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
  90. eth_num_ports++;
  91. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  92. ib_num_ports++;
  93. dmfs &= (!ib_num_ports ||
  94. (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
  95. (!eth_num_ports ||
  96. (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
  97. if (ib_num_ports && mlx4_is_mfunc(dev)) {
  98. pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
  99. dmfs = 0;
  100. }
  101. }
  102. return dmfs;
  103. }
  104. static int mlx4_ib_query_device(struct ib_device *ibdev,
  105. struct ib_device_attr *props)
  106. {
  107. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  108. struct ib_smp *in_mad = NULL;
  109. struct ib_smp *out_mad = NULL;
  110. int err = -ENOMEM;
  111. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  112. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  113. if (!in_mad || !out_mad)
  114. goto out;
  115. init_query_mad(in_mad);
  116. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  117. err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
  118. 1, NULL, NULL, in_mad, out_mad);
  119. if (err)
  120. goto out;
  121. memset(props, 0, sizeof *props);
  122. props->fw_ver = dev->dev->caps.fw_ver;
  123. props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
  124. IB_DEVICE_PORT_ACTIVE_EVENT |
  125. IB_DEVICE_SYS_IMAGE_GUID |
  126. IB_DEVICE_RC_RNR_NAK_GEN |
  127. IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
  128. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
  129. props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
  130. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
  131. props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
  132. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM)
  133. props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
  134. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
  135. props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
  136. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
  137. props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
  138. if (dev->dev->caps.max_gso_sz && dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)
  139. props->device_cap_flags |= IB_DEVICE_UD_TSO;
  140. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
  141. props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
  142. if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
  143. (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
  144. (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
  145. props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
  146. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
  147. props->device_cap_flags |= IB_DEVICE_XRC;
  148. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
  149. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
  150. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
  151. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
  152. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
  153. else
  154. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
  155. if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
  156. props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
  157. }
  158. props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
  159. 0xffffff;
  160. props->vendor_part_id = dev->dev->pdev->device;
  161. props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
  162. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  163. props->max_mr_size = ~0ull;
  164. props->page_size_cap = dev->dev->caps.page_size_cap;
  165. props->max_qp = dev->dev->quotas.qp;
  166. props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
  167. props->max_sge = min(dev->dev->caps.max_sq_sg,
  168. dev->dev->caps.max_rq_sg);
  169. props->max_cq = dev->dev->quotas.cq;
  170. props->max_cqe = dev->dev->caps.max_cqes;
  171. props->max_mr = dev->dev->quotas.mpt;
  172. props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
  173. props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
  174. props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
  175. props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
  176. props->max_srq = dev->dev->quotas.srq;
  177. props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
  178. props->max_srq_sge = dev->dev->caps.max_srq_sge;
  179. props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
  180. props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
  181. props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
  182. IB_ATOMIC_HCA : IB_ATOMIC_NONE;
  183. props->masked_atomic_cap = props->atomic_cap;
  184. props->max_pkeys = dev->dev->caps.pkey_table_len[1];
  185. props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
  186. props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
  187. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  188. props->max_mcast_grp;
  189. props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
  190. out:
  191. kfree(in_mad);
  192. kfree(out_mad);
  193. return err;
  194. }
  195. static enum rdma_link_layer
  196. mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
  197. {
  198. struct mlx4_dev *dev = to_mdev(device)->dev;
  199. return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
  200. IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
  201. }
  202. static int ib_link_query_port(struct ib_device *ibdev, u8 port,
  203. struct ib_port_attr *props, int netw_view)
  204. {
  205. struct ib_smp *in_mad = NULL;
  206. struct ib_smp *out_mad = NULL;
  207. int ext_active_speed;
  208. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  209. int err = -ENOMEM;
  210. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  211. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  212. if (!in_mad || !out_mad)
  213. goto out;
  214. init_query_mad(in_mad);
  215. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  216. in_mad->attr_mod = cpu_to_be32(port);
  217. if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
  218. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  219. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
  220. in_mad, out_mad);
  221. if (err)
  222. goto out;
  223. props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
  224. props->lmc = out_mad->data[34] & 0x7;
  225. props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
  226. props->sm_sl = out_mad->data[36] & 0xf;
  227. props->state = out_mad->data[32] & 0xf;
  228. props->phys_state = out_mad->data[33] >> 4;
  229. props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
  230. if (netw_view)
  231. props->gid_tbl_len = out_mad->data[50];
  232. else
  233. props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
  234. props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
  235. props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
  236. props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
  237. props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
  238. props->active_width = out_mad->data[31] & 0xf;
  239. props->active_speed = out_mad->data[35] >> 4;
  240. props->max_mtu = out_mad->data[41] & 0xf;
  241. props->active_mtu = out_mad->data[36] >> 4;
  242. props->subnet_timeout = out_mad->data[51] & 0x1f;
  243. props->max_vl_num = out_mad->data[37] >> 4;
  244. props->init_type_reply = out_mad->data[41] >> 4;
  245. /* Check if extended speeds (EDR/FDR/...) are supported */
  246. if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
  247. ext_active_speed = out_mad->data[62] >> 4;
  248. switch (ext_active_speed) {
  249. case 1:
  250. props->active_speed = IB_SPEED_FDR;
  251. break;
  252. case 2:
  253. props->active_speed = IB_SPEED_EDR;
  254. break;
  255. }
  256. }
  257. /* If reported active speed is QDR, check if is FDR-10 */
  258. if (props->active_speed == IB_SPEED_QDR) {
  259. init_query_mad(in_mad);
  260. in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
  261. in_mad->attr_mod = cpu_to_be32(port);
  262. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
  263. NULL, NULL, in_mad, out_mad);
  264. if (err)
  265. goto out;
  266. /* Checking LinkSpeedActive for FDR-10 */
  267. if (out_mad->data[15] & 0x1)
  268. props->active_speed = IB_SPEED_FDR10;
  269. }
  270. /* Avoid wrong speed value returned by FW if the IB link is down. */
  271. if (props->state == IB_PORT_DOWN)
  272. props->active_speed = IB_SPEED_SDR;
  273. out:
  274. kfree(in_mad);
  275. kfree(out_mad);
  276. return err;
  277. }
  278. static u8 state_to_phys_state(enum ib_port_state state)
  279. {
  280. return state == IB_PORT_ACTIVE ? 5 : 3;
  281. }
  282. static int eth_link_query_port(struct ib_device *ibdev, u8 port,
  283. struct ib_port_attr *props, int netw_view)
  284. {
  285. struct mlx4_ib_dev *mdev = to_mdev(ibdev);
  286. struct mlx4_ib_iboe *iboe = &mdev->iboe;
  287. struct net_device *ndev;
  288. enum ib_mtu tmp;
  289. struct mlx4_cmd_mailbox *mailbox;
  290. int err = 0;
  291. mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  292. if (IS_ERR(mailbox))
  293. return PTR_ERR(mailbox);
  294. err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
  295. MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
  296. MLX4_CMD_WRAPPED);
  297. if (err)
  298. goto out;
  299. props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
  300. IB_WIDTH_4X : IB_WIDTH_1X;
  301. props->active_speed = IB_SPEED_QDR;
  302. props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
  303. props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
  304. props->max_msg_sz = mdev->dev->caps.max_msg_sz;
  305. props->pkey_tbl_len = 1;
  306. props->max_mtu = IB_MTU_4096;
  307. props->max_vl_num = 2;
  308. props->state = IB_PORT_DOWN;
  309. props->phys_state = state_to_phys_state(props->state);
  310. props->active_mtu = IB_MTU_256;
  311. spin_lock(&iboe->lock);
  312. ndev = iboe->netdevs[port - 1];
  313. if (!ndev)
  314. goto out_unlock;
  315. tmp = iboe_get_mtu(ndev->mtu);
  316. props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
  317. props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
  318. IB_PORT_ACTIVE : IB_PORT_DOWN;
  319. props->phys_state = state_to_phys_state(props->state);
  320. out_unlock:
  321. spin_unlock(&iboe->lock);
  322. out:
  323. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  324. return err;
  325. }
  326. int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  327. struct ib_port_attr *props, int netw_view)
  328. {
  329. int err;
  330. memset(props, 0, sizeof *props);
  331. err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
  332. ib_link_query_port(ibdev, port, props, netw_view) :
  333. eth_link_query_port(ibdev, port, props, netw_view);
  334. return err;
  335. }
  336. static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  337. struct ib_port_attr *props)
  338. {
  339. /* returns host view */
  340. return __mlx4_ib_query_port(ibdev, port, props, 0);
  341. }
  342. int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  343. union ib_gid *gid, int netw_view)
  344. {
  345. struct ib_smp *in_mad = NULL;
  346. struct ib_smp *out_mad = NULL;
  347. int err = -ENOMEM;
  348. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  349. int clear = 0;
  350. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  351. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  352. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  353. if (!in_mad || !out_mad)
  354. goto out;
  355. init_query_mad(in_mad);
  356. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  357. in_mad->attr_mod = cpu_to_be32(port);
  358. if (mlx4_is_mfunc(dev->dev) && netw_view)
  359. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  360. err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
  361. if (err)
  362. goto out;
  363. memcpy(gid->raw, out_mad->data + 8, 8);
  364. if (mlx4_is_mfunc(dev->dev) && !netw_view) {
  365. if (index) {
  366. /* For any index > 0, return the null guid */
  367. err = 0;
  368. clear = 1;
  369. goto out;
  370. }
  371. }
  372. init_query_mad(in_mad);
  373. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  374. in_mad->attr_mod = cpu_to_be32(index / 8);
  375. err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
  376. NULL, NULL, in_mad, out_mad);
  377. if (err)
  378. goto out;
  379. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
  380. out:
  381. if (clear)
  382. memset(gid->raw + 8, 0, 8);
  383. kfree(in_mad);
  384. kfree(out_mad);
  385. return err;
  386. }
  387. static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
  388. union ib_gid *gid)
  389. {
  390. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  391. *gid = dev->iboe.gid_table[port - 1][index];
  392. return 0;
  393. }
  394. static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  395. union ib_gid *gid)
  396. {
  397. if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
  398. return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
  399. else
  400. return iboe_query_gid(ibdev, port, index, gid);
  401. }
  402. int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
  403. u16 *pkey, int netw_view)
  404. {
  405. struct ib_smp *in_mad = NULL;
  406. struct ib_smp *out_mad = NULL;
  407. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  408. int err = -ENOMEM;
  409. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  410. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  411. if (!in_mad || !out_mad)
  412. goto out;
  413. init_query_mad(in_mad);
  414. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  415. in_mad->attr_mod = cpu_to_be32(index / 32);
  416. if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
  417. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  418. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
  419. in_mad, out_mad);
  420. if (err)
  421. goto out;
  422. *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
  423. out:
  424. kfree(in_mad);
  425. kfree(out_mad);
  426. return err;
  427. }
  428. static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
  429. {
  430. return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
  431. }
  432. static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
  433. struct ib_device_modify *props)
  434. {
  435. struct mlx4_cmd_mailbox *mailbox;
  436. unsigned long flags;
  437. if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
  438. return -EOPNOTSUPP;
  439. if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
  440. return 0;
  441. if (mlx4_is_slave(to_mdev(ibdev)->dev))
  442. return -EOPNOTSUPP;
  443. spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
  444. memcpy(ibdev->node_desc, props->node_desc, 64);
  445. spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
  446. /*
  447. * If possible, pass node desc to FW, so it can generate
  448. * a 144 trap. If cmd fails, just ignore.
  449. */
  450. mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
  451. if (IS_ERR(mailbox))
  452. return 0;
  453. memcpy(mailbox->buf, props->node_desc, 64);
  454. mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
  455. MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
  456. mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
  457. return 0;
  458. }
  459. static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
  460. u32 cap_mask)
  461. {
  462. struct mlx4_cmd_mailbox *mailbox;
  463. int err;
  464. mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
  465. if (IS_ERR(mailbox))
  466. return PTR_ERR(mailbox);
  467. if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
  468. *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
  469. ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
  470. } else {
  471. ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
  472. ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
  473. }
  474. err = mlx4_cmd(dev->dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT,
  475. MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
  476. mlx4_free_cmd_mailbox(dev->dev, mailbox);
  477. return err;
  478. }
  479. static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
  480. struct ib_port_modify *props)
  481. {
  482. struct mlx4_ib_dev *mdev = to_mdev(ibdev);
  483. u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
  484. struct ib_port_attr attr;
  485. u32 cap_mask;
  486. int err;
  487. /* return OK if this is RoCE. CM calls ib_modify_port() regardless
  488. * of whether port link layer is ETH or IB. For ETH ports, qkey
  489. * violations and port capabilities are not meaningful.
  490. */
  491. if (is_eth)
  492. return 0;
  493. mutex_lock(&mdev->cap_mask_mutex);
  494. err = mlx4_ib_query_port(ibdev, port, &attr);
  495. if (err)
  496. goto out;
  497. cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  498. ~props->clr_port_cap_mask;
  499. err = mlx4_ib_SET_PORT(mdev, port,
  500. !!(mask & IB_PORT_RESET_QKEY_CNTR),
  501. cap_mask);
  502. out:
  503. mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
  504. return err;
  505. }
  506. static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
  507. struct ib_udata *udata)
  508. {
  509. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  510. struct mlx4_ib_ucontext *context;
  511. struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
  512. struct mlx4_ib_alloc_ucontext_resp resp;
  513. int err;
  514. if (!dev->ib_active)
  515. return ERR_PTR(-EAGAIN);
  516. if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
  517. resp_v3.qp_tab_size = dev->dev->caps.num_qps;
  518. resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
  519. resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
  520. } else {
  521. resp.dev_caps = dev->dev->caps.userspace_caps;
  522. resp.qp_tab_size = dev->dev->caps.num_qps;
  523. resp.bf_reg_size = dev->dev->caps.bf_reg_size;
  524. resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
  525. resp.cqe_size = dev->dev->caps.cqe_size;
  526. }
  527. context = kmalloc(sizeof *context, GFP_KERNEL);
  528. if (!context)
  529. return ERR_PTR(-ENOMEM);
  530. err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
  531. if (err) {
  532. kfree(context);
  533. return ERR_PTR(err);
  534. }
  535. INIT_LIST_HEAD(&context->db_page_list);
  536. mutex_init(&context->db_page_mutex);
  537. if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
  538. err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
  539. else
  540. err = ib_copy_to_udata(udata, &resp, sizeof(resp));
  541. if (err) {
  542. mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
  543. kfree(context);
  544. return ERR_PTR(-EFAULT);
  545. }
  546. return &context->ibucontext;
  547. }
  548. static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
  549. {
  550. struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
  551. mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
  552. kfree(context);
  553. return 0;
  554. }
  555. static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
  556. {
  557. struct mlx4_ib_dev *dev = to_mdev(context->device);
  558. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  559. return -EINVAL;
  560. if (vma->vm_pgoff == 0) {
  561. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  562. if (io_remap_pfn_range(vma, vma->vm_start,
  563. to_mucontext(context)->uar.pfn,
  564. PAGE_SIZE, vma->vm_page_prot))
  565. return -EAGAIN;
  566. } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
  567. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  568. if (io_remap_pfn_range(vma, vma->vm_start,
  569. to_mucontext(context)->uar.pfn +
  570. dev->dev->caps.num_uars,
  571. PAGE_SIZE, vma->vm_page_prot))
  572. return -EAGAIN;
  573. } else
  574. return -EINVAL;
  575. return 0;
  576. }
  577. static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
  578. struct ib_ucontext *context,
  579. struct ib_udata *udata)
  580. {
  581. struct mlx4_ib_pd *pd;
  582. int err;
  583. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  584. if (!pd)
  585. return ERR_PTR(-ENOMEM);
  586. err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
  587. if (err) {
  588. kfree(pd);
  589. return ERR_PTR(err);
  590. }
  591. if (context)
  592. if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
  593. mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
  594. kfree(pd);
  595. return ERR_PTR(-EFAULT);
  596. }
  597. return &pd->ibpd;
  598. }
  599. static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
  600. {
  601. mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
  602. kfree(pd);
  603. return 0;
  604. }
  605. static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
  606. struct ib_ucontext *context,
  607. struct ib_udata *udata)
  608. {
  609. struct mlx4_ib_xrcd *xrcd;
  610. int err;
  611. if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
  612. return ERR_PTR(-ENOSYS);
  613. xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
  614. if (!xrcd)
  615. return ERR_PTR(-ENOMEM);
  616. err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
  617. if (err)
  618. goto err1;
  619. xrcd->pd = ib_alloc_pd(ibdev);
  620. if (IS_ERR(xrcd->pd)) {
  621. err = PTR_ERR(xrcd->pd);
  622. goto err2;
  623. }
  624. xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, 1, 0);
  625. if (IS_ERR(xrcd->cq)) {
  626. err = PTR_ERR(xrcd->cq);
  627. goto err3;
  628. }
  629. return &xrcd->ibxrcd;
  630. err3:
  631. ib_dealloc_pd(xrcd->pd);
  632. err2:
  633. mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
  634. err1:
  635. kfree(xrcd);
  636. return ERR_PTR(err);
  637. }
  638. static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
  639. {
  640. ib_destroy_cq(to_mxrcd(xrcd)->cq);
  641. ib_dealloc_pd(to_mxrcd(xrcd)->pd);
  642. mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
  643. kfree(xrcd);
  644. return 0;
  645. }
  646. static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
  647. {
  648. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  649. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  650. struct mlx4_ib_gid_entry *ge;
  651. ge = kzalloc(sizeof *ge, GFP_KERNEL);
  652. if (!ge)
  653. return -ENOMEM;
  654. ge->gid = *gid;
  655. if (mlx4_ib_add_mc(mdev, mqp, gid)) {
  656. ge->port = mqp->port;
  657. ge->added = 1;
  658. }
  659. mutex_lock(&mqp->mutex);
  660. list_add_tail(&ge->list, &mqp->gid_list);
  661. mutex_unlock(&mqp->mutex);
  662. return 0;
  663. }
  664. int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  665. union ib_gid *gid)
  666. {
  667. struct net_device *ndev;
  668. int ret = 0;
  669. if (!mqp->port)
  670. return 0;
  671. spin_lock(&mdev->iboe.lock);
  672. ndev = mdev->iboe.netdevs[mqp->port - 1];
  673. if (ndev)
  674. dev_hold(ndev);
  675. spin_unlock(&mdev->iboe.lock);
  676. if (ndev) {
  677. ret = 1;
  678. dev_put(ndev);
  679. }
  680. return ret;
  681. }
  682. struct mlx4_ib_steering {
  683. struct list_head list;
  684. u64 reg_id;
  685. union ib_gid gid;
  686. };
  687. static int parse_flow_attr(struct mlx4_dev *dev,
  688. u32 qp_num,
  689. union ib_flow_spec *ib_spec,
  690. struct _rule_hw *mlx4_spec)
  691. {
  692. enum mlx4_net_trans_rule_id type;
  693. switch (ib_spec->type) {
  694. case IB_FLOW_SPEC_ETH:
  695. type = MLX4_NET_TRANS_RULE_ID_ETH;
  696. memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
  697. ETH_ALEN);
  698. memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
  699. ETH_ALEN);
  700. mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
  701. mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
  702. break;
  703. case IB_FLOW_SPEC_IB:
  704. type = MLX4_NET_TRANS_RULE_ID_IB;
  705. mlx4_spec->ib.l3_qpn =
  706. cpu_to_be32(qp_num);
  707. mlx4_spec->ib.qpn_mask =
  708. cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
  709. break;
  710. case IB_FLOW_SPEC_IPV4:
  711. type = MLX4_NET_TRANS_RULE_ID_IPV4;
  712. mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
  713. mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
  714. mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
  715. mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
  716. break;
  717. case IB_FLOW_SPEC_TCP:
  718. case IB_FLOW_SPEC_UDP:
  719. type = ib_spec->type == IB_FLOW_SPEC_TCP ?
  720. MLX4_NET_TRANS_RULE_ID_TCP :
  721. MLX4_NET_TRANS_RULE_ID_UDP;
  722. mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
  723. mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
  724. mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
  725. mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
  726. break;
  727. default:
  728. return -EINVAL;
  729. }
  730. if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
  731. mlx4_hw_rule_sz(dev, type) < 0)
  732. return -EINVAL;
  733. mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
  734. mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
  735. return mlx4_hw_rule_sz(dev, type);
  736. }
  737. struct default_rules {
  738. __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
  739. __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
  740. __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
  741. __u8 link_layer;
  742. };
  743. static const struct default_rules default_table[] = {
  744. {
  745. .mandatory_fields = {IB_FLOW_SPEC_IPV4},
  746. .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
  747. .rules_create_list = {IB_FLOW_SPEC_IB},
  748. .link_layer = IB_LINK_LAYER_INFINIBAND
  749. }
  750. };
  751. static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
  752. struct ib_flow_attr *flow_attr)
  753. {
  754. int i, j, k;
  755. void *ib_flow;
  756. const struct default_rules *pdefault_rules = default_table;
  757. u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
  758. for (i = 0; i < sizeof(default_table)/sizeof(default_table[0]); i++,
  759. pdefault_rules++) {
  760. __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
  761. memset(&field_types, 0, sizeof(field_types));
  762. if (link_layer != pdefault_rules->link_layer)
  763. continue;
  764. ib_flow = flow_attr + 1;
  765. /* we assume the specs are sorted */
  766. for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
  767. j < flow_attr->num_of_specs; k++) {
  768. union ib_flow_spec *current_flow =
  769. (union ib_flow_spec *)ib_flow;
  770. /* same layer but different type */
  771. if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
  772. (pdefault_rules->mandatory_fields[k] &
  773. IB_FLOW_SPEC_LAYER_MASK)) &&
  774. (current_flow->type !=
  775. pdefault_rules->mandatory_fields[k]))
  776. goto out;
  777. /* same layer, try match next one */
  778. if (current_flow->type ==
  779. pdefault_rules->mandatory_fields[k]) {
  780. j++;
  781. ib_flow +=
  782. ((union ib_flow_spec *)ib_flow)->size;
  783. }
  784. }
  785. ib_flow = flow_attr + 1;
  786. for (j = 0; j < flow_attr->num_of_specs;
  787. j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
  788. for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
  789. /* same layer and same type */
  790. if (((union ib_flow_spec *)ib_flow)->type ==
  791. pdefault_rules->mandatory_not_fields[k])
  792. goto out;
  793. return i;
  794. }
  795. out:
  796. return -1;
  797. }
  798. static int __mlx4_ib_create_default_rules(
  799. struct mlx4_ib_dev *mdev,
  800. struct ib_qp *qp,
  801. const struct default_rules *pdefault_rules,
  802. struct _rule_hw *mlx4_spec) {
  803. int size = 0;
  804. int i;
  805. for (i = 0; i < sizeof(pdefault_rules->rules_create_list)/
  806. sizeof(pdefault_rules->rules_create_list[0]); i++) {
  807. int ret;
  808. union ib_flow_spec ib_spec;
  809. switch (pdefault_rules->rules_create_list[i]) {
  810. case 0:
  811. /* no rule */
  812. continue;
  813. case IB_FLOW_SPEC_IB:
  814. ib_spec.type = IB_FLOW_SPEC_IB;
  815. ib_spec.size = sizeof(struct ib_flow_spec_ib);
  816. break;
  817. default:
  818. /* invalid rule */
  819. return -EINVAL;
  820. }
  821. /* We must put empty rule, qpn is being ignored */
  822. ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
  823. mlx4_spec);
  824. if (ret < 0) {
  825. pr_info("invalid parsing\n");
  826. return -EINVAL;
  827. }
  828. mlx4_spec = (void *)mlx4_spec + ret;
  829. size += ret;
  830. }
  831. return size;
  832. }
  833. static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
  834. int domain,
  835. enum mlx4_net_trans_promisc_mode flow_type,
  836. u64 *reg_id)
  837. {
  838. int ret, i;
  839. int size = 0;
  840. void *ib_flow;
  841. struct mlx4_ib_dev *mdev = to_mdev(qp->device);
  842. struct mlx4_cmd_mailbox *mailbox;
  843. struct mlx4_net_trans_rule_hw_ctrl *ctrl;
  844. int default_flow;
  845. static const u16 __mlx4_domain[] = {
  846. [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
  847. [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
  848. [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
  849. [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
  850. };
  851. if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
  852. pr_err("Invalid priority value %d\n", flow_attr->priority);
  853. return -EINVAL;
  854. }
  855. if (domain >= IB_FLOW_DOMAIN_NUM) {
  856. pr_err("Invalid domain value %d\n", domain);
  857. return -EINVAL;
  858. }
  859. if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
  860. return -EINVAL;
  861. mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  862. if (IS_ERR(mailbox))
  863. return PTR_ERR(mailbox);
  864. ctrl = mailbox->buf;
  865. ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
  866. flow_attr->priority);
  867. ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
  868. ctrl->port = flow_attr->port;
  869. ctrl->qpn = cpu_to_be32(qp->qp_num);
  870. ib_flow = flow_attr + 1;
  871. size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
  872. /* Add default flows */
  873. default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
  874. if (default_flow >= 0) {
  875. ret = __mlx4_ib_create_default_rules(
  876. mdev, qp, default_table + default_flow,
  877. mailbox->buf + size);
  878. if (ret < 0) {
  879. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  880. return -EINVAL;
  881. }
  882. size += ret;
  883. }
  884. for (i = 0; i < flow_attr->num_of_specs; i++) {
  885. ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
  886. mailbox->buf + size);
  887. if (ret < 0) {
  888. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  889. return -EINVAL;
  890. }
  891. ib_flow += ((union ib_flow_spec *) ib_flow)->size;
  892. size += ret;
  893. }
  894. ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
  895. MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
  896. MLX4_CMD_NATIVE);
  897. if (ret == -ENOMEM)
  898. pr_err("mcg table is full. Fail to register network rule.\n");
  899. else if (ret == -ENXIO)
  900. pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
  901. else if (ret)
  902. pr_err("Invalid argumant. Fail to register network rule.\n");
  903. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  904. return ret;
  905. }
  906. static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
  907. {
  908. int err;
  909. err = mlx4_cmd(dev, reg_id, 0, 0,
  910. MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
  911. MLX4_CMD_NATIVE);
  912. if (err)
  913. pr_err("Fail to detach network rule. registration id = 0x%llx\n",
  914. reg_id);
  915. return err;
  916. }
  917. static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
  918. struct ib_flow_attr *flow_attr,
  919. int domain)
  920. {
  921. int err = 0, i = 0;
  922. struct mlx4_ib_flow *mflow;
  923. enum mlx4_net_trans_promisc_mode type[2];
  924. memset(type, 0, sizeof(type));
  925. mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
  926. if (!mflow) {
  927. err = -ENOMEM;
  928. goto err_free;
  929. }
  930. switch (flow_attr->type) {
  931. case IB_FLOW_ATTR_NORMAL:
  932. type[0] = MLX4_FS_REGULAR;
  933. break;
  934. case IB_FLOW_ATTR_ALL_DEFAULT:
  935. type[0] = MLX4_FS_ALL_DEFAULT;
  936. break;
  937. case IB_FLOW_ATTR_MC_DEFAULT:
  938. type[0] = MLX4_FS_MC_DEFAULT;
  939. break;
  940. case IB_FLOW_ATTR_SNIFFER:
  941. type[0] = MLX4_FS_UC_SNIFFER;
  942. type[1] = MLX4_FS_MC_SNIFFER;
  943. break;
  944. default:
  945. err = -EINVAL;
  946. goto err_free;
  947. }
  948. while (i < ARRAY_SIZE(type) && type[i]) {
  949. err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
  950. &mflow->reg_id[i]);
  951. if (err)
  952. goto err_free;
  953. i++;
  954. }
  955. return &mflow->ibflow;
  956. err_free:
  957. kfree(mflow);
  958. return ERR_PTR(err);
  959. }
  960. static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
  961. {
  962. int err, ret = 0;
  963. int i = 0;
  964. struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
  965. struct mlx4_ib_flow *mflow = to_mflow(flow_id);
  966. while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i]) {
  967. err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i]);
  968. if (err)
  969. ret = err;
  970. i++;
  971. }
  972. kfree(mflow);
  973. return ret;
  974. }
  975. static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  976. {
  977. int err;
  978. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  979. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  980. u64 reg_id;
  981. struct mlx4_ib_steering *ib_steering = NULL;
  982. enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
  983. MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
  984. if (mdev->dev->caps.steering_mode ==
  985. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  986. ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
  987. if (!ib_steering)
  988. return -ENOMEM;
  989. }
  990. err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
  991. !!(mqp->flags &
  992. MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
  993. prot, &reg_id);
  994. if (err)
  995. goto err_malloc;
  996. err = add_gid_entry(ibqp, gid);
  997. if (err)
  998. goto err_add;
  999. if (ib_steering) {
  1000. memcpy(ib_steering->gid.raw, gid->raw, 16);
  1001. ib_steering->reg_id = reg_id;
  1002. mutex_lock(&mqp->mutex);
  1003. list_add(&ib_steering->list, &mqp->steering_rules);
  1004. mutex_unlock(&mqp->mutex);
  1005. }
  1006. return 0;
  1007. err_add:
  1008. mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
  1009. prot, reg_id);
  1010. err_malloc:
  1011. kfree(ib_steering);
  1012. return err;
  1013. }
  1014. static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
  1015. {
  1016. struct mlx4_ib_gid_entry *ge;
  1017. struct mlx4_ib_gid_entry *tmp;
  1018. struct mlx4_ib_gid_entry *ret = NULL;
  1019. list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
  1020. if (!memcmp(raw, ge->gid.raw, 16)) {
  1021. ret = ge;
  1022. break;
  1023. }
  1024. }
  1025. return ret;
  1026. }
  1027. static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  1028. {
  1029. int err;
  1030. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  1031. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  1032. struct net_device *ndev;
  1033. struct mlx4_ib_gid_entry *ge;
  1034. u64 reg_id = 0;
  1035. enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
  1036. MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
  1037. if (mdev->dev->caps.steering_mode ==
  1038. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1039. struct mlx4_ib_steering *ib_steering;
  1040. mutex_lock(&mqp->mutex);
  1041. list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
  1042. if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
  1043. list_del(&ib_steering->list);
  1044. break;
  1045. }
  1046. }
  1047. mutex_unlock(&mqp->mutex);
  1048. if (&ib_steering->list == &mqp->steering_rules) {
  1049. pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
  1050. return -EINVAL;
  1051. }
  1052. reg_id = ib_steering->reg_id;
  1053. kfree(ib_steering);
  1054. }
  1055. err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
  1056. prot, reg_id);
  1057. if (err)
  1058. return err;
  1059. mutex_lock(&mqp->mutex);
  1060. ge = find_gid_entry(mqp, gid->raw);
  1061. if (ge) {
  1062. spin_lock(&mdev->iboe.lock);
  1063. ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
  1064. if (ndev)
  1065. dev_hold(ndev);
  1066. spin_unlock(&mdev->iboe.lock);
  1067. if (ndev)
  1068. dev_put(ndev);
  1069. list_del(&ge->list);
  1070. kfree(ge);
  1071. } else
  1072. pr_warn("could not find mgid entry\n");
  1073. mutex_unlock(&mqp->mutex);
  1074. return 0;
  1075. }
  1076. static int init_node_data(struct mlx4_ib_dev *dev)
  1077. {
  1078. struct ib_smp *in_mad = NULL;
  1079. struct ib_smp *out_mad = NULL;
  1080. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  1081. int err = -ENOMEM;
  1082. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  1083. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  1084. if (!in_mad || !out_mad)
  1085. goto out;
  1086. init_query_mad(in_mad);
  1087. in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
  1088. if (mlx4_is_master(dev->dev))
  1089. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  1090. err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
  1091. if (err)
  1092. goto out;
  1093. memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
  1094. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  1095. err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
  1096. if (err)
  1097. goto out;
  1098. dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
  1099. memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
  1100. out:
  1101. kfree(in_mad);
  1102. kfree(out_mad);
  1103. return err;
  1104. }
  1105. static ssize_t show_hca(struct device *device, struct device_attribute *attr,
  1106. char *buf)
  1107. {
  1108. struct mlx4_ib_dev *dev =
  1109. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1110. return sprintf(buf, "MT%d\n", dev->dev->pdev->device);
  1111. }
  1112. static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
  1113. char *buf)
  1114. {
  1115. struct mlx4_ib_dev *dev =
  1116. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1117. return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
  1118. (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
  1119. (int) dev->dev->caps.fw_ver & 0xffff);
  1120. }
  1121. static ssize_t show_rev(struct device *device, struct device_attribute *attr,
  1122. char *buf)
  1123. {
  1124. struct mlx4_ib_dev *dev =
  1125. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1126. return sprintf(buf, "%x\n", dev->dev->rev_id);
  1127. }
  1128. static ssize_t show_board(struct device *device, struct device_attribute *attr,
  1129. char *buf)
  1130. {
  1131. struct mlx4_ib_dev *dev =
  1132. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1133. return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
  1134. dev->dev->board_id);
  1135. }
  1136. static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  1137. static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  1138. static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  1139. static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  1140. static struct device_attribute *mlx4_class_attributes[] = {
  1141. &dev_attr_hw_rev,
  1142. &dev_attr_fw_ver,
  1143. &dev_attr_hca_type,
  1144. &dev_attr_board_id
  1145. };
  1146. static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
  1147. struct net_device *dev)
  1148. {
  1149. memcpy(eui, dev->dev_addr, 3);
  1150. memcpy(eui + 5, dev->dev_addr + 3, 3);
  1151. if (vlan_id < 0x1000) {
  1152. eui[3] = vlan_id >> 8;
  1153. eui[4] = vlan_id & 0xff;
  1154. } else {
  1155. eui[3] = 0xff;
  1156. eui[4] = 0xfe;
  1157. }
  1158. eui[0] ^= 2;
  1159. }
  1160. static void update_gids_task(struct work_struct *work)
  1161. {
  1162. struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
  1163. struct mlx4_cmd_mailbox *mailbox;
  1164. union ib_gid *gids;
  1165. int err;
  1166. struct mlx4_dev *dev = gw->dev->dev;
  1167. mailbox = mlx4_alloc_cmd_mailbox(dev);
  1168. if (IS_ERR(mailbox)) {
  1169. pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
  1170. return;
  1171. }
  1172. gids = mailbox->buf;
  1173. memcpy(gids, gw->gids, sizeof gw->gids);
  1174. err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
  1175. 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
  1176. MLX4_CMD_WRAPPED);
  1177. if (err)
  1178. pr_warn("set port command failed\n");
  1179. else
  1180. mlx4_ib_dispatch_event(gw->dev, gw->port, IB_EVENT_GID_CHANGE);
  1181. mlx4_free_cmd_mailbox(dev, mailbox);
  1182. kfree(gw);
  1183. }
  1184. static void reset_gids_task(struct work_struct *work)
  1185. {
  1186. struct update_gid_work *gw =
  1187. container_of(work, struct update_gid_work, work);
  1188. struct mlx4_cmd_mailbox *mailbox;
  1189. union ib_gid *gids;
  1190. int err;
  1191. struct mlx4_dev *dev = gw->dev->dev;
  1192. mailbox = mlx4_alloc_cmd_mailbox(dev);
  1193. if (IS_ERR(mailbox)) {
  1194. pr_warn("reset gid table failed\n");
  1195. goto free;
  1196. }
  1197. gids = mailbox->buf;
  1198. memcpy(gids, gw->gids, sizeof(gw->gids));
  1199. if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
  1200. IB_LINK_LAYER_ETHERNET) {
  1201. err = mlx4_cmd(dev, mailbox->dma,
  1202. MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
  1203. 1, MLX4_CMD_SET_PORT,
  1204. MLX4_CMD_TIME_CLASS_B,
  1205. MLX4_CMD_WRAPPED);
  1206. if (err)
  1207. pr_warn(KERN_WARNING
  1208. "set port %d command failed\n", gw->port);
  1209. }
  1210. mlx4_free_cmd_mailbox(dev, mailbox);
  1211. free:
  1212. kfree(gw);
  1213. }
  1214. static int update_gid_table(struct mlx4_ib_dev *dev, int port,
  1215. union ib_gid *gid, int clear,
  1216. int default_gid)
  1217. {
  1218. struct update_gid_work *work;
  1219. int i;
  1220. int need_update = 0;
  1221. int free = -1;
  1222. int found = -1;
  1223. int max_gids;
  1224. if (default_gid) {
  1225. free = 0;
  1226. } else {
  1227. max_gids = dev->dev->caps.gid_table_len[port];
  1228. for (i = 1; i < max_gids; ++i) {
  1229. if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
  1230. sizeof(*gid)))
  1231. found = i;
  1232. if (clear) {
  1233. if (found >= 0) {
  1234. need_update = 1;
  1235. dev->iboe.gid_table[port - 1][found] =
  1236. zgid;
  1237. break;
  1238. }
  1239. } else {
  1240. if (found >= 0)
  1241. break;
  1242. if (free < 0 &&
  1243. !memcmp(&dev->iboe.gid_table[port - 1][i],
  1244. &zgid, sizeof(*gid)))
  1245. free = i;
  1246. }
  1247. }
  1248. }
  1249. if (found == -1 && !clear && free >= 0) {
  1250. dev->iboe.gid_table[port - 1][free] = *gid;
  1251. need_update = 1;
  1252. }
  1253. if (!need_update)
  1254. return 0;
  1255. work = kzalloc(sizeof(*work), GFP_ATOMIC);
  1256. if (!work)
  1257. return -ENOMEM;
  1258. memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
  1259. INIT_WORK(&work->work, update_gids_task);
  1260. work->port = port;
  1261. work->dev = dev;
  1262. queue_work(wq, &work->work);
  1263. return 0;
  1264. }
  1265. static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
  1266. {
  1267. gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
  1268. mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
  1269. }
  1270. static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
  1271. {
  1272. struct update_gid_work *work;
  1273. work = kzalloc(sizeof(*work), GFP_ATOMIC);
  1274. if (!work)
  1275. return -ENOMEM;
  1276. memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
  1277. memset(work->gids, 0, sizeof(work->gids));
  1278. INIT_WORK(&work->work, reset_gids_task);
  1279. work->dev = dev;
  1280. work->port = port;
  1281. queue_work(wq, &work->work);
  1282. return 0;
  1283. }
  1284. static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
  1285. struct mlx4_ib_dev *ibdev, union ib_gid *gid)
  1286. {
  1287. struct mlx4_ib_iboe *iboe;
  1288. int port = 0;
  1289. struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
  1290. rdma_vlan_dev_real_dev(event_netdev) :
  1291. event_netdev;
  1292. union ib_gid default_gid;
  1293. mlx4_make_default_gid(real_dev, &default_gid);
  1294. if (!memcmp(gid, &default_gid, sizeof(*gid)))
  1295. return 0;
  1296. if (event != NETDEV_DOWN && event != NETDEV_UP)
  1297. return 0;
  1298. if ((real_dev != event_netdev) &&
  1299. (event == NETDEV_DOWN) &&
  1300. rdma_link_local_addr((struct in6_addr *)gid))
  1301. return 0;
  1302. iboe = &ibdev->iboe;
  1303. spin_lock(&iboe->lock);
  1304. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
  1305. if ((netif_is_bond_master(real_dev) &&
  1306. (real_dev == iboe->masters[port - 1])) ||
  1307. (!netif_is_bond_master(real_dev) &&
  1308. (real_dev == iboe->netdevs[port - 1])))
  1309. update_gid_table(ibdev, port, gid,
  1310. event == NETDEV_DOWN, 0);
  1311. spin_unlock(&iboe->lock);
  1312. return 0;
  1313. }
  1314. static u8 mlx4_ib_get_dev_port(struct net_device *dev,
  1315. struct mlx4_ib_dev *ibdev)
  1316. {
  1317. u8 port = 0;
  1318. struct mlx4_ib_iboe *iboe;
  1319. struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
  1320. rdma_vlan_dev_real_dev(dev) : dev;
  1321. iboe = &ibdev->iboe;
  1322. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
  1323. if ((netif_is_bond_master(real_dev) &&
  1324. (real_dev == iboe->masters[port - 1])) ||
  1325. (!netif_is_bond_master(real_dev) &&
  1326. (real_dev == iboe->netdevs[port - 1])))
  1327. break;
  1328. if ((port == 0) || (port > ibdev->dev->caps.num_ports))
  1329. return 0;
  1330. else
  1331. return port;
  1332. }
  1333. static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
  1334. void *ptr)
  1335. {
  1336. struct mlx4_ib_dev *ibdev;
  1337. struct in_ifaddr *ifa = ptr;
  1338. union ib_gid gid;
  1339. struct net_device *event_netdev = ifa->ifa_dev->dev;
  1340. ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
  1341. ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
  1342. mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
  1343. return NOTIFY_DONE;
  1344. }
  1345. #if IS_ENABLED(CONFIG_IPV6)
  1346. static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
  1347. void *ptr)
  1348. {
  1349. struct mlx4_ib_dev *ibdev;
  1350. struct inet6_ifaddr *ifa = ptr;
  1351. union ib_gid *gid = (union ib_gid *)&ifa->addr;
  1352. struct net_device *event_netdev = ifa->idev->dev;
  1353. ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
  1354. mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
  1355. return NOTIFY_DONE;
  1356. }
  1357. #endif
  1358. #define MLX4_IB_INVALID_MAC ((u64)-1)
  1359. static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
  1360. struct net_device *dev,
  1361. int port)
  1362. {
  1363. u64 new_smac = 0;
  1364. u64 release_mac = MLX4_IB_INVALID_MAC;
  1365. struct mlx4_ib_qp *qp;
  1366. read_lock(&dev_base_lock);
  1367. new_smac = mlx4_mac_to_u64(dev->dev_addr);
  1368. read_unlock(&dev_base_lock);
  1369. mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
  1370. qp = ibdev->qp1_proxy[port - 1];
  1371. if (qp) {
  1372. int new_smac_index;
  1373. u64 old_smac = qp->pri.smac;
  1374. struct mlx4_update_qp_params update_params;
  1375. if (new_smac == old_smac)
  1376. goto unlock;
  1377. new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
  1378. if (new_smac_index < 0)
  1379. goto unlock;
  1380. update_params.smac_index = new_smac_index;
  1381. if (mlx4_update_qp(ibdev->dev, &qp->mqp, MLX4_UPDATE_QP_SMAC,
  1382. &update_params)) {
  1383. release_mac = new_smac;
  1384. goto unlock;
  1385. }
  1386. qp->pri.smac = new_smac;
  1387. qp->pri.smac_index = new_smac_index;
  1388. release_mac = old_smac;
  1389. }
  1390. unlock:
  1391. mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
  1392. if (release_mac != MLX4_IB_INVALID_MAC)
  1393. mlx4_unregister_mac(ibdev->dev, port, release_mac);
  1394. }
  1395. static void mlx4_ib_get_dev_addr(struct net_device *dev,
  1396. struct mlx4_ib_dev *ibdev, u8 port)
  1397. {
  1398. struct in_device *in_dev;
  1399. #if IS_ENABLED(CONFIG_IPV6)
  1400. struct inet6_dev *in6_dev;
  1401. union ib_gid *pgid;
  1402. struct inet6_ifaddr *ifp;
  1403. #endif
  1404. union ib_gid gid;
  1405. if ((port == 0) || (port > ibdev->dev->caps.num_ports))
  1406. return;
  1407. /* IPv4 gids */
  1408. in_dev = in_dev_get(dev);
  1409. if (in_dev) {
  1410. for_ifa(in_dev) {
  1411. /*ifa->ifa_address;*/
  1412. ipv6_addr_set_v4mapped(ifa->ifa_address,
  1413. (struct in6_addr *)&gid);
  1414. update_gid_table(ibdev, port, &gid, 0, 0);
  1415. }
  1416. endfor_ifa(in_dev);
  1417. in_dev_put(in_dev);
  1418. }
  1419. #if IS_ENABLED(CONFIG_IPV6)
  1420. /* IPv6 gids */
  1421. in6_dev = in6_dev_get(dev);
  1422. if (in6_dev) {
  1423. read_lock_bh(&in6_dev->lock);
  1424. list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
  1425. pgid = (union ib_gid *)&ifp->addr;
  1426. update_gid_table(ibdev, port, pgid, 0, 0);
  1427. }
  1428. read_unlock_bh(&in6_dev->lock);
  1429. in6_dev_put(in6_dev);
  1430. }
  1431. #endif
  1432. }
  1433. static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
  1434. struct net_device *dev, u8 port)
  1435. {
  1436. union ib_gid gid;
  1437. mlx4_make_default_gid(dev, &gid);
  1438. update_gid_table(ibdev, port, &gid, 0, 1);
  1439. }
  1440. static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
  1441. {
  1442. struct net_device *dev;
  1443. struct mlx4_ib_iboe *iboe = &ibdev->iboe;
  1444. int i;
  1445. for (i = 1; i <= ibdev->num_ports; ++i)
  1446. if (reset_gid_table(ibdev, i))
  1447. return -1;
  1448. read_lock(&dev_base_lock);
  1449. spin_lock(&iboe->lock);
  1450. for_each_netdev(&init_net, dev) {
  1451. u8 port = mlx4_ib_get_dev_port(dev, ibdev);
  1452. if (port)
  1453. mlx4_ib_get_dev_addr(dev, ibdev, port);
  1454. }
  1455. spin_unlock(&iboe->lock);
  1456. read_unlock(&dev_base_lock);
  1457. return 0;
  1458. }
  1459. static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
  1460. struct net_device *dev,
  1461. unsigned long event)
  1462. {
  1463. struct mlx4_ib_iboe *iboe;
  1464. int update_qps_port = -1;
  1465. int port;
  1466. iboe = &ibdev->iboe;
  1467. spin_lock(&iboe->lock);
  1468. mlx4_foreach_ib_transport_port(port, ibdev->dev) {
  1469. enum ib_port_state port_state = IB_PORT_NOP;
  1470. struct net_device *old_master = iboe->masters[port - 1];
  1471. struct net_device *curr_netdev;
  1472. struct net_device *curr_master;
  1473. iboe->netdevs[port - 1] =
  1474. mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
  1475. if (iboe->netdevs[port - 1])
  1476. mlx4_ib_set_default_gid(ibdev,
  1477. iboe->netdevs[port - 1], port);
  1478. curr_netdev = iboe->netdevs[port - 1];
  1479. if (iboe->netdevs[port - 1] &&
  1480. netif_is_bond_slave(iboe->netdevs[port - 1])) {
  1481. iboe->masters[port - 1] = netdev_master_upper_dev_get(
  1482. iboe->netdevs[port - 1]);
  1483. } else {
  1484. iboe->masters[port - 1] = NULL;
  1485. }
  1486. curr_master = iboe->masters[port - 1];
  1487. if (dev == iboe->netdevs[port - 1] &&
  1488. (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
  1489. event == NETDEV_UP || event == NETDEV_CHANGE))
  1490. update_qps_port = port;
  1491. if (curr_netdev) {
  1492. port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
  1493. IB_PORT_ACTIVE : IB_PORT_DOWN;
  1494. mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
  1495. } else {
  1496. reset_gid_table(ibdev, port);
  1497. }
  1498. /* if using bonding/team and a slave port is down, we don't the bond IP
  1499. * based gids in the table since flows that select port by gid may get
  1500. * the down port.
  1501. */
  1502. if (curr_master && (port_state == IB_PORT_DOWN)) {
  1503. reset_gid_table(ibdev, port);
  1504. mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
  1505. }
  1506. /* if bonding is used it is possible that we add it to masters
  1507. * only after IP address is assigned to the net bonding
  1508. * interface.
  1509. */
  1510. if (curr_master && (old_master != curr_master)) {
  1511. reset_gid_table(ibdev, port);
  1512. mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
  1513. mlx4_ib_get_dev_addr(curr_master, ibdev, port);
  1514. }
  1515. if (!curr_master && (old_master != curr_master)) {
  1516. reset_gid_table(ibdev, port);
  1517. mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
  1518. mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
  1519. }
  1520. }
  1521. spin_unlock(&iboe->lock);
  1522. if (update_qps_port > 0)
  1523. mlx4_ib_update_qps(ibdev, dev, update_qps_port);
  1524. }
  1525. static int mlx4_ib_netdev_event(struct notifier_block *this,
  1526. unsigned long event, void *ptr)
  1527. {
  1528. struct net_device *dev = netdev_notifier_info_to_dev(ptr);
  1529. struct mlx4_ib_dev *ibdev;
  1530. if (!net_eq(dev_net(dev), &init_net))
  1531. return NOTIFY_DONE;
  1532. ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
  1533. mlx4_ib_scan_netdevs(ibdev, dev, event);
  1534. return NOTIFY_DONE;
  1535. }
  1536. static void init_pkeys(struct mlx4_ib_dev *ibdev)
  1537. {
  1538. int port;
  1539. int slave;
  1540. int i;
  1541. if (mlx4_is_master(ibdev->dev)) {
  1542. for (slave = 0; slave <= ibdev->dev->num_vfs; ++slave) {
  1543. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
  1544. for (i = 0;
  1545. i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
  1546. ++i) {
  1547. ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
  1548. /* master has the identity virt2phys pkey mapping */
  1549. (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
  1550. ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
  1551. mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
  1552. ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
  1553. }
  1554. }
  1555. }
  1556. /* initialize pkey cache */
  1557. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
  1558. for (i = 0;
  1559. i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
  1560. ++i)
  1561. ibdev->pkeys.phys_pkey_cache[port-1][i] =
  1562. (i) ? 0 : 0xFFFF;
  1563. }
  1564. }
  1565. }
  1566. static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
  1567. {
  1568. char name[80];
  1569. int eq_per_port = 0;
  1570. int added_eqs = 0;
  1571. int total_eqs = 0;
  1572. int i, j, eq;
  1573. /* Legacy mode or comp_pool is not large enough */
  1574. if (dev->caps.comp_pool == 0 ||
  1575. dev->caps.num_ports > dev->caps.comp_pool)
  1576. return;
  1577. eq_per_port = rounddown_pow_of_two(dev->caps.comp_pool/
  1578. dev->caps.num_ports);
  1579. /* Init eq table */
  1580. added_eqs = 0;
  1581. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  1582. added_eqs += eq_per_port;
  1583. total_eqs = dev->caps.num_comp_vectors + added_eqs;
  1584. ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
  1585. if (!ibdev->eq_table)
  1586. return;
  1587. ibdev->eq_added = added_eqs;
  1588. eq = 0;
  1589. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
  1590. for (j = 0; j < eq_per_port; j++) {
  1591. snprintf(name, sizeof(name), "mlx4-ib-%d-%d@%s",
  1592. i, j, dev->pdev->bus->name);
  1593. /* Set IRQ for specific name (per ring) */
  1594. if (mlx4_assign_eq(dev, name, NULL,
  1595. &ibdev->eq_table[eq])) {
  1596. /* Use legacy (same as mlx4_en driver) */
  1597. pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
  1598. ibdev->eq_table[eq] =
  1599. (eq % dev->caps.num_comp_vectors);
  1600. }
  1601. eq++;
  1602. }
  1603. }
  1604. /* Fill the reset of the vector with legacy EQ */
  1605. for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
  1606. ibdev->eq_table[eq++] = i;
  1607. /* Advertise the new number of EQs to clients */
  1608. ibdev->ib_dev.num_comp_vectors = total_eqs;
  1609. }
  1610. static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
  1611. {
  1612. int i;
  1613. /* no additional eqs were added */
  1614. if (!ibdev->eq_table)
  1615. return;
  1616. /* Reset the advertised EQ number */
  1617. ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
  1618. /* Free only the added eqs */
  1619. for (i = 0; i < ibdev->eq_added; i++) {
  1620. /* Don't free legacy eqs if used */
  1621. if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
  1622. continue;
  1623. mlx4_release_eq(dev, ibdev->eq_table[i]);
  1624. }
  1625. kfree(ibdev->eq_table);
  1626. }
  1627. static void *mlx4_ib_add(struct mlx4_dev *dev)
  1628. {
  1629. struct mlx4_ib_dev *ibdev;
  1630. int num_ports = 0;
  1631. int i, j;
  1632. int err;
  1633. struct mlx4_ib_iboe *iboe;
  1634. int ib_num_ports = 0;
  1635. pr_info_once("%s", mlx4_ib_version);
  1636. num_ports = 0;
  1637. mlx4_foreach_ib_transport_port(i, dev)
  1638. num_ports++;
  1639. /* No point in registering a device with no ports... */
  1640. if (num_ports == 0)
  1641. return NULL;
  1642. ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
  1643. if (!ibdev) {
  1644. dev_err(&dev->pdev->dev, "Device struct alloc failed\n");
  1645. return NULL;
  1646. }
  1647. iboe = &ibdev->iboe;
  1648. if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
  1649. goto err_dealloc;
  1650. if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
  1651. goto err_pd;
  1652. ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
  1653. PAGE_SIZE);
  1654. if (!ibdev->uar_map)
  1655. goto err_uar;
  1656. MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
  1657. ibdev->dev = dev;
  1658. strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
  1659. ibdev->ib_dev.owner = THIS_MODULE;
  1660. ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
  1661. ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
  1662. ibdev->num_ports = num_ports;
  1663. ibdev->ib_dev.phys_port_cnt = ibdev->num_ports;
  1664. ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
  1665. ibdev->ib_dev.dma_device = &dev->pdev->dev;
  1666. if (dev->caps.userspace_caps)
  1667. ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
  1668. else
  1669. ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
  1670. ibdev->ib_dev.uverbs_cmd_mask =
  1671. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  1672. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  1673. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  1674. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  1675. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  1676. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  1677. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  1678. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  1679. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  1680. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  1681. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  1682. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  1683. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  1684. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  1685. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  1686. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  1687. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
  1688. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  1689. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  1690. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  1691. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
  1692. (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
  1693. (1ull << IB_USER_VERBS_CMD_OPEN_QP);
  1694. ibdev->ib_dev.query_device = mlx4_ib_query_device;
  1695. ibdev->ib_dev.query_port = mlx4_ib_query_port;
  1696. ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
  1697. ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
  1698. ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
  1699. ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
  1700. ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
  1701. ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
  1702. ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
  1703. ibdev->ib_dev.mmap = mlx4_ib_mmap;
  1704. ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
  1705. ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
  1706. ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
  1707. ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
  1708. ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
  1709. ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
  1710. ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
  1711. ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
  1712. ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
  1713. ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
  1714. ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
  1715. ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
  1716. ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
  1717. ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
  1718. ibdev->ib_dev.post_send = mlx4_ib_post_send;
  1719. ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
  1720. ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
  1721. ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
  1722. ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
  1723. ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
  1724. ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
  1725. ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
  1726. ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
  1727. ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
  1728. ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
  1729. ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
  1730. ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
  1731. ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
  1732. ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
  1733. ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
  1734. ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
  1735. if (!mlx4_is_slave(ibdev->dev)) {
  1736. ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
  1737. ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
  1738. ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
  1739. ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
  1740. }
  1741. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
  1742. dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
  1743. ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
  1744. ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
  1745. ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
  1746. ibdev->ib_dev.uverbs_cmd_mask |=
  1747. (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
  1748. (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
  1749. }
  1750. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
  1751. ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
  1752. ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
  1753. ibdev->ib_dev.uverbs_cmd_mask |=
  1754. (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
  1755. (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
  1756. }
  1757. if (check_flow_steering_support(dev)) {
  1758. ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
  1759. ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
  1760. ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
  1761. ibdev->ib_dev.uverbs_ex_cmd_mask |=
  1762. (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
  1763. (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
  1764. }
  1765. mlx4_ib_alloc_eqs(dev, ibdev);
  1766. spin_lock_init(&iboe->lock);
  1767. if (init_node_data(ibdev))
  1768. goto err_map;
  1769. for (i = 0; i < ibdev->num_ports; ++i) {
  1770. mutex_init(&ibdev->qp1_proxy_lock[i]);
  1771. if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
  1772. IB_LINK_LAYER_ETHERNET) {
  1773. err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
  1774. if (err)
  1775. ibdev->counters[i] = -1;
  1776. } else {
  1777. ibdev->counters[i] = -1;
  1778. }
  1779. }
  1780. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  1781. ib_num_ports++;
  1782. spin_lock_init(&ibdev->sm_lock);
  1783. mutex_init(&ibdev->cap_mask_mutex);
  1784. if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
  1785. ib_num_ports) {
  1786. ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
  1787. err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
  1788. MLX4_IB_UC_STEER_QPN_ALIGN,
  1789. &ibdev->steer_qpn_base);
  1790. if (err)
  1791. goto err_counter;
  1792. ibdev->ib_uc_qpns_bitmap =
  1793. kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
  1794. sizeof(long),
  1795. GFP_KERNEL);
  1796. if (!ibdev->ib_uc_qpns_bitmap) {
  1797. dev_err(&dev->pdev->dev, "bit map alloc failed\n");
  1798. goto err_steer_qp_release;
  1799. }
  1800. bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
  1801. err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
  1802. dev, ibdev->steer_qpn_base,
  1803. ibdev->steer_qpn_base +
  1804. ibdev->steer_qpn_count - 1);
  1805. if (err)
  1806. goto err_steer_free_bitmap;
  1807. }
  1808. if (ib_register_device(&ibdev->ib_dev, NULL))
  1809. goto err_steer_free_bitmap;
  1810. if (mlx4_ib_mad_init(ibdev))
  1811. goto err_reg;
  1812. if (mlx4_ib_init_sriov(ibdev))
  1813. goto err_mad;
  1814. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
  1815. if (!iboe->nb.notifier_call) {
  1816. iboe->nb.notifier_call = mlx4_ib_netdev_event;
  1817. err = register_netdevice_notifier(&iboe->nb);
  1818. if (err) {
  1819. iboe->nb.notifier_call = NULL;
  1820. goto err_notif;
  1821. }
  1822. }
  1823. if (!iboe->nb_inet.notifier_call) {
  1824. iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
  1825. err = register_inetaddr_notifier(&iboe->nb_inet);
  1826. if (err) {
  1827. iboe->nb_inet.notifier_call = NULL;
  1828. goto err_notif;
  1829. }
  1830. }
  1831. #if IS_ENABLED(CONFIG_IPV6)
  1832. if (!iboe->nb_inet6.notifier_call) {
  1833. iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
  1834. err = register_inet6addr_notifier(&iboe->nb_inet6);
  1835. if (err) {
  1836. iboe->nb_inet6.notifier_call = NULL;
  1837. goto err_notif;
  1838. }
  1839. }
  1840. #endif
  1841. for (i = 1 ; i <= ibdev->num_ports ; ++i)
  1842. reset_gid_table(ibdev, i);
  1843. rtnl_lock();
  1844. mlx4_ib_scan_netdevs(ibdev, NULL, 0);
  1845. rtnl_unlock();
  1846. mlx4_ib_init_gid_table(ibdev);
  1847. }
  1848. for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
  1849. if (device_create_file(&ibdev->ib_dev.dev,
  1850. mlx4_class_attributes[j]))
  1851. goto err_notif;
  1852. }
  1853. ibdev->ib_active = true;
  1854. if (mlx4_is_mfunc(ibdev->dev))
  1855. init_pkeys(ibdev);
  1856. /* create paravirt contexts for any VFs which are active */
  1857. if (mlx4_is_master(ibdev->dev)) {
  1858. for (j = 0; j < MLX4_MFUNC_MAX; j++) {
  1859. if (j == mlx4_master_func_num(ibdev->dev))
  1860. continue;
  1861. if (mlx4_is_slave_active(ibdev->dev, j))
  1862. do_slave_init(ibdev, j, 1);
  1863. }
  1864. }
  1865. return ibdev;
  1866. err_notif:
  1867. if (ibdev->iboe.nb.notifier_call) {
  1868. if (unregister_netdevice_notifier(&ibdev->iboe.nb))
  1869. pr_warn("failure unregistering notifier\n");
  1870. ibdev->iboe.nb.notifier_call = NULL;
  1871. }
  1872. if (ibdev->iboe.nb_inet.notifier_call) {
  1873. if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
  1874. pr_warn("failure unregistering notifier\n");
  1875. ibdev->iboe.nb_inet.notifier_call = NULL;
  1876. }
  1877. #if IS_ENABLED(CONFIG_IPV6)
  1878. if (ibdev->iboe.nb_inet6.notifier_call) {
  1879. if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
  1880. pr_warn("failure unregistering notifier\n");
  1881. ibdev->iboe.nb_inet6.notifier_call = NULL;
  1882. }
  1883. #endif
  1884. flush_workqueue(wq);
  1885. mlx4_ib_close_sriov(ibdev);
  1886. err_mad:
  1887. mlx4_ib_mad_cleanup(ibdev);
  1888. err_reg:
  1889. ib_unregister_device(&ibdev->ib_dev);
  1890. err_steer_free_bitmap:
  1891. kfree(ibdev->ib_uc_qpns_bitmap);
  1892. err_steer_qp_release:
  1893. if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
  1894. mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
  1895. ibdev->steer_qpn_count);
  1896. err_counter:
  1897. for (; i; --i)
  1898. if (ibdev->counters[i - 1] != -1)
  1899. mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
  1900. err_map:
  1901. iounmap(ibdev->uar_map);
  1902. err_uar:
  1903. mlx4_uar_free(dev, &ibdev->priv_uar);
  1904. err_pd:
  1905. mlx4_pd_free(dev, ibdev->priv_pdn);
  1906. err_dealloc:
  1907. ib_dealloc_device(&ibdev->ib_dev);
  1908. return NULL;
  1909. }
  1910. int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
  1911. {
  1912. int offset;
  1913. WARN_ON(!dev->ib_uc_qpns_bitmap);
  1914. offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
  1915. dev->steer_qpn_count,
  1916. get_count_order(count));
  1917. if (offset < 0)
  1918. return offset;
  1919. *qpn = dev->steer_qpn_base + offset;
  1920. return 0;
  1921. }
  1922. void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
  1923. {
  1924. if (!qpn ||
  1925. dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
  1926. return;
  1927. BUG_ON(qpn < dev->steer_qpn_base);
  1928. bitmap_release_region(dev->ib_uc_qpns_bitmap,
  1929. qpn - dev->steer_qpn_base,
  1930. get_count_order(count));
  1931. }
  1932. int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  1933. int is_attach)
  1934. {
  1935. int err;
  1936. size_t flow_size;
  1937. struct ib_flow_attr *flow = NULL;
  1938. struct ib_flow_spec_ib *ib_spec;
  1939. if (is_attach) {
  1940. flow_size = sizeof(struct ib_flow_attr) +
  1941. sizeof(struct ib_flow_spec_ib);
  1942. flow = kzalloc(flow_size, GFP_KERNEL);
  1943. if (!flow)
  1944. return -ENOMEM;
  1945. flow->port = mqp->port;
  1946. flow->num_of_specs = 1;
  1947. flow->size = flow_size;
  1948. ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
  1949. ib_spec->type = IB_FLOW_SPEC_IB;
  1950. ib_spec->size = sizeof(struct ib_flow_spec_ib);
  1951. /* Add an empty rule for IB L2 */
  1952. memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
  1953. err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
  1954. IB_FLOW_DOMAIN_NIC,
  1955. MLX4_FS_REGULAR,
  1956. &mqp->reg_id);
  1957. } else {
  1958. err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
  1959. }
  1960. kfree(flow);
  1961. return err;
  1962. }
  1963. static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
  1964. {
  1965. struct mlx4_ib_dev *ibdev = ibdev_ptr;
  1966. int p;
  1967. mlx4_ib_close_sriov(ibdev);
  1968. mlx4_ib_mad_cleanup(ibdev);
  1969. ib_unregister_device(&ibdev->ib_dev);
  1970. if (ibdev->iboe.nb.notifier_call) {
  1971. if (unregister_netdevice_notifier(&ibdev->iboe.nb))
  1972. pr_warn("failure unregistering notifier\n");
  1973. ibdev->iboe.nb.notifier_call = NULL;
  1974. }
  1975. if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1976. mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
  1977. ibdev->steer_qpn_count);
  1978. kfree(ibdev->ib_uc_qpns_bitmap);
  1979. }
  1980. if (ibdev->iboe.nb_inet.notifier_call) {
  1981. if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
  1982. pr_warn("failure unregistering notifier\n");
  1983. ibdev->iboe.nb_inet.notifier_call = NULL;
  1984. }
  1985. #if IS_ENABLED(CONFIG_IPV6)
  1986. if (ibdev->iboe.nb_inet6.notifier_call) {
  1987. if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
  1988. pr_warn("failure unregistering notifier\n");
  1989. ibdev->iboe.nb_inet6.notifier_call = NULL;
  1990. }
  1991. #endif
  1992. iounmap(ibdev->uar_map);
  1993. for (p = 0; p < ibdev->num_ports; ++p)
  1994. if (ibdev->counters[p] != -1)
  1995. mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
  1996. mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
  1997. mlx4_CLOSE_PORT(dev, p);
  1998. mlx4_ib_free_eqs(dev, ibdev);
  1999. mlx4_uar_free(dev, &ibdev->priv_uar);
  2000. mlx4_pd_free(dev, ibdev->priv_pdn);
  2001. ib_dealloc_device(&ibdev->ib_dev);
  2002. }
  2003. static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
  2004. {
  2005. struct mlx4_ib_demux_work **dm = NULL;
  2006. struct mlx4_dev *dev = ibdev->dev;
  2007. int i;
  2008. unsigned long flags;
  2009. struct mlx4_active_ports actv_ports;
  2010. unsigned int ports;
  2011. unsigned int first_port;
  2012. if (!mlx4_is_master(dev))
  2013. return;
  2014. actv_ports = mlx4_get_active_ports(dev, slave);
  2015. ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
  2016. first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
  2017. dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
  2018. if (!dm) {
  2019. pr_err("failed to allocate memory for tunneling qp update\n");
  2020. goto out;
  2021. }
  2022. for (i = 0; i < ports; i++) {
  2023. dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
  2024. if (!dm[i]) {
  2025. pr_err("failed to allocate memory for tunneling qp update work struct\n");
  2026. for (i = 0; i < dev->caps.num_ports; i++) {
  2027. if (dm[i])
  2028. kfree(dm[i]);
  2029. }
  2030. goto out;
  2031. }
  2032. }
  2033. /* initialize or tear down tunnel QPs for the slave */
  2034. for (i = 0; i < ports; i++) {
  2035. INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
  2036. dm[i]->port = first_port + i + 1;
  2037. dm[i]->slave = slave;
  2038. dm[i]->do_init = do_init;
  2039. dm[i]->dev = ibdev;
  2040. spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
  2041. if (!ibdev->sriov.is_going_down)
  2042. queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
  2043. spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
  2044. }
  2045. out:
  2046. kfree(dm);
  2047. return;
  2048. }
  2049. static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
  2050. enum mlx4_dev_event event, unsigned long param)
  2051. {
  2052. struct ib_event ibev;
  2053. struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
  2054. struct mlx4_eqe *eqe = NULL;
  2055. struct ib_event_work *ew;
  2056. int p = 0;
  2057. if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
  2058. eqe = (struct mlx4_eqe *)param;
  2059. else
  2060. p = (int) param;
  2061. switch (event) {
  2062. case MLX4_DEV_EVENT_PORT_UP:
  2063. if (p > ibdev->num_ports)
  2064. return;
  2065. if (mlx4_is_master(dev) &&
  2066. rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
  2067. IB_LINK_LAYER_INFINIBAND) {
  2068. mlx4_ib_invalidate_all_guid_record(ibdev, p);
  2069. }
  2070. ibev.event = IB_EVENT_PORT_ACTIVE;
  2071. break;
  2072. case MLX4_DEV_EVENT_PORT_DOWN:
  2073. if (p > ibdev->num_ports)
  2074. return;
  2075. ibev.event = IB_EVENT_PORT_ERR;
  2076. break;
  2077. case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
  2078. ibdev->ib_active = false;
  2079. ibev.event = IB_EVENT_DEVICE_FATAL;
  2080. break;
  2081. case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
  2082. ew = kmalloc(sizeof *ew, GFP_ATOMIC);
  2083. if (!ew) {
  2084. pr_err("failed to allocate memory for events work\n");
  2085. break;
  2086. }
  2087. INIT_WORK(&ew->work, handle_port_mgmt_change_event);
  2088. memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
  2089. ew->ib_dev = ibdev;
  2090. /* need to queue only for port owner, which uses GEN_EQE */
  2091. if (mlx4_is_master(dev))
  2092. queue_work(wq, &ew->work);
  2093. else
  2094. handle_port_mgmt_change_event(&ew->work);
  2095. return;
  2096. case MLX4_DEV_EVENT_SLAVE_INIT:
  2097. /* here, p is the slave id */
  2098. do_slave_init(ibdev, p, 1);
  2099. return;
  2100. case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
  2101. /* here, p is the slave id */
  2102. do_slave_init(ibdev, p, 0);
  2103. return;
  2104. default:
  2105. return;
  2106. }
  2107. ibev.device = ibdev_ptr;
  2108. ibev.element.port_num = (u8) p;
  2109. ib_dispatch_event(&ibev);
  2110. }
  2111. static struct mlx4_interface mlx4_ib_interface = {
  2112. .add = mlx4_ib_add,
  2113. .remove = mlx4_ib_remove,
  2114. .event = mlx4_ib_event,
  2115. .protocol = MLX4_PROT_IB_IPV6
  2116. };
  2117. static int __init mlx4_ib_init(void)
  2118. {
  2119. int err;
  2120. wq = create_singlethread_workqueue("mlx4_ib");
  2121. if (!wq)
  2122. return -ENOMEM;
  2123. err = mlx4_ib_mcg_init();
  2124. if (err)
  2125. goto clean_wq;
  2126. err = mlx4_register_interface(&mlx4_ib_interface);
  2127. if (err)
  2128. goto clean_mcg;
  2129. return 0;
  2130. clean_mcg:
  2131. mlx4_ib_mcg_destroy();
  2132. clean_wq:
  2133. destroy_workqueue(wq);
  2134. return err;
  2135. }
  2136. static void __exit mlx4_ib_cleanup(void)
  2137. {
  2138. mlx4_unregister_interface(&mlx4_ib_interface);
  2139. mlx4_ib_mcg_destroy();
  2140. destroy_workqueue(wq);
  2141. }
  2142. module_init(mlx4_ib_init);
  2143. module_exit(mlx4_ib_cleanup);