gp2ap020a00f.c 46 KB

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  1. /*
  2. * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  3. * Author: Jacek Anaszewski <j.anaszewski@samsung.com>
  4. *
  5. * IIO features supported by the driver:
  6. *
  7. * Read-only raw channels:
  8. * - illuminance_clear [lux]
  9. * - illuminance_ir
  10. * - proximity
  11. *
  12. * Triggered buffer:
  13. * - illuminance_clear
  14. * - illuminance_ir
  15. * - proximity
  16. *
  17. * Events:
  18. * - illuminance_clear (rising and falling)
  19. * - proximity (rising and falling)
  20. * - both falling and rising thresholds for the proximity events
  21. * must be set to the values greater than 0.
  22. *
  23. * The driver supports triggered buffers for all the three
  24. * channels as well as high and low threshold events for the
  25. * illuminance_clear and proxmimity channels. Triggers
  26. * can be enabled simultaneously with both illuminance_clear
  27. * events. Proximity events cannot be enabled simultaneously
  28. * with any triggers or illuminance events. Enabling/disabling
  29. * one of the proximity events automatically enables/disables
  30. * the other one.
  31. *
  32. * This program is free software; you can redistribute it and/or modify
  33. * it under the terms of the GNU General Public License version 2, as
  34. * published by the Free Software Foundation.
  35. */
  36. #include <linux/debugfs.h>
  37. #include <linux/delay.h>
  38. #include <linux/i2c.h>
  39. #include <linux/interrupt.h>
  40. #include <linux/irq.h>
  41. #include <linux/irq_work.h>
  42. #include <linux/module.h>
  43. #include <linux/mutex.h>
  44. #include <linux/of.h>
  45. #include <linux/regmap.h>
  46. #include <linux/regulator/consumer.h>
  47. #include <linux/slab.h>
  48. #include <linux/iio/buffer.h>
  49. #include <linux/iio/events.h>
  50. #include <linux/iio/iio.h>
  51. #include <linux/iio/sysfs.h>
  52. #include <linux/iio/trigger.h>
  53. #include <linux/iio/trigger_consumer.h>
  54. #include <linux/iio/triggered_buffer.h>
  55. #define GP2A_I2C_NAME "gp2ap020a00f"
  56. /* Registers */
  57. #define GP2AP020A00F_OP_REG 0x00 /* Basic operations */
  58. #define GP2AP020A00F_ALS_REG 0x01 /* ALS related settings */
  59. #define GP2AP020A00F_PS_REG 0x02 /* PS related settings */
  60. #define GP2AP020A00F_LED_REG 0x03 /* LED reg */
  61. #define GP2AP020A00F_TL_L_REG 0x04 /* ALS: Threshold low LSB */
  62. #define GP2AP020A00F_TL_H_REG 0x05 /* ALS: Threshold low MSB */
  63. #define GP2AP020A00F_TH_L_REG 0x06 /* ALS: Threshold high LSB */
  64. #define GP2AP020A00F_TH_H_REG 0x07 /* ALS: Threshold high MSB */
  65. #define GP2AP020A00F_PL_L_REG 0x08 /* PS: Threshold low LSB */
  66. #define GP2AP020A00F_PL_H_REG 0x09 /* PS: Threshold low MSB */
  67. #define GP2AP020A00F_PH_L_REG 0x0a /* PS: Threshold high LSB */
  68. #define GP2AP020A00F_PH_H_REG 0x0b /* PS: Threshold high MSB */
  69. #define GP2AP020A00F_D0_L_REG 0x0c /* ALS result: Clear/Illuminance LSB */
  70. #define GP2AP020A00F_D0_H_REG 0x0d /* ALS result: Clear/Illuminance MSB */
  71. #define GP2AP020A00F_D1_L_REG 0x0e /* ALS result: IR LSB */
  72. #define GP2AP020A00F_D1_H_REG 0x0f /* ALS result: IR LSB */
  73. #define GP2AP020A00F_D2_L_REG 0x10 /* PS result LSB */
  74. #define GP2AP020A00F_D2_H_REG 0x11 /* PS result MSB */
  75. #define GP2AP020A00F_NUM_REGS 0x12 /* Number of registers */
  76. /* OP_REG bits */
  77. #define GP2AP020A00F_OP3_MASK 0x80 /* Software shutdown */
  78. #define GP2AP020A00F_OP3_SHUTDOWN 0x00
  79. #define GP2AP020A00F_OP3_OPERATION 0x80
  80. #define GP2AP020A00F_OP2_MASK 0x40 /* Auto shutdown/Continuous mode */
  81. #define GP2AP020A00F_OP2_AUTO_SHUTDOWN 0x00
  82. #define GP2AP020A00F_OP2_CONT_OPERATION 0x40
  83. #define GP2AP020A00F_OP_MASK 0x30 /* Operating mode selection */
  84. #define GP2AP020A00F_OP_ALS_AND_PS 0x00
  85. #define GP2AP020A00F_OP_ALS 0x10
  86. #define GP2AP020A00F_OP_PS 0x20
  87. #define GP2AP020A00F_OP_DEBUG 0x30
  88. #define GP2AP020A00F_PROX_MASK 0x08 /* PS: detection/non-detection */
  89. #define GP2AP020A00F_PROX_NON_DETECT 0x00
  90. #define GP2AP020A00F_PROX_DETECT 0x08
  91. #define GP2AP020A00F_FLAG_P 0x04 /* PS: interrupt result */
  92. #define GP2AP020A00F_FLAG_A 0x02 /* ALS: interrupt result */
  93. #define GP2AP020A00F_TYPE_MASK 0x01 /* Output data type selection */
  94. #define GP2AP020A00F_TYPE_MANUAL_CALC 0x00
  95. #define GP2AP020A00F_TYPE_AUTO_CALC 0x01
  96. /* ALS_REG bits */
  97. #define GP2AP020A00F_PRST_MASK 0xc0 /* Number of measurement cycles */
  98. #define GP2AP020A00F_PRST_ONCE 0x00
  99. #define GP2AP020A00F_PRST_4_CYCLES 0x40
  100. #define GP2AP020A00F_PRST_8_CYCLES 0x80
  101. #define GP2AP020A00F_PRST_16_CYCLES 0xc0
  102. #define GP2AP020A00F_RES_A_MASK 0x38 /* ALS: Resolution */
  103. #define GP2AP020A00F_RES_A_800ms 0x00
  104. #define GP2AP020A00F_RES_A_400ms 0x08
  105. #define GP2AP020A00F_RES_A_200ms 0x10
  106. #define GP2AP020A00F_RES_A_100ms 0x18
  107. #define GP2AP020A00F_RES_A_25ms 0x20
  108. #define GP2AP020A00F_RES_A_6_25ms 0x28
  109. #define GP2AP020A00F_RES_A_1_56ms 0x30
  110. #define GP2AP020A00F_RES_A_0_39ms 0x38
  111. #define GP2AP020A00F_RANGE_A_MASK 0x07 /* ALS: Max measurable range */
  112. #define GP2AP020A00F_RANGE_A_x1 0x00
  113. #define GP2AP020A00F_RANGE_A_x2 0x01
  114. #define GP2AP020A00F_RANGE_A_x4 0x02
  115. #define GP2AP020A00F_RANGE_A_x8 0x03
  116. #define GP2AP020A00F_RANGE_A_x16 0x04
  117. #define GP2AP020A00F_RANGE_A_x32 0x05
  118. #define GP2AP020A00F_RANGE_A_x64 0x06
  119. #define GP2AP020A00F_RANGE_A_x128 0x07
  120. /* PS_REG bits */
  121. #define GP2AP020A00F_ALC_MASK 0x80 /* Auto light cancel */
  122. #define GP2AP020A00F_ALC_ON 0x80
  123. #define GP2AP020A00F_ALC_OFF 0x00
  124. #define GP2AP020A00F_INTTYPE_MASK 0x40 /* Interrupt type setting */
  125. #define GP2AP020A00F_INTTYPE_LEVEL 0x00
  126. #define GP2AP020A00F_INTTYPE_PULSE 0x40
  127. #define GP2AP020A00F_RES_P_MASK 0x38 /* PS: Resolution */
  128. #define GP2AP020A00F_RES_P_800ms_x2 0x00
  129. #define GP2AP020A00F_RES_P_400ms_x2 0x08
  130. #define GP2AP020A00F_RES_P_200ms_x2 0x10
  131. #define GP2AP020A00F_RES_P_100ms_x2 0x18
  132. #define GP2AP020A00F_RES_P_25ms_x2 0x20
  133. #define GP2AP020A00F_RES_P_6_25ms_x2 0x28
  134. #define GP2AP020A00F_RES_P_1_56ms_x2 0x30
  135. #define GP2AP020A00F_RES_P_0_39ms_x2 0x38
  136. #define GP2AP020A00F_RANGE_P_MASK 0x07 /* PS: Max measurable range */
  137. #define GP2AP020A00F_RANGE_P_x1 0x00
  138. #define GP2AP020A00F_RANGE_P_x2 0x01
  139. #define GP2AP020A00F_RANGE_P_x4 0x02
  140. #define GP2AP020A00F_RANGE_P_x8 0x03
  141. #define GP2AP020A00F_RANGE_P_x16 0x04
  142. #define GP2AP020A00F_RANGE_P_x32 0x05
  143. #define GP2AP020A00F_RANGE_P_x64 0x06
  144. #define GP2AP020A00F_RANGE_P_x128 0x07
  145. /* LED reg bits */
  146. #define GP2AP020A00F_INTVAL_MASK 0xc0 /* Intermittent operating */
  147. #define GP2AP020A00F_INTVAL_0 0x00
  148. #define GP2AP020A00F_INTVAL_4 0x40
  149. #define GP2AP020A00F_INTVAL_8 0x80
  150. #define GP2AP020A00F_INTVAL_16 0xc0
  151. #define GP2AP020A00F_IS_MASK 0x30 /* ILED drive peak current */
  152. #define GP2AP020A00F_IS_13_8mA 0x00
  153. #define GP2AP020A00F_IS_27_5mA 0x10
  154. #define GP2AP020A00F_IS_55mA 0x20
  155. #define GP2AP020A00F_IS_110mA 0x30
  156. #define GP2AP020A00F_PIN_MASK 0x0c /* INT terminal setting */
  157. #define GP2AP020A00F_PIN_ALS_OR_PS 0x00
  158. #define GP2AP020A00F_PIN_ALS 0x04
  159. #define GP2AP020A00F_PIN_PS 0x08
  160. #define GP2AP020A00F_PIN_PS_DETECT 0x0c
  161. #define GP2AP020A00F_FREQ_MASK 0x02 /* LED modulation frequency */
  162. #define GP2AP020A00F_FREQ_327_5kHz 0x00
  163. #define GP2AP020A00F_FREQ_81_8kHz 0x02
  164. #define GP2AP020A00F_RST 0x01 /* Software reset */
  165. #define GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR 0
  166. #define GP2AP020A00F_SCAN_MODE_LIGHT_IR 1
  167. #define GP2AP020A00F_SCAN_MODE_PROXIMITY 2
  168. #define GP2AP020A00F_CHAN_TIMESTAMP 3
  169. #define GP2AP020A00F_DATA_READY_TIMEOUT msecs_to_jiffies(1000)
  170. #define GP2AP020A00F_DATA_REG(chan) (GP2AP020A00F_D0_L_REG + \
  171. (chan) * 2)
  172. #define GP2AP020A00F_THRESH_REG(th_val_id) (GP2AP020A00F_TL_L_REG + \
  173. (th_val_id) * 2)
  174. #define GP2AP020A00F_THRESH_VAL_ID(reg_addr) ((reg_addr - 4) / 2)
  175. #define GP2AP020A00F_SUBTRACT_MODE 0
  176. #define GP2AP020A00F_ADD_MODE 1
  177. #define GP2AP020A00F_MAX_CHANNELS 3
  178. enum gp2ap020a00f_opmode {
  179. GP2AP020A00F_OPMODE_READ_RAW_CLEAR,
  180. GP2AP020A00F_OPMODE_READ_RAW_IR,
  181. GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY,
  182. GP2AP020A00F_OPMODE_ALS,
  183. GP2AP020A00F_OPMODE_PS,
  184. GP2AP020A00F_OPMODE_ALS_AND_PS,
  185. GP2AP020A00F_OPMODE_PROX_DETECT,
  186. GP2AP020A00F_OPMODE_SHUTDOWN,
  187. GP2AP020A00F_NUM_OPMODES,
  188. };
  189. enum gp2ap020a00f_cmd {
  190. GP2AP020A00F_CMD_READ_RAW_CLEAR,
  191. GP2AP020A00F_CMD_READ_RAW_IR,
  192. GP2AP020A00F_CMD_READ_RAW_PROXIMITY,
  193. GP2AP020A00F_CMD_TRIGGER_CLEAR_EN,
  194. GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS,
  195. GP2AP020A00F_CMD_TRIGGER_IR_EN,
  196. GP2AP020A00F_CMD_TRIGGER_IR_DIS,
  197. GP2AP020A00F_CMD_TRIGGER_PROX_EN,
  198. GP2AP020A00F_CMD_TRIGGER_PROX_DIS,
  199. GP2AP020A00F_CMD_ALS_HIGH_EV_EN,
  200. GP2AP020A00F_CMD_ALS_HIGH_EV_DIS,
  201. GP2AP020A00F_CMD_ALS_LOW_EV_EN,
  202. GP2AP020A00F_CMD_ALS_LOW_EV_DIS,
  203. GP2AP020A00F_CMD_PROX_HIGH_EV_EN,
  204. GP2AP020A00F_CMD_PROX_HIGH_EV_DIS,
  205. GP2AP020A00F_CMD_PROX_LOW_EV_EN,
  206. GP2AP020A00F_CMD_PROX_LOW_EV_DIS,
  207. };
  208. enum gp2ap020a00f_flags {
  209. GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER,
  210. GP2AP020A00F_FLAG_ALS_IR_TRIGGER,
  211. GP2AP020A00F_FLAG_PROX_TRIGGER,
  212. GP2AP020A00F_FLAG_PROX_RISING_EV,
  213. GP2AP020A00F_FLAG_PROX_FALLING_EV,
  214. GP2AP020A00F_FLAG_ALS_RISING_EV,
  215. GP2AP020A00F_FLAG_ALS_FALLING_EV,
  216. GP2AP020A00F_FLAG_LUX_MODE_HI,
  217. GP2AP020A00F_FLAG_DATA_READY,
  218. };
  219. enum gp2ap020a00f_thresh_val_id {
  220. GP2AP020A00F_THRESH_TL,
  221. GP2AP020A00F_THRESH_TH,
  222. GP2AP020A00F_THRESH_PL,
  223. GP2AP020A00F_THRESH_PH,
  224. };
  225. struct gp2ap020a00f_data {
  226. const struct gp2ap020a00f_platform_data *pdata;
  227. struct i2c_client *client;
  228. struct mutex lock;
  229. char *buffer;
  230. struct regulator *vled_reg;
  231. unsigned long flags;
  232. enum gp2ap020a00f_opmode cur_opmode;
  233. struct iio_trigger *trig;
  234. struct regmap *regmap;
  235. unsigned int thresh_val[4];
  236. u8 debug_reg_addr;
  237. struct irq_work work;
  238. wait_queue_head_t data_ready_queue;
  239. };
  240. static const u8 gp2ap020a00f_reg_init_tab[] = {
  241. [GP2AP020A00F_OP_REG] = GP2AP020A00F_OP3_SHUTDOWN,
  242. [GP2AP020A00F_ALS_REG] = GP2AP020A00F_RES_A_25ms |
  243. GP2AP020A00F_RANGE_A_x8,
  244. [GP2AP020A00F_PS_REG] = GP2AP020A00F_ALC_ON |
  245. GP2AP020A00F_RES_P_1_56ms_x2 |
  246. GP2AP020A00F_RANGE_P_x4,
  247. [GP2AP020A00F_LED_REG] = GP2AP020A00F_INTVAL_0 |
  248. GP2AP020A00F_IS_110mA |
  249. GP2AP020A00F_FREQ_327_5kHz,
  250. [GP2AP020A00F_TL_L_REG] = 0,
  251. [GP2AP020A00F_TL_H_REG] = 0,
  252. [GP2AP020A00F_TH_L_REG] = 0,
  253. [GP2AP020A00F_TH_H_REG] = 0,
  254. [GP2AP020A00F_PL_L_REG] = 0,
  255. [GP2AP020A00F_PL_H_REG] = 0,
  256. [GP2AP020A00F_PH_L_REG] = 0,
  257. [GP2AP020A00F_PH_H_REG] = 0,
  258. };
  259. static bool gp2ap020a00f_is_volatile_reg(struct device *dev, unsigned int reg)
  260. {
  261. switch (reg) {
  262. case GP2AP020A00F_OP_REG:
  263. case GP2AP020A00F_D0_L_REG:
  264. case GP2AP020A00F_D0_H_REG:
  265. case GP2AP020A00F_D1_L_REG:
  266. case GP2AP020A00F_D1_H_REG:
  267. case GP2AP020A00F_D2_L_REG:
  268. case GP2AP020A00F_D2_H_REG:
  269. return true;
  270. default:
  271. return false;
  272. }
  273. }
  274. static const struct regmap_config gp2ap020a00f_regmap_config = {
  275. .reg_bits = 8,
  276. .val_bits = 8,
  277. .max_register = GP2AP020A00F_D2_H_REG,
  278. .cache_type = REGCACHE_RBTREE,
  279. .volatile_reg = gp2ap020a00f_is_volatile_reg,
  280. };
  281. static const struct gp2ap020a00f_mutable_config_regs {
  282. u8 op_reg;
  283. u8 als_reg;
  284. u8 ps_reg;
  285. u8 led_reg;
  286. } opmode_regs_settings[GP2AP020A00F_NUM_OPMODES] = {
  287. [GP2AP020A00F_OPMODE_READ_RAW_CLEAR] = {
  288. GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
  289. | GP2AP020A00F_OP3_OPERATION
  290. | GP2AP020A00F_TYPE_AUTO_CALC,
  291. GP2AP020A00F_PRST_ONCE,
  292. GP2AP020A00F_INTTYPE_LEVEL,
  293. GP2AP020A00F_PIN_ALS
  294. },
  295. [GP2AP020A00F_OPMODE_READ_RAW_IR] = {
  296. GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
  297. | GP2AP020A00F_OP3_OPERATION
  298. | GP2AP020A00F_TYPE_MANUAL_CALC,
  299. GP2AP020A00F_PRST_ONCE,
  300. GP2AP020A00F_INTTYPE_LEVEL,
  301. GP2AP020A00F_PIN_ALS
  302. },
  303. [GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY] = {
  304. GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
  305. | GP2AP020A00F_OP3_OPERATION
  306. | GP2AP020A00F_TYPE_MANUAL_CALC,
  307. GP2AP020A00F_PRST_ONCE,
  308. GP2AP020A00F_INTTYPE_LEVEL,
  309. GP2AP020A00F_PIN_PS
  310. },
  311. [GP2AP020A00F_OPMODE_PROX_DETECT] = {
  312. GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
  313. | GP2AP020A00F_OP3_OPERATION
  314. | GP2AP020A00F_TYPE_MANUAL_CALC,
  315. GP2AP020A00F_PRST_4_CYCLES,
  316. GP2AP020A00F_INTTYPE_PULSE,
  317. GP2AP020A00F_PIN_PS_DETECT
  318. },
  319. [GP2AP020A00F_OPMODE_ALS] = {
  320. GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
  321. | GP2AP020A00F_OP3_OPERATION
  322. | GP2AP020A00F_TYPE_AUTO_CALC,
  323. GP2AP020A00F_PRST_ONCE,
  324. GP2AP020A00F_INTTYPE_LEVEL,
  325. GP2AP020A00F_PIN_ALS
  326. },
  327. [GP2AP020A00F_OPMODE_PS] = {
  328. GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
  329. | GP2AP020A00F_OP3_OPERATION
  330. | GP2AP020A00F_TYPE_MANUAL_CALC,
  331. GP2AP020A00F_PRST_4_CYCLES,
  332. GP2AP020A00F_INTTYPE_LEVEL,
  333. GP2AP020A00F_PIN_PS
  334. },
  335. [GP2AP020A00F_OPMODE_ALS_AND_PS] = {
  336. GP2AP020A00F_OP_ALS_AND_PS
  337. | GP2AP020A00F_OP2_CONT_OPERATION
  338. | GP2AP020A00F_OP3_OPERATION
  339. | GP2AP020A00F_TYPE_AUTO_CALC,
  340. GP2AP020A00F_PRST_4_CYCLES,
  341. GP2AP020A00F_INTTYPE_LEVEL,
  342. GP2AP020A00F_PIN_ALS_OR_PS
  343. },
  344. [GP2AP020A00F_OPMODE_SHUTDOWN] = { GP2AP020A00F_OP3_SHUTDOWN, },
  345. };
  346. static int gp2ap020a00f_set_operation_mode(struct gp2ap020a00f_data *data,
  347. enum gp2ap020a00f_opmode op)
  348. {
  349. unsigned int op_reg_val;
  350. int err;
  351. if (op != GP2AP020A00F_OPMODE_SHUTDOWN) {
  352. err = regmap_read(data->regmap, GP2AP020A00F_OP_REG,
  353. &op_reg_val);
  354. if (err < 0)
  355. return err;
  356. /*
  357. * Shutdown the device if the operation being executed entails
  358. * mode transition.
  359. */
  360. if ((opmode_regs_settings[op].op_reg & GP2AP020A00F_OP_MASK) !=
  361. (op_reg_val & GP2AP020A00F_OP_MASK)) {
  362. /* set shutdown mode */
  363. err = regmap_update_bits(data->regmap,
  364. GP2AP020A00F_OP_REG, GP2AP020A00F_OP3_MASK,
  365. GP2AP020A00F_OP3_SHUTDOWN);
  366. if (err < 0)
  367. return err;
  368. }
  369. err = regmap_update_bits(data->regmap, GP2AP020A00F_ALS_REG,
  370. GP2AP020A00F_PRST_MASK, opmode_regs_settings[op]
  371. .als_reg);
  372. if (err < 0)
  373. return err;
  374. err = regmap_update_bits(data->regmap, GP2AP020A00F_PS_REG,
  375. GP2AP020A00F_INTTYPE_MASK, opmode_regs_settings[op]
  376. .ps_reg);
  377. if (err < 0)
  378. return err;
  379. err = regmap_update_bits(data->regmap, GP2AP020A00F_LED_REG,
  380. GP2AP020A00F_PIN_MASK, opmode_regs_settings[op]
  381. .led_reg);
  382. if (err < 0)
  383. return err;
  384. }
  385. /* Set OP_REG and apply operation mode (power on / off) */
  386. err = regmap_update_bits(data->regmap,
  387. GP2AP020A00F_OP_REG,
  388. GP2AP020A00F_OP_MASK | GP2AP020A00F_OP2_MASK |
  389. GP2AP020A00F_OP3_MASK | GP2AP020A00F_TYPE_MASK,
  390. opmode_regs_settings[op].op_reg);
  391. if (err < 0)
  392. return err;
  393. data->cur_opmode = op;
  394. return 0;
  395. }
  396. static bool gp2ap020a00f_als_enabled(struct gp2ap020a00f_data *data)
  397. {
  398. return test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags) ||
  399. test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags) ||
  400. test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags) ||
  401. test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
  402. }
  403. static bool gp2ap020a00f_prox_detect_enabled(struct gp2ap020a00f_data *data)
  404. {
  405. return test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags) ||
  406. test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
  407. }
  408. static int gp2ap020a00f_write_event_threshold(struct gp2ap020a00f_data *data,
  409. enum gp2ap020a00f_thresh_val_id th_val_id,
  410. bool enable)
  411. {
  412. __le16 thresh_buf = 0;
  413. unsigned int thresh_reg_val;
  414. if (!enable)
  415. thresh_reg_val = 0;
  416. else if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags) &&
  417. th_val_id != GP2AP020A00F_THRESH_PL &&
  418. th_val_id != GP2AP020A00F_THRESH_PH)
  419. /*
  420. * For the high lux mode ALS threshold has to be scaled down
  421. * to allow for proper comparison with the output value.
  422. */
  423. thresh_reg_val = data->thresh_val[th_val_id] / 16;
  424. else
  425. thresh_reg_val = data->thresh_val[th_val_id] > 16000 ?
  426. 16000 :
  427. data->thresh_val[th_val_id];
  428. thresh_buf = cpu_to_le16(thresh_reg_val);
  429. return regmap_bulk_write(data->regmap,
  430. GP2AP020A00F_THRESH_REG(th_val_id),
  431. (u8 *)&thresh_buf, 2);
  432. }
  433. static int gp2ap020a00f_alter_opmode(struct gp2ap020a00f_data *data,
  434. enum gp2ap020a00f_opmode diff_mode, int add_sub)
  435. {
  436. enum gp2ap020a00f_opmode new_mode;
  437. if (diff_mode != GP2AP020A00F_OPMODE_ALS &&
  438. diff_mode != GP2AP020A00F_OPMODE_PS)
  439. return -EINVAL;
  440. if (add_sub == GP2AP020A00F_ADD_MODE) {
  441. if (data->cur_opmode == GP2AP020A00F_OPMODE_SHUTDOWN)
  442. new_mode = diff_mode;
  443. else
  444. new_mode = GP2AP020A00F_OPMODE_ALS_AND_PS;
  445. } else {
  446. if (data->cur_opmode == GP2AP020A00F_OPMODE_ALS_AND_PS)
  447. new_mode = (diff_mode == GP2AP020A00F_OPMODE_ALS) ?
  448. GP2AP020A00F_OPMODE_PS :
  449. GP2AP020A00F_OPMODE_ALS;
  450. else
  451. new_mode = GP2AP020A00F_OPMODE_SHUTDOWN;
  452. }
  453. return gp2ap020a00f_set_operation_mode(data, new_mode);
  454. }
  455. static int gp2ap020a00f_exec_cmd(struct gp2ap020a00f_data *data,
  456. enum gp2ap020a00f_cmd cmd)
  457. {
  458. int err = 0;
  459. switch (cmd) {
  460. case GP2AP020A00F_CMD_READ_RAW_CLEAR:
  461. if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
  462. return -EBUSY;
  463. err = gp2ap020a00f_set_operation_mode(data,
  464. GP2AP020A00F_OPMODE_READ_RAW_CLEAR);
  465. break;
  466. case GP2AP020A00F_CMD_READ_RAW_IR:
  467. if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
  468. return -EBUSY;
  469. err = gp2ap020a00f_set_operation_mode(data,
  470. GP2AP020A00F_OPMODE_READ_RAW_IR);
  471. break;
  472. case GP2AP020A00F_CMD_READ_RAW_PROXIMITY:
  473. if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
  474. return -EBUSY;
  475. err = gp2ap020a00f_set_operation_mode(data,
  476. GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY);
  477. break;
  478. case GP2AP020A00F_CMD_TRIGGER_CLEAR_EN:
  479. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  480. return -EBUSY;
  481. if (!gp2ap020a00f_als_enabled(data))
  482. err = gp2ap020a00f_alter_opmode(data,
  483. GP2AP020A00F_OPMODE_ALS,
  484. GP2AP020A00F_ADD_MODE);
  485. set_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
  486. break;
  487. case GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS:
  488. clear_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
  489. if (gp2ap020a00f_als_enabled(data))
  490. break;
  491. err = gp2ap020a00f_alter_opmode(data,
  492. GP2AP020A00F_OPMODE_ALS,
  493. GP2AP020A00F_SUBTRACT_MODE);
  494. break;
  495. case GP2AP020A00F_CMD_TRIGGER_IR_EN:
  496. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  497. return -EBUSY;
  498. if (!gp2ap020a00f_als_enabled(data))
  499. err = gp2ap020a00f_alter_opmode(data,
  500. GP2AP020A00F_OPMODE_ALS,
  501. GP2AP020A00F_ADD_MODE);
  502. set_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
  503. break;
  504. case GP2AP020A00F_CMD_TRIGGER_IR_DIS:
  505. clear_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
  506. if (gp2ap020a00f_als_enabled(data))
  507. break;
  508. err = gp2ap020a00f_alter_opmode(data,
  509. GP2AP020A00F_OPMODE_ALS,
  510. GP2AP020A00F_SUBTRACT_MODE);
  511. break;
  512. case GP2AP020A00F_CMD_TRIGGER_PROX_EN:
  513. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  514. return -EBUSY;
  515. err = gp2ap020a00f_alter_opmode(data,
  516. GP2AP020A00F_OPMODE_PS,
  517. GP2AP020A00F_ADD_MODE);
  518. set_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
  519. break;
  520. case GP2AP020A00F_CMD_TRIGGER_PROX_DIS:
  521. clear_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
  522. err = gp2ap020a00f_alter_opmode(data,
  523. GP2AP020A00F_OPMODE_PS,
  524. GP2AP020A00F_SUBTRACT_MODE);
  525. break;
  526. case GP2AP020A00F_CMD_ALS_HIGH_EV_EN:
  527. if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
  528. return 0;
  529. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  530. return -EBUSY;
  531. if (!gp2ap020a00f_als_enabled(data)) {
  532. err = gp2ap020a00f_alter_opmode(data,
  533. GP2AP020A00F_OPMODE_ALS,
  534. GP2AP020A00F_ADD_MODE);
  535. if (err < 0)
  536. return err;
  537. }
  538. set_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
  539. err = gp2ap020a00f_write_event_threshold(data,
  540. GP2AP020A00F_THRESH_TH, true);
  541. break;
  542. case GP2AP020A00F_CMD_ALS_HIGH_EV_DIS:
  543. if (!test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
  544. return 0;
  545. clear_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
  546. if (!gp2ap020a00f_als_enabled(data)) {
  547. err = gp2ap020a00f_alter_opmode(data,
  548. GP2AP020A00F_OPMODE_ALS,
  549. GP2AP020A00F_SUBTRACT_MODE);
  550. if (err < 0)
  551. return err;
  552. }
  553. err = gp2ap020a00f_write_event_threshold(data,
  554. GP2AP020A00F_THRESH_TH, false);
  555. break;
  556. case GP2AP020A00F_CMD_ALS_LOW_EV_EN:
  557. if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
  558. return 0;
  559. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  560. return -EBUSY;
  561. if (!gp2ap020a00f_als_enabled(data)) {
  562. err = gp2ap020a00f_alter_opmode(data,
  563. GP2AP020A00F_OPMODE_ALS,
  564. GP2AP020A00F_ADD_MODE);
  565. if (err < 0)
  566. return err;
  567. }
  568. set_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
  569. err = gp2ap020a00f_write_event_threshold(data,
  570. GP2AP020A00F_THRESH_TL, true);
  571. break;
  572. case GP2AP020A00F_CMD_ALS_LOW_EV_DIS:
  573. if (!test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
  574. return 0;
  575. clear_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
  576. if (!gp2ap020a00f_als_enabled(data)) {
  577. err = gp2ap020a00f_alter_opmode(data,
  578. GP2AP020A00F_OPMODE_ALS,
  579. GP2AP020A00F_SUBTRACT_MODE);
  580. if (err < 0)
  581. return err;
  582. }
  583. err = gp2ap020a00f_write_event_threshold(data,
  584. GP2AP020A00F_THRESH_TL, false);
  585. break;
  586. case GP2AP020A00F_CMD_PROX_HIGH_EV_EN:
  587. if (test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
  588. return 0;
  589. if (gp2ap020a00f_als_enabled(data) ||
  590. data->cur_opmode == GP2AP020A00F_OPMODE_PS)
  591. return -EBUSY;
  592. if (!gp2ap020a00f_prox_detect_enabled(data)) {
  593. err = gp2ap020a00f_set_operation_mode(data,
  594. GP2AP020A00F_OPMODE_PROX_DETECT);
  595. if (err < 0)
  596. return err;
  597. }
  598. set_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
  599. err = gp2ap020a00f_write_event_threshold(data,
  600. GP2AP020A00F_THRESH_PH, true);
  601. break;
  602. case GP2AP020A00F_CMD_PROX_HIGH_EV_DIS:
  603. if (!test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
  604. return 0;
  605. clear_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
  606. err = gp2ap020a00f_set_operation_mode(data,
  607. GP2AP020A00F_OPMODE_SHUTDOWN);
  608. if (err < 0)
  609. return err;
  610. err = gp2ap020a00f_write_event_threshold(data,
  611. GP2AP020A00F_THRESH_PH, false);
  612. break;
  613. case GP2AP020A00F_CMD_PROX_LOW_EV_EN:
  614. if (test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
  615. return 0;
  616. if (gp2ap020a00f_als_enabled(data) ||
  617. data->cur_opmode == GP2AP020A00F_OPMODE_PS)
  618. return -EBUSY;
  619. if (!gp2ap020a00f_prox_detect_enabled(data)) {
  620. err = gp2ap020a00f_set_operation_mode(data,
  621. GP2AP020A00F_OPMODE_PROX_DETECT);
  622. if (err < 0)
  623. return err;
  624. }
  625. set_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
  626. err = gp2ap020a00f_write_event_threshold(data,
  627. GP2AP020A00F_THRESH_PL, true);
  628. break;
  629. case GP2AP020A00F_CMD_PROX_LOW_EV_DIS:
  630. if (!test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
  631. return 0;
  632. clear_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
  633. err = gp2ap020a00f_set_operation_mode(data,
  634. GP2AP020A00F_OPMODE_SHUTDOWN);
  635. if (err < 0)
  636. return err;
  637. err = gp2ap020a00f_write_event_threshold(data,
  638. GP2AP020A00F_THRESH_PL, false);
  639. break;
  640. }
  641. return err;
  642. }
  643. static int wait_conversion_complete_irq(struct gp2ap020a00f_data *data)
  644. {
  645. int ret;
  646. ret = wait_event_timeout(data->data_ready_queue,
  647. test_bit(GP2AP020A00F_FLAG_DATA_READY,
  648. &data->flags),
  649. GP2AP020A00F_DATA_READY_TIMEOUT);
  650. clear_bit(GP2AP020A00F_FLAG_DATA_READY, &data->flags);
  651. return ret > 0 ? 0 : -ETIME;
  652. }
  653. static int gp2ap020a00f_read_output(struct gp2ap020a00f_data *data,
  654. unsigned int output_reg, int *val)
  655. {
  656. u8 reg_buf[2];
  657. int err;
  658. err = wait_conversion_complete_irq(data);
  659. if (err < 0)
  660. dev_dbg(&data->client->dev, "data ready timeout\n");
  661. err = regmap_bulk_read(data->regmap, output_reg, reg_buf, 2);
  662. if (err < 0)
  663. return err;
  664. *val = le16_to_cpup((__le16 *)reg_buf);
  665. return err;
  666. }
  667. static bool gp2ap020a00f_adjust_lux_mode(struct gp2ap020a00f_data *data,
  668. int output_val)
  669. {
  670. u8 new_range = 0xff;
  671. int err;
  672. if (!test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags)) {
  673. if (output_val > 16000) {
  674. set_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
  675. new_range = GP2AP020A00F_RANGE_A_x128;
  676. }
  677. } else {
  678. if (output_val < 1000) {
  679. clear_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
  680. new_range = GP2AP020A00F_RANGE_A_x8;
  681. }
  682. }
  683. if (new_range != 0xff) {
  684. /* Clear als threshold registers to avoid spurious
  685. * events caused by lux mode transition.
  686. */
  687. err = gp2ap020a00f_write_event_threshold(data,
  688. GP2AP020A00F_THRESH_TH, false);
  689. if (err < 0) {
  690. dev_err(&data->client->dev,
  691. "Clearing als threshold register failed.\n");
  692. return false;
  693. }
  694. err = gp2ap020a00f_write_event_threshold(data,
  695. GP2AP020A00F_THRESH_TL, false);
  696. if (err < 0) {
  697. dev_err(&data->client->dev,
  698. "Clearing als threshold register failed.\n");
  699. return false;
  700. }
  701. /* Change lux mode */
  702. err = regmap_update_bits(data->regmap,
  703. GP2AP020A00F_OP_REG,
  704. GP2AP020A00F_OP3_MASK,
  705. GP2AP020A00F_OP3_SHUTDOWN);
  706. if (err < 0) {
  707. dev_err(&data->client->dev,
  708. "Shutting down the device failed.\n");
  709. return false;
  710. }
  711. err = regmap_update_bits(data->regmap,
  712. GP2AP020A00F_ALS_REG,
  713. GP2AP020A00F_RANGE_A_MASK,
  714. new_range);
  715. if (err < 0) {
  716. dev_err(&data->client->dev,
  717. "Adjusting device lux mode failed.\n");
  718. return false;
  719. }
  720. err = regmap_update_bits(data->regmap,
  721. GP2AP020A00F_OP_REG,
  722. GP2AP020A00F_OP3_MASK,
  723. GP2AP020A00F_OP3_OPERATION);
  724. if (err < 0) {
  725. dev_err(&data->client->dev,
  726. "Powering up the device failed.\n");
  727. return false;
  728. }
  729. /* Adjust als threshold register values to the new lux mode */
  730. if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags)) {
  731. err = gp2ap020a00f_write_event_threshold(data,
  732. GP2AP020A00F_THRESH_TH, true);
  733. if (err < 0) {
  734. dev_err(&data->client->dev,
  735. "Adjusting als threshold value failed.\n");
  736. return false;
  737. }
  738. }
  739. if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags)) {
  740. err = gp2ap020a00f_write_event_threshold(data,
  741. GP2AP020A00F_THRESH_TL, true);
  742. if (err < 0) {
  743. dev_err(&data->client->dev,
  744. "Adjusting als threshold value failed.\n");
  745. return false;
  746. }
  747. }
  748. return true;
  749. }
  750. return false;
  751. }
  752. static void gp2ap020a00f_output_to_lux(struct gp2ap020a00f_data *data,
  753. int *output_val)
  754. {
  755. if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags))
  756. *output_val *= 16;
  757. }
  758. static void gp2ap020a00f_iio_trigger_work(struct irq_work *work)
  759. {
  760. struct gp2ap020a00f_data *data =
  761. container_of(work, struct gp2ap020a00f_data, work);
  762. iio_trigger_poll(data->trig, 0);
  763. }
  764. static irqreturn_t gp2ap020a00f_prox_sensing_handler(int irq, void *data)
  765. {
  766. struct iio_dev *indio_dev = data;
  767. struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
  768. unsigned int op_reg_val;
  769. int ret;
  770. /* Read interrupt flags */
  771. ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG, &op_reg_val);
  772. if (ret < 0)
  773. return IRQ_HANDLED;
  774. if (gp2ap020a00f_prox_detect_enabled(priv)) {
  775. if (op_reg_val & GP2AP020A00F_PROX_DETECT) {
  776. iio_push_event(indio_dev,
  777. IIO_UNMOD_EVENT_CODE(
  778. IIO_PROXIMITY,
  779. GP2AP020A00F_SCAN_MODE_PROXIMITY,
  780. IIO_EV_TYPE_ROC,
  781. IIO_EV_DIR_RISING),
  782. iio_get_time_ns());
  783. } else {
  784. iio_push_event(indio_dev,
  785. IIO_UNMOD_EVENT_CODE(
  786. IIO_PROXIMITY,
  787. GP2AP020A00F_SCAN_MODE_PROXIMITY,
  788. IIO_EV_TYPE_ROC,
  789. IIO_EV_DIR_FALLING),
  790. iio_get_time_ns());
  791. }
  792. }
  793. return IRQ_HANDLED;
  794. }
  795. static irqreturn_t gp2ap020a00f_thresh_event_handler(int irq, void *data)
  796. {
  797. struct iio_dev *indio_dev = data;
  798. struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
  799. u8 op_reg_flags, d0_reg_buf[2];
  800. unsigned int output_val, op_reg_val;
  801. int thresh_val_id, ret;
  802. /* Read interrupt flags */
  803. ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG,
  804. &op_reg_val);
  805. if (ret < 0)
  806. goto done;
  807. op_reg_flags = op_reg_val & (GP2AP020A00F_FLAG_A | GP2AP020A00F_FLAG_P
  808. | GP2AP020A00F_PROX_DETECT);
  809. op_reg_val &= (~GP2AP020A00F_FLAG_A & ~GP2AP020A00F_FLAG_P
  810. & ~GP2AP020A00F_PROX_DETECT);
  811. /* Clear interrupt flags (if not in INTTYPE_PULSE mode) */
  812. if (priv->cur_opmode != GP2AP020A00F_OPMODE_PROX_DETECT) {
  813. ret = regmap_write(priv->regmap, GP2AP020A00F_OP_REG,
  814. op_reg_val);
  815. if (ret < 0)
  816. goto done;
  817. }
  818. if (op_reg_flags & GP2AP020A00F_FLAG_A) {
  819. /* Check D0 register to assess if the lux mode
  820. * transition is required.
  821. */
  822. ret = regmap_bulk_read(priv->regmap, GP2AP020A00F_D0_L_REG,
  823. d0_reg_buf, 2);
  824. if (ret < 0)
  825. goto done;
  826. output_val = le16_to_cpup((__le16 *)d0_reg_buf);
  827. if (gp2ap020a00f_adjust_lux_mode(priv, output_val))
  828. goto done;
  829. gp2ap020a00f_output_to_lux(priv, &output_val);
  830. /*
  831. * We need to check output value to distinguish
  832. * between high and low ambient light threshold event.
  833. */
  834. if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &priv->flags)) {
  835. thresh_val_id =
  836. GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TH_L_REG);
  837. if (output_val > priv->thresh_val[thresh_val_id])
  838. iio_push_event(indio_dev,
  839. IIO_MOD_EVENT_CODE(
  840. IIO_LIGHT,
  841. GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
  842. IIO_MOD_LIGHT_CLEAR,
  843. IIO_EV_TYPE_THRESH,
  844. IIO_EV_DIR_RISING),
  845. iio_get_time_ns());
  846. }
  847. if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &priv->flags)) {
  848. thresh_val_id =
  849. GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TL_L_REG);
  850. if (output_val < priv->thresh_val[thresh_val_id])
  851. iio_push_event(indio_dev,
  852. IIO_MOD_EVENT_CODE(
  853. IIO_LIGHT,
  854. GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
  855. IIO_MOD_LIGHT_CLEAR,
  856. IIO_EV_TYPE_THRESH,
  857. IIO_EV_DIR_FALLING),
  858. iio_get_time_ns());
  859. }
  860. }
  861. if (priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_CLEAR ||
  862. priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_IR ||
  863. priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY) {
  864. set_bit(GP2AP020A00F_FLAG_DATA_READY, &priv->flags);
  865. wake_up(&priv->data_ready_queue);
  866. goto done;
  867. }
  868. if (test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &priv->flags) ||
  869. test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &priv->flags) ||
  870. test_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &priv->flags))
  871. /* This fires off the trigger. */
  872. irq_work_queue(&priv->work);
  873. done:
  874. return IRQ_HANDLED;
  875. }
  876. static irqreturn_t gp2ap020a00f_trigger_handler(int irq, void *data)
  877. {
  878. struct iio_poll_func *pf = data;
  879. struct iio_dev *indio_dev = pf->indio_dev;
  880. struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
  881. size_t d_size = 0;
  882. __le32 light_lux;
  883. int i, out_val, ret;
  884. for_each_set_bit(i, indio_dev->active_scan_mask,
  885. indio_dev->masklength) {
  886. ret = regmap_bulk_read(priv->regmap,
  887. GP2AP020A00F_DATA_REG(i),
  888. &priv->buffer[d_size], 2);
  889. if (ret < 0)
  890. goto done;
  891. if (i == GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR ||
  892. i == GP2AP020A00F_SCAN_MODE_LIGHT_IR) {
  893. out_val = le16_to_cpup((__le16 *)&priv->buffer[d_size]);
  894. gp2ap020a00f_output_to_lux(priv, &out_val);
  895. light_lux = cpu_to_le32(out_val);
  896. memcpy(&priv->buffer[d_size], (u8 *)&light_lux, 4);
  897. d_size += 4;
  898. } else {
  899. d_size += 2;
  900. }
  901. }
  902. iio_push_to_buffers_with_timestamp(indio_dev, priv->buffer,
  903. pf->timestamp);
  904. done:
  905. iio_trigger_notify_done(indio_dev->trig);
  906. return IRQ_HANDLED;
  907. }
  908. static u8 gp2ap020a00f_get_thresh_reg(const struct iio_chan_spec *chan,
  909. enum iio_event_direction event_dir)
  910. {
  911. switch (chan->type) {
  912. case IIO_PROXIMITY:
  913. if (event_dir == IIO_EV_DIR_RISING)
  914. return GP2AP020A00F_PH_L_REG;
  915. else
  916. return GP2AP020A00F_PL_L_REG;
  917. case IIO_LIGHT:
  918. if (event_dir == IIO_EV_DIR_RISING)
  919. return GP2AP020A00F_TH_L_REG;
  920. else
  921. return GP2AP020A00F_TL_L_REG;
  922. default:
  923. break;
  924. }
  925. return -EINVAL;
  926. }
  927. static int gp2ap020a00f_write_event_val(struct iio_dev *indio_dev,
  928. const struct iio_chan_spec *chan,
  929. enum iio_event_type type,
  930. enum iio_event_direction dir,
  931. enum iio_event_info info,
  932. int val, int val2)
  933. {
  934. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  935. bool event_en = false;
  936. u8 thresh_val_id;
  937. u8 thresh_reg_l;
  938. int err = 0;
  939. mutex_lock(&data->lock);
  940. thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
  941. thresh_val_id = GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l);
  942. if (thresh_val_id > GP2AP020A00F_THRESH_PH) {
  943. err = -EINVAL;
  944. goto error_unlock;
  945. }
  946. switch (thresh_reg_l) {
  947. case GP2AP020A00F_TH_L_REG:
  948. event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV,
  949. &data->flags);
  950. break;
  951. case GP2AP020A00F_TL_L_REG:
  952. event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV,
  953. &data->flags);
  954. break;
  955. case GP2AP020A00F_PH_L_REG:
  956. if (val == 0) {
  957. err = -EINVAL;
  958. goto error_unlock;
  959. }
  960. event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV,
  961. &data->flags);
  962. break;
  963. case GP2AP020A00F_PL_L_REG:
  964. if (val == 0) {
  965. err = -EINVAL;
  966. goto error_unlock;
  967. }
  968. event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV,
  969. &data->flags);
  970. break;
  971. }
  972. data->thresh_val[thresh_val_id] = val;
  973. err = gp2ap020a00f_write_event_threshold(data, thresh_val_id,
  974. event_en);
  975. error_unlock:
  976. mutex_unlock(&data->lock);
  977. return err;
  978. }
  979. static int gp2ap020a00f_read_event_val(struct iio_dev *indio_dev,
  980. const struct iio_chan_spec *chan,
  981. enum iio_event_type type,
  982. enum iio_event_direction dir,
  983. enum iio_event_info info,
  984. int *val, int *val2)
  985. {
  986. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  987. u8 thresh_reg_l;
  988. int err = IIO_VAL_INT;
  989. mutex_lock(&data->lock);
  990. thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
  991. if (thresh_reg_l > GP2AP020A00F_PH_L_REG) {
  992. err = -EINVAL;
  993. goto error_unlock;
  994. }
  995. *val = data->thresh_val[GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l)];
  996. error_unlock:
  997. mutex_unlock(&data->lock);
  998. return err;
  999. }
  1000. static int gp2ap020a00f_write_prox_event_config(struct iio_dev *indio_dev,
  1001. int state)
  1002. {
  1003. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1004. enum gp2ap020a00f_cmd cmd_high_ev, cmd_low_ev;
  1005. int err;
  1006. cmd_high_ev = state ? GP2AP020A00F_CMD_PROX_HIGH_EV_EN :
  1007. GP2AP020A00F_CMD_PROX_HIGH_EV_DIS;
  1008. cmd_low_ev = state ? GP2AP020A00F_CMD_PROX_LOW_EV_EN :
  1009. GP2AP020A00F_CMD_PROX_LOW_EV_DIS;
  1010. /*
  1011. * In order to enable proximity detection feature in the device
  1012. * both high and low threshold registers have to be written
  1013. * with different values, greater than zero.
  1014. */
  1015. if (state) {
  1016. if (data->thresh_val[GP2AP020A00F_THRESH_PL] == 0)
  1017. return -EINVAL;
  1018. if (data->thresh_val[GP2AP020A00F_THRESH_PH] == 0)
  1019. return -EINVAL;
  1020. }
  1021. err = gp2ap020a00f_exec_cmd(data, cmd_high_ev);
  1022. if (err < 0)
  1023. return err;
  1024. err = gp2ap020a00f_exec_cmd(data, cmd_low_ev);
  1025. if (err < 0)
  1026. return err;
  1027. free_irq(data->client->irq, indio_dev);
  1028. if (state)
  1029. err = request_threaded_irq(data->client->irq, NULL,
  1030. &gp2ap020a00f_prox_sensing_handler,
  1031. IRQF_TRIGGER_RISING |
  1032. IRQF_TRIGGER_FALLING |
  1033. IRQF_ONESHOT,
  1034. "gp2ap020a00f_prox_sensing",
  1035. indio_dev);
  1036. else {
  1037. err = request_threaded_irq(data->client->irq, NULL,
  1038. &gp2ap020a00f_thresh_event_handler,
  1039. IRQF_TRIGGER_FALLING |
  1040. IRQF_ONESHOT,
  1041. "gp2ap020a00f_thresh_event",
  1042. indio_dev);
  1043. }
  1044. return err;
  1045. }
  1046. static int gp2ap020a00f_write_event_config(struct iio_dev *indio_dev,
  1047. const struct iio_chan_spec *chan,
  1048. enum iio_event_type type,
  1049. enum iio_event_direction dir,
  1050. int state)
  1051. {
  1052. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1053. enum gp2ap020a00f_cmd cmd;
  1054. int err;
  1055. mutex_lock(&data->lock);
  1056. switch (chan->type) {
  1057. case IIO_PROXIMITY:
  1058. err = gp2ap020a00f_write_prox_event_config(indio_dev, state);
  1059. break;
  1060. case IIO_LIGHT:
  1061. if (dir == IIO_EV_DIR_RISING) {
  1062. cmd = state ? GP2AP020A00F_CMD_ALS_HIGH_EV_EN :
  1063. GP2AP020A00F_CMD_ALS_HIGH_EV_DIS;
  1064. err = gp2ap020a00f_exec_cmd(data, cmd);
  1065. } else {
  1066. cmd = state ? GP2AP020A00F_CMD_ALS_LOW_EV_EN :
  1067. GP2AP020A00F_CMD_ALS_LOW_EV_DIS;
  1068. err = gp2ap020a00f_exec_cmd(data, cmd);
  1069. }
  1070. break;
  1071. default:
  1072. err = -EINVAL;
  1073. }
  1074. mutex_unlock(&data->lock);
  1075. return err;
  1076. }
  1077. static int gp2ap020a00f_read_event_config(struct iio_dev *indio_dev,
  1078. const struct iio_chan_spec *chan,
  1079. enum iio_event_type type,
  1080. enum iio_event_direction dir)
  1081. {
  1082. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1083. int event_en = 0;
  1084. mutex_lock(&data->lock);
  1085. switch (chan->type) {
  1086. case IIO_PROXIMITY:
  1087. if (dir == IIO_EV_DIR_RISING)
  1088. event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV,
  1089. &data->flags);
  1090. else
  1091. event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV,
  1092. &data->flags);
  1093. break;
  1094. case IIO_LIGHT:
  1095. if (dir == IIO_EV_DIR_RISING)
  1096. event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV,
  1097. &data->flags);
  1098. else
  1099. event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV,
  1100. &data->flags);
  1101. break;
  1102. default:
  1103. event_en = -EINVAL;
  1104. break;
  1105. }
  1106. mutex_unlock(&data->lock);
  1107. return event_en;
  1108. }
  1109. static int gp2ap020a00f_read_channel(struct gp2ap020a00f_data *data,
  1110. struct iio_chan_spec const *chan, int *val)
  1111. {
  1112. enum gp2ap020a00f_cmd cmd;
  1113. int err;
  1114. switch (chan->scan_index) {
  1115. case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
  1116. cmd = GP2AP020A00F_CMD_READ_RAW_CLEAR;
  1117. break;
  1118. case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
  1119. cmd = GP2AP020A00F_CMD_READ_RAW_IR;
  1120. break;
  1121. case GP2AP020A00F_SCAN_MODE_PROXIMITY:
  1122. cmd = GP2AP020A00F_CMD_READ_RAW_PROXIMITY;
  1123. break;
  1124. default:
  1125. return -EINVAL;
  1126. }
  1127. err = gp2ap020a00f_exec_cmd(data, cmd);
  1128. if (err < 0) {
  1129. dev_err(&data->client->dev,
  1130. "gp2ap020a00f_exec_cmd failed\n");
  1131. goto error_ret;
  1132. }
  1133. err = gp2ap020a00f_read_output(data, chan->address, val);
  1134. if (err < 0)
  1135. dev_err(&data->client->dev,
  1136. "gp2ap020a00f_read_output failed\n");
  1137. err = gp2ap020a00f_set_operation_mode(data,
  1138. GP2AP020A00F_OPMODE_SHUTDOWN);
  1139. if (err < 0)
  1140. dev_err(&data->client->dev,
  1141. "Failed to shut down the device.\n");
  1142. if (cmd == GP2AP020A00F_CMD_READ_RAW_CLEAR ||
  1143. cmd == GP2AP020A00F_CMD_READ_RAW_IR)
  1144. gp2ap020a00f_output_to_lux(data, val);
  1145. error_ret:
  1146. return err;
  1147. }
  1148. static int gp2ap020a00f_read_raw(struct iio_dev *indio_dev,
  1149. struct iio_chan_spec const *chan,
  1150. int *val, int *val2,
  1151. long mask)
  1152. {
  1153. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1154. int err = -EINVAL;
  1155. mutex_lock(&data->lock);
  1156. switch (mask) {
  1157. case IIO_CHAN_INFO_RAW:
  1158. if (iio_buffer_enabled(indio_dev)) {
  1159. err = -EBUSY;
  1160. goto error_unlock;
  1161. }
  1162. err = gp2ap020a00f_read_channel(data, chan, val);
  1163. break;
  1164. }
  1165. error_unlock:
  1166. mutex_unlock(&data->lock);
  1167. return err < 0 ? err : IIO_VAL_INT;
  1168. }
  1169. static const struct iio_event_spec gp2ap020a00f_event_spec_light[] = {
  1170. {
  1171. .type = IIO_EV_TYPE_THRESH,
  1172. .dir = IIO_EV_DIR_RISING,
  1173. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1174. BIT(IIO_EV_INFO_ENABLE),
  1175. }, {
  1176. .type = IIO_EV_TYPE_THRESH,
  1177. .dir = IIO_EV_DIR_FALLING,
  1178. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1179. BIT(IIO_EV_INFO_ENABLE),
  1180. },
  1181. };
  1182. static const struct iio_event_spec gp2ap020a00f_event_spec_prox[] = {
  1183. {
  1184. .type = IIO_EV_TYPE_ROC,
  1185. .dir = IIO_EV_DIR_RISING,
  1186. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1187. BIT(IIO_EV_INFO_ENABLE),
  1188. }, {
  1189. .type = IIO_EV_TYPE_ROC,
  1190. .dir = IIO_EV_DIR_FALLING,
  1191. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1192. BIT(IIO_EV_INFO_ENABLE),
  1193. },
  1194. };
  1195. static const struct iio_chan_spec gp2ap020a00f_channels[] = {
  1196. {
  1197. .type = IIO_LIGHT,
  1198. .channel2 = IIO_MOD_LIGHT_CLEAR,
  1199. .modified = 1,
  1200. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  1201. .scan_type = {
  1202. .sign = 'u',
  1203. .realbits = 24,
  1204. .shift = 0,
  1205. .storagebits = 32,
  1206. .endianness = IIO_LE,
  1207. },
  1208. .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
  1209. .address = GP2AP020A00F_D0_L_REG,
  1210. .event_spec = gp2ap020a00f_event_spec_light,
  1211. .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_light),
  1212. },
  1213. {
  1214. .type = IIO_LIGHT,
  1215. .channel2 = IIO_MOD_LIGHT_IR,
  1216. .modified = 1,
  1217. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  1218. .scan_type = {
  1219. .sign = 'u',
  1220. .realbits = 24,
  1221. .shift = 0,
  1222. .storagebits = 32,
  1223. .endianness = IIO_LE,
  1224. },
  1225. .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_IR,
  1226. .address = GP2AP020A00F_D1_L_REG,
  1227. },
  1228. {
  1229. .type = IIO_PROXIMITY,
  1230. .modified = 0,
  1231. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  1232. .scan_type = {
  1233. .sign = 'u',
  1234. .realbits = 16,
  1235. .shift = 0,
  1236. .storagebits = 16,
  1237. .endianness = IIO_LE,
  1238. },
  1239. .scan_index = GP2AP020A00F_SCAN_MODE_PROXIMITY,
  1240. .address = GP2AP020A00F_D2_L_REG,
  1241. .event_spec = gp2ap020a00f_event_spec_prox,
  1242. .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_prox),
  1243. },
  1244. IIO_CHAN_SOFT_TIMESTAMP(GP2AP020A00F_CHAN_TIMESTAMP),
  1245. };
  1246. static const struct iio_info gp2ap020a00f_info = {
  1247. .read_raw = &gp2ap020a00f_read_raw,
  1248. .read_event_value = &gp2ap020a00f_read_event_val,
  1249. .read_event_config = &gp2ap020a00f_read_event_config,
  1250. .write_event_value = &gp2ap020a00f_write_event_val,
  1251. .write_event_config = &gp2ap020a00f_write_event_config,
  1252. .driver_module = THIS_MODULE,
  1253. };
  1254. static int gp2ap020a00f_buffer_postenable(struct iio_dev *indio_dev)
  1255. {
  1256. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1257. int i, err = 0;
  1258. mutex_lock(&data->lock);
  1259. /*
  1260. * Enable triggers according to the scan_mask. Enabling either
  1261. * LIGHT_CLEAR or LIGHT_IR scan mode results in enabling ALS
  1262. * module in the device, which generates samples in both D0 (clear)
  1263. * and D1 (ir) registers. As the two registers are bound to the
  1264. * two separate IIO channels they are treated in the driver logic
  1265. * as if they were controlled independently.
  1266. */
  1267. for_each_set_bit(i, indio_dev->active_scan_mask,
  1268. indio_dev->masklength) {
  1269. switch (i) {
  1270. case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
  1271. err = gp2ap020a00f_exec_cmd(data,
  1272. GP2AP020A00F_CMD_TRIGGER_CLEAR_EN);
  1273. break;
  1274. case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
  1275. err = gp2ap020a00f_exec_cmd(data,
  1276. GP2AP020A00F_CMD_TRIGGER_IR_EN);
  1277. break;
  1278. case GP2AP020A00F_SCAN_MODE_PROXIMITY:
  1279. err = gp2ap020a00f_exec_cmd(data,
  1280. GP2AP020A00F_CMD_TRIGGER_PROX_EN);
  1281. break;
  1282. }
  1283. }
  1284. if (err < 0)
  1285. goto error_unlock;
  1286. data->buffer = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
  1287. if (!data->buffer) {
  1288. err = -ENOMEM;
  1289. goto error_unlock;
  1290. }
  1291. err = iio_triggered_buffer_postenable(indio_dev);
  1292. error_unlock:
  1293. mutex_unlock(&data->lock);
  1294. return err;
  1295. }
  1296. static int gp2ap020a00f_buffer_predisable(struct iio_dev *indio_dev)
  1297. {
  1298. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1299. int i, err;
  1300. mutex_lock(&data->lock);
  1301. err = iio_triggered_buffer_predisable(indio_dev);
  1302. if (err < 0)
  1303. goto error_unlock;
  1304. for_each_set_bit(i, indio_dev->active_scan_mask,
  1305. indio_dev->masklength) {
  1306. switch (i) {
  1307. case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
  1308. err = gp2ap020a00f_exec_cmd(data,
  1309. GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS);
  1310. break;
  1311. case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
  1312. err = gp2ap020a00f_exec_cmd(data,
  1313. GP2AP020A00F_CMD_TRIGGER_IR_DIS);
  1314. break;
  1315. case GP2AP020A00F_SCAN_MODE_PROXIMITY:
  1316. err = gp2ap020a00f_exec_cmd(data,
  1317. GP2AP020A00F_CMD_TRIGGER_PROX_DIS);
  1318. break;
  1319. }
  1320. }
  1321. if (err == 0)
  1322. kfree(data->buffer);
  1323. error_unlock:
  1324. mutex_unlock(&data->lock);
  1325. return err;
  1326. }
  1327. static const struct iio_buffer_setup_ops gp2ap020a00f_buffer_setup_ops = {
  1328. .postenable = &gp2ap020a00f_buffer_postenable,
  1329. .predisable = &gp2ap020a00f_buffer_predisable,
  1330. };
  1331. static const struct iio_trigger_ops gp2ap020a00f_trigger_ops = {
  1332. .owner = THIS_MODULE,
  1333. };
  1334. static int gp2ap020a00f_probe(struct i2c_client *client,
  1335. const struct i2c_device_id *id)
  1336. {
  1337. struct gp2ap020a00f_data *data;
  1338. struct iio_dev *indio_dev;
  1339. struct regmap *regmap;
  1340. int err;
  1341. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  1342. if (!indio_dev)
  1343. return -ENOMEM;
  1344. data = iio_priv(indio_dev);
  1345. data->vled_reg = devm_regulator_get(&client->dev, "vled");
  1346. if (IS_ERR(data->vled_reg))
  1347. return PTR_ERR(data->vled_reg);
  1348. err = regulator_enable(data->vled_reg);
  1349. if (err)
  1350. return err;
  1351. regmap = devm_regmap_init_i2c(client, &gp2ap020a00f_regmap_config);
  1352. if (IS_ERR(regmap)) {
  1353. dev_err(&client->dev, "Regmap initialization failed.\n");
  1354. err = PTR_ERR(regmap);
  1355. goto error_regulator_disable;
  1356. }
  1357. /* Initialize device registers */
  1358. err = regmap_bulk_write(regmap, GP2AP020A00F_OP_REG,
  1359. gp2ap020a00f_reg_init_tab,
  1360. ARRAY_SIZE(gp2ap020a00f_reg_init_tab));
  1361. if (err < 0) {
  1362. dev_err(&client->dev, "Device initialization failed.\n");
  1363. goto error_regulator_disable;
  1364. }
  1365. i2c_set_clientdata(client, indio_dev);
  1366. data->client = client;
  1367. data->cur_opmode = GP2AP020A00F_OPMODE_SHUTDOWN;
  1368. data->regmap = regmap;
  1369. init_waitqueue_head(&data->data_ready_queue);
  1370. mutex_init(&data->lock);
  1371. indio_dev->dev.parent = &client->dev;
  1372. indio_dev->channels = gp2ap020a00f_channels;
  1373. indio_dev->num_channels = ARRAY_SIZE(gp2ap020a00f_channels);
  1374. indio_dev->info = &gp2ap020a00f_info;
  1375. indio_dev->name = id->name;
  1376. indio_dev->modes = INDIO_DIRECT_MODE;
  1377. /* Allocate buffer */
  1378. err = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
  1379. &gp2ap020a00f_trigger_handler, &gp2ap020a00f_buffer_setup_ops);
  1380. if (err < 0)
  1381. goto error_regulator_disable;
  1382. /* Allocate trigger */
  1383. data->trig = devm_iio_trigger_alloc(&client->dev, "%s-trigger",
  1384. indio_dev->name);
  1385. if (data->trig == NULL) {
  1386. err = -ENOMEM;
  1387. dev_err(&indio_dev->dev, "Failed to allocate iio trigger.\n");
  1388. goto error_uninit_buffer;
  1389. }
  1390. /* This needs to be requested here for read_raw calls to work. */
  1391. err = request_threaded_irq(client->irq, NULL,
  1392. &gp2ap020a00f_thresh_event_handler,
  1393. IRQF_TRIGGER_FALLING |
  1394. IRQF_ONESHOT,
  1395. "gp2ap020a00f_als_event",
  1396. indio_dev);
  1397. if (err < 0) {
  1398. dev_err(&client->dev, "Irq request failed.\n");
  1399. goto error_uninit_buffer;
  1400. }
  1401. data->trig->ops = &gp2ap020a00f_trigger_ops;
  1402. data->trig->dev.parent = &data->client->dev;
  1403. init_irq_work(&data->work, gp2ap020a00f_iio_trigger_work);
  1404. err = iio_trigger_register(data->trig);
  1405. if (err < 0) {
  1406. dev_err(&client->dev, "Failed to register iio trigger.\n");
  1407. goto error_free_irq;
  1408. }
  1409. err = iio_device_register(indio_dev);
  1410. if (err < 0)
  1411. goto error_trigger_unregister;
  1412. return 0;
  1413. error_trigger_unregister:
  1414. iio_trigger_unregister(data->trig);
  1415. error_free_irq:
  1416. free_irq(client->irq, indio_dev);
  1417. error_uninit_buffer:
  1418. iio_triggered_buffer_cleanup(indio_dev);
  1419. error_regulator_disable:
  1420. regulator_disable(data->vled_reg);
  1421. return err;
  1422. }
  1423. static int gp2ap020a00f_remove(struct i2c_client *client)
  1424. {
  1425. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  1426. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1427. int err;
  1428. err = gp2ap020a00f_set_operation_mode(data,
  1429. GP2AP020A00F_OPMODE_SHUTDOWN);
  1430. if (err < 0)
  1431. dev_err(&indio_dev->dev, "Failed to power off the device.\n");
  1432. iio_device_unregister(indio_dev);
  1433. iio_trigger_unregister(data->trig);
  1434. free_irq(client->irq, indio_dev);
  1435. iio_triggered_buffer_cleanup(indio_dev);
  1436. regulator_disable(data->vled_reg);
  1437. return 0;
  1438. }
  1439. static const struct i2c_device_id gp2ap020a00f_id[] = {
  1440. { GP2A_I2C_NAME, 0 },
  1441. { }
  1442. };
  1443. MODULE_DEVICE_TABLE(i2c, gp2ap020a00f_id);
  1444. #ifdef CONFIG_OF
  1445. static const struct of_device_id gp2ap020a00f_of_match[] = {
  1446. { .compatible = "sharp,gp2ap020a00f" },
  1447. { }
  1448. };
  1449. #endif
  1450. static struct i2c_driver gp2ap020a00f_driver = {
  1451. .driver = {
  1452. .name = GP2A_I2C_NAME,
  1453. .of_match_table = of_match_ptr(gp2ap020a00f_of_match),
  1454. .owner = THIS_MODULE,
  1455. },
  1456. .probe = gp2ap020a00f_probe,
  1457. .remove = gp2ap020a00f_remove,
  1458. .id_table = gp2ap020a00f_id,
  1459. };
  1460. module_i2c_driver(gp2ap020a00f_driver);
  1461. MODULE_AUTHOR("Jacek Anaszewski <j.anaszewski@samsung.com>");
  1462. MODULE_DESCRIPTION("Sharp GP2AP020A00F Proximity/ALS sensor driver");
  1463. MODULE_LICENSE("GPL v2");