ad799x.c 18 KB

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  1. /*
  2. * iio/adc/ad799x.c
  3. * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
  4. *
  5. * based on iio/adc/max1363
  6. * Copyright (C) 2008-2010 Jonathan Cameron
  7. *
  8. * based on linux/drivers/i2c/chips/max123x
  9. * Copyright (C) 2002-2004 Stefan Eletzhofer
  10. *
  11. * based on linux/drivers/acron/char/pcf8583.c
  12. * Copyright (C) 2000 Russell King
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. *
  18. * ad799x.c
  19. *
  20. * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
  21. * ad7998 and similar chips.
  22. *
  23. */
  24. #include <linux/interrupt.h>
  25. #include <linux/device.h>
  26. #include <linux/kernel.h>
  27. #include <linux/sysfs.h>
  28. #include <linux/i2c.h>
  29. #include <linux/regulator/consumer.h>
  30. #include <linux/slab.h>
  31. #include <linux/types.h>
  32. #include <linux/err.h>
  33. #include <linux/module.h>
  34. #include <linux/iio/iio.h>
  35. #include <linux/iio/sysfs.h>
  36. #include <linux/iio/events.h>
  37. #include <linux/iio/buffer.h>
  38. #include <linux/iio/trigger_consumer.h>
  39. #include <linux/iio/triggered_buffer.h>
  40. #define AD799X_CHANNEL_SHIFT 4
  41. #define AD799X_STORAGEBITS 16
  42. /*
  43. * AD7991, AD7995 and AD7999 defines
  44. */
  45. #define AD7991_REF_SEL 0x08
  46. #define AD7991_FLTR 0x04
  47. #define AD7991_BIT_TRIAL_DELAY 0x02
  48. #define AD7991_SAMPLE_DELAY 0x01
  49. /*
  50. * AD7992, AD7993, AD7994, AD7997 and AD7998 defines
  51. */
  52. #define AD7998_FLTR 0x08
  53. #define AD7998_ALERT_EN 0x04
  54. #define AD7998_BUSY_ALERT 0x02
  55. #define AD7998_BUSY_ALERT_POL 0x01
  56. #define AD7998_CONV_RES_REG 0x0
  57. #define AD7998_ALERT_STAT_REG 0x1
  58. #define AD7998_CONF_REG 0x2
  59. #define AD7998_CYCLE_TMR_REG 0x3
  60. #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4)
  61. #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5)
  62. #define AD7998_HYST_REG(x) ((x) * 3 + 0x6)
  63. #define AD7998_CYC_MASK 0x7
  64. #define AD7998_CYC_DIS 0x0
  65. #define AD7998_CYC_TCONF_32 0x1
  66. #define AD7998_CYC_TCONF_64 0x2
  67. #define AD7998_CYC_TCONF_128 0x3
  68. #define AD7998_CYC_TCONF_256 0x4
  69. #define AD7998_CYC_TCONF_512 0x5
  70. #define AD7998_CYC_TCONF_1024 0x6
  71. #define AD7998_CYC_TCONF_2048 0x7
  72. #define AD7998_ALERT_STAT_CLEAR 0xFF
  73. /*
  74. * AD7997 and AD7997 defines
  75. */
  76. #define AD7997_8_READ_SINGLE 0x80
  77. #define AD7997_8_READ_SEQUENCE 0x70
  78. /* TODO: move this into a common header */
  79. #define RES_MASK(bits) ((1 << (bits)) - 1)
  80. enum {
  81. ad7991,
  82. ad7995,
  83. ad7999,
  84. ad7992,
  85. ad7993,
  86. ad7994,
  87. ad7997,
  88. ad7998
  89. };
  90. /**
  91. * struct ad799x_chip_info - chip specific information
  92. * @channel: channel specification
  93. * @num_channels: number of channels
  94. * @monitor_mode: whether the chip supports monitor interrupts
  95. * @default_config: device default configuration
  96. * @event_attrs: pointer to the monitor event attribute group
  97. */
  98. struct ad799x_chip_info {
  99. struct iio_chan_spec channel[9];
  100. int num_channels;
  101. u16 default_config;
  102. const struct iio_info *info;
  103. };
  104. struct ad799x_state {
  105. struct i2c_client *client;
  106. const struct ad799x_chip_info *chip_info;
  107. struct regulator *reg;
  108. struct regulator *vref;
  109. unsigned id;
  110. u16 config;
  111. u8 *rx_buf;
  112. unsigned int transfer_size;
  113. };
  114. /**
  115. * ad799x_trigger_handler() bh of trigger launched polling to ring buffer
  116. *
  117. * Currently there is no option in this driver to disable the saving of
  118. * timestamps within the ring.
  119. **/
  120. static irqreturn_t ad799x_trigger_handler(int irq, void *p)
  121. {
  122. struct iio_poll_func *pf = p;
  123. struct iio_dev *indio_dev = pf->indio_dev;
  124. struct ad799x_state *st = iio_priv(indio_dev);
  125. int b_sent;
  126. u8 cmd;
  127. switch (st->id) {
  128. case ad7991:
  129. case ad7995:
  130. case ad7999:
  131. cmd = st->config |
  132. (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
  133. break;
  134. case ad7992:
  135. case ad7993:
  136. case ad7994:
  137. cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
  138. AD7998_CONV_RES_REG;
  139. break;
  140. case ad7997:
  141. case ad7998:
  142. cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
  143. break;
  144. default:
  145. cmd = 0;
  146. }
  147. b_sent = i2c_smbus_read_i2c_block_data(st->client,
  148. cmd, st->transfer_size, st->rx_buf);
  149. if (b_sent < 0)
  150. goto out;
  151. iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
  152. iio_get_time_ns());
  153. out:
  154. iio_trigger_notify_done(indio_dev->trig);
  155. return IRQ_HANDLED;
  156. }
  157. /*
  158. * ad799x register access by I2C
  159. */
  160. static int ad799x_i2c_read16(struct ad799x_state *st, u8 reg, u16 *data)
  161. {
  162. struct i2c_client *client = st->client;
  163. int ret = 0;
  164. ret = i2c_smbus_read_word_swapped(client, reg);
  165. if (ret < 0) {
  166. dev_err(&client->dev, "I2C read error\n");
  167. return ret;
  168. }
  169. *data = (u16)ret;
  170. return 0;
  171. }
  172. static int ad799x_i2c_read8(struct ad799x_state *st, u8 reg, u8 *data)
  173. {
  174. struct i2c_client *client = st->client;
  175. int ret = 0;
  176. ret = i2c_smbus_read_byte_data(client, reg);
  177. if (ret < 0) {
  178. dev_err(&client->dev, "I2C read error\n");
  179. return ret;
  180. }
  181. *data = (u8)ret;
  182. return 0;
  183. }
  184. static int ad799x_i2c_write16(struct ad799x_state *st, u8 reg, u16 data)
  185. {
  186. struct i2c_client *client = st->client;
  187. int ret = 0;
  188. ret = i2c_smbus_write_word_swapped(client, reg, data);
  189. if (ret < 0)
  190. dev_err(&client->dev, "I2C write error\n");
  191. return ret;
  192. }
  193. static int ad799x_i2c_write8(struct ad799x_state *st, u8 reg, u8 data)
  194. {
  195. struct i2c_client *client = st->client;
  196. int ret = 0;
  197. ret = i2c_smbus_write_byte_data(client, reg, data);
  198. if (ret < 0)
  199. dev_err(&client->dev, "I2C write error\n");
  200. return ret;
  201. }
  202. static int ad7997_8_update_scan_mode(struct iio_dev *indio_dev,
  203. const unsigned long *scan_mask)
  204. {
  205. struct ad799x_state *st = iio_priv(indio_dev);
  206. kfree(st->rx_buf);
  207. st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
  208. if (!st->rx_buf)
  209. return -ENOMEM;
  210. st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
  211. switch (st->id) {
  212. case ad7997:
  213. case ad7998:
  214. return ad799x_i2c_write16(st, AD7998_CONF_REG,
  215. st->config | (*scan_mask << AD799X_CHANNEL_SHIFT));
  216. default:
  217. break;
  218. }
  219. return 0;
  220. }
  221. static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
  222. {
  223. u16 rxbuf;
  224. u8 cmd;
  225. int ret;
  226. switch (st->id) {
  227. case ad7991:
  228. case ad7995:
  229. case ad7999:
  230. cmd = st->config | ((1 << ch) << AD799X_CHANNEL_SHIFT);
  231. break;
  232. case ad7992:
  233. case ad7993:
  234. case ad7994:
  235. cmd = (1 << ch) << AD799X_CHANNEL_SHIFT;
  236. break;
  237. case ad7997:
  238. case ad7998:
  239. cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
  240. break;
  241. default:
  242. return -EINVAL;
  243. }
  244. ret = ad799x_i2c_read16(st, cmd, &rxbuf);
  245. if (ret < 0)
  246. return ret;
  247. return rxbuf;
  248. }
  249. static int ad799x_read_raw(struct iio_dev *indio_dev,
  250. struct iio_chan_spec const *chan,
  251. int *val,
  252. int *val2,
  253. long m)
  254. {
  255. int ret;
  256. struct ad799x_state *st = iio_priv(indio_dev);
  257. switch (m) {
  258. case IIO_CHAN_INFO_RAW:
  259. mutex_lock(&indio_dev->mlock);
  260. if (iio_buffer_enabled(indio_dev))
  261. ret = -EBUSY;
  262. else
  263. ret = ad799x_scan_direct(st, chan->scan_index);
  264. mutex_unlock(&indio_dev->mlock);
  265. if (ret < 0)
  266. return ret;
  267. *val = (ret >> chan->scan_type.shift) &
  268. RES_MASK(chan->scan_type.realbits);
  269. return IIO_VAL_INT;
  270. case IIO_CHAN_INFO_SCALE:
  271. ret = regulator_get_voltage(st->vref);
  272. if (ret < 0)
  273. return ret;
  274. *val = ret / 1000;
  275. *val2 = chan->scan_type.realbits;
  276. return IIO_VAL_FRACTIONAL_LOG2;
  277. }
  278. return -EINVAL;
  279. }
  280. static const unsigned int ad7998_frequencies[] = {
  281. [AD7998_CYC_DIS] = 0,
  282. [AD7998_CYC_TCONF_32] = 15625,
  283. [AD7998_CYC_TCONF_64] = 7812,
  284. [AD7998_CYC_TCONF_128] = 3906,
  285. [AD7998_CYC_TCONF_512] = 976,
  286. [AD7998_CYC_TCONF_1024] = 488,
  287. [AD7998_CYC_TCONF_2048] = 244,
  288. };
  289. static ssize_t ad799x_read_frequency(struct device *dev,
  290. struct device_attribute *attr,
  291. char *buf)
  292. {
  293. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  294. struct ad799x_state *st = iio_priv(indio_dev);
  295. int ret;
  296. u8 val;
  297. ret = ad799x_i2c_read8(st, AD7998_CYCLE_TMR_REG, &val);
  298. if (ret)
  299. return ret;
  300. val &= AD7998_CYC_MASK;
  301. return sprintf(buf, "%u\n", ad7998_frequencies[val]);
  302. }
  303. static ssize_t ad799x_write_frequency(struct device *dev,
  304. struct device_attribute *attr,
  305. const char *buf,
  306. size_t len)
  307. {
  308. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  309. struct ad799x_state *st = iio_priv(indio_dev);
  310. long val;
  311. int ret, i;
  312. u8 t;
  313. ret = kstrtol(buf, 10, &val);
  314. if (ret)
  315. return ret;
  316. mutex_lock(&indio_dev->mlock);
  317. ret = ad799x_i2c_read8(st, AD7998_CYCLE_TMR_REG, &t);
  318. if (ret)
  319. goto error_ret_mutex;
  320. /* Wipe the bits clean */
  321. t &= ~AD7998_CYC_MASK;
  322. for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
  323. if (val == ad7998_frequencies[i])
  324. break;
  325. if (i == ARRAY_SIZE(ad7998_frequencies)) {
  326. ret = -EINVAL;
  327. goto error_ret_mutex;
  328. }
  329. t |= i;
  330. ret = ad799x_i2c_write8(st, AD7998_CYCLE_TMR_REG, t);
  331. error_ret_mutex:
  332. mutex_unlock(&indio_dev->mlock);
  333. return ret ? ret : len;
  334. }
  335. static int ad799x_read_event_config(struct iio_dev *indio_dev,
  336. const struct iio_chan_spec *chan,
  337. enum iio_event_type type,
  338. enum iio_event_direction dir)
  339. {
  340. return 1;
  341. }
  342. static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
  343. enum iio_event_direction dir,
  344. enum iio_event_info info)
  345. {
  346. switch (info) {
  347. case IIO_EV_INFO_VALUE:
  348. if (dir == IIO_EV_DIR_FALLING)
  349. return AD7998_DATALOW_REG(chan->channel);
  350. else
  351. return AD7998_DATAHIGH_REG(chan->channel);
  352. case IIO_EV_INFO_HYSTERESIS:
  353. return AD7998_HYST_REG(chan->channel);
  354. default:
  355. return -EINVAL;
  356. }
  357. return 0;
  358. }
  359. static int ad799x_write_event_value(struct iio_dev *indio_dev,
  360. const struct iio_chan_spec *chan,
  361. enum iio_event_type type,
  362. enum iio_event_direction dir,
  363. enum iio_event_info info,
  364. int val, int val2)
  365. {
  366. int ret;
  367. struct ad799x_state *st = iio_priv(indio_dev);
  368. if (val < 0 || val > RES_MASK(chan->scan_type.realbits))
  369. return -EINVAL;
  370. mutex_lock(&indio_dev->mlock);
  371. ret = ad799x_i2c_write16(st, ad799x_threshold_reg(chan, dir, info),
  372. val << chan->scan_type.shift);
  373. mutex_unlock(&indio_dev->mlock);
  374. return ret;
  375. }
  376. static int ad799x_read_event_value(struct iio_dev *indio_dev,
  377. const struct iio_chan_spec *chan,
  378. enum iio_event_type type,
  379. enum iio_event_direction dir,
  380. enum iio_event_info info,
  381. int *val, int *val2)
  382. {
  383. int ret;
  384. struct ad799x_state *st = iio_priv(indio_dev);
  385. u16 valin;
  386. mutex_lock(&indio_dev->mlock);
  387. ret = ad799x_i2c_read16(st, ad799x_threshold_reg(chan, dir, info),
  388. &valin);
  389. mutex_unlock(&indio_dev->mlock);
  390. if (ret < 0)
  391. return ret;
  392. *val = (valin >> chan->scan_type.shift) &
  393. RES_MASK(chan->scan_type.realbits);
  394. return IIO_VAL_INT;
  395. }
  396. static irqreturn_t ad799x_event_handler(int irq, void *private)
  397. {
  398. struct iio_dev *indio_dev = private;
  399. struct ad799x_state *st = iio_priv(private);
  400. u8 status;
  401. int i, ret;
  402. ret = ad799x_i2c_read8(st, AD7998_ALERT_STAT_REG, &status);
  403. if (ret)
  404. goto done;
  405. if (!status)
  406. goto done;
  407. ad799x_i2c_write8(st, AD7998_ALERT_STAT_REG, AD7998_ALERT_STAT_CLEAR);
  408. for (i = 0; i < 8; i++) {
  409. if (status & (1 << i))
  410. iio_push_event(indio_dev,
  411. i & 0x1 ?
  412. IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
  413. (i >> 1),
  414. IIO_EV_TYPE_THRESH,
  415. IIO_EV_DIR_RISING) :
  416. IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
  417. (i >> 1),
  418. IIO_EV_TYPE_THRESH,
  419. IIO_EV_DIR_FALLING),
  420. iio_get_time_ns());
  421. }
  422. done:
  423. return IRQ_HANDLED;
  424. }
  425. static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
  426. ad799x_read_frequency,
  427. ad799x_write_frequency);
  428. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
  429. static struct attribute *ad799x_event_attributes[] = {
  430. &iio_dev_attr_sampling_frequency.dev_attr.attr,
  431. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  432. NULL,
  433. };
  434. static struct attribute_group ad799x_event_attrs_group = {
  435. .attrs = ad799x_event_attributes,
  436. .name = "events",
  437. };
  438. static const struct iio_info ad7991_info = {
  439. .read_raw = &ad799x_read_raw,
  440. .driver_module = THIS_MODULE,
  441. };
  442. static const struct iio_info ad7993_4_7_8_info = {
  443. .read_raw = &ad799x_read_raw,
  444. .event_attrs = &ad799x_event_attrs_group,
  445. .read_event_config = &ad799x_read_event_config,
  446. .read_event_value = &ad799x_read_event_value,
  447. .write_event_value = &ad799x_write_event_value,
  448. .driver_module = THIS_MODULE,
  449. .update_scan_mode = ad7997_8_update_scan_mode,
  450. };
  451. static const struct iio_event_spec ad799x_events[] = {
  452. {
  453. .type = IIO_EV_TYPE_THRESH,
  454. .dir = IIO_EV_DIR_RISING,
  455. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  456. BIT(IIO_EV_INFO_ENABLE),
  457. }, {
  458. .type = IIO_EV_TYPE_THRESH,
  459. .dir = IIO_EV_DIR_FALLING,
  460. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  461. BIT(IIO_EV_INFO_ENABLE),
  462. }, {
  463. .type = IIO_EV_TYPE_THRESH,
  464. .dir = IIO_EV_DIR_EITHER,
  465. .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
  466. },
  467. };
  468. #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
  469. .type = IIO_VOLTAGE, \
  470. .indexed = 1, \
  471. .channel = (_index), \
  472. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  473. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  474. .scan_index = (_index), \
  475. .scan_type = { \
  476. .sign = 'u', \
  477. .realbits = (_realbits), \
  478. .storagebits = 16, \
  479. .shift = 12 - (_realbits), \
  480. .endianness = IIO_BE, \
  481. }, \
  482. .event_spec = _ev_spec, \
  483. .num_event_specs = _num_ev_spec, \
  484. }
  485. #define AD799X_CHANNEL(_index, _realbits) \
  486. _AD799X_CHANNEL(_index, _realbits, NULL, 0)
  487. #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
  488. _AD799X_CHANNEL(_index, _realbits, ad799x_events, \
  489. ARRAY_SIZE(ad799x_events))
  490. static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
  491. [ad7991] = {
  492. .channel = {
  493. AD799X_CHANNEL(0, 12),
  494. AD799X_CHANNEL(1, 12),
  495. AD799X_CHANNEL(2, 12),
  496. AD799X_CHANNEL(3, 12),
  497. IIO_CHAN_SOFT_TIMESTAMP(4),
  498. },
  499. .num_channels = 5,
  500. .info = &ad7991_info,
  501. },
  502. [ad7995] = {
  503. .channel = {
  504. AD799X_CHANNEL(0, 10),
  505. AD799X_CHANNEL(1, 10),
  506. AD799X_CHANNEL(2, 10),
  507. AD799X_CHANNEL(3, 10),
  508. IIO_CHAN_SOFT_TIMESTAMP(4),
  509. },
  510. .num_channels = 5,
  511. .info = &ad7991_info,
  512. },
  513. [ad7999] = {
  514. .channel = {
  515. AD799X_CHANNEL(0, 8),
  516. AD799X_CHANNEL(1, 8),
  517. AD799X_CHANNEL(2, 8),
  518. AD799X_CHANNEL(3, 8),
  519. IIO_CHAN_SOFT_TIMESTAMP(4),
  520. },
  521. .num_channels = 5,
  522. .info = &ad7991_info,
  523. },
  524. [ad7992] = {
  525. .channel = {
  526. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  527. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  528. IIO_CHAN_SOFT_TIMESTAMP(3),
  529. },
  530. .num_channels = 3,
  531. .default_config = AD7998_ALERT_EN,
  532. .info = &ad7993_4_7_8_info,
  533. },
  534. [ad7993] = {
  535. .channel = {
  536. AD799X_CHANNEL_WITH_EVENTS(0, 10),
  537. AD799X_CHANNEL_WITH_EVENTS(1, 10),
  538. AD799X_CHANNEL_WITH_EVENTS(2, 10),
  539. AD799X_CHANNEL_WITH_EVENTS(3, 10),
  540. IIO_CHAN_SOFT_TIMESTAMP(4),
  541. },
  542. .num_channels = 5,
  543. .default_config = AD7998_ALERT_EN,
  544. .info = &ad7993_4_7_8_info,
  545. },
  546. [ad7994] = {
  547. .channel = {
  548. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  549. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  550. AD799X_CHANNEL_WITH_EVENTS(2, 12),
  551. AD799X_CHANNEL_WITH_EVENTS(3, 12),
  552. IIO_CHAN_SOFT_TIMESTAMP(4),
  553. },
  554. .num_channels = 5,
  555. .default_config = AD7998_ALERT_EN,
  556. .info = &ad7993_4_7_8_info,
  557. },
  558. [ad7997] = {
  559. .channel = {
  560. AD799X_CHANNEL_WITH_EVENTS(0, 10),
  561. AD799X_CHANNEL_WITH_EVENTS(1, 10),
  562. AD799X_CHANNEL_WITH_EVENTS(2, 10),
  563. AD799X_CHANNEL_WITH_EVENTS(3, 10),
  564. AD799X_CHANNEL(4, 10),
  565. AD799X_CHANNEL(5, 10),
  566. AD799X_CHANNEL(6, 10),
  567. AD799X_CHANNEL(7, 10),
  568. IIO_CHAN_SOFT_TIMESTAMP(8),
  569. },
  570. .num_channels = 9,
  571. .default_config = AD7998_ALERT_EN,
  572. .info = &ad7993_4_7_8_info,
  573. },
  574. [ad7998] = {
  575. .channel = {
  576. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  577. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  578. AD799X_CHANNEL_WITH_EVENTS(2, 12),
  579. AD799X_CHANNEL_WITH_EVENTS(3, 12),
  580. AD799X_CHANNEL(4, 12),
  581. AD799X_CHANNEL(5, 12),
  582. AD799X_CHANNEL(6, 12),
  583. AD799X_CHANNEL(7, 12),
  584. IIO_CHAN_SOFT_TIMESTAMP(8),
  585. },
  586. .num_channels = 9,
  587. .default_config = AD7998_ALERT_EN,
  588. .info = &ad7993_4_7_8_info,
  589. },
  590. };
  591. static int ad799x_probe(struct i2c_client *client,
  592. const struct i2c_device_id *id)
  593. {
  594. int ret;
  595. struct ad799x_state *st;
  596. struct iio_dev *indio_dev;
  597. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
  598. if (indio_dev == NULL)
  599. return -ENOMEM;
  600. st = iio_priv(indio_dev);
  601. /* this is only used for device removal purposes */
  602. i2c_set_clientdata(client, indio_dev);
  603. st->id = id->driver_data;
  604. st->chip_info = &ad799x_chip_info_tbl[st->id];
  605. st->config = st->chip_info->default_config;
  606. /* TODO: Add pdata options for filtering and bit delay */
  607. st->reg = devm_regulator_get(&client->dev, "vcc");
  608. if (IS_ERR(st->reg))
  609. return PTR_ERR(st->reg);
  610. ret = regulator_enable(st->reg);
  611. if (ret)
  612. return ret;
  613. st->vref = devm_regulator_get(&client->dev, "vref");
  614. if (IS_ERR(st->vref)) {
  615. ret = PTR_ERR(st->vref);
  616. goto error_disable_reg;
  617. }
  618. ret = regulator_enable(st->vref);
  619. if (ret)
  620. goto error_disable_reg;
  621. st->client = client;
  622. indio_dev->dev.parent = &client->dev;
  623. indio_dev->name = id->name;
  624. indio_dev->info = st->chip_info->info;
  625. indio_dev->modes = INDIO_DIRECT_MODE;
  626. indio_dev->channels = st->chip_info->channel;
  627. indio_dev->num_channels = st->chip_info->num_channels;
  628. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  629. &ad799x_trigger_handler, NULL);
  630. if (ret)
  631. goto error_disable_vref;
  632. if (client->irq > 0) {
  633. ret = devm_request_threaded_irq(&client->dev,
  634. client->irq,
  635. NULL,
  636. ad799x_event_handler,
  637. IRQF_TRIGGER_FALLING |
  638. IRQF_ONESHOT,
  639. client->name,
  640. indio_dev);
  641. if (ret)
  642. goto error_cleanup_ring;
  643. }
  644. ret = iio_device_register(indio_dev);
  645. if (ret)
  646. goto error_cleanup_ring;
  647. return 0;
  648. error_cleanup_ring:
  649. iio_triggered_buffer_cleanup(indio_dev);
  650. error_disable_vref:
  651. regulator_disable(st->vref);
  652. error_disable_reg:
  653. regulator_disable(st->reg);
  654. return ret;
  655. }
  656. static int ad799x_remove(struct i2c_client *client)
  657. {
  658. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  659. struct ad799x_state *st = iio_priv(indio_dev);
  660. iio_device_unregister(indio_dev);
  661. iio_triggered_buffer_cleanup(indio_dev);
  662. regulator_disable(st->vref);
  663. regulator_disable(st->reg);
  664. kfree(st->rx_buf);
  665. return 0;
  666. }
  667. static const struct i2c_device_id ad799x_id[] = {
  668. { "ad7991", ad7991 },
  669. { "ad7995", ad7995 },
  670. { "ad7999", ad7999 },
  671. { "ad7992", ad7992 },
  672. { "ad7993", ad7993 },
  673. { "ad7994", ad7994 },
  674. { "ad7997", ad7997 },
  675. { "ad7998", ad7998 },
  676. {}
  677. };
  678. MODULE_DEVICE_TABLE(i2c, ad799x_id);
  679. static struct i2c_driver ad799x_driver = {
  680. .driver = {
  681. .name = "ad799x",
  682. },
  683. .probe = ad799x_probe,
  684. .remove = ad799x_remove,
  685. .id_table = ad799x_id,
  686. };
  687. module_i2c_driver(ad799x_driver);
  688. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  689. MODULE_DESCRIPTION("Analog Devices AD799x ADC");
  690. MODULE_LICENSE("GPL v2");