shmob_drm_crtc.c 20 KB

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  1. /*
  2. * shmob_drm_crtc.c -- SH Mobile DRM CRTCs
  3. *
  4. * Copyright (C) 2012 Renesas Corporation
  5. *
  6. * Laurent Pinchart (laurent.pinchart@ideasonboard.com)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/backlight.h>
  14. #include <linux/clk.h>
  15. #include <drm/drmP.h>
  16. #include <drm/drm_crtc.h>
  17. #include <drm/drm_crtc_helper.h>
  18. #include <drm/drm_fb_cma_helper.h>
  19. #include <drm/drm_gem_cma_helper.h>
  20. #include <video/sh_mobile_meram.h>
  21. #include "shmob_drm_backlight.h"
  22. #include "shmob_drm_crtc.h"
  23. #include "shmob_drm_drv.h"
  24. #include "shmob_drm_kms.h"
  25. #include "shmob_drm_plane.h"
  26. #include "shmob_drm_regs.h"
  27. /*
  28. * TODO: panel support
  29. */
  30. /* -----------------------------------------------------------------------------
  31. * Clock management
  32. */
  33. static int shmob_drm_clk_on(struct shmob_drm_device *sdev)
  34. {
  35. int ret;
  36. if (sdev->clock) {
  37. ret = clk_prepare_enable(sdev->clock);
  38. if (ret < 0)
  39. return ret;
  40. }
  41. #if 0
  42. if (sdev->meram_dev && sdev->meram_dev->pdev)
  43. pm_runtime_get_sync(&sdev->meram_dev->pdev->dev);
  44. #endif
  45. return 0;
  46. }
  47. static void shmob_drm_clk_off(struct shmob_drm_device *sdev)
  48. {
  49. #if 0
  50. if (sdev->meram_dev && sdev->meram_dev->pdev)
  51. pm_runtime_put_sync(&sdev->meram_dev->pdev->dev);
  52. #endif
  53. if (sdev->clock)
  54. clk_disable_unprepare(sdev->clock);
  55. }
  56. /* -----------------------------------------------------------------------------
  57. * CRTC
  58. */
  59. static void shmob_drm_crtc_setup_geometry(struct shmob_drm_crtc *scrtc)
  60. {
  61. struct drm_crtc *crtc = &scrtc->crtc;
  62. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  63. const struct shmob_drm_interface_data *idata = &sdev->pdata->iface;
  64. const struct drm_display_mode *mode = &crtc->mode;
  65. u32 value;
  66. value = sdev->ldmt1r
  67. | ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? 0 : LDMT1R_VPOL)
  68. | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? 0 : LDMT1R_HPOL)
  69. | ((idata->flags & SHMOB_DRM_IFACE_FL_DWPOL) ? LDMT1R_DWPOL : 0)
  70. | ((idata->flags & SHMOB_DRM_IFACE_FL_DIPOL) ? LDMT1R_DIPOL : 0)
  71. | ((idata->flags & SHMOB_DRM_IFACE_FL_DAPOL) ? LDMT1R_DAPOL : 0)
  72. | ((idata->flags & SHMOB_DRM_IFACE_FL_HSCNT) ? LDMT1R_HSCNT : 0)
  73. | ((idata->flags & SHMOB_DRM_IFACE_FL_DWCNT) ? LDMT1R_DWCNT : 0);
  74. lcdc_write(sdev, LDMT1R, value);
  75. if (idata->interface >= SHMOB_DRM_IFACE_SYS8A &&
  76. idata->interface <= SHMOB_DRM_IFACE_SYS24) {
  77. /* Setup SYS bus. */
  78. value = (idata->sys.cs_setup << LDMT2R_CSUP_SHIFT)
  79. | (idata->sys.vsync_active_high ? LDMT2R_RSV : 0)
  80. | (idata->sys.vsync_dir_input ? LDMT2R_VSEL : 0)
  81. | (idata->sys.write_setup << LDMT2R_WCSC_SHIFT)
  82. | (idata->sys.write_cycle << LDMT2R_WCEC_SHIFT)
  83. | (idata->sys.write_strobe << LDMT2R_WCLW_SHIFT);
  84. lcdc_write(sdev, LDMT2R, value);
  85. value = (idata->sys.read_latch << LDMT3R_RDLC_SHIFT)
  86. | (idata->sys.read_setup << LDMT3R_RCSC_SHIFT)
  87. | (idata->sys.read_cycle << LDMT3R_RCEC_SHIFT)
  88. | (idata->sys.read_strobe << LDMT3R_RCLW_SHIFT);
  89. lcdc_write(sdev, LDMT3R, value);
  90. }
  91. value = ((mode->hdisplay / 8) << 16) /* HDCN */
  92. | (mode->htotal / 8); /* HTCN */
  93. lcdc_write(sdev, LDHCNR, value);
  94. value = (((mode->hsync_end - mode->hsync_start) / 8) << 16) /* HSYNW */
  95. | (mode->hsync_start / 8); /* HSYNP */
  96. lcdc_write(sdev, LDHSYNR, value);
  97. value = ((mode->hdisplay & 7) << 24) | ((mode->htotal & 7) << 16)
  98. | (((mode->hsync_end - mode->hsync_start) & 7) << 8)
  99. | (mode->hsync_start & 7);
  100. lcdc_write(sdev, LDHAJR, value);
  101. value = ((mode->vdisplay) << 16) /* VDLN */
  102. | mode->vtotal; /* VTLN */
  103. lcdc_write(sdev, LDVLNR, value);
  104. value = ((mode->vsync_end - mode->vsync_start) << 16) /* VSYNW */
  105. | mode->vsync_start; /* VSYNP */
  106. lcdc_write(sdev, LDVSYNR, value);
  107. }
  108. static void shmob_drm_crtc_start_stop(struct shmob_drm_crtc *scrtc, bool start)
  109. {
  110. struct shmob_drm_device *sdev = scrtc->crtc.dev->dev_private;
  111. u32 value;
  112. value = lcdc_read(sdev, LDCNT2R);
  113. if (start)
  114. lcdc_write(sdev, LDCNT2R, value | LDCNT2R_DO);
  115. else
  116. lcdc_write(sdev, LDCNT2R, value & ~LDCNT2R_DO);
  117. /* Wait until power is applied/stopped. */
  118. while (1) {
  119. value = lcdc_read(sdev, LDPMR) & LDPMR_LPS;
  120. if ((start && value) || (!start && !value))
  121. break;
  122. cpu_relax();
  123. }
  124. if (!start) {
  125. /* Stop the dot clock. */
  126. lcdc_write(sdev, LDDCKSTPR, LDDCKSTPR_DCKSTP);
  127. }
  128. }
  129. /*
  130. * shmob_drm_crtc_start - Configure and start the LCDC
  131. * @scrtc: the SH Mobile CRTC
  132. *
  133. * Configure and start the LCDC device. External devices (clocks, MERAM, panels,
  134. * ...) are not touched by this function.
  135. */
  136. static void shmob_drm_crtc_start(struct shmob_drm_crtc *scrtc)
  137. {
  138. struct drm_crtc *crtc = &scrtc->crtc;
  139. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  140. const struct shmob_drm_interface_data *idata = &sdev->pdata->iface;
  141. const struct shmob_drm_format_info *format;
  142. struct drm_device *dev = sdev->ddev;
  143. struct drm_plane *plane;
  144. u32 value;
  145. int ret;
  146. if (scrtc->started)
  147. return;
  148. format = shmob_drm_format_info(crtc->primary->fb->pixel_format);
  149. if (WARN_ON(format == NULL))
  150. return;
  151. /* Enable clocks before accessing the hardware. */
  152. ret = shmob_drm_clk_on(sdev);
  153. if (ret < 0)
  154. return;
  155. /* Reset and enable the LCDC. */
  156. lcdc_write(sdev, LDCNT2R, lcdc_read(sdev, LDCNT2R) | LDCNT2R_BR);
  157. lcdc_wait_bit(sdev, LDCNT2R, LDCNT2R_BR, 0);
  158. lcdc_write(sdev, LDCNT2R, LDCNT2R_ME);
  159. /* Stop the LCDC first and disable all interrupts. */
  160. shmob_drm_crtc_start_stop(scrtc, false);
  161. lcdc_write(sdev, LDINTR, 0);
  162. /* Configure power supply, dot clocks and start them. */
  163. lcdc_write(sdev, LDPMR, 0);
  164. value = sdev->lddckr;
  165. if (idata->clk_div) {
  166. /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
  167. * denominator.
  168. */
  169. lcdc_write(sdev, LDDCKPAT1R, 0);
  170. lcdc_write(sdev, LDDCKPAT2R, (1 << (idata->clk_div / 2)) - 1);
  171. if (idata->clk_div == 1)
  172. value |= LDDCKR_MOSEL;
  173. else
  174. value |= idata->clk_div;
  175. }
  176. lcdc_write(sdev, LDDCKR, value);
  177. lcdc_write(sdev, LDDCKSTPR, 0);
  178. lcdc_wait_bit(sdev, LDDCKSTPR, ~0, 0);
  179. /* TODO: Setup SYS panel */
  180. /* Setup geometry, format, frame buffer memory and operation mode. */
  181. shmob_drm_crtc_setup_geometry(scrtc);
  182. /* TODO: Handle YUV colorspaces. Hardcode REC709 for now. */
  183. lcdc_write(sdev, LDDFR, format->lddfr | LDDFR_CF1);
  184. lcdc_write(sdev, LDMLSR, scrtc->line_size);
  185. lcdc_write(sdev, LDSA1R, scrtc->dma[0]);
  186. if (format->yuv)
  187. lcdc_write(sdev, LDSA2R, scrtc->dma[1]);
  188. lcdc_write(sdev, LDSM1R, 0);
  189. /* Word and long word swap. */
  190. switch (format->fourcc) {
  191. case DRM_FORMAT_RGB565:
  192. case DRM_FORMAT_NV21:
  193. case DRM_FORMAT_NV61:
  194. case DRM_FORMAT_NV42:
  195. value = LDDDSR_LS | LDDDSR_WS;
  196. break;
  197. case DRM_FORMAT_RGB888:
  198. case DRM_FORMAT_NV12:
  199. case DRM_FORMAT_NV16:
  200. case DRM_FORMAT_NV24:
  201. value = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
  202. break;
  203. case DRM_FORMAT_ARGB8888:
  204. default:
  205. value = LDDDSR_LS;
  206. break;
  207. }
  208. lcdc_write(sdev, LDDDSR, value);
  209. /* Setup planes. */
  210. drm_for_each_legacy_plane(plane, &dev->mode_config.plane_list) {
  211. if (plane->crtc == crtc)
  212. shmob_drm_plane_setup(plane);
  213. }
  214. /* Enable the display output. */
  215. lcdc_write(sdev, LDCNT1R, LDCNT1R_DE);
  216. shmob_drm_crtc_start_stop(scrtc, true);
  217. scrtc->started = true;
  218. }
  219. static void shmob_drm_crtc_stop(struct shmob_drm_crtc *scrtc)
  220. {
  221. struct drm_crtc *crtc = &scrtc->crtc;
  222. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  223. if (!scrtc->started)
  224. return;
  225. /* Disable the MERAM cache. */
  226. if (scrtc->cache) {
  227. sh_mobile_meram_cache_free(sdev->meram, scrtc->cache);
  228. scrtc->cache = NULL;
  229. }
  230. /* Stop the LCDC. */
  231. shmob_drm_crtc_start_stop(scrtc, false);
  232. /* Disable the display output. */
  233. lcdc_write(sdev, LDCNT1R, 0);
  234. /* Stop clocks. */
  235. shmob_drm_clk_off(sdev);
  236. scrtc->started = false;
  237. }
  238. void shmob_drm_crtc_suspend(struct shmob_drm_crtc *scrtc)
  239. {
  240. shmob_drm_crtc_stop(scrtc);
  241. }
  242. void shmob_drm_crtc_resume(struct shmob_drm_crtc *scrtc)
  243. {
  244. if (scrtc->dpms != DRM_MODE_DPMS_ON)
  245. return;
  246. shmob_drm_crtc_start(scrtc);
  247. }
  248. static void shmob_drm_crtc_compute_base(struct shmob_drm_crtc *scrtc,
  249. int x, int y)
  250. {
  251. struct drm_crtc *crtc = &scrtc->crtc;
  252. struct drm_framebuffer *fb = crtc->primary->fb;
  253. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  254. struct drm_gem_cma_object *gem;
  255. unsigned int bpp;
  256. bpp = scrtc->format->yuv ? 8 : scrtc->format->bpp;
  257. gem = drm_fb_cma_get_gem_obj(fb, 0);
  258. scrtc->dma[0] = gem->paddr + fb->offsets[0]
  259. + y * fb->pitches[0] + x * bpp / 8;
  260. if (scrtc->format->yuv) {
  261. bpp = scrtc->format->bpp - 8;
  262. gem = drm_fb_cma_get_gem_obj(fb, 1);
  263. scrtc->dma[1] = gem->paddr + fb->offsets[1]
  264. + y / (bpp == 4 ? 2 : 1) * fb->pitches[1]
  265. + x * (bpp == 16 ? 2 : 1);
  266. }
  267. if (scrtc->cache)
  268. sh_mobile_meram_cache_update(sdev->meram, scrtc->cache,
  269. scrtc->dma[0], scrtc->dma[1],
  270. &scrtc->dma[0], &scrtc->dma[1]);
  271. }
  272. static void shmob_drm_crtc_update_base(struct shmob_drm_crtc *scrtc)
  273. {
  274. struct drm_crtc *crtc = &scrtc->crtc;
  275. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  276. shmob_drm_crtc_compute_base(scrtc, crtc->x, crtc->y);
  277. lcdc_write_mirror(sdev, LDSA1R, scrtc->dma[0]);
  278. if (scrtc->format->yuv)
  279. lcdc_write_mirror(sdev, LDSA2R, scrtc->dma[1]);
  280. lcdc_write(sdev, LDRCNTR, lcdc_read(sdev, LDRCNTR) ^ LDRCNTR_MRS);
  281. }
  282. #define to_shmob_crtc(c) container_of(c, struct shmob_drm_crtc, crtc)
  283. static void shmob_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
  284. {
  285. struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);
  286. if (scrtc->dpms == mode)
  287. return;
  288. if (mode == DRM_MODE_DPMS_ON)
  289. shmob_drm_crtc_start(scrtc);
  290. else
  291. shmob_drm_crtc_stop(scrtc);
  292. scrtc->dpms = mode;
  293. }
  294. static bool shmob_drm_crtc_mode_fixup(struct drm_crtc *crtc,
  295. const struct drm_display_mode *mode,
  296. struct drm_display_mode *adjusted_mode)
  297. {
  298. return true;
  299. }
  300. static void shmob_drm_crtc_mode_prepare(struct drm_crtc *crtc)
  301. {
  302. shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
  303. }
  304. static int shmob_drm_crtc_mode_set(struct drm_crtc *crtc,
  305. struct drm_display_mode *mode,
  306. struct drm_display_mode *adjusted_mode,
  307. int x, int y,
  308. struct drm_framebuffer *old_fb)
  309. {
  310. struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);
  311. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  312. const struct sh_mobile_meram_cfg *mdata = sdev->pdata->meram;
  313. const struct shmob_drm_format_info *format;
  314. void *cache;
  315. format = shmob_drm_format_info(crtc->primary->fb->pixel_format);
  316. if (format == NULL) {
  317. dev_dbg(sdev->dev, "mode_set: unsupported format %08x\n",
  318. crtc->primary->fb->pixel_format);
  319. return -EINVAL;
  320. }
  321. scrtc->format = format;
  322. scrtc->line_size = crtc->primary->fb->pitches[0];
  323. if (sdev->meram) {
  324. /* Enable MERAM cache if configured. We need to de-init
  325. * configured ICBs before we can re-initialize them.
  326. */
  327. if (scrtc->cache) {
  328. sh_mobile_meram_cache_free(sdev->meram, scrtc->cache);
  329. scrtc->cache = NULL;
  330. }
  331. cache = sh_mobile_meram_cache_alloc(sdev->meram, mdata,
  332. crtc->primary->fb->pitches[0],
  333. adjusted_mode->vdisplay,
  334. format->meram,
  335. &scrtc->line_size);
  336. if (!IS_ERR(cache))
  337. scrtc->cache = cache;
  338. }
  339. shmob_drm_crtc_compute_base(scrtc, x, y);
  340. return 0;
  341. }
  342. static void shmob_drm_crtc_mode_commit(struct drm_crtc *crtc)
  343. {
  344. shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
  345. }
  346. static int shmob_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
  347. struct drm_framebuffer *old_fb)
  348. {
  349. shmob_drm_crtc_update_base(to_shmob_crtc(crtc));
  350. return 0;
  351. }
  352. static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
  353. .dpms = shmob_drm_crtc_dpms,
  354. .mode_fixup = shmob_drm_crtc_mode_fixup,
  355. .prepare = shmob_drm_crtc_mode_prepare,
  356. .commit = shmob_drm_crtc_mode_commit,
  357. .mode_set = shmob_drm_crtc_mode_set,
  358. .mode_set_base = shmob_drm_crtc_mode_set_base,
  359. };
  360. void shmob_drm_crtc_cancel_page_flip(struct shmob_drm_crtc *scrtc,
  361. struct drm_file *file)
  362. {
  363. struct drm_pending_vblank_event *event;
  364. struct drm_device *dev = scrtc->crtc.dev;
  365. unsigned long flags;
  366. /* Destroy the pending vertical blanking event associated with the
  367. * pending page flip, if any, and disable vertical blanking interrupts.
  368. */
  369. spin_lock_irqsave(&dev->event_lock, flags);
  370. event = scrtc->event;
  371. if (event && event->base.file_priv == file) {
  372. scrtc->event = NULL;
  373. event->base.destroy(&event->base);
  374. drm_vblank_put(dev, 0);
  375. }
  376. spin_unlock_irqrestore(&dev->event_lock, flags);
  377. }
  378. void shmob_drm_crtc_finish_page_flip(struct shmob_drm_crtc *scrtc)
  379. {
  380. struct drm_pending_vblank_event *event;
  381. struct drm_device *dev = scrtc->crtc.dev;
  382. unsigned long flags;
  383. spin_lock_irqsave(&dev->event_lock, flags);
  384. event = scrtc->event;
  385. scrtc->event = NULL;
  386. if (event) {
  387. drm_send_vblank_event(dev, 0, event);
  388. drm_vblank_put(dev, 0);
  389. }
  390. spin_unlock_irqrestore(&dev->event_lock, flags);
  391. }
  392. static int shmob_drm_crtc_page_flip(struct drm_crtc *crtc,
  393. struct drm_framebuffer *fb,
  394. struct drm_pending_vblank_event *event,
  395. uint32_t page_flip_flags)
  396. {
  397. struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);
  398. struct drm_device *dev = scrtc->crtc.dev;
  399. unsigned long flags;
  400. spin_lock_irqsave(&dev->event_lock, flags);
  401. if (scrtc->event != NULL) {
  402. spin_unlock_irqrestore(&dev->event_lock, flags);
  403. return -EBUSY;
  404. }
  405. spin_unlock_irqrestore(&dev->event_lock, flags);
  406. crtc->primary->fb = fb;
  407. shmob_drm_crtc_update_base(scrtc);
  408. if (event) {
  409. event->pipe = 0;
  410. drm_vblank_get(dev, 0);
  411. spin_lock_irqsave(&dev->event_lock, flags);
  412. scrtc->event = event;
  413. spin_unlock_irqrestore(&dev->event_lock, flags);
  414. }
  415. return 0;
  416. }
  417. static const struct drm_crtc_funcs crtc_funcs = {
  418. .destroy = drm_crtc_cleanup,
  419. .set_config = drm_crtc_helper_set_config,
  420. .page_flip = shmob_drm_crtc_page_flip,
  421. };
  422. int shmob_drm_crtc_create(struct shmob_drm_device *sdev)
  423. {
  424. struct drm_crtc *crtc = &sdev->crtc.crtc;
  425. int ret;
  426. sdev->crtc.dpms = DRM_MODE_DPMS_OFF;
  427. ret = drm_crtc_init(sdev->ddev, crtc, &crtc_funcs);
  428. if (ret < 0)
  429. return ret;
  430. drm_crtc_helper_add(crtc, &crtc_helper_funcs);
  431. return 0;
  432. }
  433. /* -----------------------------------------------------------------------------
  434. * Encoder
  435. */
  436. #define to_shmob_encoder(e) \
  437. container_of(e, struct shmob_drm_encoder, encoder)
  438. static void shmob_drm_encoder_dpms(struct drm_encoder *encoder, int mode)
  439. {
  440. struct shmob_drm_encoder *senc = to_shmob_encoder(encoder);
  441. struct shmob_drm_device *sdev = encoder->dev->dev_private;
  442. struct shmob_drm_connector *scon = &sdev->connector;
  443. if (senc->dpms == mode)
  444. return;
  445. shmob_drm_backlight_dpms(scon, mode);
  446. senc->dpms = mode;
  447. }
  448. static bool shmob_drm_encoder_mode_fixup(struct drm_encoder *encoder,
  449. const struct drm_display_mode *mode,
  450. struct drm_display_mode *adjusted_mode)
  451. {
  452. struct drm_device *dev = encoder->dev;
  453. struct shmob_drm_device *sdev = dev->dev_private;
  454. struct drm_connector *connector = &sdev->connector.connector;
  455. const struct drm_display_mode *panel_mode;
  456. if (list_empty(&connector->modes)) {
  457. dev_dbg(dev->dev, "mode_fixup: empty modes list\n");
  458. return false;
  459. }
  460. /* The flat panel mode is fixed, just copy it to the adjusted mode. */
  461. panel_mode = list_first_entry(&connector->modes,
  462. struct drm_display_mode, head);
  463. drm_mode_copy(adjusted_mode, panel_mode);
  464. return true;
  465. }
  466. static void shmob_drm_encoder_mode_prepare(struct drm_encoder *encoder)
  467. {
  468. /* No-op, everything is handled in the CRTC code. */
  469. }
  470. static void shmob_drm_encoder_mode_set(struct drm_encoder *encoder,
  471. struct drm_display_mode *mode,
  472. struct drm_display_mode *adjusted_mode)
  473. {
  474. /* No-op, everything is handled in the CRTC code. */
  475. }
  476. static void shmob_drm_encoder_mode_commit(struct drm_encoder *encoder)
  477. {
  478. /* No-op, everything is handled in the CRTC code. */
  479. }
  480. static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
  481. .dpms = shmob_drm_encoder_dpms,
  482. .mode_fixup = shmob_drm_encoder_mode_fixup,
  483. .prepare = shmob_drm_encoder_mode_prepare,
  484. .commit = shmob_drm_encoder_mode_commit,
  485. .mode_set = shmob_drm_encoder_mode_set,
  486. };
  487. static void shmob_drm_encoder_destroy(struct drm_encoder *encoder)
  488. {
  489. drm_encoder_cleanup(encoder);
  490. }
  491. static const struct drm_encoder_funcs encoder_funcs = {
  492. .destroy = shmob_drm_encoder_destroy,
  493. };
  494. int shmob_drm_encoder_create(struct shmob_drm_device *sdev)
  495. {
  496. struct drm_encoder *encoder = &sdev->encoder.encoder;
  497. int ret;
  498. sdev->encoder.dpms = DRM_MODE_DPMS_OFF;
  499. encoder->possible_crtcs = 1;
  500. ret = drm_encoder_init(sdev->ddev, encoder, &encoder_funcs,
  501. DRM_MODE_ENCODER_LVDS);
  502. if (ret < 0)
  503. return ret;
  504. drm_encoder_helper_add(encoder, &encoder_helper_funcs);
  505. return 0;
  506. }
  507. void shmob_drm_crtc_enable_vblank(struct shmob_drm_device *sdev, bool enable)
  508. {
  509. unsigned long flags;
  510. u32 ldintr;
  511. /* Be careful not to acknowledge any pending interrupt. */
  512. spin_lock_irqsave(&sdev->irq_lock, flags);
  513. ldintr = lcdc_read(sdev, LDINTR) | LDINTR_STATUS_MASK;
  514. if (enable)
  515. ldintr |= LDINTR_VEE;
  516. else
  517. ldintr &= ~LDINTR_VEE;
  518. lcdc_write(sdev, LDINTR, ldintr);
  519. spin_unlock_irqrestore(&sdev->irq_lock, flags);
  520. }
  521. /* -----------------------------------------------------------------------------
  522. * Connector
  523. */
  524. #define to_shmob_connector(c) \
  525. container_of(c, struct shmob_drm_connector, connector)
  526. static int shmob_drm_connector_get_modes(struct drm_connector *connector)
  527. {
  528. struct shmob_drm_device *sdev = connector->dev->dev_private;
  529. struct drm_display_mode *mode;
  530. mode = drm_mode_create(connector->dev);
  531. if (mode == NULL)
  532. return 0;
  533. mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
  534. mode->clock = sdev->pdata->panel.mode.clock;
  535. mode->hdisplay = sdev->pdata->panel.mode.hdisplay;
  536. mode->hsync_start = sdev->pdata->panel.mode.hsync_start;
  537. mode->hsync_end = sdev->pdata->panel.mode.hsync_end;
  538. mode->htotal = sdev->pdata->panel.mode.htotal;
  539. mode->vdisplay = sdev->pdata->panel.mode.vdisplay;
  540. mode->vsync_start = sdev->pdata->panel.mode.vsync_start;
  541. mode->vsync_end = sdev->pdata->panel.mode.vsync_end;
  542. mode->vtotal = sdev->pdata->panel.mode.vtotal;
  543. mode->flags = sdev->pdata->panel.mode.flags;
  544. drm_mode_set_name(mode);
  545. drm_mode_probed_add(connector, mode);
  546. connector->display_info.width_mm = sdev->pdata->panel.width_mm;
  547. connector->display_info.height_mm = sdev->pdata->panel.height_mm;
  548. return 1;
  549. }
  550. static struct drm_encoder *
  551. shmob_drm_connector_best_encoder(struct drm_connector *connector)
  552. {
  553. struct shmob_drm_connector *scon = to_shmob_connector(connector);
  554. return scon->encoder;
  555. }
  556. static const struct drm_connector_helper_funcs connector_helper_funcs = {
  557. .get_modes = shmob_drm_connector_get_modes,
  558. .best_encoder = shmob_drm_connector_best_encoder,
  559. };
  560. static void shmob_drm_connector_destroy(struct drm_connector *connector)
  561. {
  562. struct shmob_drm_connector *scon = to_shmob_connector(connector);
  563. shmob_drm_backlight_exit(scon);
  564. drm_sysfs_connector_remove(connector);
  565. drm_connector_cleanup(connector);
  566. }
  567. static enum drm_connector_status
  568. shmob_drm_connector_detect(struct drm_connector *connector, bool force)
  569. {
  570. return connector_status_connected;
  571. }
  572. static const struct drm_connector_funcs connector_funcs = {
  573. .dpms = drm_helper_connector_dpms,
  574. .detect = shmob_drm_connector_detect,
  575. .fill_modes = drm_helper_probe_single_connector_modes,
  576. .destroy = shmob_drm_connector_destroy,
  577. };
  578. int shmob_drm_connector_create(struct shmob_drm_device *sdev,
  579. struct drm_encoder *encoder)
  580. {
  581. struct drm_connector *connector = &sdev->connector.connector;
  582. int ret;
  583. sdev->connector.encoder = encoder;
  584. connector->display_info.width_mm = sdev->pdata->panel.width_mm;
  585. connector->display_info.height_mm = sdev->pdata->panel.height_mm;
  586. ret = drm_connector_init(sdev->ddev, connector, &connector_funcs,
  587. DRM_MODE_CONNECTOR_LVDS);
  588. if (ret < 0)
  589. return ret;
  590. drm_connector_helper_add(connector, &connector_helper_funcs);
  591. ret = drm_sysfs_connector_add(connector);
  592. if (ret < 0)
  593. goto err_cleanup;
  594. ret = shmob_drm_backlight_init(&sdev->connector);
  595. if (ret < 0)
  596. goto err_sysfs;
  597. ret = drm_mode_connector_attach_encoder(connector, encoder);
  598. if (ret < 0)
  599. goto err_backlight;
  600. connector->encoder = encoder;
  601. drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
  602. drm_object_property_set_value(&connector->base,
  603. sdev->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
  604. return 0;
  605. err_backlight:
  606. shmob_drm_backlight_exit(&sdev->connector);
  607. err_sysfs:
  608. drm_sysfs_connector_remove(connector);
  609. err_cleanup:
  610. drm_connector_cleanup(connector);
  611. return ret;
  612. }