radeon_gem.c 16 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include <drm/drmP.h>
  29. #include <drm/radeon_drm.h>
  30. #include "radeon.h"
  31. void radeon_gem_object_free(struct drm_gem_object *gobj)
  32. {
  33. struct radeon_bo *robj = gem_to_radeon_bo(gobj);
  34. if (robj) {
  35. if (robj->gem_base.import_attach)
  36. drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
  37. radeon_bo_unref(&robj);
  38. }
  39. }
  40. int radeon_gem_object_create(struct radeon_device *rdev, int size,
  41. int alignment, int initial_domain,
  42. bool discardable, bool kernel,
  43. struct drm_gem_object **obj)
  44. {
  45. struct radeon_bo *robj;
  46. unsigned long max_size;
  47. int r;
  48. *obj = NULL;
  49. /* At least align on page size */
  50. if (alignment < PAGE_SIZE) {
  51. alignment = PAGE_SIZE;
  52. }
  53. /* maximun bo size is the minimun btw visible vram and gtt size */
  54. max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
  55. if (size > max_size) {
  56. printk(KERN_WARNING "%s:%d alloc size %dMb bigger than %ldMb limit\n",
  57. __func__, __LINE__, size >> 20, max_size >> 20);
  58. return -ENOMEM;
  59. }
  60. retry:
  61. r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
  62. if (r) {
  63. if (r != -ERESTARTSYS) {
  64. if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
  65. initial_domain |= RADEON_GEM_DOMAIN_GTT;
  66. goto retry;
  67. }
  68. DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
  69. size, initial_domain, alignment, r);
  70. }
  71. return r;
  72. }
  73. *obj = &robj->gem_base;
  74. robj->pid = task_pid_nr(current);
  75. mutex_lock(&rdev->gem.mutex);
  76. list_add_tail(&robj->list, &rdev->gem.objects);
  77. mutex_unlock(&rdev->gem.mutex);
  78. return 0;
  79. }
  80. static int radeon_gem_set_domain(struct drm_gem_object *gobj,
  81. uint32_t rdomain, uint32_t wdomain)
  82. {
  83. struct radeon_bo *robj;
  84. uint32_t domain;
  85. int r;
  86. /* FIXME: reeimplement */
  87. robj = gem_to_radeon_bo(gobj);
  88. /* work out where to validate the buffer to */
  89. domain = wdomain;
  90. if (!domain) {
  91. domain = rdomain;
  92. }
  93. if (!domain) {
  94. /* Do nothings */
  95. printk(KERN_WARNING "Set domain without domain !\n");
  96. return 0;
  97. }
  98. if (domain == RADEON_GEM_DOMAIN_CPU) {
  99. /* Asking for cpu access wait for object idle */
  100. r = radeon_bo_wait(robj, NULL, false);
  101. if (r) {
  102. printk(KERN_ERR "Failed to wait for object !\n");
  103. return r;
  104. }
  105. }
  106. return 0;
  107. }
  108. int radeon_gem_init(struct radeon_device *rdev)
  109. {
  110. INIT_LIST_HEAD(&rdev->gem.objects);
  111. return 0;
  112. }
  113. void radeon_gem_fini(struct radeon_device *rdev)
  114. {
  115. radeon_bo_force_delete(rdev);
  116. }
  117. /*
  118. * Call from drm_gem_handle_create which appear in both new and open ioctl
  119. * case.
  120. */
  121. int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
  122. {
  123. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  124. struct radeon_device *rdev = rbo->rdev;
  125. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  126. struct radeon_vm *vm = &fpriv->vm;
  127. struct radeon_bo_va *bo_va;
  128. int r;
  129. if (rdev->family < CHIP_CAYMAN) {
  130. return 0;
  131. }
  132. r = radeon_bo_reserve(rbo, false);
  133. if (r) {
  134. return r;
  135. }
  136. bo_va = radeon_vm_bo_find(vm, rbo);
  137. if (!bo_va) {
  138. bo_va = radeon_vm_bo_add(rdev, vm, rbo);
  139. } else {
  140. ++bo_va->ref_count;
  141. }
  142. radeon_bo_unreserve(rbo);
  143. return 0;
  144. }
  145. void radeon_gem_object_close(struct drm_gem_object *obj,
  146. struct drm_file *file_priv)
  147. {
  148. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  149. struct radeon_device *rdev = rbo->rdev;
  150. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  151. struct radeon_vm *vm = &fpriv->vm;
  152. struct radeon_bo_va *bo_va;
  153. int r;
  154. if (rdev->family < CHIP_CAYMAN) {
  155. return;
  156. }
  157. r = radeon_bo_reserve(rbo, true);
  158. if (r) {
  159. dev_err(rdev->dev, "leaking bo va because "
  160. "we fail to reserve bo (%d)\n", r);
  161. return;
  162. }
  163. bo_va = radeon_vm_bo_find(vm, rbo);
  164. if (bo_va) {
  165. if (--bo_va->ref_count == 0) {
  166. radeon_vm_bo_rmv(rdev, bo_va);
  167. }
  168. }
  169. radeon_bo_unreserve(rbo);
  170. }
  171. static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
  172. {
  173. if (r == -EDEADLK) {
  174. r = radeon_gpu_reset(rdev);
  175. if (!r)
  176. r = -EAGAIN;
  177. }
  178. return r;
  179. }
  180. /*
  181. * GEM ioctls.
  182. */
  183. int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
  184. struct drm_file *filp)
  185. {
  186. struct radeon_device *rdev = dev->dev_private;
  187. struct drm_radeon_gem_info *args = data;
  188. struct ttm_mem_type_manager *man;
  189. unsigned i;
  190. man = &rdev->mman.bdev.man[TTM_PL_VRAM];
  191. args->vram_size = rdev->mc.real_vram_size;
  192. args->vram_visible = (u64)man->size << PAGE_SHIFT;
  193. if (rdev->stollen_vga_memory)
  194. args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
  195. args->vram_visible -= radeon_fbdev_total_size(rdev);
  196. args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
  197. for(i = 0; i < RADEON_NUM_RINGS; ++i)
  198. args->gart_size -= rdev->ring[i].ring_size;
  199. return 0;
  200. }
  201. int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
  202. struct drm_file *filp)
  203. {
  204. /* TODO: implement */
  205. DRM_ERROR("unimplemented %s\n", __func__);
  206. return -ENOSYS;
  207. }
  208. int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
  209. struct drm_file *filp)
  210. {
  211. /* TODO: implement */
  212. DRM_ERROR("unimplemented %s\n", __func__);
  213. return -ENOSYS;
  214. }
  215. int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
  216. struct drm_file *filp)
  217. {
  218. struct radeon_device *rdev = dev->dev_private;
  219. struct drm_radeon_gem_create *args = data;
  220. struct drm_gem_object *gobj;
  221. uint32_t handle;
  222. int r;
  223. down_read(&rdev->exclusive_lock);
  224. /* create a gem object to contain this object in */
  225. args->size = roundup(args->size, PAGE_SIZE);
  226. r = radeon_gem_object_create(rdev, args->size, args->alignment,
  227. args->initial_domain, false,
  228. false, &gobj);
  229. if (r) {
  230. up_read(&rdev->exclusive_lock);
  231. r = radeon_gem_handle_lockup(rdev, r);
  232. return r;
  233. }
  234. r = drm_gem_handle_create(filp, gobj, &handle);
  235. /* drop reference from allocate - handle holds it now */
  236. drm_gem_object_unreference_unlocked(gobj);
  237. if (r) {
  238. up_read(&rdev->exclusive_lock);
  239. r = radeon_gem_handle_lockup(rdev, r);
  240. return r;
  241. }
  242. args->handle = handle;
  243. up_read(&rdev->exclusive_lock);
  244. return 0;
  245. }
  246. int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
  247. struct drm_file *filp)
  248. {
  249. /* transition the BO to a domain -
  250. * just validate the BO into a certain domain */
  251. struct radeon_device *rdev = dev->dev_private;
  252. struct drm_radeon_gem_set_domain *args = data;
  253. struct drm_gem_object *gobj;
  254. struct radeon_bo *robj;
  255. int r;
  256. /* for now if someone requests domain CPU -
  257. * just make sure the buffer is finished with */
  258. down_read(&rdev->exclusive_lock);
  259. /* just do a BO wait for now */
  260. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  261. if (gobj == NULL) {
  262. up_read(&rdev->exclusive_lock);
  263. return -ENOENT;
  264. }
  265. robj = gem_to_radeon_bo(gobj);
  266. r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
  267. drm_gem_object_unreference_unlocked(gobj);
  268. up_read(&rdev->exclusive_lock);
  269. r = radeon_gem_handle_lockup(robj->rdev, r);
  270. return r;
  271. }
  272. int radeon_mode_dumb_mmap(struct drm_file *filp,
  273. struct drm_device *dev,
  274. uint32_t handle, uint64_t *offset_p)
  275. {
  276. struct drm_gem_object *gobj;
  277. struct radeon_bo *robj;
  278. gobj = drm_gem_object_lookup(dev, filp, handle);
  279. if (gobj == NULL) {
  280. return -ENOENT;
  281. }
  282. robj = gem_to_radeon_bo(gobj);
  283. *offset_p = radeon_bo_mmap_offset(robj);
  284. drm_gem_object_unreference_unlocked(gobj);
  285. return 0;
  286. }
  287. int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
  288. struct drm_file *filp)
  289. {
  290. struct drm_radeon_gem_mmap *args = data;
  291. return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
  292. }
  293. int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
  294. struct drm_file *filp)
  295. {
  296. struct radeon_device *rdev = dev->dev_private;
  297. struct drm_radeon_gem_busy *args = data;
  298. struct drm_gem_object *gobj;
  299. struct radeon_bo *robj;
  300. int r;
  301. uint32_t cur_placement = 0;
  302. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  303. if (gobj == NULL) {
  304. return -ENOENT;
  305. }
  306. robj = gem_to_radeon_bo(gobj);
  307. r = radeon_bo_wait(robj, &cur_placement, true);
  308. args->domain = radeon_mem_type_to_domain(cur_placement);
  309. drm_gem_object_unreference_unlocked(gobj);
  310. r = radeon_gem_handle_lockup(rdev, r);
  311. return r;
  312. }
  313. int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
  314. struct drm_file *filp)
  315. {
  316. struct radeon_device *rdev = dev->dev_private;
  317. struct drm_radeon_gem_wait_idle *args = data;
  318. struct drm_gem_object *gobj;
  319. struct radeon_bo *robj;
  320. int r;
  321. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  322. if (gobj == NULL) {
  323. return -ENOENT;
  324. }
  325. robj = gem_to_radeon_bo(gobj);
  326. r = radeon_bo_wait(robj, NULL, false);
  327. /* callback hw specific functions if any */
  328. if (rdev->asic->ioctl_wait_idle)
  329. robj->rdev->asic->ioctl_wait_idle(rdev, robj);
  330. drm_gem_object_unreference_unlocked(gobj);
  331. r = radeon_gem_handle_lockup(rdev, r);
  332. return r;
  333. }
  334. int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
  335. struct drm_file *filp)
  336. {
  337. struct drm_radeon_gem_set_tiling *args = data;
  338. struct drm_gem_object *gobj;
  339. struct radeon_bo *robj;
  340. int r = 0;
  341. DRM_DEBUG("%d \n", args->handle);
  342. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  343. if (gobj == NULL)
  344. return -ENOENT;
  345. robj = gem_to_radeon_bo(gobj);
  346. r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
  347. drm_gem_object_unreference_unlocked(gobj);
  348. return r;
  349. }
  350. int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
  351. struct drm_file *filp)
  352. {
  353. struct drm_radeon_gem_get_tiling *args = data;
  354. struct drm_gem_object *gobj;
  355. struct radeon_bo *rbo;
  356. int r = 0;
  357. DRM_DEBUG("\n");
  358. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  359. if (gobj == NULL)
  360. return -ENOENT;
  361. rbo = gem_to_radeon_bo(gobj);
  362. r = radeon_bo_reserve(rbo, false);
  363. if (unlikely(r != 0))
  364. goto out;
  365. radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
  366. radeon_bo_unreserve(rbo);
  367. out:
  368. drm_gem_object_unreference_unlocked(gobj);
  369. return r;
  370. }
  371. int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
  372. struct drm_file *filp)
  373. {
  374. struct drm_radeon_gem_va *args = data;
  375. struct drm_gem_object *gobj;
  376. struct radeon_device *rdev = dev->dev_private;
  377. struct radeon_fpriv *fpriv = filp->driver_priv;
  378. struct radeon_bo *rbo;
  379. struct radeon_bo_va *bo_va;
  380. u32 invalid_flags;
  381. int r = 0;
  382. if (!rdev->vm_manager.enabled) {
  383. args->operation = RADEON_VA_RESULT_ERROR;
  384. return -ENOTTY;
  385. }
  386. /* !! DONT REMOVE !!
  387. * We don't support vm_id yet, to be sure we don't have have broken
  388. * userspace, reject anyone trying to use non 0 value thus moving
  389. * forward we can use those fields without breaking existant userspace
  390. */
  391. if (args->vm_id) {
  392. args->operation = RADEON_VA_RESULT_ERROR;
  393. return -EINVAL;
  394. }
  395. if (args->offset < RADEON_VA_RESERVED_SIZE) {
  396. dev_err(&dev->pdev->dev,
  397. "offset 0x%lX is in reserved area 0x%X\n",
  398. (unsigned long)args->offset,
  399. RADEON_VA_RESERVED_SIZE);
  400. args->operation = RADEON_VA_RESULT_ERROR;
  401. return -EINVAL;
  402. }
  403. /* don't remove, we need to enforce userspace to set the snooped flag
  404. * otherwise we will endup with broken userspace and we won't be able
  405. * to enable this feature without adding new interface
  406. */
  407. invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
  408. if ((args->flags & invalid_flags)) {
  409. dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
  410. args->flags, invalid_flags);
  411. args->operation = RADEON_VA_RESULT_ERROR;
  412. return -EINVAL;
  413. }
  414. if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
  415. dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
  416. args->operation = RADEON_VA_RESULT_ERROR;
  417. return -EINVAL;
  418. }
  419. switch (args->operation) {
  420. case RADEON_VA_MAP:
  421. case RADEON_VA_UNMAP:
  422. break;
  423. default:
  424. dev_err(&dev->pdev->dev, "unsupported operation %d\n",
  425. args->operation);
  426. args->operation = RADEON_VA_RESULT_ERROR;
  427. return -EINVAL;
  428. }
  429. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  430. if (gobj == NULL) {
  431. args->operation = RADEON_VA_RESULT_ERROR;
  432. return -ENOENT;
  433. }
  434. rbo = gem_to_radeon_bo(gobj);
  435. r = radeon_bo_reserve(rbo, false);
  436. if (r) {
  437. args->operation = RADEON_VA_RESULT_ERROR;
  438. drm_gem_object_unreference_unlocked(gobj);
  439. return r;
  440. }
  441. bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
  442. if (!bo_va) {
  443. args->operation = RADEON_VA_RESULT_ERROR;
  444. drm_gem_object_unreference_unlocked(gobj);
  445. return -ENOENT;
  446. }
  447. switch (args->operation) {
  448. case RADEON_VA_MAP:
  449. if (bo_va->soffset) {
  450. args->operation = RADEON_VA_RESULT_VA_EXIST;
  451. args->offset = bo_va->soffset;
  452. goto out;
  453. }
  454. r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
  455. break;
  456. case RADEON_VA_UNMAP:
  457. r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
  458. break;
  459. default:
  460. break;
  461. }
  462. args->operation = RADEON_VA_RESULT_OK;
  463. if (r) {
  464. args->operation = RADEON_VA_RESULT_ERROR;
  465. }
  466. out:
  467. radeon_bo_unreserve(rbo);
  468. drm_gem_object_unreference_unlocked(gobj);
  469. return r;
  470. }
  471. int radeon_gem_op_ioctl(struct drm_device *dev, void *data,
  472. struct drm_file *filp)
  473. {
  474. struct drm_radeon_gem_op *args = data;
  475. struct drm_gem_object *gobj;
  476. struct radeon_bo *robj;
  477. int r;
  478. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  479. if (gobj == NULL) {
  480. return -ENOENT;
  481. }
  482. robj = gem_to_radeon_bo(gobj);
  483. r = radeon_bo_reserve(robj, false);
  484. if (unlikely(r))
  485. goto out;
  486. switch (args->op) {
  487. case RADEON_GEM_OP_GET_INITIAL_DOMAIN:
  488. args->value = robj->initial_domain;
  489. break;
  490. case RADEON_GEM_OP_SET_INITIAL_DOMAIN:
  491. robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
  492. RADEON_GEM_DOMAIN_GTT |
  493. RADEON_GEM_DOMAIN_CPU);
  494. break;
  495. default:
  496. r = -EINVAL;
  497. }
  498. radeon_bo_unreserve(robj);
  499. out:
  500. drm_gem_object_unreference_unlocked(gobj);
  501. return r;
  502. }
  503. int radeon_mode_dumb_create(struct drm_file *file_priv,
  504. struct drm_device *dev,
  505. struct drm_mode_create_dumb *args)
  506. {
  507. struct radeon_device *rdev = dev->dev_private;
  508. struct drm_gem_object *gobj;
  509. uint32_t handle;
  510. int r;
  511. args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
  512. args->size = args->pitch * args->height;
  513. args->size = ALIGN(args->size, PAGE_SIZE);
  514. r = radeon_gem_object_create(rdev, args->size, 0,
  515. RADEON_GEM_DOMAIN_VRAM,
  516. false, ttm_bo_type_device,
  517. &gobj);
  518. if (r)
  519. return -ENOMEM;
  520. r = drm_gem_handle_create(file_priv, gobj, &handle);
  521. /* drop reference from allocate - handle holds it now */
  522. drm_gem_object_unreference_unlocked(gobj);
  523. if (r) {
  524. return r;
  525. }
  526. args->handle = handle;
  527. return 0;
  528. }
  529. #if defined(CONFIG_DEBUG_FS)
  530. static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
  531. {
  532. struct drm_info_node *node = (struct drm_info_node *)m->private;
  533. struct drm_device *dev = node->minor->dev;
  534. struct radeon_device *rdev = dev->dev_private;
  535. struct radeon_bo *rbo;
  536. unsigned i = 0;
  537. mutex_lock(&rdev->gem.mutex);
  538. list_for_each_entry(rbo, &rdev->gem.objects, list) {
  539. unsigned domain;
  540. const char *placement;
  541. domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
  542. switch (domain) {
  543. case RADEON_GEM_DOMAIN_VRAM:
  544. placement = "VRAM";
  545. break;
  546. case RADEON_GEM_DOMAIN_GTT:
  547. placement = " GTT";
  548. break;
  549. case RADEON_GEM_DOMAIN_CPU:
  550. default:
  551. placement = " CPU";
  552. break;
  553. }
  554. seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
  555. i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
  556. placement, (unsigned long)rbo->pid);
  557. i++;
  558. }
  559. mutex_unlock(&rdev->gem.mutex);
  560. return 0;
  561. }
  562. static struct drm_info_list radeon_debugfs_gem_list[] = {
  563. {"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
  564. };
  565. #endif
  566. int radeon_gem_debugfs_init(struct radeon_device *rdev)
  567. {
  568. #if defined(CONFIG_DEBUG_FS)
  569. return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);
  570. #endif
  571. return 0;
  572. }