nouveau_display.c 23 KB

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  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include <drm/drmP.h>
  27. #include <drm/drm_crtc_helper.h>
  28. #include "nouveau_fbcon.h"
  29. #include "dispnv04/hw.h"
  30. #include "nouveau_crtc.h"
  31. #include "nouveau_dma.h"
  32. #include "nouveau_gem.h"
  33. #include "nouveau_connector.h"
  34. #include "nv50_display.h"
  35. #include "nouveau_fence.h"
  36. #include <engine/disp.h>
  37. #include <core/class.h>
  38. static int
  39. nouveau_display_vblank_handler(void *data, u32 type, int head)
  40. {
  41. struct nouveau_drm *drm = data;
  42. drm_handle_vblank(drm->dev, head);
  43. return NVKM_EVENT_KEEP;
  44. }
  45. int
  46. nouveau_display_vblank_enable(struct drm_device *dev, int head)
  47. {
  48. struct nouveau_display *disp = nouveau_display(dev);
  49. if (disp) {
  50. nouveau_event_get(disp->vblank[head]);
  51. return 0;
  52. }
  53. return -EIO;
  54. }
  55. void
  56. nouveau_display_vblank_disable(struct drm_device *dev, int head)
  57. {
  58. struct nouveau_display *disp = nouveau_display(dev);
  59. if (disp)
  60. nouveau_event_put(disp->vblank[head]);
  61. }
  62. static inline int
  63. calc(int blanks, int blanke, int total, int line)
  64. {
  65. if (blanke >= blanks) {
  66. if (line >= blanks)
  67. line -= total;
  68. } else {
  69. if (line >= blanks)
  70. line -= total;
  71. line -= blanke + 1;
  72. }
  73. return line;
  74. }
  75. int
  76. nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos,
  77. ktime_t *stime, ktime_t *etime)
  78. {
  79. const u32 mthd = NV04_DISP_SCANOUTPOS + nouveau_crtc(crtc)->index;
  80. struct nouveau_display *disp = nouveau_display(crtc->dev);
  81. struct nv04_display_scanoutpos args;
  82. int ret, retry = 1;
  83. do {
  84. ret = nv_exec(disp->core, mthd, &args, sizeof(args));
  85. if (ret != 0)
  86. return 0;
  87. if (args.vline) {
  88. ret |= DRM_SCANOUTPOS_ACCURATE;
  89. ret |= DRM_SCANOUTPOS_VALID;
  90. break;
  91. }
  92. if (retry) ndelay(crtc->linedur_ns);
  93. } while (retry--);
  94. *hpos = args.hline;
  95. *vpos = calc(args.vblanks, args.vblanke, args.vtotal, args.vline);
  96. if (stime) *stime = ns_to_ktime(args.time[0]);
  97. if (etime) *etime = ns_to_ktime(args.time[1]);
  98. if (*vpos < 0)
  99. ret |= DRM_SCANOUTPOS_INVBL;
  100. return ret;
  101. }
  102. int
  103. nouveau_display_scanoutpos(struct drm_device *dev, int head, unsigned int flags,
  104. int *vpos, int *hpos, ktime_t *stime, ktime_t *etime)
  105. {
  106. struct drm_crtc *crtc;
  107. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  108. if (nouveau_crtc(crtc)->index == head) {
  109. return nouveau_display_scanoutpos_head(crtc, vpos, hpos,
  110. stime, etime);
  111. }
  112. }
  113. return 0;
  114. }
  115. int
  116. nouveau_display_vblstamp(struct drm_device *dev, int head, int *max_error,
  117. struct timeval *time, unsigned flags)
  118. {
  119. struct drm_crtc *crtc;
  120. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  121. if (nouveau_crtc(crtc)->index == head) {
  122. return drm_calc_vbltimestamp_from_scanoutpos(dev,
  123. head, max_error, time, flags, crtc,
  124. &crtc->hwmode);
  125. }
  126. }
  127. return -EINVAL;
  128. }
  129. static void
  130. nouveau_display_vblank_fini(struct drm_device *dev)
  131. {
  132. struct nouveau_display *disp = nouveau_display(dev);
  133. int i;
  134. drm_vblank_cleanup(dev);
  135. if (disp->vblank) {
  136. for (i = 0; i < dev->mode_config.num_crtc; i++)
  137. nouveau_event_ref(NULL, &disp->vblank[i]);
  138. kfree(disp->vblank);
  139. disp->vblank = NULL;
  140. }
  141. }
  142. static int
  143. nouveau_display_vblank_init(struct drm_device *dev)
  144. {
  145. struct nouveau_display *disp = nouveau_display(dev);
  146. struct nouveau_drm *drm = nouveau_drm(dev);
  147. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  148. int ret, i;
  149. disp->vblank = kzalloc(dev->mode_config.num_crtc *
  150. sizeof(*disp->vblank), GFP_KERNEL);
  151. if (!disp->vblank)
  152. return -ENOMEM;
  153. for (i = 0; i < dev->mode_config.num_crtc; i++) {
  154. ret = nouveau_event_new(pdisp->vblank, 1, i,
  155. nouveau_display_vblank_handler,
  156. drm, &disp->vblank[i]);
  157. if (ret) {
  158. nouveau_display_vblank_fini(dev);
  159. return ret;
  160. }
  161. }
  162. ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
  163. if (ret) {
  164. nouveau_display_vblank_fini(dev);
  165. return ret;
  166. }
  167. return 0;
  168. }
  169. static void
  170. nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
  171. {
  172. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  173. if (fb->nvbo)
  174. drm_gem_object_unreference_unlocked(&fb->nvbo->gem);
  175. drm_framebuffer_cleanup(drm_fb);
  176. kfree(fb);
  177. }
  178. static int
  179. nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
  180. struct drm_file *file_priv,
  181. unsigned int *handle)
  182. {
  183. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  184. return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle);
  185. }
  186. static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
  187. .destroy = nouveau_user_framebuffer_destroy,
  188. .create_handle = nouveau_user_framebuffer_create_handle,
  189. };
  190. int
  191. nouveau_framebuffer_init(struct drm_device *dev,
  192. struct nouveau_framebuffer *nv_fb,
  193. struct drm_mode_fb_cmd2 *mode_cmd,
  194. struct nouveau_bo *nvbo)
  195. {
  196. struct nouveau_drm *drm = nouveau_drm(dev);
  197. struct drm_framebuffer *fb = &nv_fb->base;
  198. int ret;
  199. drm_helper_mode_fill_fb_struct(fb, mode_cmd);
  200. nv_fb->nvbo = nvbo;
  201. if (nv_device(drm->device)->card_type >= NV_50) {
  202. u32 tile_flags = nouveau_bo_tile_layout(nvbo);
  203. if (tile_flags == 0x7a00 ||
  204. tile_flags == 0xfe00)
  205. nv_fb->r_dma = NvEvoFB32;
  206. else
  207. if (tile_flags == 0x7000)
  208. nv_fb->r_dma = NvEvoFB16;
  209. else
  210. nv_fb->r_dma = NvEvoVRAM_LP;
  211. switch (fb->depth) {
  212. case 8: nv_fb->r_format = 0x1e00; break;
  213. case 15: nv_fb->r_format = 0xe900; break;
  214. case 16: nv_fb->r_format = 0xe800; break;
  215. case 24:
  216. case 32: nv_fb->r_format = 0xcf00; break;
  217. case 30: nv_fb->r_format = 0xd100; break;
  218. default:
  219. NV_ERROR(drm, "unknown depth %d\n", fb->depth);
  220. return -EINVAL;
  221. }
  222. if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG) {
  223. NV_ERROR(drm, "framebuffer requires contiguous bo\n");
  224. return -EINVAL;
  225. }
  226. if (nv_device(drm->device)->chipset == 0x50)
  227. nv_fb->r_format |= (tile_flags << 8);
  228. if (!tile_flags) {
  229. if (nv_device(drm->device)->card_type < NV_D0)
  230. nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
  231. else
  232. nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
  233. } else {
  234. u32 mode = nvbo->tile_mode;
  235. if (nv_device(drm->device)->card_type >= NV_C0)
  236. mode >>= 4;
  237. nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
  238. }
  239. }
  240. ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
  241. if (ret) {
  242. return ret;
  243. }
  244. return 0;
  245. }
  246. static struct drm_framebuffer *
  247. nouveau_user_framebuffer_create(struct drm_device *dev,
  248. struct drm_file *file_priv,
  249. struct drm_mode_fb_cmd2 *mode_cmd)
  250. {
  251. struct nouveau_framebuffer *nouveau_fb;
  252. struct drm_gem_object *gem;
  253. int ret = -ENOMEM;
  254. gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
  255. if (!gem)
  256. return ERR_PTR(-ENOENT);
  257. nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
  258. if (!nouveau_fb)
  259. goto err_unref;
  260. ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
  261. if (ret)
  262. goto err;
  263. return &nouveau_fb->base;
  264. err:
  265. kfree(nouveau_fb);
  266. err_unref:
  267. drm_gem_object_unreference(gem);
  268. return ERR_PTR(ret);
  269. }
  270. static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
  271. .fb_create = nouveau_user_framebuffer_create,
  272. .output_poll_changed = nouveau_fbcon_output_poll_changed,
  273. };
  274. struct nouveau_drm_prop_enum_list {
  275. u8 gen_mask;
  276. int type;
  277. char *name;
  278. };
  279. static struct nouveau_drm_prop_enum_list underscan[] = {
  280. { 6, UNDERSCAN_AUTO, "auto" },
  281. { 6, UNDERSCAN_OFF, "off" },
  282. { 6, UNDERSCAN_ON, "on" },
  283. {}
  284. };
  285. static struct nouveau_drm_prop_enum_list dither_mode[] = {
  286. { 7, DITHERING_MODE_AUTO, "auto" },
  287. { 7, DITHERING_MODE_OFF, "off" },
  288. { 1, DITHERING_MODE_ON, "on" },
  289. { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
  290. { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
  291. { 4, DITHERING_MODE_TEMPORAL, "temporal" },
  292. {}
  293. };
  294. static struct nouveau_drm_prop_enum_list dither_depth[] = {
  295. { 6, DITHERING_DEPTH_AUTO, "auto" },
  296. { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
  297. { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
  298. {}
  299. };
  300. #define PROP_ENUM(p,gen,n,list) do { \
  301. struct nouveau_drm_prop_enum_list *l = (list); \
  302. int c = 0; \
  303. while (l->gen_mask) { \
  304. if (l->gen_mask & (1 << (gen))) \
  305. c++; \
  306. l++; \
  307. } \
  308. if (c) { \
  309. p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
  310. l = (list); \
  311. c = 0; \
  312. while (p && l->gen_mask) { \
  313. if (l->gen_mask & (1 << (gen))) { \
  314. drm_property_add_enum(p, c, l->type, l->name); \
  315. c++; \
  316. } \
  317. l++; \
  318. } \
  319. } \
  320. } while(0)
  321. int
  322. nouveau_display_init(struct drm_device *dev)
  323. {
  324. struct nouveau_display *disp = nouveau_display(dev);
  325. struct drm_connector *connector;
  326. int ret;
  327. ret = disp->init(dev);
  328. if (ret)
  329. return ret;
  330. /* enable polling for external displays */
  331. drm_kms_helper_poll_enable(dev);
  332. /* enable hotplug interrupts */
  333. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  334. struct nouveau_connector *conn = nouveau_connector(connector);
  335. if (conn->hpd) nouveau_event_get(conn->hpd);
  336. }
  337. return ret;
  338. }
  339. void
  340. nouveau_display_fini(struct drm_device *dev)
  341. {
  342. struct nouveau_display *disp = nouveau_display(dev);
  343. struct drm_connector *connector;
  344. /* disable hotplug interrupts */
  345. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  346. struct nouveau_connector *conn = nouveau_connector(connector);
  347. if (conn->hpd) nouveau_event_put(conn->hpd);
  348. }
  349. drm_kms_helper_poll_disable(dev);
  350. disp->fini(dev);
  351. }
  352. int
  353. nouveau_display_create(struct drm_device *dev)
  354. {
  355. struct nouveau_drm *drm = nouveau_drm(dev);
  356. struct nouveau_device *device = nouveau_dev(dev);
  357. struct nouveau_display *disp;
  358. int ret, gen;
  359. disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
  360. if (!disp)
  361. return -ENOMEM;
  362. drm_mode_config_init(dev);
  363. drm_mode_create_scaling_mode_property(dev);
  364. drm_mode_create_dvi_i_properties(dev);
  365. if (nv_device(drm->device)->card_type < NV_50)
  366. gen = 0;
  367. else
  368. if (nv_device(drm->device)->card_type < NV_D0)
  369. gen = 1;
  370. else
  371. gen = 2;
  372. PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
  373. PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
  374. PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
  375. disp->underscan_hborder_property =
  376. drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
  377. disp->underscan_vborder_property =
  378. drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
  379. if (gen >= 1) {
  380. /* -90..+90 */
  381. disp->vibrant_hue_property =
  382. drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
  383. /* -100..+100 */
  384. disp->color_vibrance_property =
  385. drm_property_create_range(dev, 0, "color vibrance", 0, 200);
  386. }
  387. dev->mode_config.funcs = &nouveau_mode_config_funcs;
  388. dev->mode_config.fb_base = nv_device_resource_start(device, 1);
  389. dev->mode_config.min_width = 0;
  390. dev->mode_config.min_height = 0;
  391. if (nv_device(drm->device)->card_type < NV_10) {
  392. dev->mode_config.max_width = 2048;
  393. dev->mode_config.max_height = 2048;
  394. } else
  395. if (nv_device(drm->device)->card_type < NV_50) {
  396. dev->mode_config.max_width = 4096;
  397. dev->mode_config.max_height = 4096;
  398. } else {
  399. dev->mode_config.max_width = 8192;
  400. dev->mode_config.max_height = 8192;
  401. }
  402. dev->mode_config.preferred_depth = 24;
  403. dev->mode_config.prefer_shadow = 1;
  404. if (nv_device(drm->device)->chipset < 0x11)
  405. dev->mode_config.async_page_flip = false;
  406. else
  407. dev->mode_config.async_page_flip = true;
  408. drm_kms_helper_poll_init(dev);
  409. drm_kms_helper_poll_disable(dev);
  410. if (drm->vbios.dcb.entries) {
  411. static const u16 oclass[] = {
  412. GM107_DISP_CLASS,
  413. NVF0_DISP_CLASS,
  414. NVE0_DISP_CLASS,
  415. NVD0_DISP_CLASS,
  416. NVA3_DISP_CLASS,
  417. NV94_DISP_CLASS,
  418. NVA0_DISP_CLASS,
  419. NV84_DISP_CLASS,
  420. NV50_DISP_CLASS,
  421. NV04_DISP_CLASS,
  422. };
  423. int i;
  424. for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) {
  425. ret = nouveau_object_new(nv_object(drm), NVDRM_DEVICE,
  426. NVDRM_DISPLAY, oclass[i],
  427. NULL, 0, &disp->core);
  428. }
  429. if (ret == 0) {
  430. if (nv_mclass(disp->core) < NV50_DISP_CLASS)
  431. ret = nv04_display_create(dev);
  432. else
  433. ret = nv50_display_create(dev);
  434. }
  435. } else {
  436. ret = 0;
  437. }
  438. if (ret)
  439. goto disp_create_err;
  440. if (dev->mode_config.num_crtc) {
  441. ret = nouveau_display_vblank_init(dev);
  442. if (ret)
  443. goto vblank_err;
  444. }
  445. nouveau_backlight_init(dev);
  446. return 0;
  447. vblank_err:
  448. disp->dtor(dev);
  449. disp_create_err:
  450. drm_kms_helper_poll_fini(dev);
  451. drm_mode_config_cleanup(dev);
  452. return ret;
  453. }
  454. void
  455. nouveau_display_destroy(struct drm_device *dev)
  456. {
  457. struct nouveau_display *disp = nouveau_display(dev);
  458. struct nouveau_drm *drm = nouveau_drm(dev);
  459. nouveau_backlight_exit(dev);
  460. nouveau_display_vblank_fini(dev);
  461. drm_kms_helper_poll_fini(dev);
  462. drm_mode_config_cleanup(dev);
  463. if (disp->dtor)
  464. disp->dtor(dev);
  465. nouveau_object_del(nv_object(drm), NVDRM_DEVICE, NVDRM_DISPLAY);
  466. nouveau_drm(dev)->display = NULL;
  467. kfree(disp);
  468. }
  469. int
  470. nouveau_display_suspend(struct drm_device *dev)
  471. {
  472. struct nouveau_drm *drm = nouveau_drm(dev);
  473. struct drm_crtc *crtc;
  474. nouveau_display_fini(dev);
  475. NV_INFO(drm, "unpinning framebuffer(s)...\n");
  476. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  477. struct nouveau_framebuffer *nouveau_fb;
  478. nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
  479. if (!nouveau_fb || !nouveau_fb->nvbo)
  480. continue;
  481. nouveau_bo_unpin(nouveau_fb->nvbo);
  482. }
  483. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  484. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  485. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  486. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  487. }
  488. return 0;
  489. }
  490. void
  491. nouveau_display_repin(struct drm_device *dev)
  492. {
  493. struct nouveau_drm *drm = nouveau_drm(dev);
  494. struct drm_crtc *crtc;
  495. int ret;
  496. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  497. struct nouveau_framebuffer *nouveau_fb;
  498. nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
  499. if (!nouveau_fb || !nouveau_fb->nvbo)
  500. continue;
  501. nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
  502. }
  503. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  504. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  505. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
  506. if (!ret)
  507. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  508. if (ret)
  509. NV_ERROR(drm, "Could not pin/map cursor.\n");
  510. }
  511. }
  512. void
  513. nouveau_display_resume(struct drm_device *dev)
  514. {
  515. struct drm_crtc *crtc;
  516. nouveau_display_init(dev);
  517. /* Force CLUT to get re-loaded during modeset */
  518. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  519. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  520. nv_crtc->lut.depth = 0;
  521. }
  522. drm_helper_resume_force_mode(dev);
  523. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  524. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  525. u32 offset = nv_crtc->cursor.nvbo->bo.offset;
  526. nv_crtc->cursor.set_offset(nv_crtc, offset);
  527. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  528. nv_crtc->cursor_saved_y);
  529. }
  530. }
  531. static int
  532. nouveau_page_flip_emit(struct nouveau_channel *chan,
  533. struct nouveau_bo *old_bo,
  534. struct nouveau_bo *new_bo,
  535. struct nouveau_page_flip_state *s,
  536. struct nouveau_fence **pfence)
  537. {
  538. struct nouveau_fence_chan *fctx = chan->fence;
  539. struct nouveau_drm *drm = chan->drm;
  540. struct drm_device *dev = drm->dev;
  541. unsigned long flags;
  542. int ret;
  543. /* Queue it to the pending list */
  544. spin_lock_irqsave(&dev->event_lock, flags);
  545. list_add_tail(&s->head, &fctx->flip);
  546. spin_unlock_irqrestore(&dev->event_lock, flags);
  547. /* Synchronize with the old framebuffer */
  548. ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
  549. if (ret)
  550. goto fail;
  551. /* Emit the pageflip */
  552. ret = RING_SPACE(chan, 2);
  553. if (ret)
  554. goto fail;
  555. if (nv_device(drm->device)->card_type < NV_C0)
  556. BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
  557. else
  558. BEGIN_NVC0(chan, FermiSw, NV_SW_PAGE_FLIP, 1);
  559. OUT_RING (chan, 0x00000000);
  560. FIRE_RING (chan);
  561. ret = nouveau_fence_new(chan, false, pfence);
  562. if (ret)
  563. goto fail;
  564. return 0;
  565. fail:
  566. spin_lock_irqsave(&dev->event_lock, flags);
  567. list_del(&s->head);
  568. spin_unlock_irqrestore(&dev->event_lock, flags);
  569. return ret;
  570. }
  571. int
  572. nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
  573. struct drm_pending_vblank_event *event, u32 flags)
  574. {
  575. const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1;
  576. struct drm_device *dev = crtc->dev;
  577. struct nouveau_drm *drm = nouveau_drm(dev);
  578. struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo;
  579. struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
  580. struct nouveau_page_flip_state *s;
  581. struct nouveau_channel *chan = drm->channel;
  582. struct nouveau_fence *fence;
  583. int ret;
  584. if (!drm->channel)
  585. return -ENODEV;
  586. s = kzalloc(sizeof(*s), GFP_KERNEL);
  587. if (!s)
  588. return -ENOMEM;
  589. if (new_bo != old_bo) {
  590. ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
  591. if (ret)
  592. goto fail_free;
  593. }
  594. mutex_lock(&chan->cli->mutex);
  595. /* synchronise rendering channel with the kernel's channel */
  596. spin_lock(&new_bo->bo.bdev->fence_lock);
  597. fence = nouveau_fence_ref(new_bo->bo.sync_obj);
  598. spin_unlock(&new_bo->bo.bdev->fence_lock);
  599. ret = nouveau_fence_sync(fence, chan);
  600. nouveau_fence_unref(&fence);
  601. if (ret)
  602. goto fail_unpin;
  603. ret = ttm_bo_reserve(&old_bo->bo, true, false, false, NULL);
  604. if (ret)
  605. goto fail_unpin;
  606. /* Initialize a page flip struct */
  607. *s = (struct nouveau_page_flip_state)
  608. { { }, event, nouveau_crtc(crtc)->index,
  609. fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
  610. new_bo->bo.offset };
  611. /* Keep vblanks on during flip, for the target crtc of this flip */
  612. drm_vblank_get(dev, nouveau_crtc(crtc)->index);
  613. /* Emit a page flip */
  614. if (nv_device(drm->device)->card_type >= NV_50) {
  615. ret = nv50_display_flip_next(crtc, fb, chan, swap_interval);
  616. if (ret)
  617. goto fail_unreserve;
  618. } else {
  619. struct nv04_display *dispnv04 = nv04_display(dev);
  620. int head = nouveau_crtc(crtc)->index;
  621. if (swap_interval) {
  622. ret = RING_SPACE(chan, 8);
  623. if (ret)
  624. goto fail_unreserve;
  625. BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1);
  626. OUT_RING (chan, 0);
  627. BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1);
  628. OUT_RING (chan, head);
  629. BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1);
  630. OUT_RING (chan, 0);
  631. BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1);
  632. OUT_RING (chan, 0);
  633. }
  634. nouveau_bo_ref(new_bo, &dispnv04->image[head]);
  635. }
  636. ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
  637. if (ret)
  638. goto fail_unreserve;
  639. mutex_unlock(&chan->cli->mutex);
  640. /* Update the crtc struct and cleanup */
  641. crtc->primary->fb = fb;
  642. nouveau_bo_fence(old_bo, fence);
  643. ttm_bo_unreserve(&old_bo->bo);
  644. if (old_bo != new_bo)
  645. nouveau_bo_unpin(old_bo);
  646. nouveau_fence_unref(&fence);
  647. return 0;
  648. fail_unreserve:
  649. drm_vblank_put(dev, nouveau_crtc(crtc)->index);
  650. ttm_bo_unreserve(&old_bo->bo);
  651. fail_unpin:
  652. mutex_unlock(&chan->cli->mutex);
  653. if (old_bo != new_bo)
  654. nouveau_bo_unpin(new_bo);
  655. fail_free:
  656. kfree(s);
  657. return ret;
  658. }
  659. int
  660. nouveau_finish_page_flip(struct nouveau_channel *chan,
  661. struct nouveau_page_flip_state *ps)
  662. {
  663. struct nouveau_fence_chan *fctx = chan->fence;
  664. struct nouveau_drm *drm = chan->drm;
  665. struct drm_device *dev = drm->dev;
  666. struct nouveau_page_flip_state *s;
  667. unsigned long flags;
  668. int crtcid = -1;
  669. spin_lock_irqsave(&dev->event_lock, flags);
  670. if (list_empty(&fctx->flip)) {
  671. NV_ERROR(drm, "unexpected pageflip\n");
  672. spin_unlock_irqrestore(&dev->event_lock, flags);
  673. return -EINVAL;
  674. }
  675. s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
  676. if (s->event) {
  677. /* Vblank timestamps/counts are only correct on >= NV-50 */
  678. if (nv_device(drm->device)->card_type >= NV_50)
  679. crtcid = s->crtc;
  680. drm_send_vblank_event(dev, crtcid, s->event);
  681. }
  682. /* Give up ownership of vblank for page-flipped crtc */
  683. drm_vblank_put(dev, s->crtc);
  684. list_del(&s->head);
  685. if (ps)
  686. *ps = *s;
  687. kfree(s);
  688. spin_unlock_irqrestore(&dev->event_lock, flags);
  689. return 0;
  690. }
  691. int
  692. nouveau_flip_complete(void *data)
  693. {
  694. struct nouveau_channel *chan = data;
  695. struct nouveau_drm *drm = chan->drm;
  696. struct nouveau_page_flip_state state;
  697. if (!nouveau_finish_page_flip(chan, &state)) {
  698. if (nv_device(drm->device)->card_type < NV_50) {
  699. nv_set_crtc_base(drm->dev, state.crtc, state.offset +
  700. state.y * state.pitch +
  701. state.x * state.bpp / 8);
  702. }
  703. }
  704. return 0;
  705. }
  706. int
  707. nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
  708. struct drm_mode_create_dumb *args)
  709. {
  710. struct nouveau_bo *bo;
  711. int ret;
  712. args->pitch = roundup(args->width * (args->bpp / 8), 256);
  713. args->size = args->pitch * args->height;
  714. args->size = roundup(args->size, PAGE_SIZE);
  715. ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
  716. if (ret)
  717. return ret;
  718. ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle);
  719. drm_gem_object_unreference_unlocked(&bo->gem);
  720. return ret;
  721. }
  722. int
  723. nouveau_display_dumb_map_offset(struct drm_file *file_priv,
  724. struct drm_device *dev,
  725. uint32_t handle, uint64_t *poffset)
  726. {
  727. struct drm_gem_object *gem;
  728. gem = drm_gem_object_lookup(dev, file_priv, handle);
  729. if (gem) {
  730. struct nouveau_bo *bo = nouveau_gem_object(gem);
  731. *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node);
  732. drm_gem_object_unreference_unlocked(gem);
  733. return 0;
  734. }
  735. return -ENOENT;
  736. }