intel_panel.c 36 KB

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  1. /*
  2. * Copyright © 2006-2010 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. * Chris Wilson <chris@chris-wilson.co.uk>
  29. */
  30. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31. #include <linux/moduleparam.h>
  32. #include "intel_drv.h"
  33. void
  34. intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
  35. struct drm_display_mode *adjusted_mode)
  36. {
  37. drm_mode_copy(adjusted_mode, fixed_mode);
  38. drm_mode_set_crtcinfo(adjusted_mode, 0);
  39. }
  40. /**
  41. * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
  42. * @dev: drm device
  43. * @fixed_mode : panel native mode
  44. * @connector: LVDS/eDP connector
  45. *
  46. * Return downclock_avail
  47. * Find the reduced downclock for LVDS/eDP in EDID.
  48. */
  49. struct drm_display_mode *
  50. intel_find_panel_downclock(struct drm_device *dev,
  51. struct drm_display_mode *fixed_mode,
  52. struct drm_connector *connector)
  53. {
  54. struct drm_display_mode *scan, *tmp_mode;
  55. int temp_downclock;
  56. temp_downclock = fixed_mode->clock;
  57. tmp_mode = NULL;
  58. list_for_each_entry(scan, &connector->probed_modes, head) {
  59. /*
  60. * If one mode has the same resolution with the fixed_panel
  61. * mode while they have the different refresh rate, it means
  62. * that the reduced downclock is found. In such
  63. * case we can set the different FPx0/1 to dynamically select
  64. * between low and high frequency.
  65. */
  66. if (scan->hdisplay == fixed_mode->hdisplay &&
  67. scan->hsync_start == fixed_mode->hsync_start &&
  68. scan->hsync_end == fixed_mode->hsync_end &&
  69. scan->htotal == fixed_mode->htotal &&
  70. scan->vdisplay == fixed_mode->vdisplay &&
  71. scan->vsync_start == fixed_mode->vsync_start &&
  72. scan->vsync_end == fixed_mode->vsync_end &&
  73. scan->vtotal == fixed_mode->vtotal) {
  74. if (scan->clock < temp_downclock) {
  75. /*
  76. * The downclock is already found. But we
  77. * expect to find the lower downclock.
  78. */
  79. temp_downclock = scan->clock;
  80. tmp_mode = scan;
  81. }
  82. }
  83. }
  84. if (temp_downclock < fixed_mode->clock)
  85. return drm_mode_duplicate(dev, tmp_mode);
  86. else
  87. return NULL;
  88. }
  89. /* adjusted_mode has been preset to be the panel's fixed mode */
  90. void
  91. intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
  92. struct intel_crtc_config *pipe_config,
  93. int fitting_mode)
  94. {
  95. struct drm_display_mode *adjusted_mode;
  96. int x, y, width, height;
  97. adjusted_mode = &pipe_config->adjusted_mode;
  98. x = y = width = height = 0;
  99. /* Native modes don't need fitting */
  100. if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
  101. adjusted_mode->vdisplay == pipe_config->pipe_src_h)
  102. goto done;
  103. switch (fitting_mode) {
  104. case DRM_MODE_SCALE_CENTER:
  105. width = pipe_config->pipe_src_w;
  106. height = pipe_config->pipe_src_h;
  107. x = (adjusted_mode->hdisplay - width + 1)/2;
  108. y = (adjusted_mode->vdisplay - height + 1)/2;
  109. break;
  110. case DRM_MODE_SCALE_ASPECT:
  111. /* Scale but preserve the aspect ratio */
  112. {
  113. u32 scaled_width = adjusted_mode->hdisplay
  114. * pipe_config->pipe_src_h;
  115. u32 scaled_height = pipe_config->pipe_src_w
  116. * adjusted_mode->vdisplay;
  117. if (scaled_width > scaled_height) { /* pillar */
  118. width = scaled_height / pipe_config->pipe_src_h;
  119. if (width & 1)
  120. width++;
  121. x = (adjusted_mode->hdisplay - width + 1) / 2;
  122. y = 0;
  123. height = adjusted_mode->vdisplay;
  124. } else if (scaled_width < scaled_height) { /* letter */
  125. height = scaled_width / pipe_config->pipe_src_w;
  126. if (height & 1)
  127. height++;
  128. y = (adjusted_mode->vdisplay - height + 1) / 2;
  129. x = 0;
  130. width = adjusted_mode->hdisplay;
  131. } else {
  132. x = y = 0;
  133. width = adjusted_mode->hdisplay;
  134. height = adjusted_mode->vdisplay;
  135. }
  136. }
  137. break;
  138. case DRM_MODE_SCALE_FULLSCREEN:
  139. x = y = 0;
  140. width = adjusted_mode->hdisplay;
  141. height = adjusted_mode->vdisplay;
  142. break;
  143. default:
  144. WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  145. return;
  146. }
  147. done:
  148. pipe_config->pch_pfit.pos = (x << 16) | y;
  149. pipe_config->pch_pfit.size = (width << 16) | height;
  150. pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
  151. }
  152. static void
  153. centre_horizontally(struct drm_display_mode *mode,
  154. int width)
  155. {
  156. u32 border, sync_pos, blank_width, sync_width;
  157. /* keep the hsync and hblank widths constant */
  158. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  159. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  160. sync_pos = (blank_width - sync_width + 1) / 2;
  161. border = (mode->hdisplay - width + 1) / 2;
  162. border += border & 1; /* make the border even */
  163. mode->crtc_hdisplay = width;
  164. mode->crtc_hblank_start = width + border;
  165. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  166. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  167. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  168. }
  169. static void
  170. centre_vertically(struct drm_display_mode *mode,
  171. int height)
  172. {
  173. u32 border, sync_pos, blank_width, sync_width;
  174. /* keep the vsync and vblank widths constant */
  175. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  176. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  177. sync_pos = (blank_width - sync_width + 1) / 2;
  178. border = (mode->vdisplay - height + 1) / 2;
  179. mode->crtc_vdisplay = height;
  180. mode->crtc_vblank_start = height + border;
  181. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  182. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  183. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  184. }
  185. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  186. {
  187. /*
  188. * Floating point operation is not supported. So the FACTOR
  189. * is defined, which can avoid the floating point computation
  190. * when calculating the panel ratio.
  191. */
  192. #define ACCURACY 12
  193. #define FACTOR (1 << ACCURACY)
  194. u32 ratio = source * FACTOR / target;
  195. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  196. }
  197. static void i965_scale_aspect(struct intel_crtc_config *pipe_config,
  198. u32 *pfit_control)
  199. {
  200. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  201. u32 scaled_width = adjusted_mode->hdisplay *
  202. pipe_config->pipe_src_h;
  203. u32 scaled_height = pipe_config->pipe_src_w *
  204. adjusted_mode->vdisplay;
  205. /* 965+ is easy, it does everything in hw */
  206. if (scaled_width > scaled_height)
  207. *pfit_control |= PFIT_ENABLE |
  208. PFIT_SCALING_PILLAR;
  209. else if (scaled_width < scaled_height)
  210. *pfit_control |= PFIT_ENABLE |
  211. PFIT_SCALING_LETTER;
  212. else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
  213. *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  214. }
  215. static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config,
  216. u32 *pfit_control, u32 *pfit_pgm_ratios,
  217. u32 *border)
  218. {
  219. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  220. u32 scaled_width = adjusted_mode->hdisplay *
  221. pipe_config->pipe_src_h;
  222. u32 scaled_height = pipe_config->pipe_src_w *
  223. adjusted_mode->vdisplay;
  224. u32 bits;
  225. /*
  226. * For earlier chips we have to calculate the scaling
  227. * ratio by hand and program it into the
  228. * PFIT_PGM_RATIO register
  229. */
  230. if (scaled_width > scaled_height) { /* pillar */
  231. centre_horizontally(adjusted_mode,
  232. scaled_height /
  233. pipe_config->pipe_src_h);
  234. *border = LVDS_BORDER_ENABLE;
  235. if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
  236. bits = panel_fitter_scaling(pipe_config->pipe_src_h,
  237. adjusted_mode->vdisplay);
  238. *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  239. bits << PFIT_VERT_SCALE_SHIFT);
  240. *pfit_control |= (PFIT_ENABLE |
  241. VERT_INTERP_BILINEAR |
  242. HORIZ_INTERP_BILINEAR);
  243. }
  244. } else if (scaled_width < scaled_height) { /* letter */
  245. centre_vertically(adjusted_mode,
  246. scaled_width /
  247. pipe_config->pipe_src_w);
  248. *border = LVDS_BORDER_ENABLE;
  249. if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
  250. bits = panel_fitter_scaling(pipe_config->pipe_src_w,
  251. adjusted_mode->hdisplay);
  252. *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  253. bits << PFIT_VERT_SCALE_SHIFT);
  254. *pfit_control |= (PFIT_ENABLE |
  255. VERT_INTERP_BILINEAR |
  256. HORIZ_INTERP_BILINEAR);
  257. }
  258. } else {
  259. /* Aspects match, Let hw scale both directions */
  260. *pfit_control |= (PFIT_ENABLE |
  261. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  262. VERT_INTERP_BILINEAR |
  263. HORIZ_INTERP_BILINEAR);
  264. }
  265. }
  266. void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
  267. struct intel_crtc_config *pipe_config,
  268. int fitting_mode)
  269. {
  270. struct drm_device *dev = intel_crtc->base.dev;
  271. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  272. struct drm_display_mode *adjusted_mode;
  273. adjusted_mode = &pipe_config->adjusted_mode;
  274. /* Native modes don't need fitting */
  275. if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
  276. adjusted_mode->vdisplay == pipe_config->pipe_src_h)
  277. goto out;
  278. switch (fitting_mode) {
  279. case DRM_MODE_SCALE_CENTER:
  280. /*
  281. * For centered modes, we have to calculate border widths &
  282. * heights and modify the values programmed into the CRTC.
  283. */
  284. centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
  285. centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
  286. border = LVDS_BORDER_ENABLE;
  287. break;
  288. case DRM_MODE_SCALE_ASPECT:
  289. /* Scale but preserve the aspect ratio */
  290. if (INTEL_INFO(dev)->gen >= 4)
  291. i965_scale_aspect(pipe_config, &pfit_control);
  292. else
  293. i9xx_scale_aspect(pipe_config, &pfit_control,
  294. &pfit_pgm_ratios, &border);
  295. break;
  296. case DRM_MODE_SCALE_FULLSCREEN:
  297. /*
  298. * Full scaling, even if it changes the aspect ratio.
  299. * Fortunately this is all done for us in hw.
  300. */
  301. if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
  302. pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
  303. pfit_control |= PFIT_ENABLE;
  304. if (INTEL_INFO(dev)->gen >= 4)
  305. pfit_control |= PFIT_SCALING_AUTO;
  306. else
  307. pfit_control |= (VERT_AUTO_SCALE |
  308. VERT_INTERP_BILINEAR |
  309. HORIZ_AUTO_SCALE |
  310. HORIZ_INTERP_BILINEAR);
  311. }
  312. break;
  313. default:
  314. WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  315. return;
  316. }
  317. /* 965+ wants fuzzy fitting */
  318. /* FIXME: handle multiple panels by failing gracefully */
  319. if (INTEL_INFO(dev)->gen >= 4)
  320. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  321. PFIT_FILTER_FUZZY);
  322. out:
  323. if ((pfit_control & PFIT_ENABLE) == 0) {
  324. pfit_control = 0;
  325. pfit_pgm_ratios = 0;
  326. }
  327. /* Make sure pre-965 set dither correctly for 18bpp panels. */
  328. if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
  329. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  330. pipe_config->gmch_pfit.control = pfit_control;
  331. pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
  332. pipe_config->gmch_pfit.lvds_border_bits = border;
  333. }
  334. enum drm_connector_status
  335. intel_panel_detect(struct drm_device *dev)
  336. {
  337. struct drm_i915_private *dev_priv = dev->dev_private;
  338. /* Assume that the BIOS does not lie through the OpRegion... */
  339. if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
  340. return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
  341. connector_status_connected :
  342. connector_status_disconnected;
  343. }
  344. switch (i915.panel_ignore_lid) {
  345. case -2:
  346. return connector_status_connected;
  347. case -1:
  348. return connector_status_disconnected;
  349. default:
  350. return connector_status_unknown;
  351. }
  352. }
  353. static u32 intel_panel_compute_brightness(struct intel_connector *connector,
  354. u32 val)
  355. {
  356. struct drm_device *dev = connector->base.dev;
  357. struct drm_i915_private *dev_priv = dev->dev_private;
  358. struct intel_panel *panel = &connector->panel;
  359. WARN_ON(panel->backlight.max == 0);
  360. if (i915.invert_brightness < 0)
  361. return val;
  362. if (i915.invert_brightness > 0 ||
  363. dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
  364. return panel->backlight.max - val;
  365. }
  366. return val;
  367. }
  368. static u32 bdw_get_backlight(struct intel_connector *connector)
  369. {
  370. struct drm_device *dev = connector->base.dev;
  371. struct drm_i915_private *dev_priv = dev->dev_private;
  372. return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
  373. }
  374. static u32 pch_get_backlight(struct intel_connector *connector)
  375. {
  376. struct drm_device *dev = connector->base.dev;
  377. struct drm_i915_private *dev_priv = dev->dev_private;
  378. return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  379. }
  380. static u32 i9xx_get_backlight(struct intel_connector *connector)
  381. {
  382. struct drm_device *dev = connector->base.dev;
  383. struct drm_i915_private *dev_priv = dev->dev_private;
  384. struct intel_panel *panel = &connector->panel;
  385. u32 val;
  386. val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  387. if (INTEL_INFO(dev)->gen < 4)
  388. val >>= 1;
  389. if (panel->backlight.combination_mode) {
  390. u8 lbpc;
  391. pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
  392. val *= lbpc;
  393. }
  394. return val;
  395. }
  396. static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
  397. {
  398. struct drm_i915_private *dev_priv = dev->dev_private;
  399. return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
  400. }
  401. static u32 vlv_get_backlight(struct intel_connector *connector)
  402. {
  403. struct drm_device *dev = connector->base.dev;
  404. enum pipe pipe = intel_get_pipe_from_connector(connector);
  405. return _vlv_get_backlight(dev, pipe);
  406. }
  407. static u32 intel_panel_get_backlight(struct intel_connector *connector)
  408. {
  409. struct drm_device *dev = connector->base.dev;
  410. struct drm_i915_private *dev_priv = dev->dev_private;
  411. u32 val;
  412. unsigned long flags;
  413. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  414. val = dev_priv->display.get_backlight(connector);
  415. val = intel_panel_compute_brightness(connector, val);
  416. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  417. DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
  418. return val;
  419. }
  420. static void bdw_set_backlight(struct intel_connector *connector, u32 level)
  421. {
  422. struct drm_device *dev = connector->base.dev;
  423. struct drm_i915_private *dev_priv = dev->dev_private;
  424. u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  425. I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
  426. }
  427. static void pch_set_backlight(struct intel_connector *connector, u32 level)
  428. {
  429. struct drm_device *dev = connector->base.dev;
  430. struct drm_i915_private *dev_priv = dev->dev_private;
  431. u32 tmp;
  432. tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  433. I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
  434. }
  435. static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
  436. {
  437. struct drm_device *dev = connector->base.dev;
  438. struct drm_i915_private *dev_priv = dev->dev_private;
  439. struct intel_panel *panel = &connector->panel;
  440. u32 tmp, mask;
  441. WARN_ON(panel->backlight.max == 0);
  442. if (panel->backlight.combination_mode) {
  443. u8 lbpc;
  444. lbpc = level * 0xfe / panel->backlight.max + 1;
  445. level /= lbpc;
  446. pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
  447. }
  448. if (IS_GEN4(dev)) {
  449. mask = BACKLIGHT_DUTY_CYCLE_MASK;
  450. } else {
  451. level <<= 1;
  452. mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
  453. }
  454. tmp = I915_READ(BLC_PWM_CTL) & ~mask;
  455. I915_WRITE(BLC_PWM_CTL, tmp | level);
  456. }
  457. static void vlv_set_backlight(struct intel_connector *connector, u32 level)
  458. {
  459. struct drm_device *dev = connector->base.dev;
  460. struct drm_i915_private *dev_priv = dev->dev_private;
  461. enum pipe pipe = intel_get_pipe_from_connector(connector);
  462. u32 tmp;
  463. tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  464. I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
  465. }
  466. static void
  467. intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
  468. {
  469. struct drm_device *dev = connector->base.dev;
  470. struct drm_i915_private *dev_priv = dev->dev_private;
  471. DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
  472. level = intel_panel_compute_brightness(connector, level);
  473. dev_priv->display.set_backlight(connector, level);
  474. }
  475. /* set backlight brightness to level in range [0..max] */
  476. void intel_panel_set_backlight(struct intel_connector *connector, u32 level,
  477. u32 max)
  478. {
  479. struct drm_device *dev = connector->base.dev;
  480. struct drm_i915_private *dev_priv = dev->dev_private;
  481. struct intel_panel *panel = &connector->panel;
  482. enum pipe pipe = intel_get_pipe_from_connector(connector);
  483. u32 freq;
  484. unsigned long flags;
  485. u64 n;
  486. if (!panel->backlight.present || pipe == INVALID_PIPE)
  487. return;
  488. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  489. WARN_ON(panel->backlight.max == 0);
  490. /* scale to hardware max, but be careful to not overflow */
  491. freq = panel->backlight.max;
  492. n = (u64)level * freq;
  493. do_div(n, max);
  494. level = n;
  495. panel->backlight.level = level;
  496. if (panel->backlight.device)
  497. panel->backlight.device->props.brightness = level;
  498. if (panel->backlight.enabled)
  499. intel_panel_actually_set_backlight(connector, level);
  500. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  501. }
  502. static void pch_disable_backlight(struct intel_connector *connector)
  503. {
  504. struct drm_device *dev = connector->base.dev;
  505. struct drm_i915_private *dev_priv = dev->dev_private;
  506. u32 tmp;
  507. intel_panel_actually_set_backlight(connector, 0);
  508. tmp = I915_READ(BLC_PWM_CPU_CTL2);
  509. I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
  510. tmp = I915_READ(BLC_PWM_PCH_CTL1);
  511. I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
  512. }
  513. static void i9xx_disable_backlight(struct intel_connector *connector)
  514. {
  515. intel_panel_actually_set_backlight(connector, 0);
  516. }
  517. static void i965_disable_backlight(struct intel_connector *connector)
  518. {
  519. struct drm_device *dev = connector->base.dev;
  520. struct drm_i915_private *dev_priv = dev->dev_private;
  521. u32 tmp;
  522. intel_panel_actually_set_backlight(connector, 0);
  523. tmp = I915_READ(BLC_PWM_CTL2);
  524. I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
  525. }
  526. static void vlv_disable_backlight(struct intel_connector *connector)
  527. {
  528. struct drm_device *dev = connector->base.dev;
  529. struct drm_i915_private *dev_priv = dev->dev_private;
  530. enum pipe pipe = intel_get_pipe_from_connector(connector);
  531. u32 tmp;
  532. intel_panel_actually_set_backlight(connector, 0);
  533. tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  534. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
  535. }
  536. void intel_panel_disable_backlight(struct intel_connector *connector)
  537. {
  538. struct drm_device *dev = connector->base.dev;
  539. struct drm_i915_private *dev_priv = dev->dev_private;
  540. struct intel_panel *panel = &connector->panel;
  541. enum pipe pipe = intel_get_pipe_from_connector(connector);
  542. unsigned long flags;
  543. if (!panel->backlight.present || pipe == INVALID_PIPE)
  544. return;
  545. /*
  546. * Do not disable backlight on the vgaswitcheroo path. When switching
  547. * away from i915, the other client may depend on i915 to handle the
  548. * backlight. This will leave the backlight on unnecessarily when
  549. * another client is not activated.
  550. */
  551. if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
  552. DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
  553. return;
  554. }
  555. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  556. panel->backlight.enabled = false;
  557. dev_priv->display.disable_backlight(connector);
  558. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  559. }
  560. static void bdw_enable_backlight(struct intel_connector *connector)
  561. {
  562. struct drm_device *dev = connector->base.dev;
  563. struct drm_i915_private *dev_priv = dev->dev_private;
  564. struct intel_panel *panel = &connector->panel;
  565. u32 pch_ctl1, pch_ctl2;
  566. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  567. if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  568. DRM_DEBUG_KMS("pch backlight already enabled\n");
  569. pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  570. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  571. }
  572. pch_ctl2 = panel->backlight.max << 16;
  573. I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  574. pch_ctl1 = 0;
  575. if (panel->backlight.active_low_pwm)
  576. pch_ctl1 |= BLM_PCH_POLARITY;
  577. /* BDW always uses the pch pwm controls. */
  578. pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
  579. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  580. POSTING_READ(BLC_PWM_PCH_CTL1);
  581. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  582. /* This won't stick until the above enable. */
  583. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  584. }
  585. static void pch_enable_backlight(struct intel_connector *connector)
  586. {
  587. struct drm_device *dev = connector->base.dev;
  588. struct drm_i915_private *dev_priv = dev->dev_private;
  589. struct intel_panel *panel = &connector->panel;
  590. enum pipe pipe = intel_get_pipe_from_connector(connector);
  591. enum transcoder cpu_transcoder =
  592. intel_pipe_to_cpu_transcoder(dev_priv, pipe);
  593. u32 cpu_ctl2, pch_ctl1, pch_ctl2;
  594. cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  595. if (cpu_ctl2 & BLM_PWM_ENABLE) {
  596. WARN(1, "cpu backlight already enabled\n");
  597. cpu_ctl2 &= ~BLM_PWM_ENABLE;
  598. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  599. }
  600. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  601. if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  602. DRM_DEBUG_KMS("pch backlight already enabled\n");
  603. pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  604. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  605. }
  606. if (cpu_transcoder == TRANSCODER_EDP)
  607. cpu_ctl2 = BLM_TRANSCODER_EDP;
  608. else
  609. cpu_ctl2 = BLM_PIPE(cpu_transcoder);
  610. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  611. POSTING_READ(BLC_PWM_CPU_CTL2);
  612. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
  613. /* This won't stick until the above enable. */
  614. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  615. pch_ctl2 = panel->backlight.max << 16;
  616. I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  617. pch_ctl1 = 0;
  618. if (panel->backlight.active_low_pwm)
  619. pch_ctl1 |= BLM_PCH_POLARITY;
  620. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  621. POSTING_READ(BLC_PWM_PCH_CTL1);
  622. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  623. }
  624. static void i9xx_enable_backlight(struct intel_connector *connector)
  625. {
  626. struct drm_device *dev = connector->base.dev;
  627. struct drm_i915_private *dev_priv = dev->dev_private;
  628. struct intel_panel *panel = &connector->panel;
  629. u32 ctl, freq;
  630. ctl = I915_READ(BLC_PWM_CTL);
  631. if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
  632. WARN(1, "backlight already enabled\n");
  633. I915_WRITE(BLC_PWM_CTL, 0);
  634. }
  635. freq = panel->backlight.max;
  636. if (panel->backlight.combination_mode)
  637. freq /= 0xff;
  638. ctl = freq << 17;
  639. if (panel->backlight.combination_mode)
  640. ctl |= BLM_LEGACY_MODE;
  641. if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
  642. ctl |= BLM_POLARITY_PNV;
  643. I915_WRITE(BLC_PWM_CTL, ctl);
  644. POSTING_READ(BLC_PWM_CTL);
  645. /* XXX: combine this into above write? */
  646. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  647. }
  648. static void i965_enable_backlight(struct intel_connector *connector)
  649. {
  650. struct drm_device *dev = connector->base.dev;
  651. struct drm_i915_private *dev_priv = dev->dev_private;
  652. struct intel_panel *panel = &connector->panel;
  653. enum pipe pipe = intel_get_pipe_from_connector(connector);
  654. u32 ctl, ctl2, freq;
  655. ctl2 = I915_READ(BLC_PWM_CTL2);
  656. if (ctl2 & BLM_PWM_ENABLE) {
  657. WARN(1, "backlight already enabled\n");
  658. ctl2 &= ~BLM_PWM_ENABLE;
  659. I915_WRITE(BLC_PWM_CTL2, ctl2);
  660. }
  661. freq = panel->backlight.max;
  662. if (panel->backlight.combination_mode)
  663. freq /= 0xff;
  664. ctl = freq << 16;
  665. I915_WRITE(BLC_PWM_CTL, ctl);
  666. ctl2 = BLM_PIPE(pipe);
  667. if (panel->backlight.combination_mode)
  668. ctl2 |= BLM_COMBINATION_MODE;
  669. if (panel->backlight.active_low_pwm)
  670. ctl2 |= BLM_POLARITY_I965;
  671. I915_WRITE(BLC_PWM_CTL2, ctl2);
  672. POSTING_READ(BLC_PWM_CTL2);
  673. I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
  674. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  675. }
  676. static void vlv_enable_backlight(struct intel_connector *connector)
  677. {
  678. struct drm_device *dev = connector->base.dev;
  679. struct drm_i915_private *dev_priv = dev->dev_private;
  680. struct intel_panel *panel = &connector->panel;
  681. enum pipe pipe = intel_get_pipe_from_connector(connector);
  682. u32 ctl, ctl2;
  683. ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  684. if (ctl2 & BLM_PWM_ENABLE) {
  685. WARN(1, "backlight already enabled\n");
  686. ctl2 &= ~BLM_PWM_ENABLE;
  687. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  688. }
  689. ctl = panel->backlight.max << 16;
  690. I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
  691. /* XXX: combine this into above write? */
  692. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  693. ctl2 = 0;
  694. if (panel->backlight.active_low_pwm)
  695. ctl2 |= BLM_POLARITY_I965;
  696. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  697. POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
  698. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
  699. }
  700. void intel_panel_enable_backlight(struct intel_connector *connector)
  701. {
  702. struct drm_device *dev = connector->base.dev;
  703. struct drm_i915_private *dev_priv = dev->dev_private;
  704. struct intel_panel *panel = &connector->panel;
  705. enum pipe pipe = intel_get_pipe_from_connector(connector);
  706. unsigned long flags;
  707. if (!panel->backlight.present || pipe == INVALID_PIPE)
  708. return;
  709. DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
  710. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  711. WARN_ON(panel->backlight.max == 0);
  712. if (panel->backlight.level == 0) {
  713. panel->backlight.level = panel->backlight.max;
  714. if (panel->backlight.device)
  715. panel->backlight.device->props.brightness =
  716. panel->backlight.level;
  717. }
  718. dev_priv->display.enable_backlight(connector);
  719. panel->backlight.enabled = true;
  720. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  721. }
  722. #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
  723. static int intel_backlight_device_update_status(struct backlight_device *bd)
  724. {
  725. struct intel_connector *connector = bl_get_data(bd);
  726. struct drm_device *dev = connector->base.dev;
  727. drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
  728. DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
  729. bd->props.brightness, bd->props.max_brightness);
  730. intel_panel_set_backlight(connector, bd->props.brightness,
  731. bd->props.max_brightness);
  732. drm_modeset_unlock(&dev->mode_config.connection_mutex);
  733. return 0;
  734. }
  735. static int intel_backlight_device_get_brightness(struct backlight_device *bd)
  736. {
  737. struct intel_connector *connector = bl_get_data(bd);
  738. struct drm_device *dev = connector->base.dev;
  739. struct drm_i915_private *dev_priv = dev->dev_private;
  740. int ret;
  741. intel_runtime_pm_get(dev_priv);
  742. drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
  743. ret = intel_panel_get_backlight(connector);
  744. drm_modeset_unlock(&dev->mode_config.connection_mutex);
  745. intel_runtime_pm_put(dev_priv);
  746. return ret;
  747. }
  748. static const struct backlight_ops intel_backlight_device_ops = {
  749. .update_status = intel_backlight_device_update_status,
  750. .get_brightness = intel_backlight_device_get_brightness,
  751. };
  752. static int intel_backlight_device_register(struct intel_connector *connector)
  753. {
  754. struct intel_panel *panel = &connector->panel;
  755. struct backlight_properties props;
  756. if (WARN_ON(panel->backlight.device))
  757. return -ENODEV;
  758. BUG_ON(panel->backlight.max == 0);
  759. memset(&props, 0, sizeof(props));
  760. props.type = BACKLIGHT_RAW;
  761. props.brightness = panel->backlight.level;
  762. props.max_brightness = panel->backlight.max;
  763. /*
  764. * Note: using the same name independent of the connector prevents
  765. * registration of multiple backlight devices in the driver.
  766. */
  767. panel->backlight.device =
  768. backlight_device_register("intel_backlight",
  769. connector->base.kdev,
  770. connector,
  771. &intel_backlight_device_ops, &props);
  772. if (IS_ERR(panel->backlight.device)) {
  773. DRM_ERROR("Failed to register backlight: %ld\n",
  774. PTR_ERR(panel->backlight.device));
  775. panel->backlight.device = NULL;
  776. return -ENODEV;
  777. }
  778. return 0;
  779. }
  780. static void intel_backlight_device_unregister(struct intel_connector *connector)
  781. {
  782. struct intel_panel *panel = &connector->panel;
  783. if (panel->backlight.device) {
  784. backlight_device_unregister(panel->backlight.device);
  785. panel->backlight.device = NULL;
  786. }
  787. }
  788. #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
  789. static int intel_backlight_device_register(struct intel_connector *connector)
  790. {
  791. return 0;
  792. }
  793. static void intel_backlight_device_unregister(struct intel_connector *connector)
  794. {
  795. }
  796. #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
  797. /*
  798. * Note: The setup hooks can't assume pipe is set!
  799. *
  800. * XXX: Query mode clock or hardware clock and program PWM modulation frequency
  801. * appropriately when it's 0. Use VBT and/or sane defaults.
  802. */
  803. static int bdw_setup_backlight(struct intel_connector *connector)
  804. {
  805. struct drm_device *dev = connector->base.dev;
  806. struct drm_i915_private *dev_priv = dev->dev_private;
  807. struct intel_panel *panel = &connector->panel;
  808. u32 pch_ctl1, pch_ctl2, val;
  809. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  810. panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  811. pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  812. panel->backlight.max = pch_ctl2 >> 16;
  813. if (!panel->backlight.max)
  814. return -ENODEV;
  815. val = bdw_get_backlight(connector);
  816. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  817. panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
  818. panel->backlight.level != 0;
  819. return 0;
  820. }
  821. static int pch_setup_backlight(struct intel_connector *connector)
  822. {
  823. struct drm_device *dev = connector->base.dev;
  824. struct drm_i915_private *dev_priv = dev->dev_private;
  825. struct intel_panel *panel = &connector->panel;
  826. u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
  827. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  828. panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  829. pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  830. panel->backlight.max = pch_ctl2 >> 16;
  831. if (!panel->backlight.max)
  832. return -ENODEV;
  833. val = pch_get_backlight(connector);
  834. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  835. cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  836. panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
  837. (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
  838. return 0;
  839. }
  840. static int i9xx_setup_backlight(struct intel_connector *connector)
  841. {
  842. struct drm_device *dev = connector->base.dev;
  843. struct drm_i915_private *dev_priv = dev->dev_private;
  844. struct intel_panel *panel = &connector->panel;
  845. u32 ctl, val;
  846. ctl = I915_READ(BLC_PWM_CTL);
  847. if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
  848. panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
  849. if (IS_PINEVIEW(dev))
  850. panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
  851. panel->backlight.max = ctl >> 17;
  852. if (panel->backlight.combination_mode)
  853. panel->backlight.max *= 0xff;
  854. if (!panel->backlight.max)
  855. return -ENODEV;
  856. val = i9xx_get_backlight(connector);
  857. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  858. panel->backlight.enabled = panel->backlight.level != 0;
  859. return 0;
  860. }
  861. static int i965_setup_backlight(struct intel_connector *connector)
  862. {
  863. struct drm_device *dev = connector->base.dev;
  864. struct drm_i915_private *dev_priv = dev->dev_private;
  865. struct intel_panel *panel = &connector->panel;
  866. u32 ctl, ctl2, val;
  867. ctl2 = I915_READ(BLC_PWM_CTL2);
  868. panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
  869. panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  870. ctl = I915_READ(BLC_PWM_CTL);
  871. panel->backlight.max = ctl >> 16;
  872. if (panel->backlight.combination_mode)
  873. panel->backlight.max *= 0xff;
  874. if (!panel->backlight.max)
  875. return -ENODEV;
  876. val = i9xx_get_backlight(connector);
  877. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  878. panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
  879. panel->backlight.level != 0;
  880. return 0;
  881. }
  882. static int vlv_setup_backlight(struct intel_connector *connector)
  883. {
  884. struct drm_device *dev = connector->base.dev;
  885. struct drm_i915_private *dev_priv = dev->dev_private;
  886. struct intel_panel *panel = &connector->panel;
  887. enum pipe pipe;
  888. u32 ctl, ctl2, val;
  889. for_each_pipe(pipe) {
  890. u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(pipe));
  891. /* Skip if the modulation freq is already set */
  892. if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK)
  893. continue;
  894. cur_val &= BACKLIGHT_DUTY_CYCLE_MASK;
  895. I915_WRITE(VLV_BLC_PWM_CTL(pipe), (0xf42 << 16) |
  896. cur_val);
  897. }
  898. ctl2 = I915_READ(VLV_BLC_PWM_CTL2(PIPE_A));
  899. panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  900. ctl = I915_READ(VLV_BLC_PWM_CTL(PIPE_A));
  901. panel->backlight.max = ctl >> 16;
  902. if (!panel->backlight.max)
  903. return -ENODEV;
  904. val = _vlv_get_backlight(dev, PIPE_A);
  905. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  906. panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
  907. panel->backlight.level != 0;
  908. return 0;
  909. }
  910. int intel_panel_setup_backlight(struct drm_connector *connector)
  911. {
  912. struct drm_device *dev = connector->dev;
  913. struct drm_i915_private *dev_priv = dev->dev_private;
  914. struct intel_connector *intel_connector = to_intel_connector(connector);
  915. struct intel_panel *panel = &intel_connector->panel;
  916. unsigned long flags;
  917. int ret;
  918. if (!dev_priv->vbt.backlight.present) {
  919. if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
  920. DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
  921. } else {
  922. DRM_DEBUG_KMS("no backlight present per VBT\n");
  923. return 0;
  924. }
  925. }
  926. /* set level and max in panel struct */
  927. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  928. ret = dev_priv->display.setup_backlight(intel_connector);
  929. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  930. if (ret) {
  931. DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
  932. connector->name);
  933. return ret;
  934. }
  935. intel_backlight_device_register(intel_connector);
  936. panel->backlight.present = true;
  937. DRM_DEBUG_KMS("backlight initialized, %s, brightness %u/%u, "
  938. "sysfs interface %sregistered\n",
  939. panel->backlight.enabled ? "enabled" : "disabled",
  940. panel->backlight.level, panel->backlight.max,
  941. panel->backlight.device ? "" : "not ");
  942. return 0;
  943. }
  944. void intel_panel_destroy_backlight(struct drm_connector *connector)
  945. {
  946. struct intel_connector *intel_connector = to_intel_connector(connector);
  947. struct intel_panel *panel = &intel_connector->panel;
  948. panel->backlight.present = false;
  949. intel_backlight_device_unregister(intel_connector);
  950. }
  951. /* Set up chip specific backlight functions */
  952. void intel_panel_init_backlight_funcs(struct drm_device *dev)
  953. {
  954. struct drm_i915_private *dev_priv = dev->dev_private;
  955. if (IS_BROADWELL(dev)) {
  956. dev_priv->display.setup_backlight = bdw_setup_backlight;
  957. dev_priv->display.enable_backlight = bdw_enable_backlight;
  958. dev_priv->display.disable_backlight = pch_disable_backlight;
  959. dev_priv->display.set_backlight = bdw_set_backlight;
  960. dev_priv->display.get_backlight = bdw_get_backlight;
  961. } else if (HAS_PCH_SPLIT(dev)) {
  962. dev_priv->display.setup_backlight = pch_setup_backlight;
  963. dev_priv->display.enable_backlight = pch_enable_backlight;
  964. dev_priv->display.disable_backlight = pch_disable_backlight;
  965. dev_priv->display.set_backlight = pch_set_backlight;
  966. dev_priv->display.get_backlight = pch_get_backlight;
  967. } else if (IS_VALLEYVIEW(dev)) {
  968. dev_priv->display.setup_backlight = vlv_setup_backlight;
  969. dev_priv->display.enable_backlight = vlv_enable_backlight;
  970. dev_priv->display.disable_backlight = vlv_disable_backlight;
  971. dev_priv->display.set_backlight = vlv_set_backlight;
  972. dev_priv->display.get_backlight = vlv_get_backlight;
  973. } else if (IS_GEN4(dev)) {
  974. dev_priv->display.setup_backlight = i965_setup_backlight;
  975. dev_priv->display.enable_backlight = i965_enable_backlight;
  976. dev_priv->display.disable_backlight = i965_disable_backlight;
  977. dev_priv->display.set_backlight = i9xx_set_backlight;
  978. dev_priv->display.get_backlight = i9xx_get_backlight;
  979. } else {
  980. dev_priv->display.setup_backlight = i9xx_setup_backlight;
  981. dev_priv->display.enable_backlight = i9xx_enable_backlight;
  982. dev_priv->display.disable_backlight = i9xx_disable_backlight;
  983. dev_priv->display.set_backlight = i9xx_set_backlight;
  984. dev_priv->display.get_backlight = i9xx_get_backlight;
  985. }
  986. }
  987. int intel_panel_init(struct intel_panel *panel,
  988. struct drm_display_mode *fixed_mode,
  989. struct drm_display_mode *downclock_mode)
  990. {
  991. panel->fixed_mode = fixed_mode;
  992. panel->downclock_mode = downclock_mode;
  993. return 0;
  994. }
  995. void intel_panel_fini(struct intel_panel *panel)
  996. {
  997. struct intel_connector *intel_connector =
  998. container_of(panel, struct intel_connector, panel);
  999. if (panel->fixed_mode)
  1000. drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
  1001. if (panel->downclock_mode)
  1002. drm_mode_destroy(intel_connector->base.dev,
  1003. panel->downclock_mode);
  1004. }