i915_gem_render_state.c 4.6 KB

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  1. /*
  2. * Copyright © 2014 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Mika Kuoppala <mika.kuoppala@intel.com>
  25. *
  26. */
  27. #include "i915_drv.h"
  28. #include "intel_renderstate.h"
  29. struct i915_render_state {
  30. struct drm_i915_gem_object *obj;
  31. unsigned long ggtt_offset;
  32. u32 *batch;
  33. u32 size;
  34. u32 len;
  35. };
  36. static struct i915_render_state *render_state_alloc(struct drm_device *dev)
  37. {
  38. struct i915_render_state *so;
  39. struct page *page;
  40. int ret;
  41. so = kzalloc(sizeof(*so), GFP_KERNEL);
  42. if (!so)
  43. return ERR_PTR(-ENOMEM);
  44. so->obj = i915_gem_alloc_object(dev, 4096);
  45. if (so->obj == NULL) {
  46. ret = -ENOMEM;
  47. goto free;
  48. }
  49. so->size = 4096;
  50. ret = i915_gem_obj_ggtt_pin(so->obj, 4096, 0);
  51. if (ret)
  52. goto free_gem;
  53. BUG_ON(so->obj->pages->nents != 1);
  54. page = sg_page(so->obj->pages->sgl);
  55. so->batch = kmap(page);
  56. if (!so->batch) {
  57. ret = -ENOMEM;
  58. goto unpin;
  59. }
  60. so->ggtt_offset = i915_gem_obj_ggtt_offset(so->obj);
  61. return so;
  62. unpin:
  63. i915_gem_object_ggtt_unpin(so->obj);
  64. free_gem:
  65. drm_gem_object_unreference(&so->obj->base);
  66. free:
  67. kfree(so);
  68. return ERR_PTR(ret);
  69. }
  70. static void render_state_free(struct i915_render_state *so)
  71. {
  72. kunmap(kmap_to_page(so->batch));
  73. i915_gem_object_ggtt_unpin(so->obj);
  74. drm_gem_object_unreference(&so->obj->base);
  75. kfree(so);
  76. }
  77. static const struct intel_renderstate_rodata *
  78. render_state_get_rodata(struct drm_device *dev, const int gen)
  79. {
  80. switch (gen) {
  81. case 6:
  82. return &gen6_null_state;
  83. case 7:
  84. return &gen7_null_state;
  85. case 8:
  86. return &gen8_null_state;
  87. }
  88. return NULL;
  89. }
  90. static int render_state_setup(const int gen,
  91. const struct intel_renderstate_rodata *rodata,
  92. struct i915_render_state *so)
  93. {
  94. const u64 goffset = i915_gem_obj_ggtt_offset(so->obj);
  95. u32 reloc_index = 0;
  96. u32 * const d = so->batch;
  97. unsigned int i = 0;
  98. int ret;
  99. if (!rodata || rodata->batch_items * 4 > so->size)
  100. return -EINVAL;
  101. ret = i915_gem_object_set_to_cpu_domain(so->obj, true);
  102. if (ret)
  103. return ret;
  104. while (i < rodata->batch_items) {
  105. u32 s = rodata->batch[i];
  106. if (reloc_index < rodata->reloc_items &&
  107. i * 4 == rodata->reloc[reloc_index]) {
  108. s += goffset & 0xffffffff;
  109. /* We keep batch offsets max 32bit */
  110. if (gen >= 8) {
  111. if (i + 1 >= rodata->batch_items ||
  112. rodata->batch[i + 1] != 0)
  113. return -EINVAL;
  114. d[i] = s;
  115. i++;
  116. s = (goffset & 0xffffffff00000000ull) >> 32;
  117. }
  118. reloc_index++;
  119. }
  120. d[i] = s;
  121. i++;
  122. }
  123. ret = i915_gem_object_set_to_gtt_domain(so->obj, false);
  124. if (ret)
  125. return ret;
  126. if (rodata->reloc_items != reloc_index) {
  127. DRM_ERROR("not all relocs resolved, %d out of %d\n",
  128. reloc_index, rodata->reloc_items);
  129. return -EINVAL;
  130. }
  131. so->len = rodata->batch_items * 4;
  132. return 0;
  133. }
  134. int i915_gem_render_state_init(struct intel_engine_cs *ring)
  135. {
  136. const int gen = INTEL_INFO(ring->dev)->gen;
  137. struct i915_render_state *so;
  138. const struct intel_renderstate_rodata *rodata;
  139. int ret;
  140. if (WARN_ON(ring->id != RCS))
  141. return -ENOENT;
  142. rodata = render_state_get_rodata(ring->dev, gen);
  143. if (rodata == NULL)
  144. return 0;
  145. so = render_state_alloc(ring->dev);
  146. if (IS_ERR(so))
  147. return PTR_ERR(so);
  148. ret = render_state_setup(gen, rodata, so);
  149. if (ret)
  150. goto out;
  151. ret = ring->dispatch_execbuffer(ring,
  152. i915_gem_obj_ggtt_offset(so->obj),
  153. so->len,
  154. I915_DISPATCH_SECURE);
  155. if (ret)
  156. goto out;
  157. i915_vma_move_to_active(i915_gem_obj_to_ggtt(so->obj), ring);
  158. ret = __i915_add_request(ring, NULL, so->obj, NULL);
  159. /* __i915_add_request moves object to inactive if it fails */
  160. out:
  161. render_state_free(so);
  162. return ret;
  163. }