exynos_drm_plane.c 6.9 KB

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  1. /*
  2. * Copyright (C) 2011 Samsung Electronics Co.Ltd
  3. * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. */
  11. #include <drm/drmP.h>
  12. #include <drm/exynos_drm.h>
  13. #include "exynos_drm_drv.h"
  14. #include "exynos_drm_crtc.h"
  15. #include "exynos_drm_fb.h"
  16. #include "exynos_drm_gem.h"
  17. #include "exynos_drm_plane.h"
  18. #define to_exynos_plane(x) container_of(x, struct exynos_plane, base)
  19. struct exynos_plane {
  20. struct drm_plane base;
  21. struct exynos_drm_overlay overlay;
  22. bool enabled;
  23. };
  24. static const uint32_t formats[] = {
  25. DRM_FORMAT_XRGB8888,
  26. DRM_FORMAT_ARGB8888,
  27. DRM_FORMAT_NV12,
  28. DRM_FORMAT_NV12MT,
  29. };
  30. /*
  31. * This function is to get X or Y size shown via screen. This needs length and
  32. * start position of CRTC.
  33. *
  34. * <--- length --->
  35. * CRTC ----------------
  36. * ^ start ^ end
  37. *
  38. * There are six cases from a to f.
  39. *
  40. * <----- SCREEN ----->
  41. * 0 last
  42. * ----------|------------------|----------
  43. * CRTCs
  44. * a -------
  45. * b -------
  46. * c --------------------------
  47. * d --------
  48. * e -------
  49. * f -------
  50. */
  51. static int exynos_plane_get_size(int start, unsigned length, unsigned last)
  52. {
  53. int end = start + length;
  54. int size = 0;
  55. if (start <= 0) {
  56. if (end > 0)
  57. size = min_t(unsigned, end, last);
  58. } else if (start <= last) {
  59. size = min_t(unsigned, last - start, length);
  60. }
  61. return size;
  62. }
  63. int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
  64. struct drm_framebuffer *fb, int crtc_x, int crtc_y,
  65. unsigned int crtc_w, unsigned int crtc_h,
  66. uint32_t src_x, uint32_t src_y,
  67. uint32_t src_w, uint32_t src_h)
  68. {
  69. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  70. struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
  71. unsigned int actual_w;
  72. unsigned int actual_h;
  73. int nr;
  74. int i;
  75. nr = exynos_drm_fb_get_buf_cnt(fb);
  76. for (i = 0; i < nr; i++) {
  77. struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);
  78. if (!buffer) {
  79. DRM_DEBUG_KMS("buffer is null\n");
  80. return -EFAULT;
  81. }
  82. overlay->dma_addr[i] = buffer->dma_addr;
  83. DRM_DEBUG_KMS("buffer: %d, dma_addr = 0x%lx\n",
  84. i, (unsigned long)overlay->dma_addr[i]);
  85. }
  86. actual_w = exynos_plane_get_size(crtc_x, crtc_w, crtc->mode.hdisplay);
  87. actual_h = exynos_plane_get_size(crtc_y, crtc_h, crtc->mode.vdisplay);
  88. if (crtc_x < 0) {
  89. if (actual_w)
  90. src_x -= crtc_x;
  91. crtc_x = 0;
  92. }
  93. if (crtc_y < 0) {
  94. if (actual_h)
  95. src_y -= crtc_y;
  96. crtc_y = 0;
  97. }
  98. /* set drm framebuffer data. */
  99. overlay->fb_x = src_x;
  100. overlay->fb_y = src_y;
  101. overlay->fb_width = fb->width;
  102. overlay->fb_height = fb->height;
  103. overlay->src_width = src_w;
  104. overlay->src_height = src_h;
  105. overlay->bpp = fb->bits_per_pixel;
  106. overlay->pitch = fb->pitches[0];
  107. overlay->pixel_format = fb->pixel_format;
  108. /* set overlay range to be displayed. */
  109. overlay->crtc_x = crtc_x;
  110. overlay->crtc_y = crtc_y;
  111. overlay->crtc_width = actual_w;
  112. overlay->crtc_height = actual_h;
  113. /* set drm mode data. */
  114. overlay->mode_width = crtc->mode.hdisplay;
  115. overlay->mode_height = crtc->mode.vdisplay;
  116. overlay->refresh = crtc->mode.vrefresh;
  117. overlay->scan_flag = crtc->mode.flags;
  118. DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
  119. overlay->crtc_x, overlay->crtc_y,
  120. overlay->crtc_width, overlay->crtc_height);
  121. exynos_drm_crtc_plane_mode_set(crtc, overlay);
  122. return 0;
  123. }
  124. void exynos_plane_commit(struct drm_plane *plane)
  125. {
  126. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  127. struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
  128. exynos_drm_crtc_plane_commit(plane->crtc, overlay->zpos);
  129. }
  130. void exynos_plane_dpms(struct drm_plane *plane, int mode)
  131. {
  132. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  133. struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
  134. if (mode == DRM_MODE_DPMS_ON) {
  135. if (exynos_plane->enabled)
  136. return;
  137. exynos_drm_crtc_plane_enable(plane->crtc, overlay->zpos);
  138. exynos_plane->enabled = true;
  139. } else {
  140. if (!exynos_plane->enabled)
  141. return;
  142. exynos_drm_crtc_plane_disable(plane->crtc, overlay->zpos);
  143. exynos_plane->enabled = false;
  144. }
  145. }
  146. static int
  147. exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
  148. struct drm_framebuffer *fb, int crtc_x, int crtc_y,
  149. unsigned int crtc_w, unsigned int crtc_h,
  150. uint32_t src_x, uint32_t src_y,
  151. uint32_t src_w, uint32_t src_h)
  152. {
  153. int ret;
  154. ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
  155. crtc_w, crtc_h, src_x >> 16, src_y >> 16,
  156. src_w >> 16, src_h >> 16);
  157. if (ret < 0)
  158. return ret;
  159. plane->crtc = crtc;
  160. exynos_plane_commit(plane);
  161. exynos_plane_dpms(plane, DRM_MODE_DPMS_ON);
  162. return 0;
  163. }
  164. static int exynos_disable_plane(struct drm_plane *plane)
  165. {
  166. exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF);
  167. return 0;
  168. }
  169. static void exynos_plane_destroy(struct drm_plane *plane)
  170. {
  171. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  172. exynos_disable_plane(plane);
  173. drm_plane_cleanup(plane);
  174. kfree(exynos_plane);
  175. }
  176. static int exynos_plane_set_property(struct drm_plane *plane,
  177. struct drm_property *property,
  178. uint64_t val)
  179. {
  180. struct drm_device *dev = plane->dev;
  181. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  182. struct exynos_drm_private *dev_priv = dev->dev_private;
  183. if (property == dev_priv->plane_zpos_property) {
  184. exynos_plane->overlay.zpos = val;
  185. return 0;
  186. }
  187. return -EINVAL;
  188. }
  189. static struct drm_plane_funcs exynos_plane_funcs = {
  190. .update_plane = exynos_update_plane,
  191. .disable_plane = exynos_disable_plane,
  192. .destroy = exynos_plane_destroy,
  193. .set_property = exynos_plane_set_property,
  194. };
  195. static void exynos_plane_attach_zpos_property(struct drm_plane *plane)
  196. {
  197. struct drm_device *dev = plane->dev;
  198. struct exynos_drm_private *dev_priv = dev->dev_private;
  199. struct drm_property *prop;
  200. prop = dev_priv->plane_zpos_property;
  201. if (!prop) {
  202. prop = drm_property_create_range(dev, 0, "zpos", 0,
  203. MAX_PLANE - 1);
  204. if (!prop)
  205. return;
  206. dev_priv->plane_zpos_property = prop;
  207. }
  208. drm_object_attach_property(&plane->base, prop, 0);
  209. }
  210. struct drm_plane *exynos_plane_init(struct drm_device *dev,
  211. unsigned long possible_crtcs, bool priv)
  212. {
  213. struct exynos_plane *exynos_plane;
  214. int err;
  215. exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
  216. if (!exynos_plane)
  217. return NULL;
  218. err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
  219. &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
  220. priv);
  221. if (err) {
  222. DRM_ERROR("failed to initialize plane\n");
  223. kfree(exynos_plane);
  224. return NULL;
  225. }
  226. if (priv)
  227. exynos_plane->overlay.zpos = DEFAULT_ZPOS;
  228. else
  229. exynos_plane_attach_zpos_property(&exynos_plane->base);
  230. return &exynos_plane->base;
  231. }