drm_cache.c 4.0 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. /*
  28. * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
  29. */
  30. #include <linux/export.h>
  31. #include <drm/drmP.h>
  32. #if defined(CONFIG_X86)
  33. /*
  34. * clflushopt is an unordered instruction which needs fencing with mfence or
  35. * sfence to avoid ordering issues. For drm_clflush_page this fencing happens
  36. * in the caller.
  37. */
  38. static void
  39. drm_clflush_page(struct page *page)
  40. {
  41. uint8_t *page_virtual;
  42. unsigned int i;
  43. const int size = boot_cpu_data.x86_clflush_size;
  44. if (unlikely(page == NULL))
  45. return;
  46. page_virtual = kmap_atomic(page);
  47. for (i = 0; i < PAGE_SIZE; i += size)
  48. clflushopt(page_virtual + i);
  49. kunmap_atomic(page_virtual);
  50. }
  51. static void drm_cache_flush_clflush(struct page *pages[],
  52. unsigned long num_pages)
  53. {
  54. unsigned long i;
  55. mb();
  56. for (i = 0; i < num_pages; i++)
  57. drm_clflush_page(*pages++);
  58. mb();
  59. }
  60. static void
  61. drm_clflush_ipi_handler(void *null)
  62. {
  63. wbinvd();
  64. }
  65. #endif
  66. void
  67. drm_clflush_pages(struct page *pages[], unsigned long num_pages)
  68. {
  69. #if defined(CONFIG_X86)
  70. if (cpu_has_clflush) {
  71. drm_cache_flush_clflush(pages, num_pages);
  72. return;
  73. }
  74. if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
  75. printk(KERN_ERR "Timed out waiting for cache flush.\n");
  76. #elif defined(__powerpc__)
  77. unsigned long i;
  78. for (i = 0; i < num_pages; i++) {
  79. struct page *page = pages[i];
  80. void *page_virtual;
  81. if (unlikely(page == NULL))
  82. continue;
  83. page_virtual = kmap_atomic(page);
  84. flush_dcache_range((unsigned long)page_virtual,
  85. (unsigned long)page_virtual + PAGE_SIZE);
  86. kunmap_atomic(page_virtual);
  87. }
  88. #else
  89. printk(KERN_ERR "Architecture has no drm_cache.c support\n");
  90. WARN_ON_ONCE(1);
  91. #endif
  92. }
  93. EXPORT_SYMBOL(drm_clflush_pages);
  94. void
  95. drm_clflush_sg(struct sg_table *st)
  96. {
  97. #if defined(CONFIG_X86)
  98. if (cpu_has_clflush) {
  99. struct sg_page_iter sg_iter;
  100. mb();
  101. for_each_sg_page(st->sgl, &sg_iter, st->nents, 0)
  102. drm_clflush_page(sg_page_iter_page(&sg_iter));
  103. mb();
  104. return;
  105. }
  106. if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
  107. printk(KERN_ERR "Timed out waiting for cache flush.\n");
  108. #else
  109. printk(KERN_ERR "Architecture has no drm_cache.c support\n");
  110. WARN_ON_ONCE(1);
  111. #endif
  112. }
  113. EXPORT_SYMBOL(drm_clflush_sg);
  114. void
  115. drm_clflush_virt_range(void *addr, unsigned long length)
  116. {
  117. #if defined(CONFIG_X86)
  118. if (cpu_has_clflush) {
  119. void *end = addr + length;
  120. mb();
  121. for (; addr < end; addr += boot_cpu_data.x86_clflush_size)
  122. clflushopt(addr);
  123. clflushopt(end - 1);
  124. mb();
  125. return;
  126. }
  127. if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
  128. printk(KERN_ERR "Timed out waiting for cache flush.\n");
  129. #else
  130. printk(KERN_ERR "Architecture has no drm_cache.c support\n");
  131. WARN_ON_ONCE(1);
  132. #endif
  133. }
  134. EXPORT_SYMBOL(drm_clflush_virt_range);