acpi-cpufreq.c 24 KB

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  1. /*
  2. * acpi-cpufreq.c - ACPI Processor P-States Driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
  8. *
  9. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along
  22. * with this program; if not, write to the Free Software Foundation, Inc.,
  23. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  24. *
  25. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  26. */
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/sched.h>
  32. #include <linux/cpufreq.h>
  33. #include <linux/compiler.h>
  34. #include <linux/dmi.h>
  35. #include <linux/slab.h>
  36. #include <linux/acpi.h>
  37. #include <linux/io.h>
  38. #include <linux/delay.h>
  39. #include <linux/uaccess.h>
  40. #include <acpi/processor.h>
  41. #include <asm/msr.h>
  42. #include <asm/processor.h>
  43. #include <asm/cpufeature.h>
  44. MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
  45. MODULE_DESCRIPTION("ACPI Processor P-States Driver");
  46. MODULE_LICENSE("GPL");
  47. #define PFX "acpi-cpufreq: "
  48. enum {
  49. UNDEFINED_CAPABLE = 0,
  50. SYSTEM_INTEL_MSR_CAPABLE,
  51. SYSTEM_AMD_MSR_CAPABLE,
  52. SYSTEM_IO_CAPABLE,
  53. };
  54. #define INTEL_MSR_RANGE (0xffff)
  55. #define AMD_MSR_RANGE (0x7)
  56. #define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
  57. struct acpi_cpufreq_data {
  58. struct acpi_processor_performance *acpi_data;
  59. struct cpufreq_frequency_table *freq_table;
  60. unsigned int resume;
  61. unsigned int cpu_feature;
  62. cpumask_var_t freqdomain_cpus;
  63. };
  64. static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data);
  65. /* acpi_perf_data is a pointer to percpu data. */
  66. static struct acpi_processor_performance __percpu *acpi_perf_data;
  67. static struct cpufreq_driver acpi_cpufreq_driver;
  68. static unsigned int acpi_pstate_strict;
  69. static struct msr __percpu *msrs;
  70. static bool boost_state(unsigned int cpu)
  71. {
  72. u32 lo, hi;
  73. u64 msr;
  74. switch (boot_cpu_data.x86_vendor) {
  75. case X86_VENDOR_INTEL:
  76. rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
  77. msr = lo | ((u64)hi << 32);
  78. return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
  79. case X86_VENDOR_AMD:
  80. rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
  81. msr = lo | ((u64)hi << 32);
  82. return !(msr & MSR_K7_HWCR_CPB_DIS);
  83. }
  84. return false;
  85. }
  86. static void boost_set_msrs(bool enable, const struct cpumask *cpumask)
  87. {
  88. u32 cpu;
  89. u32 msr_addr;
  90. u64 msr_mask;
  91. switch (boot_cpu_data.x86_vendor) {
  92. case X86_VENDOR_INTEL:
  93. msr_addr = MSR_IA32_MISC_ENABLE;
  94. msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
  95. break;
  96. case X86_VENDOR_AMD:
  97. msr_addr = MSR_K7_HWCR;
  98. msr_mask = MSR_K7_HWCR_CPB_DIS;
  99. break;
  100. default:
  101. return;
  102. }
  103. rdmsr_on_cpus(cpumask, msr_addr, msrs);
  104. for_each_cpu(cpu, cpumask) {
  105. struct msr *reg = per_cpu_ptr(msrs, cpu);
  106. if (enable)
  107. reg->q &= ~msr_mask;
  108. else
  109. reg->q |= msr_mask;
  110. }
  111. wrmsr_on_cpus(cpumask, msr_addr, msrs);
  112. }
  113. static int _store_boost(int val)
  114. {
  115. get_online_cpus();
  116. boost_set_msrs(val, cpu_online_mask);
  117. put_online_cpus();
  118. pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis");
  119. return 0;
  120. }
  121. static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
  122. {
  123. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  124. return cpufreq_show_cpus(data->freqdomain_cpus, buf);
  125. }
  126. cpufreq_freq_attr_ro(freqdomain_cpus);
  127. #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
  128. static ssize_t store_boost(const char *buf, size_t count)
  129. {
  130. int ret;
  131. unsigned long val = 0;
  132. if (!acpi_cpufreq_driver.boost_supported)
  133. return -EINVAL;
  134. ret = kstrtoul(buf, 10, &val);
  135. if (ret || (val > 1))
  136. return -EINVAL;
  137. _store_boost((int) val);
  138. return count;
  139. }
  140. static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
  141. size_t count)
  142. {
  143. return store_boost(buf, count);
  144. }
  145. static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
  146. {
  147. return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
  148. }
  149. cpufreq_freq_attr_rw(cpb);
  150. #endif
  151. static int check_est_cpu(unsigned int cpuid)
  152. {
  153. struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
  154. return cpu_has(cpu, X86_FEATURE_EST);
  155. }
  156. static int check_amd_hwpstate_cpu(unsigned int cpuid)
  157. {
  158. struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
  159. return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
  160. }
  161. static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
  162. {
  163. struct acpi_processor_performance *perf;
  164. int i;
  165. perf = data->acpi_data;
  166. for (i = 0; i < perf->state_count; i++) {
  167. if (value == perf->states[i].status)
  168. return data->freq_table[i].frequency;
  169. }
  170. return 0;
  171. }
  172. static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
  173. {
  174. struct cpufreq_frequency_table *pos;
  175. struct acpi_processor_performance *perf;
  176. if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
  177. msr &= AMD_MSR_RANGE;
  178. else
  179. msr &= INTEL_MSR_RANGE;
  180. perf = data->acpi_data;
  181. cpufreq_for_each_entry(pos, data->freq_table)
  182. if (msr == perf->states[pos->driver_data].status)
  183. return pos->frequency;
  184. return data->freq_table[0].frequency;
  185. }
  186. static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
  187. {
  188. switch (data->cpu_feature) {
  189. case SYSTEM_INTEL_MSR_CAPABLE:
  190. case SYSTEM_AMD_MSR_CAPABLE:
  191. return extract_msr(val, data);
  192. case SYSTEM_IO_CAPABLE:
  193. return extract_io(val, data);
  194. default:
  195. return 0;
  196. }
  197. }
  198. struct msr_addr {
  199. u32 reg;
  200. };
  201. struct io_addr {
  202. u16 port;
  203. u8 bit_width;
  204. };
  205. struct drv_cmd {
  206. unsigned int type;
  207. const struct cpumask *mask;
  208. union {
  209. struct msr_addr msr;
  210. struct io_addr io;
  211. } addr;
  212. u32 val;
  213. };
  214. /* Called via smp_call_function_single(), on the target CPU */
  215. static void do_drv_read(void *_cmd)
  216. {
  217. struct drv_cmd *cmd = _cmd;
  218. u32 h;
  219. switch (cmd->type) {
  220. case SYSTEM_INTEL_MSR_CAPABLE:
  221. case SYSTEM_AMD_MSR_CAPABLE:
  222. rdmsr(cmd->addr.msr.reg, cmd->val, h);
  223. break;
  224. case SYSTEM_IO_CAPABLE:
  225. acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
  226. &cmd->val,
  227. (u32)cmd->addr.io.bit_width);
  228. break;
  229. default:
  230. break;
  231. }
  232. }
  233. /* Called via smp_call_function_many(), on the target CPUs */
  234. static void do_drv_write(void *_cmd)
  235. {
  236. struct drv_cmd *cmd = _cmd;
  237. u32 lo, hi;
  238. switch (cmd->type) {
  239. case SYSTEM_INTEL_MSR_CAPABLE:
  240. rdmsr(cmd->addr.msr.reg, lo, hi);
  241. lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
  242. wrmsr(cmd->addr.msr.reg, lo, hi);
  243. break;
  244. case SYSTEM_AMD_MSR_CAPABLE:
  245. wrmsr(cmd->addr.msr.reg, cmd->val, 0);
  246. break;
  247. case SYSTEM_IO_CAPABLE:
  248. acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
  249. cmd->val,
  250. (u32)cmd->addr.io.bit_width);
  251. break;
  252. default:
  253. break;
  254. }
  255. }
  256. static void drv_read(struct drv_cmd *cmd)
  257. {
  258. int err;
  259. cmd->val = 0;
  260. err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1);
  261. WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
  262. }
  263. static void drv_write(struct drv_cmd *cmd)
  264. {
  265. int this_cpu;
  266. this_cpu = get_cpu();
  267. if (cpumask_test_cpu(this_cpu, cmd->mask))
  268. do_drv_write(cmd);
  269. smp_call_function_many(cmd->mask, do_drv_write, cmd, 1);
  270. put_cpu();
  271. }
  272. static u32 get_cur_val(const struct cpumask *mask)
  273. {
  274. struct acpi_processor_performance *perf;
  275. struct drv_cmd cmd;
  276. if (unlikely(cpumask_empty(mask)))
  277. return 0;
  278. switch (per_cpu(acfreq_data, cpumask_first(mask))->cpu_feature) {
  279. case SYSTEM_INTEL_MSR_CAPABLE:
  280. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  281. cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
  282. break;
  283. case SYSTEM_AMD_MSR_CAPABLE:
  284. cmd.type = SYSTEM_AMD_MSR_CAPABLE;
  285. cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
  286. break;
  287. case SYSTEM_IO_CAPABLE:
  288. cmd.type = SYSTEM_IO_CAPABLE;
  289. perf = per_cpu(acfreq_data, cpumask_first(mask))->acpi_data;
  290. cmd.addr.io.port = perf->control_register.address;
  291. cmd.addr.io.bit_width = perf->control_register.bit_width;
  292. break;
  293. default:
  294. return 0;
  295. }
  296. cmd.mask = mask;
  297. drv_read(&cmd);
  298. pr_debug("get_cur_val = %u\n", cmd.val);
  299. return cmd.val;
  300. }
  301. static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
  302. {
  303. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu);
  304. unsigned int freq;
  305. unsigned int cached_freq;
  306. pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
  307. if (unlikely(data == NULL ||
  308. data->acpi_data == NULL || data->freq_table == NULL)) {
  309. return 0;
  310. }
  311. cached_freq = data->freq_table[data->acpi_data->state].frequency;
  312. freq = extract_freq(get_cur_val(cpumask_of(cpu)), data);
  313. if (freq != cached_freq) {
  314. /*
  315. * The dreaded BIOS frequency change behind our back.
  316. * Force set the frequency on next target call.
  317. */
  318. data->resume = 1;
  319. }
  320. pr_debug("cur freq = %u\n", freq);
  321. return freq;
  322. }
  323. static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
  324. struct acpi_cpufreq_data *data)
  325. {
  326. unsigned int cur_freq;
  327. unsigned int i;
  328. for (i = 0; i < 100; i++) {
  329. cur_freq = extract_freq(get_cur_val(mask), data);
  330. if (cur_freq == freq)
  331. return 1;
  332. udelay(10);
  333. }
  334. return 0;
  335. }
  336. static int acpi_cpufreq_target(struct cpufreq_policy *policy,
  337. unsigned int index)
  338. {
  339. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  340. struct acpi_processor_performance *perf;
  341. struct drv_cmd cmd;
  342. unsigned int next_perf_state = 0; /* Index into perf table */
  343. int result = 0;
  344. if (unlikely(data == NULL ||
  345. data->acpi_data == NULL || data->freq_table == NULL)) {
  346. return -ENODEV;
  347. }
  348. perf = data->acpi_data;
  349. next_perf_state = data->freq_table[index].driver_data;
  350. if (perf->state == next_perf_state) {
  351. if (unlikely(data->resume)) {
  352. pr_debug("Called after resume, resetting to P%d\n",
  353. next_perf_state);
  354. data->resume = 0;
  355. } else {
  356. pr_debug("Already at target state (P%d)\n",
  357. next_perf_state);
  358. goto out;
  359. }
  360. }
  361. switch (data->cpu_feature) {
  362. case SYSTEM_INTEL_MSR_CAPABLE:
  363. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  364. cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
  365. cmd.val = (u32) perf->states[next_perf_state].control;
  366. break;
  367. case SYSTEM_AMD_MSR_CAPABLE:
  368. cmd.type = SYSTEM_AMD_MSR_CAPABLE;
  369. cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
  370. cmd.val = (u32) perf->states[next_perf_state].control;
  371. break;
  372. case SYSTEM_IO_CAPABLE:
  373. cmd.type = SYSTEM_IO_CAPABLE;
  374. cmd.addr.io.port = perf->control_register.address;
  375. cmd.addr.io.bit_width = perf->control_register.bit_width;
  376. cmd.val = (u32) perf->states[next_perf_state].control;
  377. break;
  378. default:
  379. result = -ENODEV;
  380. goto out;
  381. }
  382. /* cpufreq holds the hotplug lock, so we are safe from here on */
  383. if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
  384. cmd.mask = policy->cpus;
  385. else
  386. cmd.mask = cpumask_of(policy->cpu);
  387. drv_write(&cmd);
  388. if (acpi_pstate_strict) {
  389. if (!check_freqs(cmd.mask, data->freq_table[index].frequency,
  390. data)) {
  391. pr_debug("acpi_cpufreq_target failed (%d)\n",
  392. policy->cpu);
  393. result = -EAGAIN;
  394. }
  395. }
  396. if (!result)
  397. perf->state = next_perf_state;
  398. out:
  399. return result;
  400. }
  401. static unsigned long
  402. acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
  403. {
  404. struct acpi_processor_performance *perf = data->acpi_data;
  405. if (cpu_khz) {
  406. /* search the closest match to cpu_khz */
  407. unsigned int i;
  408. unsigned long freq;
  409. unsigned long freqn = perf->states[0].core_frequency * 1000;
  410. for (i = 0; i < (perf->state_count-1); i++) {
  411. freq = freqn;
  412. freqn = perf->states[i+1].core_frequency * 1000;
  413. if ((2 * cpu_khz) > (freqn + freq)) {
  414. perf->state = i;
  415. return freq;
  416. }
  417. }
  418. perf->state = perf->state_count-1;
  419. return freqn;
  420. } else {
  421. /* assume CPU is at P0... */
  422. perf->state = 0;
  423. return perf->states[0].core_frequency * 1000;
  424. }
  425. }
  426. static void free_acpi_perf_data(void)
  427. {
  428. unsigned int i;
  429. /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
  430. for_each_possible_cpu(i)
  431. free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
  432. ->shared_cpu_map);
  433. free_percpu(acpi_perf_data);
  434. }
  435. static int boost_notify(struct notifier_block *nb, unsigned long action,
  436. void *hcpu)
  437. {
  438. unsigned cpu = (long)hcpu;
  439. const struct cpumask *cpumask;
  440. cpumask = get_cpu_mask(cpu);
  441. /*
  442. * Clear the boost-disable bit on the CPU_DOWN path so that
  443. * this cpu cannot block the remaining ones from boosting. On
  444. * the CPU_UP path we simply keep the boost-disable flag in
  445. * sync with the current global state.
  446. */
  447. switch (action) {
  448. case CPU_UP_PREPARE:
  449. case CPU_UP_PREPARE_FROZEN:
  450. boost_set_msrs(acpi_cpufreq_driver.boost_enabled, cpumask);
  451. break;
  452. case CPU_DOWN_PREPARE:
  453. case CPU_DOWN_PREPARE_FROZEN:
  454. boost_set_msrs(1, cpumask);
  455. break;
  456. default:
  457. break;
  458. }
  459. return NOTIFY_OK;
  460. }
  461. static struct notifier_block boost_nb = {
  462. .notifier_call = boost_notify,
  463. };
  464. /*
  465. * acpi_cpufreq_early_init - initialize ACPI P-States library
  466. *
  467. * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
  468. * in order to determine correct frequency and voltage pairings. We can
  469. * do _PDC and _PSD and find out the processor dependency for the
  470. * actual init that will happen later...
  471. */
  472. static int __init acpi_cpufreq_early_init(void)
  473. {
  474. unsigned int i;
  475. pr_debug("acpi_cpufreq_early_init\n");
  476. acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
  477. if (!acpi_perf_data) {
  478. pr_debug("Memory allocation error for acpi_perf_data.\n");
  479. return -ENOMEM;
  480. }
  481. for_each_possible_cpu(i) {
  482. if (!zalloc_cpumask_var_node(
  483. &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
  484. GFP_KERNEL, cpu_to_node(i))) {
  485. /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
  486. free_acpi_perf_data();
  487. return -ENOMEM;
  488. }
  489. }
  490. /* Do initialization in ACPI core */
  491. acpi_processor_preregister_performance(acpi_perf_data);
  492. return 0;
  493. }
  494. #ifdef CONFIG_SMP
  495. /*
  496. * Some BIOSes do SW_ANY coordination internally, either set it up in hw
  497. * or do it in BIOS firmware and won't inform about it to OS. If not
  498. * detected, this has a side effect of making CPU run at a different speed
  499. * than OS intended it to run at. Detect it and handle it cleanly.
  500. */
  501. static int bios_with_sw_any_bug;
  502. static int sw_any_bug_found(const struct dmi_system_id *d)
  503. {
  504. bios_with_sw_any_bug = 1;
  505. return 0;
  506. }
  507. static const struct dmi_system_id sw_any_bug_dmi_table[] = {
  508. {
  509. .callback = sw_any_bug_found,
  510. .ident = "Supermicro Server X6DLP",
  511. .matches = {
  512. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  513. DMI_MATCH(DMI_BIOS_VERSION, "080010"),
  514. DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
  515. },
  516. },
  517. { }
  518. };
  519. static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
  520. {
  521. /* Intel Xeon Processor 7100 Series Specification Update
  522. * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
  523. * AL30: A Machine Check Exception (MCE) Occurring during an
  524. * Enhanced Intel SpeedStep Technology Ratio Change May Cause
  525. * Both Processor Cores to Lock Up. */
  526. if (c->x86_vendor == X86_VENDOR_INTEL) {
  527. if ((c->x86 == 15) &&
  528. (c->x86_model == 6) &&
  529. (c->x86_mask == 8)) {
  530. printk(KERN_INFO "acpi-cpufreq: Intel(R) "
  531. "Xeon(R) 7100 Errata AL30, processors may "
  532. "lock up on frequency changes: disabling "
  533. "acpi-cpufreq.\n");
  534. return -ENODEV;
  535. }
  536. }
  537. return 0;
  538. }
  539. #endif
  540. static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
  541. {
  542. unsigned int i;
  543. unsigned int valid_states = 0;
  544. unsigned int cpu = policy->cpu;
  545. struct acpi_cpufreq_data *data;
  546. unsigned int result = 0;
  547. struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
  548. struct acpi_processor_performance *perf;
  549. #ifdef CONFIG_SMP
  550. static int blacklisted;
  551. #endif
  552. pr_debug("acpi_cpufreq_cpu_init\n");
  553. #ifdef CONFIG_SMP
  554. if (blacklisted)
  555. return blacklisted;
  556. blacklisted = acpi_cpufreq_blacklist(c);
  557. if (blacklisted)
  558. return blacklisted;
  559. #endif
  560. data = kzalloc(sizeof(*data), GFP_KERNEL);
  561. if (!data)
  562. return -ENOMEM;
  563. if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
  564. result = -ENOMEM;
  565. goto err_free;
  566. }
  567. data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu);
  568. per_cpu(acfreq_data, cpu) = data;
  569. if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
  570. acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
  571. result = acpi_processor_register_performance(data->acpi_data, cpu);
  572. if (result)
  573. goto err_free_mask;
  574. perf = data->acpi_data;
  575. policy->shared_type = perf->shared_type;
  576. /*
  577. * Will let policy->cpus know about dependency only when software
  578. * coordination is required.
  579. */
  580. if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
  581. policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
  582. cpumask_copy(policy->cpus, perf->shared_cpu_map);
  583. }
  584. cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
  585. #ifdef CONFIG_SMP
  586. dmi_check_system(sw_any_bug_dmi_table);
  587. if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
  588. policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
  589. cpumask_copy(policy->cpus, cpu_core_mask(cpu));
  590. }
  591. if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
  592. cpumask_clear(policy->cpus);
  593. cpumask_set_cpu(cpu, policy->cpus);
  594. cpumask_copy(data->freqdomain_cpus, cpu_sibling_mask(cpu));
  595. policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
  596. pr_info_once(PFX "overriding BIOS provided _PSD data\n");
  597. }
  598. #endif
  599. /* capability check */
  600. if (perf->state_count <= 1) {
  601. pr_debug("No P-States\n");
  602. result = -ENODEV;
  603. goto err_unreg;
  604. }
  605. if (perf->control_register.space_id != perf->status_register.space_id) {
  606. result = -ENODEV;
  607. goto err_unreg;
  608. }
  609. switch (perf->control_register.space_id) {
  610. case ACPI_ADR_SPACE_SYSTEM_IO:
  611. if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
  612. boot_cpu_data.x86 == 0xf) {
  613. pr_debug("AMD K8 systems must use native drivers.\n");
  614. result = -ENODEV;
  615. goto err_unreg;
  616. }
  617. pr_debug("SYSTEM IO addr space\n");
  618. data->cpu_feature = SYSTEM_IO_CAPABLE;
  619. break;
  620. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  621. pr_debug("HARDWARE addr space\n");
  622. if (check_est_cpu(cpu)) {
  623. data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
  624. break;
  625. }
  626. if (check_amd_hwpstate_cpu(cpu)) {
  627. data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
  628. break;
  629. }
  630. result = -ENODEV;
  631. goto err_unreg;
  632. default:
  633. pr_debug("Unknown addr space %d\n",
  634. (u32) (perf->control_register.space_id));
  635. result = -ENODEV;
  636. goto err_unreg;
  637. }
  638. data->freq_table = kzalloc(sizeof(*data->freq_table) *
  639. (perf->state_count+1), GFP_KERNEL);
  640. if (!data->freq_table) {
  641. result = -ENOMEM;
  642. goto err_unreg;
  643. }
  644. /* detect transition latency */
  645. policy->cpuinfo.transition_latency = 0;
  646. for (i = 0; i < perf->state_count; i++) {
  647. if ((perf->states[i].transition_latency * 1000) >
  648. policy->cpuinfo.transition_latency)
  649. policy->cpuinfo.transition_latency =
  650. perf->states[i].transition_latency * 1000;
  651. }
  652. /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
  653. if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
  654. policy->cpuinfo.transition_latency > 20 * 1000) {
  655. policy->cpuinfo.transition_latency = 20 * 1000;
  656. printk_once(KERN_INFO
  657. "P-state transition latency capped at 20 uS\n");
  658. }
  659. /* table init */
  660. for (i = 0; i < perf->state_count; i++) {
  661. if (i > 0 && perf->states[i].core_frequency >=
  662. data->freq_table[valid_states-1].frequency / 1000)
  663. continue;
  664. data->freq_table[valid_states].driver_data = i;
  665. data->freq_table[valid_states].frequency =
  666. perf->states[i].core_frequency * 1000;
  667. valid_states++;
  668. }
  669. data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
  670. perf->state = 0;
  671. result = cpufreq_table_validate_and_show(policy, data->freq_table);
  672. if (result)
  673. goto err_freqfree;
  674. if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
  675. printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n");
  676. switch (perf->control_register.space_id) {
  677. case ACPI_ADR_SPACE_SYSTEM_IO:
  678. /*
  679. * The core will not set policy->cur, because
  680. * cpufreq_driver->get is NULL, so we need to set it here.
  681. * However, we have to guess it, because the current speed is
  682. * unknown and not detectable via IO ports.
  683. */
  684. policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
  685. break;
  686. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  687. acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
  688. break;
  689. default:
  690. break;
  691. }
  692. /* notify BIOS that we exist */
  693. acpi_processor_notify_smm(THIS_MODULE);
  694. pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
  695. for (i = 0; i < perf->state_count; i++)
  696. pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
  697. (i == perf->state ? '*' : ' '), i,
  698. (u32) perf->states[i].core_frequency,
  699. (u32) perf->states[i].power,
  700. (u32) perf->states[i].transition_latency);
  701. /*
  702. * the first call to ->target() should result in us actually
  703. * writing something to the appropriate registers.
  704. */
  705. data->resume = 1;
  706. return result;
  707. err_freqfree:
  708. kfree(data->freq_table);
  709. err_unreg:
  710. acpi_processor_unregister_performance(perf, cpu);
  711. err_free_mask:
  712. free_cpumask_var(data->freqdomain_cpus);
  713. err_free:
  714. kfree(data);
  715. per_cpu(acfreq_data, cpu) = NULL;
  716. return result;
  717. }
  718. static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  719. {
  720. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  721. pr_debug("acpi_cpufreq_cpu_exit\n");
  722. if (data) {
  723. per_cpu(acfreq_data, policy->cpu) = NULL;
  724. acpi_processor_unregister_performance(data->acpi_data,
  725. policy->cpu);
  726. free_cpumask_var(data->freqdomain_cpus);
  727. kfree(data->freq_table);
  728. kfree(data);
  729. }
  730. return 0;
  731. }
  732. static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
  733. {
  734. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  735. pr_debug("acpi_cpufreq_resume\n");
  736. data->resume = 1;
  737. return 0;
  738. }
  739. static struct freq_attr *acpi_cpufreq_attr[] = {
  740. &cpufreq_freq_attr_scaling_available_freqs,
  741. &freqdomain_cpus,
  742. NULL, /* this is a placeholder for cpb, do not remove */
  743. NULL,
  744. };
  745. static struct cpufreq_driver acpi_cpufreq_driver = {
  746. .verify = cpufreq_generic_frequency_table_verify,
  747. .target_index = acpi_cpufreq_target,
  748. .bios_limit = acpi_processor_get_bios_limit,
  749. .init = acpi_cpufreq_cpu_init,
  750. .exit = acpi_cpufreq_cpu_exit,
  751. .resume = acpi_cpufreq_resume,
  752. .name = "acpi-cpufreq",
  753. .attr = acpi_cpufreq_attr,
  754. .set_boost = _store_boost,
  755. };
  756. static void __init acpi_cpufreq_boost_init(void)
  757. {
  758. if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) {
  759. msrs = msrs_alloc();
  760. if (!msrs)
  761. return;
  762. acpi_cpufreq_driver.boost_supported = true;
  763. acpi_cpufreq_driver.boost_enabled = boost_state(0);
  764. cpu_notifier_register_begin();
  765. /* Force all MSRs to the same value */
  766. boost_set_msrs(acpi_cpufreq_driver.boost_enabled,
  767. cpu_online_mask);
  768. __register_cpu_notifier(&boost_nb);
  769. cpu_notifier_register_done();
  770. }
  771. }
  772. static void acpi_cpufreq_boost_exit(void)
  773. {
  774. if (msrs) {
  775. unregister_cpu_notifier(&boost_nb);
  776. msrs_free(msrs);
  777. msrs = NULL;
  778. }
  779. }
  780. static int __init acpi_cpufreq_init(void)
  781. {
  782. int ret;
  783. if (acpi_disabled)
  784. return -ENODEV;
  785. /* don't keep reloading if cpufreq_driver exists */
  786. if (cpufreq_get_current_driver())
  787. return -EEXIST;
  788. pr_debug("acpi_cpufreq_init\n");
  789. ret = acpi_cpufreq_early_init();
  790. if (ret)
  791. return ret;
  792. #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
  793. /* this is a sysfs file with a strange name and an even stranger
  794. * semantic - per CPU instantiation, but system global effect.
  795. * Lets enable it only on AMD CPUs for compatibility reasons and
  796. * only if configured. This is considered legacy code, which
  797. * will probably be removed at some point in the future.
  798. */
  799. if (check_amd_hwpstate_cpu(0)) {
  800. struct freq_attr **iter;
  801. pr_debug("adding sysfs entry for cpb\n");
  802. for (iter = acpi_cpufreq_attr; *iter != NULL; iter++)
  803. ;
  804. /* make sure there is a terminator behind it */
  805. if (iter[1] == NULL)
  806. *iter = &cpb;
  807. }
  808. #endif
  809. acpi_cpufreq_boost_init();
  810. ret = cpufreq_register_driver(&acpi_cpufreq_driver);
  811. if (ret) {
  812. free_acpi_perf_data();
  813. acpi_cpufreq_boost_exit();
  814. }
  815. return ret;
  816. }
  817. static void __exit acpi_cpufreq_exit(void)
  818. {
  819. pr_debug("acpi_cpufreq_exit\n");
  820. acpi_cpufreq_boost_exit();
  821. cpufreq_unregister_driver(&acpi_cpufreq_driver);
  822. free_acpi_perf_data();
  823. }
  824. module_param(acpi_pstate_strict, uint, 0644);
  825. MODULE_PARM_DESC(acpi_pstate_strict,
  826. "value 0 or non-zero. non-zero -> strict ACPI checks are "
  827. "performed during frequency changes.");
  828. late_initcall(acpi_cpufreq_init);
  829. module_exit(acpi_cpufreq_exit);
  830. static const struct x86_cpu_id acpi_cpufreq_ids[] = {
  831. X86_FEATURE_MATCH(X86_FEATURE_ACPI),
  832. X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
  833. {}
  834. };
  835. MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
  836. static const struct acpi_device_id processor_device_ids[] = {
  837. {ACPI_PROCESSOR_OBJECT_HID, },
  838. {ACPI_PROCESSOR_DEVICE_HID, },
  839. {},
  840. };
  841. MODULE_DEVICE_TABLE(acpi, processor_device_ids);
  842. MODULE_ALIAS("acpi");