clk-s2mps11.c 7.7 KB

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  1. /*
  2. * clk-s2mps11.c - Clock driver for S2MPS11.
  3. *
  4. * Copyright (C) 2013,2014 Samsung Electornics
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. #include <linux/module.h>
  18. #include <linux/err.h>
  19. #include <linux/of.h>
  20. #include <linux/clkdev.h>
  21. #include <linux/regmap.h>
  22. #include <linux/clk-provider.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/mfd/samsung/s2mps11.h>
  25. #include <linux/mfd/samsung/s2mps14.h>
  26. #include <linux/mfd/samsung/s5m8767.h>
  27. #include <linux/mfd/samsung/core.h>
  28. #define s2mps11_name(a) (a->hw.init->name)
  29. static struct clk **clk_table;
  30. static struct clk_onecell_data clk_data;
  31. enum {
  32. S2MPS11_CLK_AP = 0,
  33. S2MPS11_CLK_CP,
  34. S2MPS11_CLK_BT,
  35. S2MPS11_CLKS_NUM,
  36. };
  37. struct s2mps11_clk {
  38. struct sec_pmic_dev *iodev;
  39. struct device_node *clk_np;
  40. struct clk_hw hw;
  41. struct clk *clk;
  42. struct clk_lookup *lookup;
  43. u32 mask;
  44. bool enabled;
  45. unsigned int reg;
  46. };
  47. static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
  48. {
  49. return container_of(hw, struct s2mps11_clk, hw);
  50. }
  51. static int s2mps11_clk_prepare(struct clk_hw *hw)
  52. {
  53. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  54. int ret;
  55. ret = regmap_update_bits(s2mps11->iodev->regmap_pmic,
  56. s2mps11->reg,
  57. s2mps11->mask, s2mps11->mask);
  58. if (!ret)
  59. s2mps11->enabled = true;
  60. return ret;
  61. }
  62. static void s2mps11_clk_unprepare(struct clk_hw *hw)
  63. {
  64. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  65. int ret;
  66. ret = regmap_update_bits(s2mps11->iodev->regmap_pmic, s2mps11->reg,
  67. s2mps11->mask, ~s2mps11->mask);
  68. if (!ret)
  69. s2mps11->enabled = false;
  70. }
  71. static int s2mps11_clk_is_enabled(struct clk_hw *hw)
  72. {
  73. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  74. return s2mps11->enabled;
  75. }
  76. static unsigned long s2mps11_clk_recalc_rate(struct clk_hw *hw,
  77. unsigned long parent_rate)
  78. {
  79. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  80. if (s2mps11->enabled)
  81. return 32768;
  82. else
  83. return 0;
  84. }
  85. static struct clk_ops s2mps11_clk_ops = {
  86. .prepare = s2mps11_clk_prepare,
  87. .unprepare = s2mps11_clk_unprepare,
  88. .is_enabled = s2mps11_clk_is_enabled,
  89. .recalc_rate = s2mps11_clk_recalc_rate,
  90. };
  91. static struct clk_init_data s2mps11_clks_init[S2MPS11_CLKS_NUM] = {
  92. [S2MPS11_CLK_AP] = {
  93. .name = "s2mps11_ap",
  94. .ops = &s2mps11_clk_ops,
  95. .flags = CLK_IS_ROOT,
  96. },
  97. [S2MPS11_CLK_CP] = {
  98. .name = "s2mps11_cp",
  99. .ops = &s2mps11_clk_ops,
  100. .flags = CLK_IS_ROOT,
  101. },
  102. [S2MPS11_CLK_BT] = {
  103. .name = "s2mps11_bt",
  104. .ops = &s2mps11_clk_ops,
  105. .flags = CLK_IS_ROOT,
  106. },
  107. };
  108. static struct clk_init_data s2mps14_clks_init[S2MPS11_CLKS_NUM] = {
  109. [S2MPS11_CLK_AP] = {
  110. .name = "s2mps14_ap",
  111. .ops = &s2mps11_clk_ops,
  112. .flags = CLK_IS_ROOT,
  113. },
  114. [S2MPS11_CLK_BT] = {
  115. .name = "s2mps14_bt",
  116. .ops = &s2mps11_clk_ops,
  117. .flags = CLK_IS_ROOT,
  118. },
  119. };
  120. static struct device_node *s2mps11_clk_parse_dt(struct platform_device *pdev,
  121. struct clk_init_data *clks_init)
  122. {
  123. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  124. struct device_node *clk_np;
  125. int i;
  126. if (!iodev->dev->of_node)
  127. return ERR_PTR(-EINVAL);
  128. clk_np = of_get_child_by_name(iodev->dev->of_node, "clocks");
  129. if (!clk_np) {
  130. dev_err(&pdev->dev, "could not find clock sub-node\n");
  131. return ERR_PTR(-EINVAL);
  132. }
  133. for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
  134. if (!clks_init[i].name)
  135. continue; /* Skip clocks not present in some devices */
  136. of_property_read_string_index(clk_np, "clock-output-names", i,
  137. &clks_init[i].name);
  138. }
  139. return clk_np;
  140. }
  141. static int s2mps11_clk_probe(struct platform_device *pdev)
  142. {
  143. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  144. struct s2mps11_clk *s2mps11_clks, *s2mps11_clk;
  145. unsigned int s2mps11_reg;
  146. struct clk_init_data *clks_init;
  147. int i, ret = 0;
  148. u32 val;
  149. s2mps11_clks = devm_kzalloc(&pdev->dev, sizeof(*s2mps11_clk) *
  150. S2MPS11_CLKS_NUM, GFP_KERNEL);
  151. if (!s2mps11_clks)
  152. return -ENOMEM;
  153. s2mps11_clk = s2mps11_clks;
  154. clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk *) *
  155. S2MPS11_CLKS_NUM, GFP_KERNEL);
  156. if (!clk_table)
  157. return -ENOMEM;
  158. switch(platform_get_device_id(pdev)->driver_data) {
  159. case S2MPS11X:
  160. s2mps11_reg = S2MPS11_REG_RTC_CTRL;
  161. clks_init = s2mps11_clks_init;
  162. break;
  163. case S2MPS14X:
  164. s2mps11_reg = S2MPS14_REG_RTCCTRL;
  165. clks_init = s2mps14_clks_init;
  166. break;
  167. case S5M8767X:
  168. s2mps11_reg = S5M8767_REG_CTRL1;
  169. clks_init = s2mps11_clks_init;
  170. break;
  171. default:
  172. dev_err(&pdev->dev, "Invalid device type\n");
  173. return -EINVAL;
  174. };
  175. /* Store clocks of_node in first element of s2mps11_clks array */
  176. s2mps11_clks->clk_np = s2mps11_clk_parse_dt(pdev, clks_init);
  177. if (IS_ERR(s2mps11_clks->clk_np))
  178. return PTR_ERR(s2mps11_clks->clk_np);
  179. for (i = 0; i < S2MPS11_CLKS_NUM; i++, s2mps11_clk++) {
  180. if (!clks_init[i].name)
  181. continue; /* Skip clocks not present in some devices */
  182. s2mps11_clk->iodev = iodev;
  183. s2mps11_clk->hw.init = &clks_init[i];
  184. s2mps11_clk->mask = 1 << i;
  185. s2mps11_clk->reg = s2mps11_reg;
  186. ret = regmap_read(s2mps11_clk->iodev->regmap_pmic,
  187. s2mps11_clk->reg, &val);
  188. if (ret < 0)
  189. goto err_reg;
  190. s2mps11_clk->enabled = val & s2mps11_clk->mask;
  191. s2mps11_clk->clk = devm_clk_register(&pdev->dev,
  192. &s2mps11_clk->hw);
  193. if (IS_ERR(s2mps11_clk->clk)) {
  194. dev_err(&pdev->dev, "Fail to register : %s\n",
  195. s2mps11_name(s2mps11_clk));
  196. ret = PTR_ERR(s2mps11_clk->clk);
  197. goto err_reg;
  198. }
  199. s2mps11_clk->lookup = clkdev_alloc(s2mps11_clk->clk,
  200. s2mps11_name(s2mps11_clk), NULL);
  201. if (!s2mps11_clk->lookup) {
  202. ret = -ENOMEM;
  203. goto err_lup;
  204. }
  205. clkdev_add(s2mps11_clk->lookup);
  206. }
  207. for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
  208. /* Skip clocks not present on S2MPS14 */
  209. if (!clks_init[i].name)
  210. continue;
  211. clk_table[i] = s2mps11_clks[i].clk;
  212. }
  213. clk_data.clks = clk_table;
  214. clk_data.clk_num = S2MPS11_CLKS_NUM;
  215. of_clk_add_provider(s2mps11_clks->clk_np, of_clk_src_onecell_get,
  216. &clk_data);
  217. platform_set_drvdata(pdev, s2mps11_clks);
  218. return ret;
  219. err_lup:
  220. devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
  221. err_reg:
  222. while (s2mps11_clk > s2mps11_clks) {
  223. if (s2mps11_clk->lookup) {
  224. clkdev_drop(s2mps11_clk->lookup);
  225. devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
  226. }
  227. s2mps11_clk--;
  228. }
  229. return ret;
  230. }
  231. static int s2mps11_clk_remove(struct platform_device *pdev)
  232. {
  233. struct s2mps11_clk *s2mps11_clks = platform_get_drvdata(pdev);
  234. int i;
  235. of_clk_del_provider(s2mps11_clks[0].clk_np);
  236. /* Drop the reference obtained in s2mps11_clk_parse_dt */
  237. of_node_put(s2mps11_clks[0].clk_np);
  238. for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
  239. /* Skip clocks not present on S2MPS14 */
  240. if (!s2mps11_clks[i].lookup)
  241. continue;
  242. clkdev_drop(s2mps11_clks[i].lookup);
  243. }
  244. return 0;
  245. }
  246. static const struct platform_device_id s2mps11_clk_id[] = {
  247. { "s2mps11-clk", S2MPS11X},
  248. { "s2mps14-clk", S2MPS14X},
  249. { "s5m8767-clk", S5M8767X},
  250. { },
  251. };
  252. MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
  253. static struct platform_driver s2mps11_clk_driver = {
  254. .driver = {
  255. .name = "s2mps11-clk",
  256. .owner = THIS_MODULE,
  257. },
  258. .probe = s2mps11_clk_probe,
  259. .remove = s2mps11_clk_remove,
  260. .id_table = s2mps11_clk_id,
  261. };
  262. static int __init s2mps11_clk_init(void)
  263. {
  264. return platform_driver_register(&s2mps11_clk_driver);
  265. }
  266. subsys_initcall(s2mps11_clk_init);
  267. static void __init s2mps11_clk_cleanup(void)
  268. {
  269. platform_driver_unregister(&s2mps11_clk_driver);
  270. }
  271. module_exit(s2mps11_clk_cleanup);
  272. MODULE_DESCRIPTION("S2MPS11 Clock Driver");
  273. MODULE_AUTHOR("Yadwinder Singh Brar <yadi.brar@samsung.com>");
  274. MODULE_LICENSE("GPL");